JP6220646B2 - Chip resistor and manufacturing method thereof - Google Patents
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- 238000004519 manufacturing process Methods 0.000 title claims description 5
- 238000009966 trimming Methods 0.000 claims description 30
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Description
本発明は、絶縁基板上に設けられた抵抗体にトリミング溝を形成することで抵抗値が調整されるチップ抵抗器と、そのようなチップ抵抗器の製造方法に関するものである。 The present invention relates to a chip resistor whose resistance value is adjusted by forming a trimming groove in a resistor provided on an insulating substrate, and a method for manufacturing such a chip resistor.
図６は一般的なチップ抵抗器を示す平面図であり、このチップ抵抗器１００は、セラミックス等からなる直方体形状の絶縁基板１０１と、絶縁基板１０１の長手方向両端部に設けられた一対の表面電極１０２と、両表面電極１０２に跨がって設けられた長方形状の抵抗体１０３等によって主に構成されており、抵抗体１０３には抵抗値を調整するためのトリミング溝１０４が形成されている。トリミング溝１０４はレーザの照射によって形成されるスリットであり、そのスリット形状として図６に示すようなＬカットが広く採用されている。 FIG. 6 is a plan view showing a general chip resistor. The chip resistor 100 includes a rectangular parallelepiped insulating substrate 101 made of ceramics and the like, and a pair of surfaces provided at both longitudinal ends of the insulating substrate 101. The electrode 102 is mainly composed of a rectangular resistor 103 provided over both surface electrodes 102. The resistor 103 has a trimming groove 104 for adjusting a resistance value. Yes. The trimming groove 104 is a slit formed by laser irradiation, and an L-cut as shown in FIG. 6 is widely adopted as the slit shape.
このようなトリミング溝１０４を形成する場合、まず、抵抗体１０３の一側端（図の下辺）から鉛直方向に第１スリット１０４ａを入れて、測定抵抗値が目標抵抗値よりも僅かに下回るまで抵抗体１０３の抵抗値を増大させる（抵抗値の粗調整）。しかる後、第１スリット１０４ａの終端部から抵抗体１０３の長手方向（図の右方向）に第２スリット１０４ｂを入れ、第１スリット１０４ａと第２スリット１０４ｂをＬ字状に連続させることにより、目標抵抗値に対して測定抵抗値を一致させるようにしている（抵抗値の微調整）。 When forming such a trimming groove 104, first, the first slit 104a is inserted in the vertical direction from one side end (the lower side of the figure) of the resistor 103 until the measured resistance value is slightly lower than the target resistance value. The resistance value of the resistor 103 is increased (rough adjustment of the resistance value). After that, by inserting the second slit 104b in the longitudinal direction (right direction in the figure) of the resistor 103 from the terminal portion of the first slit 104a, and continuing the first slit 104a and the second slit 104b in an L shape, The measured resistance value is matched with the target resistance value (fine adjustment of the resistance value).
ここで、Ｌカット形のトリミング溝１０４は、粗調整用の第１スリット１０４ａを形成した後に、その先端を直交方向へ延長して微調整用の第２スリット１０４ｂを形成するというトリミング方法であるが、粗調整用の第１スリット１０４ａが形成された時点における抵抗体１０３内の領域についてみると、図７に示すように、トリミング溝を形成することで抵抗値が大きく変化する（電流が多く流れる）領域Ｓ１と、抵抗値が小さく変化する（電流が少なく流れる）領域Ｓ２と、抵抗値がほとんど変化しない（電流がほとんど流れない）領域Ｓ３とに区分することができる。そして、第２スリット１０４ｂは、抵抗値が大きく変化する領域Ｓ１と抵抗値が小さく変化する領域Ｓ２との境に沿ってスリットを形成することで、切り込み量増分に対する抵抗値増分の割合を小さくして抵抗値の微調整を行うというものである。その際、抵抗値が小さく変化する領域Ｓ２についての電流密度を考慮すると、領域Ｓ１に近い方に多くの電流が流れ、領域Ｓ３に近付くにつれて流れる電流が少なくなるため、領域Ｓ１に近いところを切り込む第２スリット１０４ｂは、第２スリット１０４ｂの切り込み量増分に対する抵抗値増分の割合が比較的大きくなってしまい、抵抗値設定の精度を向上させることが困難となる。 Here, the L-cut trimming groove 104 is a trimming method in which after the first slit 104a for coarse adjustment is formed, the tip thereof is extended in the orthogonal direction to form the second slit 104b for fine adjustment. However, looking at the region in the resistor 103 at the time when the first slit 104a for coarse adjustment is formed, as shown in FIG. 7, the resistance value changes greatly by forming the trimming groove (the current is large). It can be divided into a region S1 that flows), a region S2 in which the resistance value changes small (current flows little), and a region S3 in which the resistance value hardly changes (current hardly flows). The second slit 104b forms a slit along the boundary between the region S1 in which the resistance value changes greatly and the region S2 in which the resistance value changes small, thereby reducing the ratio of the resistance value increment to the cut amount increment. Thus, the resistance value is finely adjusted. At this time, considering the current density of the region S2 whose resistance value changes small, a larger amount of current flows closer to the region S1 and less current flows closer to the region S3. In the second slit 104b, the ratio of the resistance value increment to the cut amount increment of the second slit 104b becomes relatively large, and it becomes difficult to improve the accuracy of the resistance value setting.
そこで従来より、図８に示すように、トリミング溝のパターンをレ字状にしたチップ抵抗器が提案されている（特許文献１参照）。このトリミング溝１０５は、抵抗体１０３の一側端から鉛直方向に延びる第１スリット１０５ａと、第１スリット１０５ａの終端部から抵抗体１０３の一側端に向かって斜めに延びる第２スリット１０５ｂとを有しており、これら第１スリット１０５ａと第２スリット１０５ｂは鋭角に交差している。第１スリット１０５ａは、測定抵抗値が目標抵抗値よりも僅かに下回る位置まで形成される粗調整用のスリットであり、第２スリット１０５ｂは、目標抵抗値に対して測定抵抗値が一致するように形成される微調整用のスリットである。 Therefore, conventionally, as shown in FIG. 8, a chip resistor in which a pattern of a trimming groove is formed in a letter shape has been proposed (see Patent Document 1). The trimming groove 105 includes a first slit 105a extending in a vertical direction from one end of the resistor 103, and a second slit 105b extending obliquely from the terminal end of the first slit 105a toward the one end of the resistor 103. The first slit 105a and the second slit 105b intersect at an acute angle. The first slit 105a is a slit for coarse adjustment formed to a position where the measured resistance value is slightly lower than the target resistance value, and the second slit 105b is such that the measured resistance value matches the target resistance value. It is a slit for fine adjustment formed in this.
この場合において、第１スリット１０５ａが形成された時点における抵抗体１０３内の電流密度を考えると、前述した図７と同様に、トリミング溝を形成することで抵抗値が大きく変化する領域Ｓ１と抵抗値が小さく変化する領域Ｓ２と抵抗値がほとんど変化しない領域Ｓ３とに区分され、さらに領域Ｓ２については、領域Ｓ１に近いほど抵抗値変化が大きく、領域Ｓ１から遠ざかって領域Ｓ３に近付くほど抵抗値変化が小さくなる。そして、トリミング溝１０５のパターンをレ字状にしたチップ抵抗器は、抵抗値変化が大きく変化する領域Ｓ１から遠い方向へ第２スリット１０５ｂが切り込まれるため、第２スリット１０５ｂの切り込み量増分に対する抵抗値増分の割合が小さくなって、目標抵抗値に対する誤差を小さくすることが可能となる。 In this case, considering the current density in the resistor 103 at the time when the first slit 105a is formed, similarly to FIG. 7 described above, the region S1 in which the resistance value changes greatly by forming the trimming groove and the resistance It is divided into a region S2 in which the value changes small and a region S3 in which the resistance value hardly changes. Further, with respect to the region S2, the resistance value changes more as it is closer to the region S1, and the resistance value increases as it is farther from the region S1 Change is smaller. In the chip resistor in which the pattern of the trimming groove 105 is formed in a letter shape, the second slit 105b is cut away from the region S1 in which the change in resistance value greatly changes. The ratio of the resistance value increment is reduced, and the error with respect to the target resistance value can be reduced.
また、他の従来例として、トリミング溝のパターンを２本にしたダブルカットのチップ抵抗器も提案されている。このトリミング溝は、抵抗体の一側端から鉛直方向に延びる粗調整用の第１スリットと、同じく抵抗体の一側端から鉛直方向に延びる微調整用の第２スリットとを有しており、第１スリットと第２スリットは電極間方向へずれた位置で平行に形成されている。第２スリットは抵抗値変化が大きく変化する領域Ｓ１まで切り込まないようにしなければならず、したがって、第２スリットの長さは第１スリットよりも短くする必要がある。このようにトリミング溝のパターンをダブルカットにしたチップ抵抗器では、抵抗値変化が大きく変化する領域Ｓ１から遠い領域で第２スリットが切り込まれるため、第２スリットの切り込み量増分に対する抵抗値増分の割合がさらに小さくなって、目標抵抗値に対する誤差を小さくすることが可能となる。 As another conventional example, a double-cut chip resistor having two trimming groove patterns has been proposed. The trimming groove has a first slit for coarse adjustment extending in the vertical direction from one end of the resistor, and a second slit for fine adjustment extending in the vertical direction from one end of the resistor. The first slit and the second slit are formed in parallel at positions shifted in the inter-electrode direction. The second slit must not be cut into the region S1 where the change in resistance value greatly changes. Therefore, the length of the second slit needs to be shorter than that of the first slit. In the chip resistor in which the pattern of the trimming groove is double-cut in this way, the second slit is cut in a region far from the region S1 in which the change in the resistance value greatly changes. Therefore, the resistance value increment relative to the cut amount increment of the second slit. It becomes possible to further reduce the error with respect to the target resistance value.
特許文献１に開示された従来のチップ抵抗器では、トリミング溝のパターンをレ字状にすることによって、微調整用の第２スリットの切り込み量増分に対する抵抗値増分の割合が小さくなるため、抵抗値調整を高精度に行うことができる。しかしながら、トリミング前の抵抗体（初期抵抗値）が目標抵抗値に近い状態で形成されている場合は、粗調整用の第１スリットの長さが短いものになってしまい、その後に第２スリットを形成しようとしても、第１スリットの終端部から抵抗体の一側端に向かって斜め方向へ僅かしか延ばすことができなくなるため、第２スリットによる微調整の範囲が極端に狭められてしまい、実質的に抵抗値の微調整を行うことができなくなる。同様に、トリミング溝のパターンをダブルカットにしたチップ抵抗器でも、初期抵抗値が目標抵抗値に近い状態で形成されている場合は、粗調整用の第１スリットの長さが短いものになってしまい、抵抗値変化が大きく変化する領域Ｓ１までの長さが短くなるため、第２スリットによる微調整の範囲が極端に狭められてしまい、実質的に抵抗値の微調整を行うことができなくなる。 In the conventional chip resistor disclosed in Patent Document 1, the ratio of the increment of the resistance value with respect to the increment of the cut amount of the second slit for fine adjustment is reduced by making the pattern of the trimming groove into a letter shape. Value adjustment can be performed with high accuracy. However, if the resistor (initial resistance value) before trimming is formed in a state close to the target resistance value, the length of the first slit for coarse adjustment becomes short, and then the second slit. Even if it is going to form, since it will be possible to extend only slightly in the oblique direction from the terminal end of the first slit toward one side end of the resistor, the range of fine adjustment by the second slit is extremely narrowed, The resistance value cannot be finely adjusted substantially. Similarly, even in a chip resistor in which the pattern of the trimming groove is double cut, when the initial resistance value is formed in a state close to the target resistance value, the length of the first slit for coarse adjustment is short. As a result, the length up to the region S1 where the resistance value change greatly changes is shortened, so that the range of fine adjustment by the second slit is extremely narrowed, and the resistance value can be substantially finely adjusted. Disappear.
本発明は、このような従来技術の実情に鑑みてなされたもので、その目的は、初期抵抗値が目標抵抗値に近い場合でも抵抗値の微調整を容易に行うことができるチップ抵抗器を提供することにある。 The present invention has been made in view of the actual situation of the prior art, and an object of the present invention is to provide a chip resistor that can easily finely adjust the resistance value even when the initial resistance value is close to the target resistance value. It is to provide.
上記の目的を達成するために、本発明のチップ抵抗器は、絶縁基板と、この絶縁基板の表面に設けられた一対の表面電極と、これら一対の表面電極に接続する長方形状の抵抗体とを備え、前記抵抗体にトリミング溝を形成することで抵抗値が調整されるチップ抵抗器において、前記抵抗体を介して対向する一対の前記表面電極の端部がいずれも前記抵抗体の長手方向に沿う直線に対して同方向へ傾斜する傾斜辺となっていると共に、前記トリミング溝が、前記抵抗体の一方の側辺から短手方向へ直線的に延びる粗調整用の第１スリットと、この第１スリットの終端部を通って一対の前記傾斜辺を最短距離で結ぶ仮想線と前記抵抗体の一方の側辺とで挟まれた領域に存する微調整用の第２スリットとを有しており、前記第１スリットから見て前記抵抗体の一方の側辺と前記仮想線との間隔が広がる部分の前記領域内に前記第２スリットが形成されている構成にした。 In order to achieve the above object, a chip resistor of the present invention includes an insulating substrate, a pair of surface electrodes provided on the surface of the insulating substrate, and a rectangular resistor connected to the pair of surface electrodes. A chip resistor whose resistance value is adjusted by forming a trimming groove in the resistor, wherein both ends of the pair of surface electrodes facing each other through the resistor are in the longitudinal direction of the resistor A first slit for coarse adjustment, wherein the trimming groove extends linearly from one side of the resistor in a short direction, A second slit for fine adjustment existing in a region sandwiched between a virtual line connecting the pair of inclined sides at the shortest distance through the terminal portion of the first slit and one side of the resistor; Before seeing from the first slit The second slit has a configuration which is formed in the region of the part spacing of one side of the resistor and the virtual line is widened.
このように構成されたチップ抵抗器では、粗調整用の第１スリットを形成した時点における抵抗体内の電流密度を考えると、第１スリットの終端部を通って両表面電極の傾斜辺を最短距離で結ぶ仮想線を境にして、この仮想線と第１スリットが形成されていない方の抵抗体の側辺とで挟まれた領域に電流が分布し、仮想線と第１スリットが形成された方の抵抗体の側辺とで挟まれた領域は電流が少なく流れる部分となる。そして、当該領域内であって且つ仮想線と抵抗体の側辺との間隔が広がる部分に微調整用の第２スリットが形成されているため、第２スリットの切り込み量増分に対する抵抗値増分の割合が小さくなり、抵抗値調整を高精度に行いつつ、抵抗体の初期抵抗値が目標抵抗値に近い場合でも、微調整用の第２スリットを形成できる領域が広くなり、第２スリットの長さを十分に確保することができるため、抵抗値の微調整を容易に行うことができる。 In the thus configured chip resistor, considering the current density in the resistor at the time when the first slit for coarse adjustment is formed, the shortest distance between the inclined sides of both surface electrodes passes through the terminal portion of the first slit. A current is distributed in a region sandwiched between the virtual line connected by the line and the side of the resistor on which the first slit is not formed, and the virtual line and the first slit are formed. A region sandwiched between the sides of the other resistor is a portion where a small amount of current flows. Further, since the second slit for fine adjustment is formed in a portion where the interval between the imaginary line and the side of the resistor is widened in the region, the resistance value increment of the second slit cut amount increment Even when the initial resistance value of the resistor is close to the target resistance value while the ratio is reduced and the resistance value is adjusted with high accuracy, the area where the second slit for fine adjustment can be formed is widened, and the length of the second slit is increased. Therefore, the resistance value can be easily finely adjusted.
上記の構成において、トリミング溝のパターンとしてはＬカットやダブルカット等を採用することが可能であり、例えばＬカットの場合、第２スリットは第１スリットの終端部に連続して形成されており、この第２スリットが前述した領域内で仮想線から遠ざかる方向へ延ばされることで、抵抗値調整を高精度に行いつつ、抵抗体の初期抵抗値が目標抵抗値に近い場合でも、第２スリットを長く形成することができるため、抵抗値の微調整を容易に行うことができる。 In the above configuration, an L cut, a double cut, or the like can be adopted as the trimming groove pattern. For example, in the case of the L cut, the second slit is formed continuously to the end portion of the first slit. Even when the initial resistance value of the resistor is close to the target resistance value, the second slit is extended in the direction away from the imaginary line in the above-described region, and the resistance value is adjusted with high accuracy. Therefore, the resistance value can be easily finely adjusted.
あるいはダブルカットの場合、第２スリットは仮想線から離れた抵抗体の一方の側辺を始端部として第１スリットと平行に延びており、この第２スリットの終端部が仮想線を越えずに前述した領域内に位置していることで、抵抗値調整を高精度に行いつつ、抵抗体の初期抵抗値が目標抵抗値に近い場合でも、第２スリットを第１スリットより長く形成することも可能となるため、抵抗値の微調整を容易に行うことができる。 Alternatively, in the case of double cut, the second slit extends in parallel with the first slit starting from one side of the resistor away from the virtual line, and the end of the second slit does not exceed the virtual line. The second slit can be formed longer than the first slit even when the initial resistance value of the resistor is close to the target resistance value while adjusting the resistance value with high accuracy by being located in the above-described region. Therefore, the resistance value can be easily finely adjusted.
また、上記の目的を達成するために、本発明によるチップ抵抗器の製造方法では、絶縁基板と、この絶縁基板の表面に設けられた一対の表面電極と、これら一対の表面電極に接続する長方形状の抵抗体とを備え、前記抵抗体を介して対向する一対の前記表面電極の端部はいずれも前記抵抗体の長手方向に沿う直線に対して同方向へ傾斜する傾斜辺となっており、この抵抗体の一方の側辺から短手方向へ直線的に延びるように抵抗値粗調整用の第１スリットを形成した後、この第１スリットの終端部を通って一対の前記傾斜辺を最短距離で結ぶ仮想線と前記抵抗体の一方の側辺とで挟まれた領域のうち、前記第１スリットから見て前記抵抗体の一方の側辺と前記仮想線との間隔が広がる部分に抵抗値微調整用の第２スリットを形成するようにした。 In order to achieve the above object, in the method of manufacturing a chip resistor according to the present invention, an insulating substrate, a pair of surface electrodes provided on the surface of the insulating substrate, and a rectangle connected to the pair of surface electrodes The end portions of the pair of surface electrodes facing each other through the resistor are inclined sides inclined in the same direction with respect to a straight line along the longitudinal direction of the resistor. After forming the first slit for rough adjustment of resistance value so as to extend linearly from one side of the resistor in the lateral direction, the pair of inclined sides is passed through the terminal end of the first slit. Of the region sandwiched between the imaginary line connected at the shortest distance and one side of the resistor, the portion where the distance between the one side of the resistor and the imaginary line is widened when viewed from the first slit. Form a second slit for fine adjustment of resistance value .
このようなチップ抵抗器の製造方法において、粗調整用の第１スリットを形成した時点における抵抗体内の電流密度を考えると、第１スリットの終端部を通って両表面電極の傾斜辺を最短距離で結ぶ仮想線を境にして、この仮想線と第１スリットが形成されていない方の抵抗体の側辺とで挟まれた領域に電流が分布し、仮想線と第１スリットが形成された方の抵抗体の側辺とで挟まれた領域は電流が少なく流れる部分となる。そして、第１スリットの形成後に当該領域内であって且つ仮想線と抵抗体の側辺との間隔が広がる部分に微調整用の第２スリットを形成するようにしたので、第２スリットの切り込み量増分に対する抵抗値増分の割合が小さくなり、抵抗値調整を高精度に行いつつ、抵抗体の初期抵抗値が目標抵抗値に近い場合でも、微調整用の第２スリットを形成できる領域が広くなり、第２スリットの長さを十分に確保することができるため、抵抗値の微調整を容易に行うことができる。 In such a chip resistor manufacturing method, when considering the current density in the resistor at the time when the first slit for coarse adjustment is formed, the shortest distance between the inclined sides of both surface electrodes passes through the terminal portion of the first slit. A current is distributed in a region sandwiched between the virtual line connected by the line and the side of the resistor on which the first slit is not formed, and the virtual line and the first slit are formed. A region sandwiched between the sides of the other resistor is a portion where a small amount of current flows. Then, after the first slit is formed, the second slit for fine adjustment is formed in a portion within the region and the interval between the virtual line and the side of the resistor is widened. The ratio of the increment of the resistance value with respect to the amount increment is small, and the resistance value adjustment is performed with high accuracy, and even when the initial resistance value of the resistor is close to the target resistance value, the area where the second slit for fine adjustment can be formed is wide. Thus, since the length of the second slit can be sufficiently secured, fine adjustment of the resistance value can be easily performed.
本発明のチップ抵抗器は、抵抗体の一方の側辺から短手方向へ延びる第１スリットを形成して抵抗値の粗調整を行った後に、第１スリットの終端部を通って両表面電極の傾斜辺を最短距離で結ぶ仮想線と抵抗体の一方の側辺とで挟まれた領域のうち、第１スリットから見て抵抗体の一方の側辺と仮想線との間隔が広がる部分の、電流が多く流れる領域より離れて切り込み量増分に対する抵抗値増分の割合が小さくなっている領域に、第２スリットを形成して抵抗値の微調整を行うようにしたので、高精度の抵抗値調整を行いつつ、初期抵抗値が目標抵抗値に近い場合でも、第２スリットの長さを十分に確保することができるので、抵抗値の微調整を容易に行うことができる。 The chip resistor according to the present invention forms a first slit extending in the short direction from one side of the resistor and performs a rough adjustment of the resistance value. In the region sandwiched between the imaginary line connecting the inclined sides of the resistor and the one side of the resistor, the portion where the distance between the one side of the resistor and the imaginary line increases as viewed from the first slit Since the second slit is formed in a region where the ratio of the increment of the resistance value with respect to the increment of the cut amount is smaller than the region where a large amount of current flows, the resistance value is finely adjusted. Even when the initial resistance value is close to the target resistance value while making the adjustment, the length of the second slit can be sufficiently secured, so that the resistance value can be easily finely adjusted.
発明の実施の形態について図面を参照して説明すると、図１に示すように、本発明の第１実施形態例に係るチップ抵抗器１は、セラミックス等からなる直方体形状の絶縁基板２と、絶縁基板２の表面の長手方向両端部に設けられた一対の表面電極３，４と、これら一対の表面電極３，４に接続する長方形状の抵抗体５と、この抵抗体５を覆う図示せぬ保護層等によって主に構成されており、抵抗体５には抵抗値を調整するためのトリミング溝６が形成されている。なお、図示省略されているが、絶縁基板２の裏面には表面電極３，４に対応するように一対の裏面電極が設けられており、絶縁基板２の長手方向の両端面には対応する表面電極と裏面電極を橋絡する端面電極が設けられている。 Referring to the drawings, an embodiment of the present invention will be described. As shown in FIG. 1, a chip resistor 1 according to a first embodiment of the present invention includes a rectangular parallelepiped-shaped insulating substrate 2 made of ceramics and the like. A pair of surface electrodes 3, 4 provided at both longitudinal ends of the surface of the substrate 2, a rectangular resistor 5 connected to the pair of surface electrodes 3, 4, and the resistor 5 are not shown. The resistor 5 is mainly composed of a protective layer and the like, and a trimming groove 6 for adjusting a resistance value is formed in the resistor 5. Although not shown, a pair of back electrodes are provided on the back surface of the insulating substrate 2 so as to correspond to the front electrodes 3 and 4, and the corresponding surfaces are provided on both end surfaces in the longitudinal direction of the insulating substrate 2. An end face electrode that bridges the electrode and the back electrode is provided.
一対の表面電極３，４はＡｇペーストをスクリーン印刷して乾燥・焼成させたものであり、抵抗体５は酸化ルテニウム等の抵抗体ペーストをスクリーン印刷して乾燥・焼成させたものである。両表面電極３，４の抵抗体５と重なる側の端部は、抵抗体５の長手方向に沿う直線に対して同じ角度で傾斜する傾斜辺３ａ，４ａとなっており、これら傾斜辺３ａ，４ａは抵抗体５を介して平行に対向している。トリミング溝６は、抵抗体５の一方の側辺（図１では下辺５ａ）から鉛直方向（抵抗体５の短手方向）へ延びる粗調整用の第１スリット７と、第１スリット７の終端部から抵抗体５の長手方向へ延びる微調整用の第２スリット８とを有しており、これら第１スリット７と第２スリット８は直角に連続してＬカット形状のスリットパターンとなっている。ここで、第１スリット７の終端部（図１では上端）を通って一対の傾斜辺３ａ，４ａを最短距離で結ぶ直線を仮想線Ｐとすると、第２スリット８は仮想線Ｐによって２分された抵抗体５の下部側の領域Ｑ１内に形成されており、かつ、この領域Ｑ１内で第１スリット７から見て抵抗体５の下辺５ａと仮想線Ｐとの間隔が広がる部分で仮想線Ｐから離れた位置に延びている。 The pair of surface electrodes 3 and 4 are obtained by screen-printing Ag paste and drying and firing, and the resistor 5 is obtained by screen-printing resistor paste such as ruthenium oxide and drying and firing. The ends of both surface electrodes 3 and 4 on the side overlapping the resistor 5 are inclined sides 3a and 4a that are inclined at the same angle with respect to a straight line along the longitudinal direction of the resistor 5, and these inclined sides 3a, 4a, 4a is opposed in parallel via the resistor 5. The trimming groove 6 includes a first slit 7 for coarse adjustment extending from one side of the resistor 5 (the lower side 5a in FIG. 1) in the vertical direction (short direction of the resistor 5), and the end of the first slit 7. The second slit 8 for fine adjustment extending from the portion in the longitudinal direction of the resistor 5 is provided, and the first slit 7 and the second slit 8 are formed into an L-cut slit pattern continuously at a right angle. Yes. Here, assuming that a straight line connecting the pair of inclined sides 3a and 4a through the terminal end (the upper end in FIG. 1) of the first slit 7 with the shortest distance is an imaginary line P, the second slit 8 is divided into two by the imaginary line P. Is formed in a region Q1 on the lower side of the resistor 5 that is formed, and is virtual at a portion where the distance between the lower side 5a of the resistor 5 and the virtual line P is widened when viewed from the first slit 7 in the region Q1. It extends to a position away from the line P.
図２は粗調整用の第１スリット７を形成した時点の抵抗体５を示しており、この場合における抵抗体５内の電流密度を考えると、第１スリット７の終端部を通って両傾斜辺３ａ，４ａを最短距離で結ぶ仮想線Ｐを境にして、この仮想線Ｐと第１スリット７が形成されていない方の抵抗体５の上辺５ｂとで挟まれた領域Ｑ２に電流が分布し、仮想線Ｐと第１スリット７が形成された方の抵抗体５の下辺５ａとで挟まれた領域Ｑ１は電流が少なく流れる部分となる。 FIG. 2 shows the resistor 5 at the time when the first slit 7 for coarse adjustment is formed. In consideration of the current density in the resistor 5 in this case, both slopes pass through the end portion of the first slit 7. Current is distributed in a region Q2 sandwiched between the virtual line P connecting the sides 3a and 4a with the shortest distance and the upper side 5b of the resistor 5 where the first slit 7 is not formed. In addition, a region Q1 sandwiched between the virtual line P and the lower side 5a of the resistor 5 on which the first slit 7 is formed is a portion where a small amount of current flows.
そして、抵抗体５の短手方向に延びる第１スリット７を形成した後、図１に示すように、第１スリット７の終端部から表面電極４に向かって水平方向（右方向）へ延びる第２スリット８を形成し、これら第１および第２スリット７，８からなるトリミング溝６によって抵抗体５の抵抗値を目標抵抗値に対して一致させるようにしている。ここで、第１スリット７を形成した時点における抵抗体５内の電流密度を考えると、前述したように仮想線Ｐと抵抗体５の下辺５ａとで挟まれた領域Ｑ１は電流が少なく流れる部分であり、当該領域Ｑ１内であって仮想線Ｐと抵抗体５の下辺５ａとの間隔が広がる部分で仮想線Ｐから離れた位置に第２スリット８が形成されるため、第２スリット８の切り込み量増分に対する抵抗値増分の割合が小さくなり、抵抗値調整を高精度に行いつつ、抵抗体５の初期抵抗値が目標抵抗値に近い場合でも、微調整用の第２スリット８を形成できる領域が広くなり、第２スリット８の長さを十分に確保することができるため、抵抗値の微調整を容易に行うことができる。 And after forming the 1st slit 7 extended in the transversal direction of the resistor 5, as shown in FIG. 1, it extends in the horizontal direction (right direction) toward the surface electrode 4 from the terminal part of the 1st slit 7. Two slits 8 are formed, and the resistance value of the resistor 5 is made to coincide with the target resistance value by the trimming groove 6 composed of the first and second slits 7 and 8. Here, considering the current density in the resistor 5 at the time when the first slit 7 is formed, as described above, the region Q1 sandwiched between the virtual line P and the lower side 5a of the resistor 5 is a portion where less current flows. Since the second slit 8 is formed at a position away from the imaginary line P in the region Q1 where the distance between the imaginary line P and the lower side 5a of the resistor 5 is widened, Even when the initial resistance value of the resistor 5 is close to the target resistance value, the second slit 8 for fine adjustment can be formed while the ratio of the resistance value increment to the cut amount increment becomes small and the resistance value adjustment is performed with high accuracy. Since the area becomes wider and the length of the second slit 8 can be sufficiently secured, the resistance value can be easily finely adjusted.
以上説明したように、第１実施形態例に係るチップ抵抗器１では、抵抗体５の一方の側辺（下辺５ａ）から短手方向へ延びる第１スリット７を形成して抵抗値の粗調整を行った後に、第１スリット７の終端部を通って両表面電極３，４の傾斜辺３ａ，４ａを最短距離で結ぶ仮想線Ｐと抵抗体５の下辺５ａとで挟まれた領域Ｑ１のうち、第１スリット７から見て抵抗体５の下辺５ａと仮想線Ｐとの間隔が広がる部分に第２スリット８を形成して抵抗値の微調整を行うようにしたので、第２スリット８の切り込み量増分に対する抵抗値増分の割合が小さくなり、抵抗値調整を高精度に行うことができる。また、抵抗体５の初期抵抗値が目標抵抗値に近い場合でも、微調整用の第２スリット８を形成できる領域が広くなり、第２スリット８の長さを十分に確保することができるため、抵抗値の微調整を容易に行うことができる。 As described above, in the chip resistor 1 according to the first embodiment, the first slit 7 extending in the short direction from one side (the lower side 5a) of the resistor 5 is formed to roughly adjust the resistance value. , The region Q1 sandwiched between the imaginary line P connecting the inclined sides 3a, 4a of the surface electrodes 3, 4 at the shortest distance through the terminal portion of the first slit 7 and the lower side 5a of the resistor 5 is formed. Of these, the second slit 8 is formed in the portion where the space between the lower side 5a of the resistor 5 and the virtual line P is widened when viewed from the first slit 7 to finely adjust the resistance value. The ratio of the increment of the resistance value with respect to the increment of the cut amount of the is reduced, and the resistance value can be adjusted with high accuracy. Further, even when the initial resistance value of the resistor 5 is close to the target resistance value, the area where the second slit 8 for fine adjustment can be formed is widened, and the length of the second slit 8 can be sufficiently secured. The resistance value can be finely adjusted easily.
図３は本発明の第２実施形態例に係るチップ抵抗器１０の平面図であり、このチップ抵抗器１０は、トリミング溝６のパターン形状が第１実施形態例と相違しており、それ以外の構成は基本的に同じである。 FIG. 3 is a plan view of the chip resistor 10 according to the second embodiment of the present invention. The chip resistor 10 is different from the first embodiment in the pattern shape of the trimming groove 6, and the rest. The configuration of is basically the same.
図３に示すように、第２実施形態例に係るチップ抵抗器１０のトリミング溝６は、抵抗体５の一方の側辺（図３では下辺５ａ）から鉛直方向（抵抗体５の短手方向）へ延びる粗調整用の第１スリット７と、同じく抵抗体５の一方の側辺から鉛直方向へ延びる微調整用の第２スリット８とを有しており、これら第１スリット７と第２スリット８は平行に延びてダブルカットと呼ばれるパターン形状になっている。この場合も、第１スリット７の終端部（図３では上端）を通って一対の傾斜辺３ａ，４ａを最短距離で結ぶ直線を仮想線Ｐとすると、第２スリット８は仮想線Ｐによって２分された抵抗体５の下部側の領域Ｑ１内に形成されており、かつ、この領域Ｑ１内で第１スリット７から見て抵抗体５の下辺５ａと仮想線Ｐとの間隔が広がる部分に延びている。 As shown in FIG. 3, the trimming groove 6 of the chip resistor 10 according to the second embodiment is vertical from the one side of the resistor 5 (the lower side 5 a in FIG. 3) (the short direction of the resistor 5). ) And a second slit 8 for fine adjustment extending in the vertical direction from one side of the resistor 5, and the first slit 7 and the second slit 8. The slits 8 extend in parallel and have a pattern shape called double cut. Also in this case, if a straight line connecting the pair of inclined sides 3a and 4a through the terminal end (the upper end in FIG. 3) at the shortest distance is defined as an imaginary line P, the second slit 8 is It is formed in a region Q1 on the lower side of the divided resistor 5, and in the region Q1, the portion between the lower side 5a of the resistor 5 and the virtual line P is widened when viewed from the first slit 7. It extends.
このように構成された第２実施形態例においては、第１実施形態例と同様に、第１スリット７から見て抵抗体５の下辺５ａと仮想線Ｐとの間隔が広がる部分に第２スリット８を形成して抵抗値の微調整を行うようにしたので、第２スリット８の切り込み量増分に対する抵抗値増分の割合が小さくなり、抵抗値調整を高精度に行うことができる。また、第２スリット８は仮想線Ｐを越えずに領域Ｑ１内に位置していれば良いため、第２スリット８を第１スリット７よりも短く形成するだけでなく、図３のように第２スリット８を第１スリット７よりも長く形成することも可能となる。 In the second embodiment configured as described above, as in the first embodiment, the second slit is formed in a portion where the interval between the lower side 5a of the resistor 5 and the virtual line P is widened as viewed from the first slit 7. Since the resistance value is finely adjusted by forming 8, the ratio of the resistance value increment to the increment of the cut amount of the second slit 8 becomes small, and the resistance value adjustment can be performed with high accuracy. Further, since the second slit 8 only needs to be located in the region Q1 without exceeding the imaginary line P, not only the second slit 8 is formed shorter than the first slit 7, but also the second slit 8 as shown in FIG. The two slits 8 can be formed longer than the first slit 7.
図４は本発明の第３実施形態例に係るチップ抵抗器２０の平面図であり、このチップ抵抗器２０が第１実施形態例と相違する点は、粗調整用の第１スリット７と微調整用の第２スリット８が緩やかなアール部分を介して連続していることにあり、それ以外の構成は基本的に同じである。このように第１スリット７と第２スリット８のターニングポイントが直角でなくアールになっていると、抵抗体５を流れる電流が第１スリット７と第２スリット８のターニングポイントに集中しなくなるため、過負荷に強いチップ抵抗器２０を実現することができる。 FIG. 4 is a plan view of the chip resistor 20 according to the third embodiment of the present invention. The difference between the chip resistor 20 and the first embodiment is that the first slit 7 for coarse adjustment and the first resistor 7 are slightly different. The second slit 8 for adjustment is continuous through a loose rounded portion, and the other configuration is basically the same. As described above, when the turning points of the first slit 7 and the second slit 8 are not perpendicular but are rounded, the current flowing through the resistor 5 does not concentrate on the turning points of the first slit 7 and the second slit 8. The chip resistor 20 that is resistant to overload can be realized.
図５は本発明の第４実施形態例に係るチップ抵抗器３０の平面図であり、このチップ抵抗器３０が第１実施形態例と相違する点は、一対の表面電極３，４の傾斜辺３ａ，４ａが抵抗体５の長手方向に沿う直線に対して異なる角度で傾斜していることにあり、それ以外の構成は基本的に同じである。 FIG. 5 is a plan view of the chip resistor 30 according to the fourth embodiment of the present invention. The chip resistor 30 is different from the first embodiment in that the inclined sides of the pair of surface electrodes 3 and 4 are as follows. 3a and 4a are inclined at different angles with respect to the straight line along the longitudinal direction of the resistor 5, and the other configurations are basically the same.
図５に示すように、第４実施形態例に係るチップ抵抗器３０では、抵抗体５を介して対向する表面電極３，４の傾斜辺３ａ，４ａは平行になっておらず、各傾斜辺３ａ，４ａの延長線が点Ｏで収束するようになっている。この場合、第１スリット７の終端部（図５では上端）を通って一対の傾斜辺３ａ，４ａを最短距離で結ぶ直線（仮想線Ｐ）は、点Ｏを頂点とする二等辺三角形の底辺に相当する部分（点ｄ，ｅを結ぶ線分）となり、この仮想線Ｐと抵抗体５の下辺５ａとで挟まれた領域Ｑ１のうち、第１スリット７から見て抵抗体５の下辺５ａと仮想線Ｐとの間隔が広がる部分で仮想線Ｐから離れた位置に第２スリット８が形成されている。したがって、本実施形態例に係るチップ抵抗器３０においても、第１実施形態例と同様に、抵抗値調整を高精度に行いつつ、抵抗体５の初期抵抗値が目標抵抗値に近い場合でも、微調整用の第２スリット８を形成できる領域が広くなり、第２スリット８の長さを十分に確保することができるため、抵抗値の微調整を容易に行うことができる。 As shown in FIG. 5, in the chip resistor 30 according to the fourth embodiment, the inclined sides 3a and 4a of the surface electrodes 3 and 4 that face each other via the resistor 5 are not parallel, and each inclined side The extension lines 3a and 4a converge at the point O. In this case, a straight line (virtual line P) connecting the pair of inclined sides 3a and 4a through the terminal end (the upper end in FIG. 5) of the first slit 7 with the shortest distance is the base of the isosceles triangle having the point O as the apex. In the region Q1 sandwiched between the virtual line P and the lower side 5a of the resistor 5 and viewed from the first slit 7, the lower side 5a of the resistor 5 The second slit 8 is formed at a position away from the imaginary line P at a portion where the distance between the imaginary line P and the imaginary line P increases. Therefore, even in the chip resistor 30 according to the present embodiment example, even when the initial resistance value of the resistor 5 is close to the target resistance value while performing the resistance value adjustment with high accuracy, similarly to the first embodiment example, Since the region where the second slit 8 for fine adjustment can be formed becomes wide and the length of the second slit 8 can be sufficiently secured, the resistance value can be easily finely adjusted.
なお、第４実施形態例において、トリミング溝６のパターンはＬカットに限定されず、図３に示した第２実施形態例と同様に、領域Ｑ１内に粗調整用の第１スリット７と微調整用の第２スリット８を平行に形成したダブルカットとすることも可能である。 In the fourth embodiment, the pattern of the trimming groove 6 is not limited to the L-cut, and the first slit 7 for coarse adjustment and the fine slit are formed in the region Q1 as in the second embodiment shown in FIG. It is also possible to make a double cut in which the second slits 8 for adjustment are formed in parallel.
また、第４実施形態例では、粗調整用の第１スリット７を電極間距離が狭い抵抗体５の下辺５ａから形成した場合について説明したが、電極間距離が広い方の抵抗体５の抵抗体５の上辺５ｂから第１スリット７を形成するようにしても良く、その場合も同様の効果を奏することができる。 In the fourth embodiment, the case where the first slit 7 for coarse adjustment is formed from the lower side 5a of the resistor 5 having a short inter-electrode distance has been described. However, the resistance of the resistor 5 having the wider inter-electrode distance is described. You may make it form the 1st slit 7 from the upper side 5b of the body 5, The same effect can be show | played also in that case.
１，１０，２０，３０ チップ抵抗器
２ 絶縁基板
３，４ 表面電極
３ａ，４ａ 傾斜辺
５ 抵抗体
６ トリミング溝
７ 第１スリット
８ 第２スリット
Ｐ 仮想線
Ｑ１ 領域
1, 10, 20, 30 Chip resistor 2 Insulating substrate 3, 4 Surface electrode 3a, 4a Inclined side 5 Resistor 6 Trimming groove 7 First slit 8 Second slit P Virtual line Q1 region
Claims (4)
前記抵抗体を介して対向する一対の前記表面電極の端部がいずれも前記抵抗体の長手方向に沿う直線に対して同方向へ傾斜する傾斜辺となっていると共に、
前記トリミング溝が、前記抵抗体の一方の側辺から短手方向へ直線的に延びる粗調整用の第１スリットと、この第１スリットの終端部を通って一対の前記傾斜辺を最短距離で結ぶ仮想線と前記抵抗体の一方の側辺とで挟まれた領域に存する微調整用の第２スリットとを有しており、前記第１スリットから見て前記抵抗体の一方の側辺と前記仮想線との間隔が広がる部分の前記領域内に前記第２スリットが形成されていることを特徴とするチップ抵抗器。 An insulating substrate, a pair of surface electrodes provided on the surface of the insulating substrate, and a rectangular resistor connected to the pair of surface electrodes, and a resistance value is obtained by forming a trimming groove in the resistor. In the chip resistor to be adjusted,
Both end portions of the pair of surface electrodes facing each other through the resistor are inclined sides inclined in the same direction with respect to a straight line along the longitudinal direction of the resistor,
The trimming groove has a first slit for coarse adjustment that extends linearly from one side of the resistor in a short direction, and a pair of the inclined sides through the end of the first slit at the shortest distance. A second slit for fine adjustment existing in a region sandwiched between a connecting virtual line and one side of the resistor, and one side of the resistor as viewed from the first slit The chip resistor, wherein the second slit is formed in the region where the distance from the virtual line is widened.
前記抵抗体を介して対向する一対の前記表面電極の端部はいずれも前記抵抗体の長手方向に沿う直線に対して同方向へ傾斜する傾斜辺となっており、この抵抗体の一方の側辺から短手方向へ直線的に延びるように抵抗値粗調整用の第１スリットを形成した後、この第１スリットの終端部を通って一対の前記傾斜辺を最短距離で結ぶ仮想線と前記抵抗体の一方の側辺とで挟まれた領域のうち、前記第１スリットから見て前記抵抗体の一方の側辺と前記仮想線との間隔が広がる部分で該仮想線から遠ざかる方向に抵抗値微調整用の第２スリットを形成することを特徴とするチップ抵抗器の製造方法。 An insulating substrate, a pair of surface electrodes provided on the surface of the insulating substrate, and a rectangular resistor connected to the pair of surface electrodes,
The ends of the pair of surface electrodes facing each other through the resistor are inclined sides inclined in the same direction with respect to a straight line along the longitudinal direction of the resistor, and one side of the resistor The first slit for coarse resistance adjustment is formed so as to extend linearly from the side in the short direction, and then the virtual line connecting the pair of the inclined sides at the shortest distance through the terminal portion of the first slit, and Of the region sandwiched between one side of the resistor, the resistance is increased in a direction away from the imaginary line at a portion where the distance between the one side of the resistor and the imaginary line increases when viewed from the first slit. A method of manufacturing a chip resistor, wherein a second slit for fine adjustment of a value is formed.
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