JP6203125B2 - Photovoltaic element manufacturing apparatus and photovoltaic element manufacturing method - Google Patents

Description

  The present invention relates to a photovoltaic device manufacturing apparatus and a photovoltaic device manufacturing method.

  Conventionally, in order to improve photoelectric conversion efficiency in a solar cell element, a light confinement effect is formed by adopting an uneven structure called a texture structure on the surface of the solar cell element. A texture structure is a structure in which the surface of a silicon wafer is processed into an uneven shape. According to this structure, incident light is reflected in an uneven shape, and light reflected on one surface is incident on another surface again. Thus, light reflection can be reduced.

  In order to form such a texture structure in a solar cell manufacturing process, an etching apparatus for automatically cleaning a cassette containing a large number of silicon wafers to be processed by sequentially immersing the cassette in a plurality of processing means by a transfer means. Is used. As an etching chemical used in such an etching apparatus, a chemical consisting of an aqueous solution of sodium hydroxide or potassium hydroxide containing an additive heated to about 60 ° C. to 95 ° C. is used, and silicon is used for about 10 to 30 minutes. The wafer is immersed in the chemical solution.

  With the further popularization of solar power generation, it is natural that cost reduction and productivity improvement are required for the manufacturing of solar cells, which are the main components, and further quality improvement and efficiency improvement are required. Desired. In line with this directionality, also with respect to the above-described etching process, a reduction in etching amount and improvement in uniformity are required mainly due to a reduction in the thickness of a silicon wafer and a large amount of processing.

  For such a problem, a method of increasing the alkali concentration according to the silicon concentration in the liquid (Patent Document 1) is disclosed. Also disclosed is a method (Patent Document 2) in which the temperature of the etching solution is controlled at different stages. However, as described above, these methods alone are not sufficient as the demand for reduction in etching amount and uniformity becomes higher. In particular, regarding the temperature control of the etching solution, it has become important how close the target temperature and the actual temperature are, that is, how accurately the temperature of the solution is controlled.

JP 2012-238719 A JP2013-4618A

  However, according to the above-described conventional technique, a silicon wafer etching apparatus that automatically cleans by sequentially immersing a cassette containing a large number of silicon wafers to be processed into a plurality of processing units arranged in a row by a transfer means. In this etching tank, when the silicon wafer accommodated in the cassette is transferred to the etching tank at room temperature, the chemical temperature decreases. The etching chemical solution is set to 60 ° C to 95 ° C and heated, but the etching of the silicon wafer should be managed at about ± 3 ° C with respect to the set temperature, and if this temperature range is exceeded, a uniform texture structure It becomes difficult to form. When the temperature is low, the etching rate of the silicon wafer is lowered. However, the etching rate is further lowered particularly in the case of an etching chemical solution that has been continuously etched, so that the etching becomes insufficient. Moreover, since the uniformity of the etching in which the chemical temperature is higher than the set temperature is lost due to the reaction heat between the silicon wafer and the etching solution, it is necessary to improve the temperature uniformity.

  The present invention has been made in view of the above, and an object of the present invention is to obtain a photovoltaic device manufacturing apparatus and a photovoltaic device manufacturing method that are excellent in mass productivity and capable of realizing a highly reliable etching process. To do.

In order to solve the above-described problems and achieve the object, the photovoltaic device manufacturing apparatus of the present invention includes a cleaning tank, a hot air tank, and a plurality of processing tanks sequentially arranged in a row, and a plurality of substrates to be processed. The transfer unit has an etching section for sequentially immersing the cassette in the processing tank from the cleaning tank through the hot air tank and maintaining the temperature within ± 3 degrees with respect to the set temperature .

  According to the present invention, the substrate to be processed is brought close to the temperature of the processing tank without depending on the number of substrates to be processed and the heat capacity by irradiating hot air prior to immersion in the processing tank. it can. As a result, when immersed in the processing tank with the substrate to be processed, the temperature fluctuation of the chemical solution during the etching process can be suppressed, and the texture etching can be stabilized.

FIG. 1 is an explanatory diagram showing a texture etching apparatus according to the first embodiment. FIG. 2 is a diagram showing a hot air tank used for texture etching of the photovoltaic device manufacturing apparatus of the first embodiment. FIG. 3 is a view showing a hot air tank containing a cassette. FIG. 4 is a diagram showing an etching tank. FIG. 5 is a flowchart showing the photovoltaic element manufacturing process according to the first embodiment. FIG. 6 is a flowchart showing the etch etching process of the first embodiment. 7 (a) and 7 (b) are process cross-sectional views illustrating a texture etching process in the method for manufacturing the photovoltaic element of the first embodiment. FIG. 8 is a perspective view of the p-type single crystal silicon substrate obtained in the texture etching process of the first embodiment. FIG. 9 is a cross-sectional view showing the photovoltaic element formed by the photovoltaic element manufacturing method of the first embodiment. FIG. 10 is an image diagram of etching processing time and temperature fluctuation. FIG. 11 is an explanatory view showing a texture etching apparatus of a comparative example.

  Embodiments of a photovoltaic device manufacturing apparatus and a photovoltaic device manufacturing method according to the present invention will be described below in detail with reference to the drawings. In addition, this invention is not limited by this embodiment, In the range which does not deviate from the summary, it can change suitably. In the drawings shown below, the scale of each layer or each member may be different from the actual for easy understanding, and the same applies to the drawings.

Embodiment 1.
FIG. 1 is an explanatory diagram showing a texture etching apparatus according to the first embodiment. FIG. 2 is a diagram showing a hot air tank used for texture etching of the photovoltaic device manufacturing apparatus of the first embodiment. FIG. 3 is a diagram showing a hot air tank containing a cassette, FIG. 4 is a diagram showing an etching tank, FIG. 5 is a flowchart showing a photovoltaic element manufacturing process according to Embodiment 1, and FIG. 6 is an embodiment. It is a flowchart which shows the 1 etch etching process.

  In the texture etching apparatus of the present embodiment, as shown in FIG. 1, the hot air tank S2 is arranged in front of the etching tank S3, and the transfer order is the washing tank S1, the hot air tank S2, and the etching tank S3. The order is the washing tank S4 and the drying tank S5. For comparison, FIG. 11 shows a conventional texture etching apparatus. In the conventional texture etching apparatus, the processing tanks are arranged in a line from the front to the cleaning tank S1, the etching tank S3, the water washing tank S4, and the drying tank S5, and the processing is performed in the order of arrangement. That is, the texture etching apparatus of the present embodiment has a configuration in which the hot air tank S2 is added to the front stage of the etching tank S3.

  As shown in FIGS. 2 and 3, the hot air tank S2 includes a cassette base 111 for placing a cassette 115 in which a plurality of silicon wafers W are accommodated as substrates to be processed. It is configured so that warm air blows out. Hot air pipes 112 are connected to the walls at both ends of the container 110 of the hot air tank S2, and hot air nozzles 114 for blowing out hot air from the hot air heater 113 are arranged. In this hot air tank S2, warm air is blown from the hot air nozzle 114 from both ends of the cassette 115, and the silicon wafer W and the cassette 115 are heated. The warmed silicon wafer W and the cassette 115 are transferred by the transfer means 120 to the next etching tank S3.

  FIG. 2 is a view showing a state in which the transfer means 120 is on standby. While waiting for the transfer, the transfer means 120 waits while blowing hot air on the hot air tank S2 so that the temperature of the chuck hook 122 as a gripping tool mounted on the support portion 121 of the transfer means 120 does not decrease.

  FIG. 3 is a view showing a state in which the cassette 115 is set in the hot air tank S2. When the cassette 115 is set on the cassette base 111 of the hot air tank S2, hot air is blown from the hot air nozzle 114 to the cassette 115, and the silicon wafer W and the cassette 115 are heated.

  FIG. 4 is a view showing the etching tank S3. In the etching unit 130, a cassette 115 holding a large number of silicon wafers W is immersed in an etching processing tank 132 filled with an etching solution 131.

  FIG. 5 is a flowchart showing the photovoltaic element manufacturing process according to the first embodiment. Prior to the description of the manufacturing process of the solar cell as the photovoltaic element, texture etching is performed using the process flowchart shown in FIG. In the present embodiment, in the texture etching, before the silicon wafer W is washed and immersed in the etching tank, the silicon wafer W is transferred to the hot air tank S2 together with the cassette 115, and hot air is blown in the hot air tank S2. It is characterized by this.

  First, step S10 which is a texture etching process will be described according to the flowchart of FIG. For example, a p-type single crystal silicon substrate 10 which is a first conductivity type silicon substrate is prepared as the silicon wafer W, and a damaged layer formed when the p-type single crystal silicon substrate 10 is sliced is removed by wet etching (FIG. 7 ( a): Wafer cleaning step S101).

  After the silicon wafer W is cleaned, before being immersed in the etching bath S3, hot air heated to an etching temperature of 85 ° C. is blown in the hot air bath S2 together with the cassette 115 in the hot air bath S2 (hot air heating step S102). In this step, the temperature is raised to the temperature of the hot air without depending on the heat capacity of the cassette 115 and the multiple silicon wafers W.

  Next, in order to form the texture, the cassette 115 on which the silicon wafer W that has been heated by irradiating hot air at a desired temperature in the hot air bath S2 as described above is mounted, for example, sodium hydroxide 0 5 wt% to 10 wt% and isopropyl alcohol 1 wt% to 30 wt% are mixed and immersed in an etching treatment tank 132 (see FIG. 4) filled with an etching solution 131 heated to 85 ° C. (etching step S103). And it conveys to the washing tank S4 (water washing step S104), and dries with the drying tank S5 (drying step S105). Thereby, a texture is formed uniformly (FIG. 7B). FIG. 8 shows a perspective view of the p-type single crystal silicon substrate 10 on which the uniform texture 10T is formed in this way. FIG. 7B corresponds to the AA cross section of FIG.

  Next, through a generally used process, the second conductivity type layer 11, the antireflection film 12, the light receiving surface side electrode 13, the back surface side electrode 15, and the first conductivity type on the p type single crystal silicon substrate 10 are used. Formation with the layer 14 is performed, and the photovoltaic cell shown in FIG. 1 is produced.

For example, according to the flowchart shown in FIG. 5, the p-type single crystal silicon substrate 10 in which the texture formation process (texture formation step: S10) is completed is put into a thermal diffusion furnace, and in the presence of phosphorus oxychloride (POCl ₃ ) vapor. To form phosphorus glass on the surface of the p-type single crystal silicon substrate 10 to diffuse phosphorus into the p-type single crystal silicon substrate 10, so that the second conductivity type layer 11 is formed on the surface layer of the p-type single crystal silicon substrate 10. (Pn junction forming step: S20). Since a p-type silicon substrate is used here, phosphorus of different conductivity type is diffused to form a pn junction, and an n-type diffusion layer is formed as the second conductivity type layer 11, but an n-type silicon substrate is used. In this case, p-type impurities may be diffused.

  Next, the phosphorous glass layer of the p-type single crystal silicon substrate 10 is removed in a hydrofluoric acid solution, and the second conductivity type layer 11 formed on the surface other than the light receiving surface side of the p-type single crystal silicon substrate 10 is removed, The n-type region on the light receiving surface side and the p-type region on the substrate side are separated (pn separation step: S30). After the pn separation step, an SiN film is formed on the second conductivity type layer 11 as the antireflection film 12 by plasma CVD (antireflection film formation step: S40). The film thickness and refractive index of the antireflection film 12 are set to values that most suppress light reflection. Note that two or more layers having different refractive indexes may be stacked. The antireflection film 12 may be formed by a different film forming method such as a sputtering method.

  Next, on the light receiving surface of the p-type single crystal silicon substrate 10, a so-called silver paste mixed with silver is printed in a comb shape by screen printing and dried to form a light receiving surface side electrode (light receiving surface side electrode printing, Drying step: S50). Then, a so-called aluminum / silver paste mixed with aluminum is printed on the entire back surface of the p-type single crystal silicon substrate 10 by screen printing and dried to form a back side electrode (back side electrode printing, drying step: S60). . Thereafter, a baking process (baking step: S70) is performed to form the light receiving surface side electrode 13 and the back surface side electrode 15. Firing is performed at 760 ° C. in an air atmosphere, for example. Moreover, the component of the back surface side electrode 15 is diffused inside the back surface side of the p-type single crystal silicon substrate 10 by baking, and the first conductivity type layer 14 is formed. As described above, the solar battery cell whose sectional view is shown in FIG. 9 is manufactured.

  Next, temperature control in the present embodiment will be described. FIG. 10 shows a graph of temperature fluctuations in the etching tank of this embodiment and a conventional etching tank as a comparative example. The vertical axis represents the etching bath temperature, that is, the liquid temperature in the etching bath, and the horizontal axis represents the processing time. a shows the etching bath temperature when the etching apparatus of this embodiment is used, and b shows the etching bath temperature when the etching apparatus of the comparative example is used. As a comparative example, in the conventional method, the silicon wafer W at room temperature and the cassette 115 are transferred to the etching tank S3. Immediately after the transfer, since the silicon wafer W and the transfer means 120 are cooled, the etching chemical temperature rapidly decreases.

  This is an element that can be said to be a disturbance, and is essentially inevitable unless the apparatus of the present embodiment is used. Although setting the temperature by taking into account the temperature drop in advance is one direction, it is difficult to say that it is practically optimal in consideration of the situation where the number of inserted sheets and the timing cannot always be fixed. Heating by the hot air bath S2 as in the etching apparatus of the present embodiment is preferable as an appropriate solution due to the above problem.

  Further, after that, the reaction heat by etching and the heater (not shown) provided in the etching treatment tank 132 may be suddenly heated to exceed the set temperature, but in the comparative example, by the temperature controller provided in the etching tank. Stabilizes at a gradually set etching temperature.

  This can also be said to be a side effect of temperature drop during transfer by the transfer means 120 described above. In particular, the portion of the above-described overheating by the heater (not shown) of the etching bath is due to PID control used for many temperature controls, and balances the proportional, differential, and integral elements according to the purpose. Is set. In order to suppress the above-described overheating by PID control, a balance that sacrifices the follow-up to the temperature difference is required, and it is difficult to say that it is a preferable method when considering the temperature decrease that occurs as a previous step.

On the other hand, in the etching apparatus of the present embodiment, the setting permission temperature T ₀ set as the cassette 115 transfer permission temperature lower than the setting processing temperature T ₁ set as the etching processing temperature is set in anticipation of heating by the reaction heat. To do. The silicon wafer W and the cassette 115 are heated in the hot air tank S2 at the previous stage and transferred to the etching tank S3. In the etching tank S3, the temperature is raised by the heater and reaction heat provided in the etching treatment tank 132, and the etching temperature is gradually set and stabilized. Compared to the conventional method, the method according to the present embodiment reaches the set processing temperature in a shortest time and stabilizes, so that the texture etching can be performed in a state where there is no temperature fluctuation.

  This is a method for alleviating the origin of the temperature drop, and it works on the original cause of the side effects, and is also preferable from that viewpoint.

  First, the control temperature of the etching solution 131 (hereinafter also referred to as the etching tank S3) filled in the etching processing tank 132 in the etching tank S3 will be described. In the etching process, an optimum etching process temperature for performing the etching is determined. The optimum etching temperature in the texture etching according to the present embodiment is about 70 ° C. to 95 ° C. On the other hand, the temperature of the etchant rises due to reaction heat caused by etching of the silicon wafer W. In particular, the reaction is intense and the reaction heat is high immediately after the processing of the silicon wafer W is started. The rising temperature is determined by the amount of the etching solution and the number of silicon wafers W to be processed, but is generally about 1 ° C. to 10 ° C. Therefore, the optimal etching process can be performed by controlling the liquid temperature of the etching solution so that the etching process temperature is increased after the temperature is increased by the reaction heat. Therefore, the cassette transfer permission temperature may be set to a temperature lower by about 1 ° C. to 10 ° C. than the etching processing temperature.

The liquid temperature in the etching tank S3 before the etching process is controlled to be equal to the cassette transfer permission temperature T ₀ , not the etching process temperature. The silicon wafer W is transferred to the etching tank S3 controlled at the cassette transfer permission temperature T ₀ , and the liquid temperature in the etching tank S 3 rises to the set processing temperature T ₁ due to reaction heat due to the etching of the silicon wafer W. That is, the cassette transfer permission temperature T ₀ may be lower than the etching processing temperature by the temperature increase due to the reaction heat caused by the etching of the silicon wafer W.

After the etching process is started, the liquid temperature of the etching bath S3 is controlled to be equal to the setting processing temperatures T ₁ for etching. The control temperature of the etching tank S3 is changed from the cassette transfer permission temperature T ₀ to the set processing temperature T ₁ which is a desirable temperature for the etching process simultaneously with the start of the etching process. Since the reaction is intense immediately after the start of the processing of the silicon wafer W and the reaction heat is also large, the control temperature may be changed after the time when the reaction is intense. Since the intense reaction time is about 10 seconds to 1 minute, the control temperature change time of the etching tank S3 may be set from 0 seconds to 1 minute after the start of the etching process. Here, because 0 seconds, which means that changes the control temperature of the etching process at the same time as the start etching bath to S3 transfer permission temperature T ₀ of the cassette setting processing temperatures T ₁ for etching.

Next, temperature control of the hot air tank S2 upstream of the etching tank S3 will be described. Before the etching process, there is a pre-cleaning step, and in the prior art, the temperature of the silicon wafer and the cassette 115 before the etching process is about room temperature. When the silicon wafer W is transferred to the etching processing tank 132, the liquid temperature in the etching processing tank 132 is lowered by the heat capacity of the silicon wafer W, the cassette 115, and the chuck hook 122, so that the etching performance is deteriorated. Further, when the liquid temperature in the etching tank is lowered, as shown in the temperature fluctuation of the conventional method shown by the curve b in FIG. 10, an excessive temperature rise occurs and the liquid temperature in the etching tank is higher than the optimum etching temperature. Become. Even in this case, the etching performance deteriorates. In order to prevent this, it is desirable that the temperature of the etching tank does not change even if the silicon wafer W is transferred to the etching tank. Since the temperature of the etching tank S3 when the silicon wafer W is transferred to the etching processing tank 132 is the cassette transfer permission temperature T ₀ , the silicon wafer W, the cassette 115, and the chuck hook 122 are heated to the cassette transfer permission temperature T _0. Therefore, the temperature change of the etching tank S3 can be suppressed. That is, the temperature control of the hot air tank S2 is controlled so as to be equal to the cassette transfer permission temperature T ₀ of the etching tank S3, thereby suppressing the temperature change after the start of the etching process and suppressing the deterioration of the etching performance. be able to.

As described above, according to the texture etching method of the present embodiment, the hot air tank S2 including the hot air heater 113 is installed in the preceding stage of the etching tank S3. The cassette 115 is transferred to the hot air tank S2, and the silicon wafer W and the cassette 115 are heated and then transferred to the etching tank. In the hot air tank S2, hot air nozzles 114 for sending hot air into the tank are arranged at both ends of the tank. Further, the chuck hook 122 of the transfer machine for transferring the cassette 115 is also immersed in the etching solution when transferred to the etching tank S3, so that it waits at the lower end of the hot air tank S2 when waiting for the transfer operation. The chuck hook 122 is also warmed in advance with warm air. Further, when the silicon wafer W is transferred into the etching processing bath 132, the surface of the silicon wafer W and the etching solution react to generate heat and the chemical temperature rises. Here, the temperature rise of the chemical solution is anticipated, and the two stages of the cassette transfer permission temperature T ₀ to the etching tank and the set processing temperature T ₁ for etching are set.

  As described above, the hot air tank S2 is installed in the front stage of the etching tank S3, the silicon wafer W is heated in advance, and the temperature drop of the etching tank S3 when the silicon wafer W is put into the etching tank S3 can be suppressed and stabilized. Etching can be performed at a temperature, and a uniform texture can be formed on the surface of the silicon wafer W.

  In the above embodiment, texture etching has been described. However, the present invention is not limited to texture etching, and other liquid phase processing steps such as an etching step for pn separation, a patterning step for the electrode layer or the antireflection film 12, and the like. It is also applicable to. Further, the present invention is not limited to the photovoltaic device substrate, and can be applied to a processing layer in which a large number of silicon wafers W are processed together with the cassette 115. As a wafer used for such texture etching, a crystalline silicon substrate such as a single crystal silicon substrate or a polycrystalline silicon substrate can be used.

  Although the embodiment of the present invention has been described, this embodiment is presented as an example and is not intended to limit the scope of the invention. The novel embodiment can be implemented in various other forms, and various omissions, replacements, and changes can be made without departing from the spirit of the invention. This embodiment and its modifications are included in the scope and gist of the invention, and are included in the invention described in the claims and the equivalents thereof.

  S1 cleaning tank, S2 hot air tank, S3 etching tank, S4 water washing tank, S5 drying tank, 10 p-type single crystal silicon substrate (first conductivity type silicon substrate), 11 second conductivity type layer, 12 antireflection film, 13 light reception Surface side electrode, 14 1st conductivity type layer, 15 Back side electrode, 110 container, 111 cassette stand, 115 cassette, W silicon wafer (substrate to be processed), 114 hot air nozzle, 112 hot air piping, 113 hot air heater, 120 transfer means, 121 support part, 122 chuck hook, 130 etching part, 131 etching liquid, 132 etching processing tank.

Claims (6)

A cleaning tank, a hot air tank, and a plurality of processing tanks are sequentially arranged in a row,
A cassette containing a plurality of substrates to be processed is cleaned by sequentially immersing it in the processing tank from the cleaning tank through the hot air tank, and maintaining it within ± 3 degrees with respect to the set temperature. Photovoltaic element manufacturing apparatus having an etching part for performing processing.   The photovoltaic device manufacturing apparatus according to claim 1, wherein the plurality of processing baths include an etching bath that performs texture etching on the photovoltaic device substrate. The transfer means includes a gripping tool for gripping the cassette,
The photovoltaic device manufacturing apparatus according to claim 2, wherein the hot air tank preheats the gripping tool with warm air together with the cassette containing a plurality of substrates to be processed. The hot air tank is
The temperature before the start of the etching process in the processing tank is controlled to be lower than the etching process temperature by a temperature increase due to the etching reaction heat of the substrate to be processed housed in the cassette, and is set to the set temperature. The photovoltaic device manufacturing apparatus according to any one of claims 1 to 3, further comprising a control unit that maintains the temperature within ± 3 degrees . A cleaning step of cleaning by immersing a cassette containing a plurality of substrates to be processed in the cleaning tank;
An immersion process in which the cassette that has undergone the cleaning process is sequentially immersed in a plurality of treatment tanks , maintained within ± 3 degrees with respect to a set temperature , and etching is performed.
After the cleaning step, prior to the etching step,
The manufacturing method of a photovoltaic element including the hot air irradiation process which irradiates a hot air to the cassette which accommodated the said to-be-processed substrate. The substrate to be processed is a crystalline silicon substrate for forming a photovoltaic element substrate,
In the hot air irradiation step, the temperature before the start of the etching process is controlled and set to be lower than the etching process temperature by the temperature increase due to the etching reaction heat of the substrate to be processed housed in the cassette. It is a process of maintaining within ± 3 degrees with respect to temperature,
The method of manufacturing a photovoltaic element according to claim 5, wherein the etching step is a step of performing texture etching on the crystalline silicon substrate.

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