JP6180271B2 - Video recording apparatus and video recording method - Google Patents

Description

  The present invention relates to a video recording apparatus and a video recording method for high-definition video.

In recent years, cameras for ultra-high-definition video (4K UHDTV (Ultra High Definition Television)) with more than 2000 scanning lines and higher definition than HDTV (High Definition Television) have been used in the digital cinema industry or medical applications. It is used. Furthermore, a camera for ultra-high definition video (8K UHDTV) having more than 4000 scanning lines has been studied as a next-generation broadcasting system.
Ultra high-definition video (for example, 8K UHDTV) has a very high uncompressed data rate of 24 Gbps to 144 Gbps. Therefore, compression encoding with little deterioration in image quality is performed, and the recording data rate is suppressed to a certain ratio. Can be considered.

  By the way, NAND flash memory, which has recently been increased in speed and capacity, is a recording element suitable for writing continuous data such as video, and is widely used as a recording element for digital cameras. A typical recording device composed of NAND flash memory is SSD (Solid State Drive).

  In a NAND flash memory that is a nonvolatile solid-state memory, a recording element deteriorates due to repeated writing and erasing, and data reliability is lowered. A recording apparatus using a NAND flash memory guarantees data reliability by transferring a deteriorated recording element to an alternative recording element prepared in advance. This transfer of recording elements is realized by updating a conversion table between logical addresses and physical addresses (recording elements) (for example, see Patent Document 1).

JP 2008-181380 A

  When a large-capacity recording device for video recording is configured using a NAND flash memory, if the logical address and the physical address (recording element) are converted on a one-to-one basis, the size of the conversion table increases, and the recording element can be transferred. The load of the update process of the conversion table including it became large.

  An object of the present invention is to provide a video recording apparatus and a video recording method that can reduce the processing load of address management.

  A video recording apparatus according to the present invention is a video recording apparatus having a NAND memory as a recording element, and a storage unit that stores a management table that dynamically associates a physical address corresponding to the recording element with a logical address; A management unit that manages the management table, performs address conversion based on the management table, and controls a recording element of a physical address associated with the designated logical address. An intermediate address is provided for a group of a plurality of physical addresses corresponding to the capacity of one frame of video data encoded at a predetermined compression rate, and the control unit is configured to output the logical address in units of frames of the video data. And the association between the logical address and the intermediate address is managed.

  According to this configuration, when recording a large amount of video data, the video recording apparatus can reduce the load of address management and updating in the management table by providing an intermediate address in which a plurality of physical addresses are collected. Furthermore, the video recording apparatus can reduce the processing load without impairing the use efficiency of the recording elements by setting the data size stored in one intermediate address to the data size of one frame of the video.

  When detecting deterioration of the printing element, the control unit may transfer the association between the intermediate address associated with the printing element and the logical address to a new intermediate address.

  According to this configuration, when the video recording device detects the deterioration of the recording element, the association with the intermediate address associated with the recording element is transferred to the new intermediate address, so the deterioration progresses to the same extent. Multiple pages can be processed efficiently.

  When recording video data having a compression rate higher than the predetermined compression rate, the control unit may associate one intermediate address with a plurality of logical addresses.

  According to this configuration, the video recording apparatus associates one intermediate address with a plurality of logical addresses when the compression rate of video data to be recorded is changed to be higher than a predetermined compression rate at the time of design. As a result, the video recording apparatus can record video without reducing the use efficiency of the recording element even when the compression rate of the video to be recorded is changed and the data size for one frame is reduced.

  When recording video data having a compression rate lower than the predetermined compression rate, the control unit divides a frame and associates a plurality of intermediate addresses for recording the divided data with one logical address. May be.

  According to this configuration, the video recording apparatus associates a plurality of intermediate addresses with one logical address when the compression rate of the video data to be recorded is changed to be lower than the predetermined compression rate at the time of design. As a result, the video recording apparatus can flexibly cope with a case where the data size for one frame increases due to a change in the compression rate of the video to be recorded.

  A video recording method according to the present invention is a video recording method using a NAND memory as a recording element, and a storage unit that stores a management table that dynamically associates a physical address corresponding to the recording element with a logical address; And a control unit that manages the management table, performs address conversion based on the management table, and controls a recording element having a physical address associated with the designated logical address. In the table, an intermediate address is provided for a group consisting of a plurality of physical addresses corresponding to the capacity of one frame of video data encoded at a predetermined compression rate, and the logical address is assigned to each frame of the video data, The association between the logical address and the intermediate address is managed.

  According to the present invention, the processing load of address management is reduced.

It is a block diagram which shows the function structure of a video recording system. It is a figure which shows an example of a management table group. It is a figure which shows the 1st pattern of address translation management. FIG. 6 is a diagram illustrating an association update example when deterioration of a printing element is detected in the first pattern. It is a figure which shows the 2nd pattern of address translation management. It is a figure which shows the example of an update of an association when deterioration of a printing element is detected in the 2nd pattern. It is a figure which shows the 1st pattern of the data recording condition when a compression rate is changed into 2 times. It is a figure which shows the 2nd pattern of the data recording condition when a compression rate is changed into 2 times. It is a figure which shows the data recording condition when a compression rate is changed into 1/2 time.

Hereinafter, an example of an embodiment of the present invention will be described.
The video recording system 1 of the present embodiment records a high-definition video signal (for example, 24 Gbps or more) or a compressed signal thereof in a NAND flash memory. For example, when a video of 24 Gbps (frame frequency 60 Hz) is compressed by 1/6, the data amount per frame becomes 8333 Kbytes. If metadata such as audio, subtitles, camera parameters, and proxy images is added to this data, the capacity becomes about 9000 Kbytes. The video recording system 1 sequentially stores these as video data by the video recording device 10. . In the present embodiment, a case where 9000 Kbytes of video data is recorded will be described as an example.

FIG. 1 is a block diagram showing a functional configuration of the video recording system 1.
The video recording system 1 includes a video recording device 10, a compression encoding device 20, and a video signal source 30.
The video signal source 30 includes, for example, a video camera or a player, and outputs a video signal according to a transmission standard such as SDI. The output uncompressed video signal is encoded at a predetermined compression rate by the compression encoding device 20 and input to the video recording device 10.

  The video recording device 10 receives video signals from a NAND flash memory 11, a management memory 12 (storage unit), a NAND controller 13 (control unit), a DRAM 14 which is a working temporary storage area, and a compression encoding device 20. And an I / F (interface) 15 for reception.

The NAND flash memory 11 is a non-volatile storage unit composed of NAND type recording elements. A page address as a physical address is assigned to the recording element in units of pages (for example, 8 Kbytes).
In a normal flash memory, the page size is generally about 4 to 16 Kbytes, which is extremely small compared to the capacity of video data (for example, 9000 Kbytes per frame).

The management memory 12 stores a management table storing dynamic associations between physical addresses corresponding to printing elements and logical addresses.
In the present embodiment, in the management table, a group of a plurality of physical addresses corresponding to a capacity of one frame (for example, 9000 Kbytes) of video data encoded at a predetermined compression rate (for example, 1/6). On the other hand, an intermediate address is provided. A one-to-one association between the logical address and the intermediate address is stored in the management table.

FIG. 2 is a diagram illustrating an example of a management table group stored in the management memory 12.
First, a clip number for identifying video data and a frame number (logical address) for identifying a frame included in each clip are associated one-to-many (a).
Next, the frame number and the intermediate address are associated one-to-one (b), and the intermediate address and the page address (physical address) are associated one-to-many (c).
These management tables manage in which recording element group the data of each frame included in the video data is stored.

  The NAND controller 13 updates and manages the management table stored in the management memory 12 by using an FTL (Flash Translation Layer) controller 131. Also, the NAND controller 13 performs address conversion between a logical address and a physical address based on the management table by the FTL controller 131. As a result, the NAND controller 13 controls the recording element at the physical address associated with the designated logical address to write or erase data.

Here, when video data is input, the FTL controller 131 assigns a logical address to a video frame unit (for example, 9000 Kbytes), and manages the association between the logical address and the intermediate address using a management table.
Further, when the FTL controller 131 detects the deterioration of the recording element in the NAND flash memory 11 based on a predetermined evaluation criterion, the FTL controller 131 associates the intermediate address and the logical address associated with the recording element in which the deterioration is detected, Transfer to a new intermediate address.

FIG. 3 is a diagram showing a first pattern of address translation management by the FTL controller 131.
In the first pattern, the NAND controller 13 does not use the above-described intermediate address as in the past. In this case, since a logical address and a page address (physical address) have a one-to-one correspondence, when one logical address is designated, recording elements for one page in the NAND flash memory 11 are determined.
Here, the page address N + 1 and later are spare areas not associated with logical addresses.

FIG. 4 is a diagram illustrating an association update example when deterioration of the printing element is detected in the first pattern.
The page address n-1 assigned to the recording element n-1 in which the deterioration was detected was associated with the logical address n-1 before the update. The FTL controller 131 suppresses an increase in the error rate by transferring the association with the logical address n−1 from the page address n−1 to the page address N + 1 in the spare area.

In the case of video recording, since the storage capacity is large, the size of the management table also becomes enormous. Therefore, it is difficult to change the address translation and association in units of pages because of high processing load.
Therefore, when video is recorded in units of frames, a plurality of pages are grouped into frame sizes and managed by intermediate addresses, so that address management becomes efficient and processing load is reduced.

FIG. 5 is a diagram showing a second pattern of address translation management by the FTL controller 131.
In the second pattern, the FTL controller 131 uses the above-described intermediate address. In this case, since the logical address and the page address (physical address) correspond one-to-many via the intermediate address, when one logical address is designated, a plurality of (m) pages in the NAND flash memory 11 are provided. The recording element is determined.
Here, the capacity of a plurality of pages grouped by intermediate addresses is a size that can accommodate one frame of video data (for example, 9000 Kbytes), and one logical address is assigned to each frame.

FIG. 6 is a diagram illustrating an update example of association when deterioration of the printing element is detected in the second pattern.
The intermediate address N assigned to the recording element N × m that has detected the deterioration was associated with the logical address N before the update. The FTL controller 131 suppresses an increase in error rate by transferring the association with the logical address N from the intermediate address N to the intermediate address of the spare area.
At this time, since a plurality of recording elements belonging to the intermediate address N record the same frame data, the number of times of erasing and writing is the same, and it is considered that the deterioration is progressing to the same extent. Therefore, the transfer is rationally performed in units of intermediate addresses.

Next, a case where the compression rate in the compression encoding device 20 is changed and the capacity per frame is changed will be described. The compression encoding device 20 can change the image quality and recording time of the video by changing the compression rate.
The FTL controller 131 associates one intermediate address with a plurality of frames (logical addresses) when recording video data having a compression rate higher than a predetermined compression rate at the time of design. Thereby, data of a plurality of frames is stored for one intermediate address.

  When the compression rate is changed to twice (the data size after compression is ½), the FTL controller 131 stores the compressed data for two frames at one intermediate address, thereby improving the use efficiency of the recording element. It can record without deteriorating. Similarly, when the compression rate is changed to 3 times (the data size after compression is 1/3), the FTL controller 131 stores the compressed data for three frames in one intermediate address, thereby allowing the recording element to Records without reducing usage efficiency.

At this time, the FTL controller 131 also records information in which the compression rate is changed to double as meta information in the management table. For example, in the management table, frame numbers (logical addresses) and intermediate addresses are associated in many-to-one correspondence, and the compression rate is stored together for each frame.
When the recorded video is played back, the original video data can be played back by extracting and compressing and decoding the data while referring to the compression rate meta information.

FIG. 7 is a diagram showing a first pattern of a data recording situation when the compression rate is changed to 2 times.
Uncompressed video data of 24 Gbps (54000 Kbytes per frame) has a capacity of 9000 Kbytes per frame due to a compression rate of 1/6. In this case, the logical address and the intermediate address are provided in units of 9000 Kbytes.

  At this time, when the compression rate in the compression encoding device 20 is changed to 1/12, the capacity per frame is reduced to 4500 Kbytes. Then, when data for one frame is recorded on the recording element assigned to one intermediate address, about half of the capacity becomes unused.

FIG. 8 is a diagram showing a second pattern of the data recording situation when the compression rate is changed to 2 times.
Similar to the first pattern, the intermediate address is provided in units of 9000 Kbytes.

At this time, when the compression rate in the compression encoding device 20 is changed to 1/12, the capacity per frame is reduced to 4500 Kbytes. Then, the recording element assigned to one intermediate address has a capacity for two frames.
Therefore, the FTL controller 131 assigns two frames (logical addresses) to the same intermediate address, and records data for two frames on the recording element assigned to one intermediate address. As a result, unused recording elements are reduced, and the utilization efficiency of the recording elements is improved.
In particular, when the compression is further multiplied by a constant compared to the design time, the FTL controller 131 can prevent a decrease in utilization efficiency by assigning a plurality of frames to the same intermediate address.

In the present embodiment, the case where the compression rate is higher than the initial setting has been described. However, the video recording apparatus 10 can cope with the case where the compression rate is low.
In this case, when recording video data with a compression rate lower than the predetermined compression rate at the time of design, the FTL controller 131 divides the frame and records each of the divided data for one frame (logical address). To associate multiple intermediate addresses.

FIG. 9 is a diagram showing a data recording state when the compression rate is changed to 1/2.
The intermediate address is provided in units of 9000 Kbytes as a frame size at 1/6 compression.

At this time, when the compression rate in the compression encoding device 20 is changed to 1/3, the capacity per frame is expanded to 18000 Kbytes. Then, the recording element assigned to one intermediate address cannot record data for one frame.
Therefore, the FTL controller 131 assigns one frame (logical address) to two intermediate addresses and records data for one frame on the recording elements assigned to the two intermediate addresses. Thereby, the video recording apparatus 10 can cope with the change of the compression rate.
When the frame capacity is a constant multiple compared to the design time, the FTL controller 131 can prevent a decrease in utilization efficiency by assigning one frame to a plurality of intermediate addresses.

  As described above, according to the present embodiment, the video recording apparatus 10 can reduce the load of address management and update in the management table by providing an intermediate address obtained by collecting a plurality of physical addresses. For example, by setting the data size stored in one intermediate address to the data size for one frame of video, the processing load can be reduced without impairing the use efficiency of the recording element.

  When the video recording device 10 detects deterioration of the recording element, the association with the intermediate address associated with the recording element is transferred to a new intermediate address, so that a plurality of pages that have deteriorated to the same extent are collected. Can be processed efficiently.

  The video recording apparatus 10 associates the same intermediate address with a plurality of frames (logical addresses) when the compression rate of the video data to be recorded is changed to be higher than the predetermined compression rate at the time of design. When recording an image-compressed video, if the compression rate is changed (for example, if the compression rate is increased by 2 or 3), the data size for one frame changes, but the video recording apparatus 10 is one intermediate By recording a plurality of frames for an address, it is possible to record a video without reducing the utilization efficiency of the recording element.

  The video recording apparatus 10 associates a plurality of intermediate addresses with one frame (logical address) when the compression rate of the video data to be recorded is changed to be lower than a predetermined compression rate at the time of design. Thereby, the video recording apparatus 10 can flexibly cope with a change in the compression rate of the video data to be recorded.

  As mentioned above, although embodiment of this invention was described, this invention is not restricted to embodiment mentioned above. Further, the effects described in the present embodiment are merely a list of the most preferable effects resulting from the present invention, and the effects of the present invention are not limited to those described in the present embodiment.

  In the present embodiment, the configuration and operation of the video recording apparatus have been mainly described. However, the present invention is not limited to this, and may be configured as a method or program for recording video data including each component. .

  Further, it may be realized by recording a program for realizing the function of the video recording apparatus on a computer-readable recording medium, causing the computer system to read and execute the program recorded on the recording medium. .

  The “computer system” here includes an OS and hardware such as peripheral devices. The “computer-readable recording medium” refers to a storage device such as a portable medium such as a flexible disk, a magneto-optical disk, a ROM, and a CD-ROM, and a hard disk built in the computer system.

  Furthermore, “computer-readable recording medium” means that a program is dynamically held for a short time, like a communication line when transmitting a program via a network such as the Internet or a communication line such as a telephone line. It is also possible to include one that holds a program for a certain time, such as a volatile memory inside a computer system that becomes a server or client in that case. Further, the program may be for realizing a part of the above-described functions, and may be capable of realizing the above-described functions in combination with a program already recorded in the computer system. .

DESCRIPTION OF SYMBOLS 1 Video recording system 10 Video recording apparatus 11 NAND flash memory 12 Management memory (memory | storage part)
13 NAND controller (control unit)
14 DRAM
131 FTL controller

Claims (5)

A video recording apparatus using a NAND memory as a recording element,
A storage unit that stores a management table that dynamically associates a physical address corresponding to the recording element with a logical address;
A controller that manages the management table, performs address conversion based on the management table, and controls a recording element of a physical address associated with the designated logical address;
In the management table, an intermediate address is provided for a group consisting of a plurality of physical addresses corresponding to the capacity of one frame of video data encoded at a predetermined compression rate,
The control unit assigns the logical address to each frame of the video data, and manages the association between the logical address and the intermediate address.   2. The video recording apparatus according to claim 1, wherein when the deterioration of the recording element is detected, the control unit transfers the association between the intermediate address associated with the recording element and the logical address to a new intermediate address. .   The video recording apparatus according to claim 1, wherein the control unit associates one intermediate address with a plurality of logical addresses when recording video data having a compression rate higher than the predetermined compression rate.   When recording video data having a compression rate lower than the predetermined compression rate, the control unit divides a frame and associates a plurality of intermediate addresses for recording the divided data with one logical address. The video recording apparatus according to claim 1. A video recording method using a NAND memory as a recording element,
A storage unit that stores a management table that dynamically associates a physical address corresponding to the recording element with a logical address;
A computer having a control unit that manages the management table, performs address conversion based on the management table, and controls a recording element of a physical address associated with the designated logical address,
In the management table, an intermediate address is provided for a group consisting of a plurality of physical addresses corresponding to the capacity of one frame of video data encoded at a predetermined compression rate,
A video recording method in which the logical address is assigned to each frame of the video data, and the association between the logical address and the intermediate address is managed.

Images