JP6158125B2 - Power converter - Google Patents

Description

  Embodiments described herein relate generally to a power conversion apparatus.

  There is a multi-level power converter that suppresses harmonic components of the output voltage by changing the output voltage in multiple stages. In the multi-level power conversion device, the filter for making the output waveform approximate to a sine wave can be reduced, and high output density can be realized. In such a power converter, high efficiency is desired.

JP 2008-92651 A

  Embodiments of the present invention provide a power converter with high power density and high efficiency.

  According to the embodiment of the present invention, a power conversion device including a main circuit unit, a power detection unit, and a control circuit is provided. The main circuit unit includes an inverter that converts DC power supplied from a DC power source into AC power, and a filter that suppresses harmonic components of the AC power output from the inverter. The inverter is connected between a high potential input terminal connected to the anode of the DC power supply, a low potential input terminal connected to the cathode of the DC power supply, and the high potential input terminal and the low potential input terminal. A plurality of legs. Each of the plurality of legs is connected between a first upper switching element connected between the high potential input terminal and the low potential input terminal, and between the first upper switching element and the high potential input terminal. The second upper switching element, the first lower switching element connected between the first upper switching element and the low potential input terminal, the first lower switching element and the low potential input terminal, A second lower switching element connected between, one end connected between the first upper switching element and the second upper switching element, the first lower switching element and the second lower side A charge storage element having a second end connected to the switching element. The power detection unit detects output power of the main circuit unit. The control circuit includes a plurality of modulated waves set for each of the plurality of legs, a plurality of carrier signals set for each of the first upper switching element and the second upper switching element of the plurality of legs, The first upper switching element, the second upper switching element, the first lower switching element, and the second lower switching element are controlled to be turned on / off. The control circuit includes a frequency determination unit that determines frequencies of the plurality of carrier signals based on the output power of the main circuit unit detected by the power detection unit. The frequency determination unit determines the frequency of the plurality of carrier signals as the maximum frequency when the output power is a maximum value, and determines the frequencies of the plurality of carrier signals as the frequency when the output power is lower than the maximum value. A frequency lower than the maximum frequency is determined.

It is a block diagram showing typically the power converter concerning a 1st embodiment. FIG. 2A to FIG. 2D are graphs schematically illustrating the operation of the control circuit according to the first embodiment. It is a graph which represents typically an example of operation | movement of the frequency determination part which concerns on 1st Embodiment. FIG. 4A to FIG. 4D are graphs schematically illustrating an example of another operation of the frequency determination unit according to the first embodiment. FIG. 5A and FIG. 5B are block diagrams schematically showing a part of the power conversion device according to the second embodiment. It is a block diagram showing typically the power converter concerning a 3rd embodiment.

Each embodiment will be described below with reference to the drawings.
The drawings are schematic or conceptual, and the relationship between the thickness and width of each part, the size ratio between the parts, and the like are not necessarily the same as actual ones. Further, even when the same part is represented, the dimensions and ratios may be represented differently depending on the drawings.
Note that, in the present specification and each drawing, the same elements as those described above with reference to the previous drawings are denoted by the same reference numerals, and detailed description thereof is omitted as appropriate.

(First embodiment)
FIG. 1 is a block diagram schematically illustrating the power conversion apparatus according to the first embodiment.
As shown in FIG. 1, the power conversion device 10 is connected to the DC power supply 2 and the load 4. The power conversion device 10 is detachably connected to the DC power source 2 and the load 4 via, for example, a connector. In the specification of the present application, “connection” includes not only the case of being connected in direct contact but also the case of being electrically connected via another conductive member or the like. In addition, the case of magnetic coupling through a transformer or the like is also included in “connection”.

  The DC power supply 2 supplies DC power to the power converter 10. The DC power source 2 is a solar cell panel, for example. When DC power supply 2 is a solar cell panel, power conversion device 10 may be connected to the solar cell panel via a DC voltage adjustment circuit such as a boost chopper. In this case, the DC voltage adjusting circuit may be the DC power supply 2. The DC power source 2 may be, for example, a gas turbine engine. The DC power source 2 may be any power source that can supply DC power.

  The load 4 is an AC load. The load 4 is, for example, an electronic device that operates by supplying AC power. The load 4 may be, for example, a power system such as a power transmission line that supplies power to a power receiving facility of a consumer.

  The power conversion device 10 converts the DC power supplied from the DC power supply 2 into AC power corresponding to the load 4, and outputs the converted AC power to the load 4. The power conversion device 10 outputs active power to the load 4. The power converter 10 is a so-called power conditioner. The voltage of the AC power output from the power conversion device 10 is, for example, 100 V (effective value) or 200 V (effective value). The frequency of the AC power output from the power converter 10 is, for example, 50 Hz or 60 Hz.

  The power conversion device 10 includes a main circuit unit 12 and a control circuit 14. The main circuit unit 12 includes an inverter 20, a filter 22, and a power detection unit 24. The inverter 20 is connected to the DC power source 2. The inverter 20 converts DC power supplied from the DC power source 2 into AC power.

  The filter 22 suppresses harmonic components of the AC power output from the inverter 20. For example, the filter 22 approximates the AC power output from the inverter 20 to a sine wave. The filter 22 is a so-called sine wave filter. The filter 22 may include, for example, not only a sine wave filter but also a noise filter (EMI filter) for removing noise.

  As described above, the main circuit unit 12 converts the DC power supplied from the DC power source 2 into AC power corresponding to the load 4. The main circuit unit 12 may further include, for example, a noise cut filter or a transformer. The noise cut filter is provided, for example, between the DC power supply 2 and the inverter 20 and suppresses noise included in DC power supplied from the DC power supply 2. For example, the transformer is provided between the filter 22 and the load 4, and transforms AC power output from the filter 22.

  The control circuit 14 is, for example, a processor such as a CPU or MPU. For example, the control circuit 14 reads out a predetermined program from a memory (not shown) and sequentially processes the program to control each unit of the power conversion apparatus 10 in an integrated manner. Specifically, the control circuit 14 controls conversion from DC power to AC power by the inverter 20. The memory storing the program may be provided in the control circuit 14 or may be provided separately from the control circuit 14 and connected to the control circuit 14.

  The power detection unit 24 detects the output power of the main circuit unit 12. The power detection unit 24 includes a voltage detection unit 25 and a current detection unit 26. The voltage detector 25 detects the output voltage of the main circuit unit 12. The current detection unit 26 detects the output current of the main circuit unit 12. For example, when the inverter 20 is a three-phase inverter, the voltage detection unit 25 detects the output voltage of each phase of the three-phase AC power, and the current detection unit 26 detects the output current of each phase of the three-phase AC power. To do. The voltage detection unit 25 and the current detection unit 26 are connected to the control circuit 14. The voltage detection unit 25 inputs the detected output voltage to the control circuit 14. The current detection unit 26 inputs the detected output current to the control circuit 14. That is, the power detection unit 24 is connected to the control circuit 14 and inputs the detected output power to the control circuit 14.

  In this example, the power detection unit 24 includes a voltage detection unit 25 and a current detection unit 26. Without being limited thereto, the power detection unit 24 may include at least one of the voltage detection unit 25 and the current detection unit 26. The power detection unit 24 may detect at least one of the output voltage of the main circuit unit 12 and the output current of the main circuit unit 12 as information on the output power of the main circuit unit 12. In this example, the power detection unit 24 is connected between the filter 22 and the load 4. For example, the power detection unit 24 may be connected between the inverter 20 and the filter 22.

  Inverter 20 includes a high potential input terminal 20a, a low potential input terminal 20b, and a plurality of legs LG1, LG2. The high potential input terminal 20 a is connected to the anode of the DC power supply 2. The low potential input terminal 20 b is connected to the cathode of the DC power supply 2. Thus, the inverter 20 is connected to the DC power source 2 via the input terminals 20a and 20b. DC power supplied from the DC power supply 2 is input between the input terminals 20a and 20b.

  In this example, the inverter 20 includes two legs, a first leg LG1 and a second leg LG2. The first leg LG1 includes two arms, a first upper arm UA1 and a first lower arm LA1. The first upper arm UA1 is connected to the high potential input terminal 20a. The first lower arm LA1 is connected between the first upper arm UA1 and the low potential input terminal 20b. The second leg LG2 includes two arms, a second upper arm UA2 and a second lower arm LA2. The second upper arm UA2 is connected to the high potential input terminal 20a. The second lower arm LA2 is connected between the second upper arm UA2 and the low potential input terminal 20b.

  Thus, each leg LG1, LG2 is connected in parallel between each input terminal 20a, 20b. In each leg LG1, LG2, “upper side” and “lower side” do not mean the vertical arrangement. In each leg LG1, LG2, “upper side” means the side where the potential of the input DC power is higher, and “lower side” means the side where the potential of the input DC power is lower. In other words, the upper arms UA1 and UA2 are arms on the high potential side. In other words, the lower arms LA1 and LA2 are arms on the low potential side.

  In this example, the inverter 20 is a so-called single-phase inverter having two legs and four arms. The inverter 20 converts DC power into single-phase AC power. The inverter 20 may be a three-phase inverter. The inverter 20 may convert DC power into three-phase AC power. That is, the inverter 20 may further include a third leg connected in parallel to the first leg LG1 and the second leg LG2.

  As described above, the output power of the main circuit unit 12 (power converter 10) may be single-phase AC power or three-phase AC power. The output power of the main circuit unit 12 may be set according to the load 4. When the inverter 20 is a three-phase inverter, a filter 22 is provided for each phase of the three-phase AC power. That is, when the inverter 20 is a three-phase inverter, three filters 22 are provided.

  The first upper arm UA1 of the first leg LG1 is connected between the first upper switching element U1 connected between the input terminals 20a and 20b, and between the first upper switching element U1 and the high potential input terminal 20a. Second upper switching element U2.

  The first lower arm LA1 of the first leg LG1 includes a first lower switching element X1 connected between the first upper switching element U1 and the low-potential input terminal 20b, and the first lower switching element X1 and the first lower switching element X1. And a second lower switching element X2 connected between the potential input terminal 20b.

  The first leg LG1 includes a first charge storage element CU1. One end of the first charge storage element CU1 is connected between the first upper switching element U1 and the second upper switching element U2. The other end of the first charge storage element CU1 is connected between the first lower switching element X1 and the second lower switching element X2.

  Similarly to the first leg LG1, the second leg LG2 includes the first upper switching element V1, the second upper switching element V2, the first lower switching element Y1, the second lower switching element Y2, and the first leg switching element Y2. Charge storage element CV1. Since the configuration of the second leg LG2 is substantially the same as the configuration of the first leg LG1, detailed description thereof is omitted.

  For example, capacitors are used for the first charge storage elements CU1 and CV1. Each first charge storage element CU1, CV1 is called, for example, a flying capacitor. That is, the inverter 20 is a so-called flying capacitor circuit type inverter.

  The first leg LG1 further includes a third upper switching element U3, a third lower switching element X3, and a second charge storage element CU2. The third upper switching element U3 is connected between the second upper switching element U2 and the high potential input terminal 20a. The third lower switching element X3 is connected between the second lower switching element X2 and the low potential input terminal 20b. One end of the second charge storage element CU2 is connected between the second upper switching element U2 and the third upper switching element U3. The other end of the second charge storage element CU2 is connected between the second lower switching element X2 and the third lower switching element X3.

  Similarly, the second leg LG2 further includes a third upper switching element V3, a third lower switching element Y3, and a second charge storage element CV2.

  Thus, in the inverter 20, three switching elements are connected in series to each of the arms UA1, UA2, LA1, and LA2. The second charge storage element CU2 generates an intermediate voltage between the DC power supply 2 and the first charge storage element CU1. The first charge storage element CU1 generates a voltage intermediate between the second charge storage element CU2 and the reference potential. Similarly, the second charge storage element CV2 generates an intermediate voltage between the DC power supply 2 and the first charge storage element CV1. The first charge storage element CV1 generates a voltage intermediate between the second charge storage element CV2 and the reference potential. For this reason, the charge storage elements CU1, CU2, CV1, and CV2 are sometimes referred to as intermediate capacitors.

  Thus, in the inverter 20, the level of the output voltage can be changed to 3 levels with the upper arm, 3 levels with the lower arm, and a total of 7 levels including the reference potential level. That is, the inverter 20 is a 7-level multi-level inverter. The number of switching elements provided in each arm UA1, UA2, LA1, LA2 may be two, or four or more. The level of the voltage output from the inverter 20 may be 5 levels or 9 levels or more.

  Thus, when the inverter 20 that changes the level of the output voltage to 7 levels is used, the volume of the filter 22 can be reduced by about 85% compared to the case of 2-level output. For example, if the volume of the filter 22 for two-level output is about 750 cc, the volume of the filter 22 can be about 112 cc in this example. Therefore, the power converter 10 can be increased in output density. The “output density” is the ratio of the output power of the power converter 10 to the volume of the power converter 10.

  The inverter 20 includes the first upper switching elements U1, V1, the second upper switching elements U2, V2, the first lower switching elements X1, Y1, the second lower switching elements X2, Y2, It is only necessary to include at least each of the first charge storage elements CU1 and CV1. When three or more switching elements are provided in each arm UA1, UA2, LA1, and LA2, the inverter 20 is provided with a plurality of charge storage elements. The number of charge storage elements is a value obtained by subtracting 1 from the number of switching elements of each arm UA1, UA2, LA1, LA2. One end of each charge storage element is connected to a connection point between two adjacent switching elements of the upper arm. The other end of each charge storage element is connected to a connection point between two adjacent switching elements of the lower arm.

  In the inverter 20, the connection point between the first upper arm UA1 and the first lower arm LA1 and the connection point between the second upper arm UA2 and the second lower arm LA2 are AC output points. In other words, the connection point between the first upper switching element U1 and the first lower switching element X1 and the connection point between the first upper switching element V1 and the first lower switching element Y1 are AC output points. . The filter 22 is connected to the AC output point of the inverter 20.

  For example, self-extinguishing elements are used for the switching elements U1 to U3, X1 to X3, V1 to V3, and Y1 to Y3. More specifically, for example, GTO (Gate Turn-Off thyristor), IGBT (Insulated Gate Bipolar Transistor) or the like is used.

  Each of the switching elements U1 to U3, X1 to X3, V1 to V3, and Y1 to Y3 includes a pair of main electrodes and a control electrode that controls a current flowing between the main electrodes. The control electrode is, for example, a gate electrode. Each switching element U1-U3, X1-X3, V1-V3, Y1-Y3 is connected in series in each main electrode.

  Each switching element U1-U3, X1-X3, V1-V3, Y1-Y3 changes to an ON state and an OFF state according to the voltage applied to a control electrode. Each switching element U1-U3, X1-X3, V1-V3, Y1-Y3 will be in an ON state, for example when a 1st voltage is applied to a control electrode. Each of the switching elements U1 to U3, X1 to X3, V1 to V3, Y1 to Y3 is applied when a second voltage lower than the first voltage is applied to the control electrode or when no voltage is applied to the control electrode. Turns off. The off state is a state in which substantially no current flows between the main electrodes. The off state may be, for example, a state in which a weak current that does not affect power conversion in the inverter 20 flows between the main electrodes. In other words, the on state is a first state in which current flows between the main electrodes. The off state is a second state in which the current flowing between the main electrodes is lower than the first state. In this example, the switching elements U1 to U3, X1 to X3, V1 to V3, and Y1 to Y3 are normally-off types. Each switching element U1-U3, X1-X3, V1-V3, Y1-Y3 may be a normally-on type.

  In addition, diodes are connected to the switching elements U1 to U3, X1 to X3, V1 to V3, and Y1 to Y3. Each diode is connected in parallel to each main electrode of each switching element U1-U3, X1-X3, V1-V3, Y1-Y3. In addition, the forward direction of each diode is set to be opposite to the direction of current flowing between the main electrodes. That is, each diode is a so-called free-wheeling diode.

  The control circuit 14 is connected to the switching elements U1 to U3, X1 to X3, V1 to V3, and Y1 to Y3 of the inverter 20. More specifically, the control circuit 14 is connected to the control electrodes of the switching elements U1 to U3, X1 to X3, V1 to V3, and Y1 to Y3. The control circuit 14 controls on / off of the switching elements U1 to U3, X1 to X3, V1 to V3, and Y1 to Y3. For example, the control circuit 14 inputs a control signal to the control electrodes of the switching elements U1 to U3, X1 to X3, V1 to V3, and Y1 to Y3, and changes the voltage of the control signal, thereby changing the switching elements U1 to U1. ON / OFF of U3, X1 to X3, V1 to V3, and Y1 to Y3 is controlled. The control signal is a so-called gate signal. Thereby, the control circuit 14 converts the DC power into AC power having a voltage and frequency corresponding to the load 4.

FIG. 2A to FIG. 2D are graphs schematically illustrating the operation of the control circuit according to the first embodiment.
As shown in FIG. 2A to FIG. 2D, the control circuit 14 uses the switching elements U1 to U3, X1 to X3, and V1 to V3 based on the carrier signals CS1 to CS3 and the modulated wave MW. , Y1 to Y3 are controlled on / off.

  FIG. 2A shows an example of carrier signals CS1 to CS3 and a modulated wave MW used for controlling the switching elements U1 to U3 and X1 to X3 of the first leg LG1. The modulated wave MW is set for each leg LG1, LG2. In this example, actually, two modulated waves MW are set.

  The carrier signal is set for each of the upper switching elements U1 to U3 and V1 to V3 or for each of the lower switching elements X1 to X3 and Y1 to Y3 in each leg LG1 and LG2. That is, in this example, six carrier signals are set. The carrier signal set in each switching element of the first leg LG1 can also be used in common for each switching element of the second leg LG2. Therefore, in this example, at least three types of carrier signals may be prepared.

  The carrier signal CS1 is an example of a carrier signal used for controlling the first upper switching element U1. The carrier signal CS2 is an example of a carrier signal used for controlling the second upper switching element U2. The carrier signal CS3 is an example of a carrier signal used for controlling the third upper switching element U3.

  FIG. 2B is an example of a control signal for the first upper switching element U1 generated based on the modulated wave MW and the carrier signal CS1. FIG. 2C is an example of a control signal for the second upper switching element U2 generated based on the modulated wave MW and the carrier signal CS2. FIG. 2D is an example of a control signal for the third upper switching element U3 generated based on the modulated wave MW and the carrier signal CS3.

  Modulated wave MW and carrier signals CS1 to CS3 change periodically. The modulation wave MW is, for example, a sine wave. The frequency of modulated wave MW is set according to the frequency of AC power output from main circuit unit 12. The frequency of the modulation wave MW is, for example, 50 Hz or 60 Hz. Each carrier signal CS1-CS3 is, for example, a triangular wave. The carrier signals CS1 to CS3 may be sawtooth waves or trapezoidal waves. The frequencies of the carrier signals CS1 to CS3 are higher than the frequency of the modulated wave MW. The frequency of each of the carrier signals CS1 to CS3 is, for example, about 0.5 kHz to 25 kHz. The frequencies of the carrier signals CS1 to CS3 are substantially the same.

  The carrier signals CS1 to CS3 are set with a phase shift of 120 degrees. The phase of the carrier signal is set according to the number of carrier signals. For example, when each arm is a five-level inverter including two switching elements, two carrier signals are set, and the phase of each carrier signal is shifted by 180 degrees. For this reason, the inverter 20 may be called a carrier phase shift signal generation system.

  The control circuit 14 compares the modulated wave MW with the carrier signals CS1 to CS3. For example, the control circuit 14 turns on the upper switching elements U1 to U3 and turns off the lower switching elements X1 to X3 when the modulated wave MW is equal to or higher than the carrier signals CS1 to CS3. In this case, the control circuit 14 turns off the upper switching elements U1 to U3 and turns on the lower switching elements X1 to X3 when the modulated wave MW is less than the carrier signals CS1 to CS3. As described above, the control circuit 14 alternately turns on and off the upper switching elements U1 to U3 and the lower switching elements X1 to X3. On the contrary, when the modulated wave MW is equal to or higher than the carrier signal CS, the upper switching elements U1 to U3 may be turned off and the lower switching elements X1 to X3 may be turned on.

  The control circuit 14 controls each of the legs LG1 and LG2 as described above. Thereby, the control circuit 14 controls on / off of each switching element U1-U3, X1-X3, V1-V3, Y1-Y3. That is, the conversion from DC power to AC power by the inverter 20 is controlled.

  The control method of the flying capacitor circuit type inverter 20 is described in detail in, for example, the paper “Study on Capacitor Selection Guidelines for Flying Capacitor Multilevel Converter Vol.No.12 pp.1393-1400” It is described in.

  The control circuit 14 includes an AC value detection unit 40, an effective value calculation unit 41, a frequency determination unit 42, a carrier generation unit 43, a modulated wave generation unit 44, and a comparison unit 45.

  The output power of the main circuit unit 12 detected by the power detection unit 24 is input to the AC value detection unit 40. For example, at least one of the output voltage of the main circuit unit 12 detected by the voltage detection unit 25 and the output current of the main circuit unit 12 detected by the current detection unit 26 are input to the AC value detection unit 40. . The AC value detection unit 40 detects the AC value of the detected output power of the main circuit unit 12. The AC value detection unit 40 acquires, for example, the maximum value of the frequency and amplitude of the output power of the main circuit unit 12 as an AC value. The AC value of the output power of the main circuit unit 12 may be the AC value of the output voltage of the main circuit unit 12 or the AC value of the output current of the main circuit unit 12.

  The effective value calculation unit 41 calculates the effective value of the output power of the main circuit unit 12 based on the AC value of the output power detected by the AC value detection unit 40. That is, the effective value calculation unit 41 calculates a DC converted value of the output power. The effective value calculator 41 calculates, for example, at least one of the effective value of the output voltage and the effective value of the output current as the effective value of the output power.

  The frequency determination unit 42 determines the frequency of each of the carrier signals CS1 to CS3 (hereinafter referred to as carrier frequency). For example, the frequency determination unit 42 determines the carrier frequency based on the output power of the main circuit unit 12 detected by the power detection unit 24. In this example, the frequency determination unit 42 determines the carrier frequency based on the effective value of the output power calculated by the effective value calculation unit 41.

  For example, the frequency determination unit 42 may determine the carrier frequency from the AC value of the output power. However, as described above, the frequency determination unit 42 determines the carrier frequency based on the effective value of the output power. Thereby, for example, calculation of the carrier frequency can be facilitated.

  The frequency determination unit 42 determines the carrier frequency to the maximum frequency when the output power of the main circuit unit 12 is the maximum value, and sets the carrier frequency to the maximum frequency when the output power of the main circuit unit 12 is lower than the maximum value. Decrease to a lower frequency. That is, the frequency determination unit 42 decreases the carrier frequency in accordance with the decrease in the output power of the main circuit unit 12.

FIG. 3 is a graph schematically illustrating an example of the operation of the frequency determination unit according to the first embodiment.
The horizontal axis in FIG. 3 is the effective value Vrms (V) of the output power of the main circuit unit 12, and the vertical axis is the carrier frequency Fc (Hz).
As illustrated in FIG. 3, the frequency determination unit 42 sets, for example, the first determination value DV1 and the second determination value DV2 with respect to the effective value of the output power. The second determination value DV2 is lower than the first determination value DV1.

  The frequency determination unit 42 determines the carrier frequency as the maximum frequency when the effective value of the output power is equal to or greater than the first determination value DV1. The frequency determination unit 42 determines the carrier frequency as the minimum frequency when the effective value of the output power is equal to or less than the second determination value DV2. Then, when the effective value of the output power is a value between the first determination value DV1 and the second determination value DV2, the frequency determination unit 42 determines the carrier frequency as a frequency between the maximum frequency and the minimum frequency. To do.

  When the effective value of the output power is a value in an intermediate region between the first determination value DV1 and the second determination value DV2, the frequency determination unit 42 sets the carrier frequency to the maximum frequency according to the effective value of the output power. The frequency is continuously changed to a frequency between the minimum frequency.

  In this example, the carrier frequency is changed linearly with respect to the effective value of the output power in the intermediate region. For example, the carrier frequency may be proportional to the square of the effective value of the output power. That is, the carrier frequency may be changed in a quadratic function. In the intermediate region, the carrier frequency may be continuously reduced as the effective value of the output power decreases.

The carrier frequency is determined based on the following equation (1), for example.
ΔV = Irms / (2π · fcar · C) (1)
In the equation (1), ΔV is a ripple voltage (peak to peak) (V). Irms is an effective value (A) of the output current of the main circuit unit 12. fcar is an equivalent carrier frequency (Hz). C is an average value (F) of the capacitance of two adjacent charge storage elements. In this example, the average value of the capacity of the first charge storage element CU1 and the capacity of the second charge storage element CU2, or the average value of the capacity of the first charge storage element CV1 and the capacity of the second charge storage element CV2 is there. Here, the equivalent carrier frequency fcar is obtained by multiplying the carrier frequency by the number of carrier signals. In this example, six carrier signals are used. Therefore, in this example, the carrier frequency × 6 is used as the equivalent carrier frequency fcar.

  The capacitances of the charge storage elements CU1, CU2, CV1, and CV2 are substantially the same. The capacitances of the charge storage elements CU1, CU2, CV1, and CV2 may be different, for example. When determining the carrier frequency, it is necessary to determine that the ripple does not exceed the element voltage. For example, if there is a charge storage element having a small capacity, the ripple voltage ΔV increases only in that portion. For example, the voltage applied to the second upper switching element U2 and the second lower switching element X2 is the difference between the adjacent charge storage elements CU1 and CU2. Therefore, it is necessary to determine the equivalent carrier frequency fcar in accordance with the portion where the average value of the capacitances of two adjacent charge storage elements is minimum.

  The switching elements U2, X2, V2, and Y2 located in the middle are affected by the voltage ripples of both the outer second charge storage elements CU2 and CV2 and the inner first charge storage elements CU1 and CV1. . Therefore, the ripple voltage generated in each of the switching elements U2, X2, V2, and Y2 located in the middle is ΔV / 2 (average value to peak value) + ΔV / 2 (average value to peak value), as described above. , ΔV.

  For example, when the DC voltage supplied from the DC power supply 2 is about 330 V, the voltages of the outer second charge storage elements CU2 and CV2 are about 220 V, and the inner first charge storage elements CU1 and CV1. Is about 110V.

  Moreover, when 200V withstand voltage Si is used for each switching element, the overvoltage protection level can be set to about 160V. When a margin of 10V is set, the ripple voltage ΔV is 160-10-110, and it may be set to less than about 40V.

  In this case, the equivalent carrier frequency fcar may be obtained from the equation (1) so as to satisfy ΔV <40V. Therefore, when the output power of the main circuit unit 12 is low, that is, when the output current Irms is small, the equivalent carrier frequency fcar can be reduced.

  The maximum value of the equivalent carrier frequency fcar is, for example, about 150 kHz. That is, the maximum value of the carrier frequency is about 25 kHz, for example. The minimum value of the equivalent carrier frequency fcar is, for example, about 60 kHz to 100 kHz. That is, the minimum value of the carrier frequency is, for example, about 10 kHz to 17 kHz.

  The carrier generation unit 43 generates the carrier signals CS1 to CS3 having the frequency determined by the frequency determination unit 42. The carrier generation unit 43 is connected to the comparison unit 45. The carrier generation unit 43 inputs the generated carrier signals CS1 to CS3 to the comparison unit 45.

  For example, the output power of the main circuit unit 12 detected by the power detection unit 24 is input to the modulated wave generation unit 44. In addition, for example, a power command value of output power is input to the modulated wave generation unit 44. The modulated wave generating unit 44 generates the modulated wave MW of each leg LG1, LG2 based on the input output power detection value and power command value. The modulated wave generation unit 44 is connected to the comparison unit 45. The modulation wave generation unit 44 inputs each generated modulation wave MW to the comparison unit 45.

  The power command value is input to the power conversion apparatus 10 from, for example, a host controller that controls the power system. Each power command value may be generated in the power converter 10. For example, when the DC power supply 2 is a solar cell panel, the power at the optimum operating point obtained from the output voltage and output current of the solar cell panel may be used as the power command value.

  As described with reference to FIGS. 2A to 2D, the comparison unit 45 compares the input modulated waves MW with the carrier signals CS1 to CS3. Thereby, the comparison part 45 produces | generates the control signal of each switching element U1-U3, X1-X3, V1-V3, Y1-Y3 from each modulation wave MW and each carrier signal CS1-CS3. The control circuit 14 inputs the control signals generated by the comparison unit 45 to the control electrodes of the switching elements U1 to U3, X1 to X3, V1 to V3, and Y1 to Y3, and the switching elements U1 to U3 and X1 to X1. Control on / off of X3, V1 to V3, and Y1 to Y3.

  Development of a power conditioner system (PCS) is being promoted in anticipation of the introduction of photovoltaic power generation and storage batteries into the power system. For example, development of a PCS having a small to medium capacity of about 5 to 25 kW is underway. In PCS, high-efficiency power conversion is required.

  For example, a small-capacity PCS for home use requires not only high efficiency but also high output density. Therefore, it is necessary to design a power converter that reduces the volume while maintaining high efficiency. By using a multi-level power converter, the output waveform approaches a sine wave, so that the volume of the filter can be reduced.

  In a power conversion device that generates an intermediate voltage by a flying capacitor circuit system, the voltage ripple of the charge storage element that maintains the intermediate voltage can be reduced by increasing the carrier frequency. As a result, the capacity of the charge storage element can be reduced and the volume of the charge storage element can be reduced, leading to higher output density. Moreover, since it is a multilevel power converter, it is possible to use a switching element having a small element withstand voltage. Since the conduction resistance of the switching element is substantially proportional to the square of the breakdown voltage, a low-loss power converter can be realized by using a low breakdown voltage element. Recently, the development of GaN, low-pressure Si, or SiC has been remarkable, and application to these switching elements is possible. For this reason, research and development of multilevel power converters using a flying capacitor circuit system are being conducted.

  The PCS is connected to a solar panel or a storage battery, and has a function of adjusting power to the system side. The output power fluctuates and may be output at all below the maximum output. Therefore, it is necessary to design so as to be highly efficient in a wide range below the maximum output.

  From such a background, in the PCS by the multilevel power conversion device using the flying capacitor circuit method, high output density is achieved by increasing the carrier frequency and reducing the capacitor capacity. However, when the carrier frequency is increased, the switching frequency of each switching element is increased and the switching loss is increased. That is, the power conversion efficiency decreases. For this reason, in a multilevel power conversion device using a flying capacitor circuit system, it is desired to realize high-efficiency conversion while maintaining high output density.

  The voltage ripple of each of the charge storage elements CU1, CU2, CV1, and CV2 that generates the intermediate voltage is determined by the carrier frequency and the capacity of the charge storage element. A load current flows through each of the charge storage elements CU1, CU2, CV1, and CV2. For this reason, the voltage ripples of the charge storage elements CU1, CU2, CV1, and CV2 and the voltage ripples of the switching elements U1 to U3, X1 to X3, V1 to V3, and Y1 to Y3 are maximized at the maximum output. Therefore, the carrier frequency must be designed so that the voltage ripple at the maximum output is below the overvoltage level. However, there is a margin between the voltage ripple and the overvoltage level except for the maximum output.

  For this reason, in the power conversion device 10 according to the present embodiment, when the output power of the main circuit unit 12 is the maximum value, the carrier frequency is set to the maximum, and when the output power of the main circuit unit 12 is lower than the maximum value, Set the carrier frequency low. Thereby, in the power converter 10, while being able to implement | achieve a high output density, the switching loss at the time of an output lower than a maximum output can be suppressed, and conversion efficiency can be improved. A highly efficient power conversion device 10 with high output density can be realized.

  In the power converter 10, the carrier frequency is determined based on the effective value of the output power. As a result, the carrier frequency can be easily calculated as described above. Moreover, in the power converter device 10, when the effective value of the output power is equal to or higher than the first determination value DV1, the carrier frequency is maximized. Thereby, for example, voltage ripples caused by the charge storage elements CU1, CU2, CV1, and CV2 can be appropriately suppressed. Furthermore, in the power converter 10, the carrier frequency is minimized when the effective value of the output power is equal to or less than the second determination value DV2. Thereby, for example, the voltage ripple can be suppressed within a specified value.

FIG. 4A to FIG. 4D are graphs schematically illustrating an example of another operation of the frequency determination unit according to the first embodiment.
In the above embodiment, when the effective value of the output power is a value in the intermediate region between the first determination value DV1 and the second determination value DV2, the carrier frequency is set to the maximum frequency and the minimum according to the effective value of the output power. The frequency is continuously changed to between the frequencies. Without being limited thereto, in the intermediate region, for example, as shown in FIG. 4A, the carrier frequency may be changed stepwise in accordance with the effective value of the output power.

  In the above embodiment, the carrier frequency is determined based on the first determination value DV1 and the second determination value DV2. For example, as shown in FIG. 4B, when the effective value of the output power is equal to or higher than a predetermined determination value, the carrier frequency is determined as the maximum frequency and is lower than the determination value, for example. In addition, the carrier frequency may be changed continuously or stepwise to a frequency between the maximum frequency and the minimum frequency according to the effective value of the output power.

  As shown in FIG. 4C, when the effective value of the output power is less than the predetermined determination value, the carrier frequency is determined as the minimum frequency, and when it is equal to or higher than the determination value, the effective value of the output power is set. Accordingly, the carrier frequency may be changed continuously or stepwise to a frequency between the maximum frequency and the minimum frequency.

  For example, the carrier frequency may be determined as the maximum frequency when the effective value of the output power is greater than or equal to a predetermined determination value, and the carrier frequency may be determined as the minimum frequency when it is less than the determination value. That is, the carrier frequency may be changed in two stages.

  As shown in FIG. 4D, the carrier frequency is changed continuously or stepwise to a frequency between the maximum frequency and the minimum frequency according to the effective value of the output power without providing a determination value. Also good.

(Second Embodiment)
FIG. 5A and FIG. 5B are block diagrams schematically showing a part of the power conversion device according to the second embodiment.
FIG. 5A and FIG. 5B schematically show the control circuit 14. In this example, the main circuit unit 12 and the like are substantially the same as those in the first embodiment, and thus detailed description thereof is omitted. In addition, components that are substantially the same in function and configuration as those of the first embodiment are denoted by the same reference numerals, and detailed description thereof is omitted.

  As shown in FIG. 5A, in this example, the control circuit 14 further includes a stabilization filter 46. The stabilization filter 46 is provided between the effective value calculation unit 41 and the frequency determination unit 42. The stabilization filter 46 suppresses noise included in the effective value of the output power calculated by the effective value calculation unit 41.

  Thereby, for example, rapid fluctuations in the carrier frequency can be suppressed. For example, the carrier frequency can be obtained more appropriately. For example, the carrier frequency behavior can be stabilized. The stabilization filter 46 suppresses noise, for example, by performing software control on the effective value of the output power. Thereby, for example, even when the stabilization filter 46 is provided, a decrease in output density can be suppressed.

  As illustrated in FIG. 5B, the stabilization filter 46 may be provided between the frequency determination unit 42 and the carrier generation unit 43. Also in this case, it is possible to suppress sudden fluctuations in the carrier frequency due to noise included in the effective value of the output power.

  In this way, the stabilization filter 46 may be provided both between the effective value calculation unit 41 and the frequency determination unit 42 and between the frequency determination unit 42 and the carrier generation unit 43. That is, the stabilization filter 46 may be provided at least one between the effective value calculation unit 41 and the frequency determination unit 42 and between the frequency determination unit 42 and the carrier generation unit 43.

(Third embodiment)
FIG. 6 is a block diagram schematically illustrating a power conversion device according to the third embodiment.
As illustrated in FIG. 6, in the main circuit unit 12 of the power conversion device 100, the first leg LG1 further includes a first voltage detection unit 51U and a second voltage detection unit 52U. The first voltage detector 51U detects the voltage Vcu1 of the first charge storage element CU1. The second voltage detector 52U detects the voltage Vcu2 of the second charge storage element CU2.

  Similarly, the second leg LG2 further includes a first voltage detection unit 51V and a second voltage detection unit 52V. The first voltage detector 51V detects the voltage Vcv1 of the first charge storage element CV1. The second voltage detector 52V detects the voltage Vcv2 of the second charge storage element CV2.

  The first voltage detection unit 51U is, for example, a resistance element connected in parallel to the first charge storage element CU1. The first voltage detector 51U is not limited to this, and may have any configuration that can detect the voltage of the first charge storage element CU1. Since each voltage detection part 51V, 52U, 52V is substantially the same as the 1st voltage detection part 51U, description is abbreviate | omitted.

  In the power conversion device 100, the control circuit 14 further includes a voltage control unit 54. The voltage control unit 54 is connected to each of the voltage detection units 51U, 51V, 52U, and 52V. The voltage control unit 54 acquires the voltages Vcu1, Vcu2, Vcv1, and Vcv2 of the charge storage elements CU1, CU2, CV1, and CV2 from the voltage detection units 51U, 51V, 52U, and 52V. The voltage control unit 54 is connected to the modulated wave generation unit 44. The voltage control unit 54 inputs the acquired voltages Vcu 1, Vcu 2, Vcv 1, Vcv 2 to the modulated wave generation unit 44.

  The modulation wave generation unit 44 generates the modulation wave MW of each leg LG1, LG2 based on the input output power detection value, power command value, and each voltage Vcu1, Vcu2, Vcv1, Vcv2. For example, the modulation wave generator 44 generates the modulation waves MW of the legs LG1 and LG2 so that the voltages Vcu1, Vcu2, Vcv1, and Vcv2 of the charge storage elements CU1, CU2, CV1, and CV2 are substantially constant. Generate.

  The voltages Vcu1, Vcu2, Vcv1, and Vcv2 of the charge storage elements CU1, CU2, CV1, and CV2 vary depending on the conditions of the load 4 and the states of the switching elements U1 to U3, X1 to X3, V1 to V3, and Y1 to Y3. There is a case.

  In this example, the control circuit 14 controls the voltages Vcu1, Vcu2, Vcv1, and Vcv2 based on the detection results of the voltage detectors 51U, 51V, 52U, and 52V. For example, the control circuit 14 controls on / off of the switching elements U1 to U3, X1 to X3, V1 to V3, and Y1 to Y3 so that the voltages Vcu1, Vcu2, Vcv1, and Vcv2 are substantially constant. To do.

  Thereby, for example, fluctuations in the voltages Vcu1, Vcu2, Vcv1, and Vcv2 can be suppressed. For example, the operation of the power conversion device 100 can be further stabilized. For example, “IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL.59, NO.2, FEBRUARY 2012” can be used to control the voltages Vcu1, Vcu2, Vcv1, and Vcv2 of the charge storage elements CU1, CU2, CV1, and CV2. It is described in detail in the paper “Active Capacitor Voltage Balancing in Single-Phase Flying-Capacitor Multilevel Power Converters”.

  In addition, without controlling each voltage Vcu1, Vcu2, Vcv1, Vcv2 of each charge storage element CU1, CU2, CV1, CV2, for example, each charge storage like each voltage detection unit 51U, 51V, 52U, 52V A resistive element may be connected in parallel to each of the elements CU1, CU2, CV1, and CV2. Thereby, for example, fluctuations in the voltages Vcu1, Vcu2, Vcv1, and Vcv2 of the charge storage elements CU1, CU2, CV1, and CV2 can be suppressed as compared with the case where no resistance element is provided. Each voltage Vcu1, Vcu2, Vcv1, and Vcv2 can be stabilized. The resistance element may be connected in series to each of the charge storage elements CU1, CU2, CV1, CV2, and the like, for example.

  According to the embodiment, a high-power density and high-efficiency power conversion device is provided.

The embodiments of the present invention have been described above with reference to specific examples. However, embodiments of the present invention are not limited to these specific examples. For example, the inverter, filter, main circuit unit, high potential input terminal, low potential input terminal, leg, first upper switching element, second upper switching element, first lower switching element, second, included in the power conversion device A person skilled in the art knows the specific configuration of each element such as the lower switching element, the charge storage element, the power detection unit, the control circuit, the frequency determination unit, the effective value calculation unit, the stabilization filter, and the voltage detection unit. As long as the present invention can be carried out in the same manner and the same effect can be obtained by appropriately selecting from the above, it is included in the scope of the present invention.
Moreover, what combined any two or more elements of each specific example in the technically possible range is also included in the scope of the present invention as long as the gist of the present invention is included.

  In addition, all power converters that can be implemented by those skilled in the art based on the power converters described above as embodiments of the present invention are also included in the scope of the present invention as long as they include the gist of the present invention. Belonging to.

  In addition, in the category of the idea of the present invention, those skilled in the art can conceive of various changes and modifications, and it is understood that these changes and modifications also belong to the scope of the present invention. .

  Although several embodiments of the present invention have been described, these embodiments are presented by way of example and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, replacements, and changes can be made without departing from the scope of the invention. These embodiments and modifications thereof are included in the scope and gist of the invention, and are included in the invention described in the claims and the equivalents thereof.

  DESCRIPTION OF SYMBOLS 2 ... DC power supply, 4 ... Load, 10, 100 ... Power converter, 12 ... Main circuit part, 14 ... Control circuit, 20 ... Inverter, 22 ... Filter, 24 ... Power detection part, 25 ... Voltage detection part, 26 ... Current detection unit 40 ... AC value detection unit 41 ... RMS calculation unit 42 ... Frequency determination unit 43 ... Carrier generation unit 44 ... Modulated wave generation unit 45 ... Comparison unit 46 ... Stabilization filter 51U 51V, 52U, 52V ... Voltage detection unit (resistive element), 54 ... Voltage control unit, CS1 to CS3 ... Carrier signal, CU1, CU2, CV1, CV2 ... Charge storage element, LG1, LG2 ... Leg, LA1, LA2, UA1 , UA2 ... arm, MW ... modulated wave, U1 to U3, V1 to V3, X1 to X3, Y1 to Y3 ... switching element

Claims (6)

A main circuit unit comprising: an inverter that converts DC power supplied from a DC power source into AC power; and a filter that suppresses harmonic components of the AC power output from the inverter,
The inverter is
A high potential input terminal connected to the anode of the DC power supply;
A low potential input terminal connected to the cathode of the DC power supply;
A plurality of legs connected between the high potential input terminal and the low potential input terminal;
Including
Each of the plurality of legs is
A first upper switching element connected between the high potential input terminal and the low potential input terminal;
A second upper switching element connected between the first upper switching element and the high potential input terminal;
A first lower switching element connected between the first upper switching element and the low potential input terminal;
A second lower switching element connected between the first lower switching element and the low potential input terminal;
One end connected between the first upper switching element and the second upper switching element and the other end connected between the first lower switching element and the second lower switching element. A charge storage device having
A main circuit section including
A power detection unit for detecting output power of the main circuit unit;
Based on a plurality of modulated waves set for each of the plurality of legs and a plurality of carrier signals set for each of the first upper switching element and the second upper switching element of the plurality of legs, A control circuit for controlling on / off of the first upper switching element, the second upper switching element, the first lower switching element, and the second lower switching element;
With
The control circuit is a frequency determination unit that determines frequencies of the plurality of carrier signals based on the output power of the main circuit unit detected by the power detection unit, and when the output power is a maximum value A frequency determining unit that determines a frequency of the plurality of carrier signals as a maximum frequency, and determines a frequency of the plurality of carrier signals as a frequency lower than the maximum frequency when the output power is lower than a maximum value. Including power conversion device. The control circuit further includes an effective value calculation unit for calculating an effective value of the output power,
The power conversion device according to claim 1, wherein the frequency determination unit determines frequencies of the plurality of carrier signals based on an effective value of the output power calculated by the effective value calculation unit.   The frequency determining unit determines the frequency of the plurality of carrier signals as the maximum frequency when the effective value of the output power is greater than or equal to a first determination value, and the effective value of the output power is the first determination value. When the frequency is equal to or lower than a second determination value lower than the value, the frequency of the plurality of carrier signals is determined to be a minimum frequency, and an effective value of the output power is between the first determination value and the second determination value. The power conversion device according to claim 2, wherein the frequency of the plurality of carrier signals is determined to be a frequency between the maximum frequency and the minimum frequency.   The power conversion device according to claim 2, wherein the control circuit further includes a stabilization filter that suppresses noise included in the effective value of the output power calculated by the effective value calculation unit. Each of the plurality of legs further includes a voltage detection unit that detects a voltage of the charge storage element,
5. The control circuit according to claim 1, wherein the control circuit controls a voltage of the charge storage element of each of the plurality of legs based on a detection result of the voltage detection unit of each of the plurality of legs. The power converter described.   5. The power conversion device according to claim 1, wherein each of the plurality of legs further includes a resistance element connected to the charge storage element.

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