JP6119776B2 - Game machine - Google Patents

Description

  The present invention relates to a gaming machine.

  As a kind of gaming machine, a pachinko gaming machine, a slot machine, and the like are known. These gaming machines are equipped with general-purpose control elements such as a CPU and read-only storage elements such as a ROM, and a series of processes are executed by the general-purpose control elements according to a program read from the read-only storage elements. The game is controlled. It is also known that a general-purpose control element, a read-only memory element, etc. are integrated into one chip.

  In the above gaming machine, in order to reduce the processing load on one general-purpose control element, there is a configuration with a separate general-purpose control element or a configuration with a dedicated control element provided as a dedicated circuit for executing a predetermined process. It is known (see, for example, Patent Document 1).

JP 2005-58366 A

  Here, in a gaming machine such as the above-described example, it is necessary to optimize the configuration for storing information in advance, and there is still room for improvement in this respect.

  The present invention has been made in view of the circumstances exemplified above, and an object thereof is to provide a gaming machine capable of optimizing a configuration for storing information in advance.

In order to solve the above-mentioned problem, the invention according to claim 1 is characterized in that the first control means for executing the first control using the information for the first control which is at least one of the program and the data;
Second control means for executing second control using information for second control which is at least one of a program and data;
A specific route used when communication is performed between the first control unit and the second control unit;
Information storage means for storing in advance at least part of the information for the first control;
Transfer execution means for transmitting the first control information stored in the information storage means to the first control means through the specific path;
With
The information storage means is electrically connected to the second control means;
The second control means includes
The transfer execution means;
Read storage means for storing information read from the information storage means;
Means for controlling the operation of a predetermined device based on operation instruction information transmitted from the first control means through the specific route as the second control;
With
The transfer execution means transmits the information read from the information storage means and stored in the read storage means to the first control means through the specific path, whereby the transfer storage means stores the information stored in the information storage means. 1 control information is transmitted to the first control means ,
The first control unit stores the information for the first control information when the information for the first control stored in the information storage unit is transmitted to the first control unit by the transfer execution unit. The operation necessary for controlling the operation of the predetermined device in the second control means until the completion of transmission of the information for the first control to the first control means before the reading from the means is started. A means for transmitting the instruction information to the second control means is provided .

  According to the present invention, it is possible to optimize the configuration for storing information in advance.

It is a front view which shows the pachinko machine in 1st Embodiment. It is a block diagram which shows the electric constitution of a pachinko machine. It is explanatory drawing for demonstrating the content of the various counters used for a success or failure lottery. It is a flowchart which shows the main process performed in main MPU. It is a flowchart which shows the timer interruption process performed in main MPU. It is a block diagram which shows the electrical structure which concerns on execution control of production. (A) is explanatory drawing for demonstrating the data structure of direct ROM, (b) is explanatory drawing for demonstrating the data structure of common ROM. (A) is a figure which shows an example of the waveform of a sound with an analog signal, (b) is a figure which shows the waveform with a digital signal. It is a conceptual diagram for demonstrating the structure of the register | resistor provided in sound output LSI. It is a flowchart which shows the presentation control process performed in sub MPU. It is a flowchart which shows the process for the transmission of the light emission data performed in subMPU. It is a flowchart which shows operation | movement in the sound data processing part provided in sound output LSI. It is a flowchart which shows the operation | movement in the data transfer part provided in sound output LSI. It is a timing chart for demonstrating a mode that the light emission data memorize | stored in common ROM are transferred to sub-MPU. (A) is a timing chart for explaining the relationship between the transfer timing of sound data and the transfer timing of light emission data in the first embodiment, and (B) is the transfer timing of sound data in the second embodiment. It is a timing chart for demonstrating the relationship with the transfer timing of light emission data.

<First Embodiment>
Hereinafter, a first embodiment of a pachinko gaming machine (hereinafter referred to as a “pachinko machine”), which is a type of gaming machine, will be described with reference to the drawings. FIG. 1 is a front view of the pachinko machine 10.

  As shown in FIG. 1, the pachinko machine 10 includes an outer frame 11 that forms an outer shell of the pachinko machine 10, and a gaming machine body 12 that is rotatably attached to the outer frame 11. . The gaming machine main body 12 includes an inner frame (not shown), a front door frame 14 arranged in front of the inner frame, and a back pack unit (not shown) arranged behind the inner frame.

  The inner frame of the gaming machine main body 12 is rotatably supported by the outer frame 11 with one of the left and right side portions serving as a support side. Further, the front door frame 14 is rotatably supported by the inner frame, and can be rotated forward by using one of the left and right side portions as a support side. Further, the back pack unit is rotatably supported by the inner frame, and can be rotated rearward with one of the left and right side portions as a support side.

  Note that the gaming machine body 12 is provided with a locking device (not shown) at its rotating tip, and has a function of locking the gaming machine body 12 to the outer frame 11 so that it cannot be opened. In addition, the front door frame 14 has a function of locking the front door frame 14 to the inner frame so as not to be opened. Each of these locked states is released by performing an unlocking operation using the unlocking key on the cylinder lock 17 that is exposed on the front surface of the pachinko machine 10.

  A game board 20 is mounted on the inner frame. The game board 20 has a plurality of large and small openings penetrating in the front-rear direction. Each opening is provided with a general winning port 21, a variable winning device 22, an upper operating port 23, a lower operating port 24, a through gate 25, a variable display unit 26, a main display unit 33, an accessory display unit 34, and the like. ing.

  When a ball enters the general winning port 21, the variable winning device 22, the upper operating port 23, and the lower operating port 24, it is detected by a detection sensor (not shown) disposed on the back side of the game board 20, Based on the detection result, a predetermined number of prize balls are paid out. In addition, an out port 27 is provided at the lowermost part of the game board 20, and game balls that have not entered various winning ports etc. are discharged from the game area through the out port 27. The game board 20 is provided with a large number of nails 28 and various members such as a windmill in order to disperse and adjust the falling direction of the game balls as appropriate.

  Here, the entry ball means that the game ball passes through a predetermined opening, and is not only a mode of being discharged from the game area after passing through the opening, but is discharged from the game area after passing through the opening. Embodiments that are not included are also included. However, in the following description, in order to clearly distinguish the game ball from entering the out port 27, the game ball enters the variable winning device 22, the upper operating port 23, the lower operating port 24 or the through gate 25. Is also expressed as a prize.

  The upper operating port 23 and the lower operating port 24 are unitized as operating port devices and are installed in the game board 20. Both the upper working port 23 and the lower working port 24 are opened upward. Further, both the operation ports 23 and 24 are arranged in the vertical direction so that the upper operation port 23 is on the upper side. The lower working port 24 is provided with an electric accessory 24a as a guide piece (support piece) composed of a pair of left and right movable pieces. In the closed state (non-supported state or non-guided state) of the electric accessory 24a, the game ball cannot win the lower operating port 24, and the electric operating member 24a is in the open state (supported state or guide state). It is possible to win 24.

  The variable winning device 22 includes a large winning opening 22a that leads to the back side of the game board 20, and an open / close door 22b that opens and closes the large winning opening 22a. The open / close door 22b is normally in a closed state where a game ball cannot be won or difficult to win, and a predetermined game ball is likely to win when winning the opening / closing execution mode (open / close execution state) in the internal lottery. It can be switched to the open state. Here, the opening / closing execution mode is a mode to be shifted to when a big win is won. As a release mode of the variable winning device 22, the variable winning device 22 is repeatedly opened with a predetermined time (for example, 30 seconds) or a predetermined number (for example, 10) of winnings as one round and a plurality of rounds (for example, 15 rounds) as an upper limit. There is an embodiment.

  The main display section 33 and the accessory display section 34 are provided on the lower side of the game area. In the main display unit 33, the display of the variation of the picture is performed with the winning of the upper working port 23 or the lower working port 24 as a trigger, and as a result of stopping the variation display, the winning to the upper working port 23 or the lower working port 24 is achieved. The result of the internal lottery performed based on the display is clearly shown. That is, in the present pachinko machine 10, the winning to the upper working port 23 and the winning to the lower working port 24 are not distinguished in the internal lottery, and are performed based on the winning to the upper working port 23 or the lower working port 24. The result of the internal lottery is displayed on the main display section 33 which is a common display area. When the result of the internal lottery based on the winning to the upper working port 23 or the lower working port 24 is a winning result corresponding to the shift to the opening / closing execution mode, a predetermined stop result is displayed on the main display unit 33. After the display and the change display are stopped, the mode shifts to the opening / closing execution mode.

  The main display unit 33 is configured by a segment display in which a plurality of segment light emitting units are arranged in a predetermined manner. However, the main display unit 33 is not limited to this, and a liquid crystal display device, an organic EL display device, You may be comprised by other types of display apparatuses, such as CRT and a dot matrix. In addition, as a pattern that is variably displayed on the main display unit 33, a configuration in which a plurality of types of characters are variably displayed, a configuration in which a plurality of types of symbols are variably displayed, a configuration in which a plurality of types of characters are variably displayed, or a plurality A configuration in which the color of the seed is switched and displayed can be considered.

  The accessory display unit 34 displays a variation of the picture triggered by a winning to the through gate 25, and the result of the internal lottery performed based on the winning to the through gate 25 as a result of stopping the variation display. Explicit by display. When the result of the internal lottery based on the winning to the through gate 25 is a winning result corresponding to the transition to the electric role open state, a predetermined stop result is displayed on the accessory display unit 34 and displayed in a variable manner. After is stopped, it shifts to the electric utility open state. In the electric combination open state, the electric combination 24a provided in the lower working port 24 is opened in a predetermined manner.

  The variable display unit 26 is provided with a symbol display device 31 that performs variable display (or variable display or switching display) of a symbol that is a kind of symbol. The variable display unit 26 is provided with a center frame 32 so as to surround the symbol display device 31. The center frame 32 has an upper portion extending forward of the pachinko machine 10. As a result, the game ball is prevented from falling in front of the display screen G of the symbol display device 31, and the inconvenience that the visibility of the display screen G is reduced due to the fall of the game ball does not occur. ing.

  The symbol display device 31 is configured as a liquid crystal display device including a liquid crystal display, and display contents are controlled by a display control device described later. The symbol display device 31 is not limited to a liquid crystal display device, and may be another display device such as a plasma display device, an organic EL display device, or a CRT.

  In the symbol display device 31, the variation display of the symbol is started based on the winning in the upper working port 23 or the lower working port 24. That is, when variable display is performed on the main display unit 33, variable display is performed on the symbol display device 31 accordingly. For example, in the game times in which the game result is a jackpot result, the symbol display device 31 stops and displays a predetermined combination of symbols on a preset active line.

  In addition, the mode of the variable display of the symbol in the symbol display device 31 is not limited to the above, and is arbitrary. The number of symbol columns, the direction of the symbol variable display in the symbol column, the number of symbols in each symbol column, etc. Can be appropriately changed. Also, the pattern that is variably displayed on the symbol display device 31 is not limited to the above-described pattern. For example, only a numeral may be variably displayed as the pattern.

  In addition, based on the winning of any one of the operating ports 23 and 24, the main display unit 33 and the symbol display device 31 start the variable display, display a predetermined stop result, and stop the variable display. It corresponds to one game time.

  In the upper left portion on the front side of the center frame 32, a first holding light emitting portion (first holding lamp portion) 35 corresponding to the main display portion 33 and the symbol display device 31 is provided. The maximum number of game balls won in the upper operating port 23 or the lower operating port 24 is reserved up to four, and the reserved number is displayed when the first holding light emitting unit 35 is turned on.

  In the upper right portion of the center frame 32, a second reserved light emitting unit (second reserved lamp unit) 36 corresponding to the accessory display unit 34 is provided. The number of times that the game ball has passed through the through gate 25 is held up to a maximum of 4 times, and the number of held balls is displayed by turning on the second holding light emitting unit 36. In addition, it is good also as a structure by which the function of each holding | maintenance light emission parts 35 and 36 is fulfill | performed by the display in the one part area | region of the symbol display apparatus 31. FIG.

  A rail portion 37 is attached to the game board 20, and a guide rail is constituted by the rail portion 37, and the game board 20 is fired from a game ball launching mechanism (not shown) mounted below the game board 20 in the inner frame. A game ball is guided to the upper part of the game area. In the game ball launching mechanism, a launching operation of a game ball is performed by operating a launching handle 41 provided as a launching operation means on the front door frame 14.

  A front door frame 14 is provided so as to cover the entire front side of the inner frame. The front door frame 14 is formed with a window portion 42 so that almost the entire game area can be viewed from the front. The window part 42 has a substantially elliptical shape, and a window panel (not shown) is fitted therein. The window panel is made colorless and transparent with glass, but is not limited thereto, and may be made colorless and transparent with synthetic resin.

  A plurality of light emitting means are provided around the window portion 42. Specifically, the light emitting portions 44a to 44c are provided above the window portion 42 at the lateral center portion, the left and right sides thereof, and the left and right corner portions, respectively. A plurality of light emitting portions 44d to 44k are also provided from the left and right sides of the window portion 42 downward. Each of the light emitting portions 44a to 44k constitutes a light emitting substrate on which a light emitting body such as an LED is mounted, and a light emitting cover provided on the front side of the light emitting direction of the corresponding light emitting body while constituting the surface of the front door frame 14. The light emitting cover is formed so as to be able to transmit light, so that the light emitted from the light emitter can be visually recognized from the front of the pachinko machine 10. Moreover, although what can irradiate the light of a several kind of color is used as each light-emitting body, what irradiates the light of a single color may be used.

  Further, in addition to the light emitting units 44a to 44k, a speaker unit 45 for outputting sound (including sound) such as a melody according to the production and a sound effect according to the gaming state, around the window unit 42. Is provided. One speaker unit 45 is provided at each corner portion on the upper side of the front door frame 14, but is not limited to this, and is provided on the lower side of the front door frame 14 and the outer frame 11 side. It may be. Each speaker unit 45 includes a speaker device as sound output means (or audible sound output means), a speaker cover that constitutes the surface of the front door frame 14 and is provided on the sound output destination side of the corresponding speaker device, The speaker cover is formed so that sound can be propagated forward of the pachinko machine 10.

  Below the window portion 42 in the front door frame 14, an upper bulging portion 46 and a lower bulging portion 47 that bulge to the near side are provided in parallel. An upper pan 46 a that opens upward is provided inside the upper bulging portion 46, and a lower pan 47 a that also opens upward is provided inside the lower bulging portion 47. The upper plate 46a has a function for temporarily storing the game balls paid out from the pay-out device provided in the back pack unit and guiding them to the game ball launching mechanism side while aligning them in a row. In addition, the lower tray 47a has a function of storing game balls that become surplus in the upper tray 46a. The game balls paid out from the payout device mounted on the back pack unit are discharged to the upper plate 46a and the lower plate 47a.

  On the back side of the inner frame, a main control device, a sound light control device, and a display control device are mounted. Further, as described above, a back pack unit is provided on the back surface of the inner frame, and the back pack unit includes a payout mechanism including a payout device, a payout control device, a power source and a firing control device. It is installed. Hereinafter, the electrical configuration of the pachinko machine 10 will be described.

<Electrical configuration>
Next, the electrical configuration of the pachinko machine 10 will be described based on the block diagram of FIG.

  The main control device 50 includes a main control board 51 that controls the main control of the game, and a power failure monitoring board (power interruption monitoring board) 55 that monitors the power supply. A main MPU 52 is mounted on the main control board 51. The main MPU 52 includes a ROM 53 and an RWM 54 in addition to a CPU that is a central processing unit including a control unit and a calculation unit.

  The ROM 53 is configured to use, as a read-only memory, a memory that does not require external power supply for storing and holding, such as a NOR flash memory or a NAND flash memory. The ROM 53 stores various control programs executed by the main MPU 52 and fixed value data.

  The RWM 54 is configured to use a memory (that is, a volatile storage unit) that requires external power supply for storage and retention, such as SRAM and DRAM, for both reading and writing. The time required for reading is faster than that of the ROM 53 when compared with the data capacity. The RWM 54 temporarily stores various data and the like when executing the control program stored in the ROM 53.

  In addition to the above elements, the main MPU 52 or the main control board 51 is provided with an interrupt circuit, a timer circuit, a data input / output circuit, and the like. Note that it is not essential that the ROM 53 and the RWM 54 are made into one chip with respect to the main MPU 52, and each may be made into a chip individually.

  The main MPU 52 is provided with an input port and an output port. On the input side of the main MPU 52, a power failure monitoring board 55, a payout control device 61, various winning detection sensors 56a to 56h, and the like are connected. A power source and launch control device 63 is connected to the power failure monitoring board 55, and power is supplied to the main MPU 52 via the power failure monitoring board 55. Further, based on the detection results of the various winning detection sensors 56a to 56h, the main MPU 52 performs a winning determination (a winning determination) for each winning portion. In addition, the main MPU 52 executes a lottery lottery based on a winning at the upper operating port 23 or the lower operating port 24 and a support lottery based on a winning at the through gate 25.

  On the output side of the main MPU 52, a power failure monitoring board 55, a payout control device 61, and a sound and light control device 71 are connected. For example, a prize ball command is output to the payout control device 61 based on the winning determination result for the above-mentioned winning part. Various commands such as a change command, a type command, a final stop command, an opening command, and an ending command are output to the sound control device 71.

  Further, on the output side of the main MPU 52, a variable winning drive unit 57 that opens and closes the opening / closing door 22b of the variable winning device 22, a combination driving unit 58 that opens and closes the electric combination 24a of the lower working port 24, and a main display unit. 33 and the accessory display unit 34 are connected. The main control board 51 is provided with various driver circuits, and the main MPU 52 executes drive control of various drive units through the driver circuits. Although illustration explanation is omitted, the main MPU 52 also performs light emission control of the first reserved light emitting unit 35 and the second reserved light emitting unit 36.

  The power failure monitoring board 55 relays between the main control board 51 and the power supply and launch control device 63, and monitors a DC stable voltage of 24 volts, which is the maximum voltage output from the power supply and launch control device 63. The payout control device 61 performs payout control of prize balls and rental balls by the payout device 62 based on the prize ball command input from the main control device 50.

  The power source and launch control device 63 is connected to, for example, a commercial power source (external power source) in a game hall or the like. Then, based on the external power supplied from the commercial power supply, necessary operating power is generated for each of the main control board 51, the payout control device 61 and the like, and the generated operating power is supplied through a predetermined power path. To do. The power supply and launch control device 63 is responsible for launch control of the game ball launch mechanism 64, and drives the game ball launch mechanism 64 based on specifying a predetermined launch operation on the launch handle 41.

  The sound light control device 71 controls the display control device 72 as well as driving and controlling the light emitting units 44 a to 44 k and the speaker unit 45 provided on the front door frame 14 based on various commands input from the main control device 50. Is. The display control device 72 executes display control of the symbol display device 31 based on the command input from the sound light control device 71.

<Electrical configuration for performing various lotteries in the main MPU 52>
Next, an electrical configuration for performing various lotteries in the main MPU 52 will be described with reference to FIG.

  In the game, the main MPU 52 uses lots of counter information to perform jackpot occurrence lottery, setting display on the main display unit 33, setting symbol display on the symbol display device 31, setting display on the accessory display unit 34, etc. Specifically, as shown in FIG. 3, the jackpot random number counter C1 used for the lottery in which the jackpot is generated, the jackpot type counter C2 used for determining the jackpot type, and the symbol display device 31 fluctuate. Reach random number counter C3 used for reach generation lottery, random number initial value counter CINI used for initial value setting of jackpot random number counter C1, and variation type for determining display duration in the main display unit 33 and the symbol display device 31 The counter CS is used. Furthermore, the electric accessory release counter C4 used for the lottery to determine whether or not the electric accessory 24a of the lower working port 24 is in the electric utility open state is used. The counters C1 to C3, CINI, CS, and C4 are provided in the lottery counter area 54a of the RWM 54.

  Each of the counters C1 to C3, CINI, CS, and C4 is a loop counter that adds 1 to the previous value every time it is updated and returns to 0 after reaching the maximum value. Each counter is updated at short intervals. Information corresponding to the jackpot random number counter C1, the jackpot type counter C2 and the reach random number counter C3 is stored in a holding storage area 54b as an acquisition information storage means when a winning to the upper working port 23 or the lower working port 24 occurs. Is done.

  The holding storage area 54b includes a holding area RE and an execution area AE. The holding area RE includes a first holding area RE1, a second holding area RE2, a third holding area RE3, and a fourth holding area RE4, and matches the winning history to the upper operating port 23 or the lower operating port 24. The numerical information of the jackpot random number counter C1, the jackpot type counter C2 and the reach random number counter C3 is stored in one of the holding areas RE1 to RE4 as holding information.

  In this case, in the first reservation area RE1 to the fourth reservation area RE4, when the winning to the upper operation port 23 or the lower operation port 24 is continuously generated a plurality of times, the first reservation area RE1 → the second reservation area. Each numerical information is stored in time series in the order of RE2 → third reserved area RE3 → fourth reserved area RE4. By providing the four holding areas RE1 to RE4 as described above, up to four game balls winning histories to the upper operating port 23 or the lower operating port 24 are stored on hold.

  Note that the number that can be reserved and stored is not limited to four, but may be any other number such as two, three, or five or more.

  The execution area AE is an area for moving each value stored in the first holding area RE1 of the holding area RE when starting the variable display on the main display unit 33, and at the start of one game round. Based on various numerical information stored in the execution area AE, determination of whether or not is made is performed.

  Each of the counters will be described in detail.

  The jackpot random number counter C1 is configured such that one by one is added in order within a range of 0 to 599, for example, and after reaching the maximum value, returns to 0. In particular, when the jackpot random number counter C1 makes one round, the value of the random number initial value counter CINI at that time is read as the initial value of the jackpot random number counter C1. The random number initial value counter CINI is a loop counter similar to the jackpot random number counter C1 (value = 0 to 599). The big hit random number counter C <b> 1 is periodically updated and stored in the holding storage area 54 b at the timing when the game ball wins the upper working port 23 or the lower working port 24.

  The value of the random number for winning the jackpot is stored as a success / failure table (a success / failure information group) in a success / failure table storage area as a success / failure information group storage means in the ROM 53. As the success / failure table, a success / failure table for the low probability mode (low probability success / failure information group) and a high probability mode's success / failure table (high probability success / failure information group) are set. That is, in the present pachinko machine 10, a low probability mode (low probability state) and a high probability mode (high probability state) are set as the lottery mode in the winning lottery means.

  In the gaming state in which the winning / failing table for the low probability mode is referred to at the time of the lottery, the number of random numbers that win the jackpot is two. On the other hand, in the gaming state in which the winning / failing table for the high probability mode is referred to at the time of the lottery, the number of random numbers that will win the jackpot is 20. If the winning probability in the high probability mode is higher than that in the low probability mode, the number of random numbers to be won is arbitrary.

  The jackpot type counter C2 is configured so that 1 is added in order within a range of 0 to 29, and after reaching the maximum value, it returns to 0. The big hit type counter C <b> 2 is periodically updated and stored in the holding storage area 54 b at the timing when the game ball wins the upper operation port 23 or the lower operation port 24.

  In the pachinko machine 10, a plurality of jackpot results are set. These multiple jackpot results are: (1) the mode of opening / closing control of the variable winning device 22 in the opening / closing execution mode, (2) the lottery mode in the winning lottery means after the opening / closing execution mode ends, and (3) the bottom after the opening / closing execution mode ends. A plurality of jackpot results are set by providing a difference in the three conditions of the support mode in the electric accessory 24a of the operating port 24.

  As an aspect of the opening / closing control of the variable winning device 22 in the opening / closing execution mode, the variable winning device 22 can be controlled so that the frequency of occurrence of winnings in the variable winning device 22 is relatively high from the start to the end of the opening / closing execution mode. A frequency winning mode and a low frequency winning mode are set. Specifically, in any of the high-frequency winning mode and the low-frequency winning mode, the game is executed with a predetermined number of round games as an upper limit.

  Here, the round game is one of the conditions that a predetermined upper limit duration (upper limit duration) elapses and that a predetermined upper limit number of game balls win a prize winning opening 22a. A game that continues until is satisfied. In addition, the number of round games in the opening / closing execution mode triggered by the jackpot result is the same for a fixed number of rounds regardless of the type of jackpot result triggered by the transition. Specifically, the upper limit number of round games is set to 15 rounds (15R) regardless of which jackpot result is obtained.

  Moreover, in this pachinko machine 10, a single opening mode of the variable winning device 22 is set in a plurality of types with different opening continuation times (opening continuation periods) from when the big winning opening 22a is opened until it is closed. Has been. Specifically, a long-time mode (long-term mode) set to 29 seconds, which is a long open duration, and a short time set to 0.06 sec, which is a short time shorter than the above-mentioned long time, A mode (short-term mode) is set.

  In the pachinko machine 10, in a situation where the launch handle 41 is operated by the player, the game ball launching mechanism 64 is driven and controlled so that one game ball is launched toward the game area in 0.6 seconds. . In the round game, the upper limit number of end conditions is set to nine. Then, in the long time mode among the above open modes, the open duration time is set longer than the product of the game ball firing period and one round game. On the other hand, in the short-time mode, an opening continuation time is set that is shorter than the product of the game ball launch cycle and one round game, more specifically, shorter than the game ball launch cycle. Therefore, when the variable winning device 22 is opened once in a long-time manner, it is expected that the maximum number of winnings in one round game will be generated at the large winning opening 22a. When the variable winning device 22 is opened once in a short-time manner, it is expected that no winning will be made to the big winning opening 22a or even if a winning is generated.

  In the high-frequency winning mode, the large winning opening 22a is opened once in each round game in a long-time manner. On the other hand, in the low-frequency winning mode, the large winning opening 22a is opened once in each round game in a short time mode.

  In addition, the number of times of opening / closing the large winning opening 22a in the high frequency winning mode and the low frequency winning mode, the number of round games, the opening duration for one opening, and the upper limit number in one round game are those in the high frequency winning mode. However, the value is not limited to the above value as long as the frequency of occurrence of winning in the variable winning device 22 is higher than the low-frequency winning mode until the opening / closing execution mode starts and ends. It is.

  As a support mode for the electric combination 24a of the lower working port 24, the electric combination 24a of the lower working port 24 is compared when the game ball is continuously being fired in the same manner with respect to the game area. High frequency support mode (high frequency support state or high frequency guide state) and low frequency support mode (low frequency support state or low frequency guide state) so that the frequency of the open state per unit time is relatively high or low. And are set.

  Specifically, in the low-frequency support mode and the high-frequency support mode, the probability of winning the power combination open state in the electric combination release lottery using the electric combination release counter C4 is the same (for example, both 4/5) However, in the high frequency support mode, the number of times that the electric utility item 24a is opened is set more frequently than in the low frequency support mode. The time is set longer. In this case, in the high-frequency support mode, when the electrified open state is selected and the open state of the electric accessory 24a occurs a plurality of times, the closed state from the end of one open state until the next open state is started The time is set shorter than one opening time. Furthermore, in the high frequency support mode, a shorter time is secured as a minimum secured time after the next electric character opening lottery is performed after the electric character object opening lottery is performed than in the low frequency support mode. Is set to be selected.

  As described above, in the high frequency support mode, there is a higher probability of winning a prize to the lower working port 24 than in the low frequency support mode. In other words, in the low frequency support mode, there is a higher probability that a prize will be generated in the upper operating port 23 than in the lower operating port 24, but in the high frequency support mode, the lower operating port 24 is connected to the lower operating port 24. The probability of winning a prize increases. When a prize is awarded to the lower operating port 24, a predetermined number of game balls are paid out. Therefore, in the high frequency support mode, the player plays a game while not reducing the number of possessed balls so much. be able to.

  The configuration for increasing the frequency at which the high frequency support mode is set to the power release state per unit time as compared with the low frequency support mode is not limited to the above-described configuration, for example, the electric component release lottery It is good also as a structure which makes high the probability that it will be elected in the electric character open state in. In addition, a secured time (for example, on the display part 34 based on a winning to the through gate 25) secured after the next electrification opening lottery is performed after the first electrification opening lottery is performed. In the configuration in which multiple types of variable display time) are prepared, the short support time is more easily selected in the high frequency support mode or the average secure time is shorter than in the low frequency support mode. May be. Further, the number of times of opening is increased, the opening time is lengthened, and the secured time that is secured when the next electric winning combination opening lottery is performed after the first electric winning combination releasing lottery is shortened (that is, In this case, one condition or any combination of conditions is applied among shortening the average time of the reserved time and increasing the winning probability. Thus, the advantage of the high frequency support mode over the low frequency support mode may be increased.

  The game result distribution destination for the big hit type counter C2 is stored as a distribution table (distribution information group) in a distribution table storage area as a distribution information group storage means in the ROM 53. Then, as such distribution destinations, a low-probability jackpot result (low-probability-specific special game result), a low-winning high-probability jackpot result (explicit high-probability-corresponding game result or a result that becomes suddenly prone to change), and the most advantageous jackpot result ( High-probability special game result) is set.

  The low probability big hit result is a big hit result in which the open / close execution mode becomes the high-frequency winning mode, and after the open / close execution mode ends, the win / fail lottery mode becomes the low probability mode and the support mode becomes the high frequency support mode. However, the high-frequency support mode shifts to the low-frequency support mode when the number of games reaches the end reference number (specifically, 100 times) after the shift.

  The low-winning high-probability jackpot result is a jackpot result in which the opening / closing execution mode becomes the low-frequency winning mode, and after the opening / closing execution mode ends, the success / failure lottery mode becomes the high probability mode and the support mode becomes the high-frequency support mode. is there. These high-probability mode and high-frequency support mode are continued until the lottery result in the success / failure lottery becomes a big hit state win and shifts to the big win state by that.

  The most advantageous jackpot result is a jackpot result in which the opening / closing execution mode becomes the high-frequency winning mode, and after the opening / closing execution mode ends, the winning / raising lottery mode becomes the high probability mode and the support mode becomes the high-frequency support mode. These high-probability mode and high-frequency support mode are continued until the lottery result in the success / failure lottery becomes a big hit state win and shifts to the big win state by that.

  Note that the normal game state in relation to each of the above-described game states refers to a state in which the success / failure lottery mode is the low probability mode and the support mode is the low frequency support mode, not the open / close execution mode. Moreover, it is good also as a structure in which the low prize-winning high probability hit result is not set as a game result.

  In the distribution table, among the values of the big hit type counter C2 of “0 to 29”, “0 to 9” corresponds to the low probability big hit result, and “10 to 14” corresponds to the low winning high probability big hit result. “15 to 29” corresponds to the most favorable jackpot result.

  As a kind of high-accuracy big hit result, the open / close execution mode becomes the low-frequency winning mode, and after the open / close execution mode ends, the winning lottery mode becomes the high probability mode, and the support mode is maintained in the previous mode. An implicit low winning high probability jackpot result (a game result corresponding to an implicit high probability or a result of a latent probability changing state) may be included. In this case, the jackpot result can be further diversified.

  Furthermore, as a kind of losing result in the winning / losing lottery, there may be included a special losing result that shifts to the opening / closing execution mode of the low-frequency winning mode and that does not shift to the winning / losing lottery mode and the support mode after the completion. . In the configuration in which both the above-mentioned non-explicit low winning high probability winning result and the special outlier result are set, the opening / closing execution mode shifts to the low frequency winning mode, and the support mode is changed to the previous mode. It is common to be maintained in the mode, but the transition mode of the winning / failing lottery mode is different. When it occurs, it is possible to make the player predict which result it actually corresponds to.

  For example, the reach random number counter C3 is incremented one by one within a range of 0 to 238, for example, and reaches a maximum value and then returns to 0. The reach random number counter C3 is periodically updated and stored in the holding storage area 54b at the timing when the game ball wins the upper operation port 23 or the lower operation port 24.

  Here, in the pachinko machine 10, reach display is set as a kind of display effect in the symbol display device 31. Reach display includes a symbol display device 31 capable of performing variable display (or variable display) of symbols (patterns), and variable display in game times in which the open / close execution mode of the variable winning device 22 is the high-frequency winning mode. In the gaming machine in which the subsequent stop display result is a special display result, the stage before the stop display result is derived and displayed after the variable display (or variable display) of the symbol (picture) on the symbol display device 31 is started, This means a display state for making the player think that a variable display state is likely to result in a special display result.

  In the reach display, a combination of jackpot symbols corresponding to the occurrence of the high-frequency winning mode is obtained by stopping and displaying symbols for some of the symbol sequences displayed on the display screen of the symbol display device 31. A display state is displayed in which combinations of reach symbols that may be established are displayed, and in that state, symbols in the remaining symbol rows are displayed in a variable manner. In addition, in the state where the combination of reach symbols is displayed as described above, the variation display of symbols is performed in the remaining symbol columns, and a reach effect is performed by displaying a predetermined character or the like as a moving image in the background image. In addition, there are those that perform a reach effect by displaying a predetermined character or the like as a moving image on substantially the entire display screen after reducing or not displaying a combination of reach symbols.

  The reach display is executed regardless of the value of the reach random number counter C3 in the game times that shift to the opening / closing execution mode that becomes the high-frequency winning mode. In the game times that do not shift to the opening / closing execution mode, the reach random number counter C3 obtained at a predetermined timing is referred to the reach table stored in the reach table storage area of the ROM 53 in response to the occurrence of the reach display. It is executed when

  The variation type counter CS is, for example, incremented by 1 within a range of 0 to 198, and returns to 0 after reaching the maximum value. The variation type counter CS is used when the main MPU 52 determines the variation display time (display duration) in the main display unit 33 and the symbol variation display time (display duration) in the symbol display device 31. The fluctuation type counter CS is updated in each of a main process and a timer interrupt process to be described later, and a fluctuation type counter is determined when a fluctuation pattern is determined at the start of fluctuation display on the main display unit 33 and at the time of start of fluctuation of the symbol by the symbol display device 31. The value of CS is acquired. In determining the variable display time, the variable display time table (variable display time information group) stored in advance in the variable display time table storage area (variable display time information storage means) of the ROM 53 is referred to.

  The electric accessory release counter C4 is, for example, configured to increment one by one within a range of 0 to 250 and return to 0 after reaching the maximum value. The electric combination release counter C4 is periodically updated and stored in the electric combination holding area 54c provided in the RWM 54 at the timing when a game ball wins the through gate 25. Then, at a predetermined timing, a lottery is performed as to whether or not to control the electric accessory 24a to the open state based on the stored value of the electric accessory release counter C4.

<Various processes executed by the main MPU 52>
Next, each process performed in order to advance a game in main MPU52 is demonstrated. The processing of the main MPU 52 is broadly classified into main processing that is started when the power is turned on and timer interrupt processing that is periodically started.

<Main processing>
First, the main process will be described with reference to the flowchart of FIG.

  First, in step S101, power-on wait processing is executed. In the power-on wait process, for example, the process waits without progressing to the next process until 1 sec elapses after the main process is activated. In the subsequent step S102, access to the RWM 54 is permitted, and the internal function register of the main MPU 52 is set in step S103.

  Thereafter, in step S104, it is determined whether or not the RWM erase switch provided in the power supply and launch control device 63 is manually operated. In subsequent step S105, whether or not the power failure flag of the RWM 54 is set to “1” is determined. Determine whether. In step S106, a checksum calculation process for calculating a checksum is executed. In subsequent step S107, whether or not the checksum matches the checksum stored when the power is turned off, that is, the validity of the stored data is checked. judge.

  In the pachinko machine 10, for example, when the RWM data is initialized when the power is turned on, such as when the game hall is started, the power is turned on while the RWM erase switch is pressed. Therefore, if the RWM erase switch is pressed, the process proceeds to step S108. Similarly, when the information on occurrence of power shutdown is not set, or when an abnormality of data stored and held is confirmed by the checksum, the process proceeds to step S108. In step S108, the RWM 54 is cleared as initialization of the RWM 54. Thereafter, the process proceeds to step S109.

  On the other hand, if the RWM erase switch has not been pressed, “1” is set in the power failure flag and the checksum is normal, and the process of step S109 is not executed without executing the process of step S108. Proceed to In step S109, a power-on setting process is executed. In the power-on setting process, a predetermined area of the RWM 54 such as initialization of a power failure flag is set to an initial value, and a command corresponding to the current gaming state is transmitted to the sound control device 71 in order to recognize the current gaming state. To do. Also, a payout initialization command indicating that the RWM initialization of the payout control device 61 should be executed is transmitted to the payout control device 61. Furthermore, an interrupt permission is set to permit the generation of timer interrupt processing.

  Then, it progresses to the residual process of step S110-step S113. That is, the main MPU 52 is configured to periodically execute the timer interrupt process, but a remaining time is generated between one timer interrupt process and the next timer interrupt process. The remaining time varies depending on the processing completion time of each timer interrupt process, but the remaining processes in steps S110 to S113 are repeatedly executed using such irregular time. In this regard, it can be said that the remaining processes in steps S110 to S113 are non-periodic processes that are performed irregularly.

  In the remaining process, first, in step S110, an interrupt prohibition setting is performed to prohibit the generation of the timer interrupt process. In the subsequent step S111, a random number initial value update process for updating the random number initial value counter CINI is executed, and a fluctuation counter update process for updating the fluctuation type counter is executed in step S112. In these update processes, the current numerical information is read from the corresponding counter of the RWM 54, the process of adding 1 to the read numerical information is executed, and then the process of overwriting the reading source counter is executed. In this case, each counter value is cleared to “0” when it reaches the maximum value. Thereafter, in step S113, an interrupt permission setting for switching from a state in which the generation of the timer interrupt process is prohibited to a state in which the timer interrupt process is permitted is performed. If the process of step S113 is performed, it will return to step S110 and will repeat the process of step S110-step S113.

<Timer interrupt processing>
Next, timer interrupt processing will be described with reference to the flowchart of FIG.

  Here, a hardware configuration for periodically executing timer interrupt processing in the main MPU 52 will be described. The main control board 51 is provided with a clock circuit as pulse signal output means for outputting a pulse signal at a predetermined cycle, and further divided so as to exist in the middle of the signal path between the clock circuit and the main MPU 52. A circuit is provided.

  The frequency dividing circuit functions as a frequency changing unit that changes the cycle of the pulse signal from the clock circuit, and is configured to output a pulse signal for specifying the start timing of the timer interrupt processing by the main MPU 52. That is, the pulse signal is supplied from the frequency dividing circuit to the main MPU 52 at intervals of a specific cycle of 4 msec. The main MPU 52 executes a process for confirming the occurrence of a specific signal form such as the rise or fall of the pulse signal, and activates the timer interrupt process with at least one condition confirming the occurrence of the specific signal form. Run.

  In this case, when the occurrence of the specific signal form is confirmed in the situation where the start of timer interrupt processing is prohibited, the timer is changed when the interrupt is permitted from the state where the interrupt is prohibited. Interrupt processing is started. That is, depending on the execution status of the process in the main MPU 52, the next timer interrupt process may be started after 4.1 msec from the start of the previous timer interrupt process. This timer interrupt process is started after 3.9 msec from the start of the immediately preceding timer interrupt process.

  However, since the output of the pulse signal from the frequency divider circuit is performed at a specific cycle of 4 msec regardless of the progress of processing in the main MPU 52, the timer interrupt processing is basically started at a specific cycle. Furthermore, the processing configuration of the main MPU 52 is such that even if the timer interrupt process at a predetermined timing is started after a period exceeding a specific period since the previous timer interrupt process was started, The timer interrupt process at the timing absorbs the part exceeding the specific period, and the timer interrupt process at the next timing is set to be started at the timing when the input of the pulse signal is confirmed.

  In the timer interrupt process, first, a power failure information storage process is executed in step S201. In the power outage information storage process, it is monitored whether or not a power outage signal corresponding to the occurrence of power interruption is received from the power outage monitoring board 55, and when the occurrence of a power outage is specified, the process during power outage is executed.

  In subsequent step S202, a lottery random number update process is executed. In the lottery random number update process, the big hit random number counter C1, the big hit type counter C2, the reach random number counter C3, and the electric accessory release counter C4 are updated. Specifically, after executing the process of sequentially reading the current numerical information from the jackpot random number counter C1, the jackpot type counter C2, the reach random number counter C3, and the electric accessory release counter C4, and adding 1 to each of the read numerical information Then, a process of overwriting the reading source counter is executed. In this case, each counter value is cleared to “0” when it reaches the maximum value.

  Thereafter, in step S203, the random number initial value update process is executed in the same manner as in step S111, and in step S204, the variation counter update process is executed in the same manner as in step S112. In a succeeding step S205, a game stop determination process is executed. In the game stop determination process, it is monitored whether or not the progress of the game is to be stopped. If the progress of the game is to be stopped, the execution of the process for progressing the game is stopped.

  Thereafter, in step S206, it is determined whether or not the progress of the game is stopped, and the processing after step S207 is executed on the condition that the progress of the game is not stopped.

  In step S207, port output processing is executed. In the port output process, when the output information is set in the previous timer interrupt process, a process for performing output corresponding to the output information to the various drive units 57 and 58 is executed. For example, when the information for switching the special winning opening 22a to the open state is set, the output of the drive signal to the variable winning drive unit 57 is started, and when the information for switching to the closed state is set. The output of the drive signal is stopped. When the information for switching the electric accessory 24a of the lower working port 24 to the open state is set, the output of the drive signal to the accessory driving unit 58 is started, and the information to be switched to the closed state is set. If so, output of the drive signal is stopped.

  In a succeeding step S208, a reading process is executed. In the reading process, signals other than the power failure signal and the winning signal are read, and the read information is stored for use in future processing.

  In subsequent step S209, a winning detection process is executed. In the winning detection process, signals received from the winning detection sensors 56a to 56h are read, and the general winning port 21, the large winning port 22a, the upper operating port 23, the lower operating port 24 and the through gate 25 are used for winning. A process for identifying the presence or absence is executed.

  In the subsequent step S210, timer update processing for updating the numerical information of a plurality of types of timer counters provided in the RWM 54 at once is executed. In this case, the timer counter that is updated by subtracting the stored numerical information is handled in an integrated manner. However, both the updating of the subtracting timer counter and the updating of the adding timer counter are performed collectively. It is good also as a structure.

  In subsequent step S211, a fraud detection process for monitoring whether or not a predetermined event set as a fraud monitoring target has occurred is executed. In the fraud detection process, by monitoring the occurrence of a plurality of types of events and confirming that a predetermined event has occurred, the game stop setting is made in step S205 in the next timer interrupt process, An affirmative determination is made in step S206.

  In the subsequent step S212, a launch control process for controlling the launch of the game ball is executed. In a situation where the launch operation is continued for the launch handle 41, as already described, one game ball is launched at 0.6 seconds which is a predetermined launch cycle.

  In the subsequent step S213, as the input state monitoring process, based on the information read in the reading process in step S208, the disconnection confirmation of the winning detection sensors 56a to 56h and the opening confirmation of the gaming machine main body 12 and the front door frame 14 are confirmed. Do.

  In the subsequent step S214, special figure special electric control processing for performing execution control of game times and execution control of the opening / closing execution mode is executed. In the special figure special electric control process, when a winning to the upper working port 23 or the lower working port 24 occurs in a situation where the number of pieces of holding information stored in the holding storage area 54b is less than the upper limit number, A process of storing the numerical information of the jackpot random number counter C1, the jackpot type counter C2 and the reach random number counter C3 as hold information in the hold storage area 54b in time series is executed. Also, in the special figure special electric control process, whether or not the hold information corresponds to the big win is determined on the condition that the hold information is not stored during the game rotation and the opening / closing execution mode and is stored. If it corresponds to the process and the jackpot winning, a distribution determination process for determining which jackpot result the hold information corresponds to is executed. In addition, in the special figure special power control process, not only the success / failure determination process and the distribution determination process, but if the hold information does not correspond to the big win, whether the hold information corresponds to the occurrence of reach. A reach determination process is performed, and a duration selection process for selecting the duration of the game times using the numerical information of the variation type counter CS at that time is executed. Then, the variation command including the duration information corresponding to the result of each processing and the type command including the game result information are transmitted to the sound control device 71, and the pattern variation in the main display unit 33 is performed. Start display. As a result, one game is started, and an effect for the game is started on the main display unit 33 and the symbol display device 31.

  Also, in the special figure special electric control process, during the execution of one game round, it is determined whether or not it is the end timing of the game round. If it is the end timing, the display corresponding to the game result is performed. Then, the process of ending the game round is executed. In this case, a final stop command (or a confirmation command) indicating that the game round should be ended is transmitted to the sound control device 71. Further, in the special figure special electric control process, when the result of the game times is a result corresponding to the transition to the opening / closing execution mode, a process for starting the opening / closing execution mode is executed. At the start, an opening command indicating that the opening / closing execution mode is started is transmitted to the sound control device 71. In the special figure special electric control process, a process for starting each round game and a process for ending each round game are executed. In each of these processes, an open command indicating that a round game is started (or that the variable winning device 22 is in an open state) is transmitted to the sound control device 71 and the round game is ended (or variable). A closing command indicating that the winning device 22 is in the closed state is transmitted to the sound and light control device 71. Further, in the special figure special electric control process, when the opening / closing execution mode is ended, an ending command indicating that is transmitted to the sound control device 71, and the success / failure lottery mode and the support mode after the opening / closing execution mode are set. Execute the process.

  After executing the special figure special power control process of step S214 in the timer interruption process, the normal figure normal power control process is executed in step S215. In the general-purpose power control process, when a winning to the through gate 25 is generated, a process for acquiring the general-information hold information is executed, and the general-purpose hold information is stored. In addition, a release determination is performed on the hold information, and a process for performing an effect for a normal diagram is executed using the release determination as a trigger. Moreover, the process which opens and closes the electrically-driven accessory 24a of the lower working port 24 is performed based on the result of open determination.

  In subsequent step S216, based on the processing results of immediately preceding step S214 and step S215, setting of output information for reflecting the increase / decrease number of the hold information related to the main display unit 33 in the first hold light emitting unit 35, and The output information for reflecting the increase / decrease number of the hold information related to the accessory display unit 34 to the second hold light emitting unit 36 is set. In step S216, the output information for updating the display content of the main display unit 33 is set based on the processing results of the immediately preceding steps S214 and S215, and the display content of the accessory display unit 34 is set. Set the output information to be updated.

  In the subsequent step S217, a demonstration display process is executed to make the display content of the symbol display device 31 for standby display in a situation where neither the game times nor the opening / closing execution mode is executed. In step S218, Then, the contents of the command and signal received from the payout control device 61 are confirmed, and a payout state receiving process for performing a process corresponding to the confirmation result is executed. In step S219, a payout output process for setting a prize ball command as an output target is executed.

  In subsequent step S220, an external information setting process for controlling the start and end of the output of the external signal in accordance with the processing results of the various processes executed in the current timer interrupt process is executed. In step S221, a process for editing the test fire test information is executed.

  When an affirmative determination is made in step S206, or after the processing of steps S207 to S221 is executed, the process proceeds to step S222. In step S222, an interrupt end declaration is set. In the main MPU 52, once timer interrupt processing is started, it is stipulated that an interrupt end declaration is set as one of the conditions for starting the next timer interrupt processing. Set the interrupt end declaration to enable execution of timer interrupt processing. In step S223, interrupt permission is set. In the main MPU 52, once the timer interrupt process is started, the interrupt is disabled. Therefore, in step S223, an interrupt permission is set to enable execution of the next timer interrupt process. Thereafter, the timer interrupt process is terminated.

<Electrical configuration related to production execution control>
Next, an electrical configuration relating to the execution control of the effect will be described with reference to the block diagram of FIG.

  As already described, the sound light control device 71 and the display control device 72 are provided as control devices for controlling the execution of effects based on instructions from the main control device 50. As shown in FIG. 6, the sound light control device 71 includes a sound light control board 81 on which a sub MPU 82 is mounted. The sub MPU 82 includes a direct ROM 84 and an RWM 85 in addition to the CPU 83 which is a central processing unit including a control unit and a calculation unit. The CPU 83, the direct ROM 84, and the RWM 85 are connected to each other via a bus.

  The direct ROM 84 is configured to use, as a read-only memory, a memory that does not require external power supply for storing and holding, such as a NOR flash memory or a NAND flash memory. The direct ROM 84 stores various control programs and fixed value data used when executing processes corresponding to the programs. The CPU 83 executes processes according to the control programs stored in the direct ROM 84. Thus, the execution of the effect based on the instruction from the main controller 50 is controlled. Since the direct ROM 84 is connected to the CPU 83 via the internal bus in the sub MPU 82, it is relatively difficult to increase the data capacity. Specifically, the data capacity is 2M. It is a byte.

  The RWM 85 is configured to use a memory (that is, a volatile storage unit) that requires external power supply for storage and holding, such as SRAM and DRAM, for both reading and writing. When the data capacity is compared, the time required for reading is faster than that of the direct ROM 84. The RWM 85 temporarily stores various data and the like when executing the control program stored in the direct ROM 84. Note that it is not essential that the direct ROM 84 and the RWM 85 are made into one chip for the sub MPU 82, but each may be made into a chip individually.

  The sub MPU 82 determines the content of the effect in a predetermined period based on the instruction from the main control device 50 and transmits a command corresponding to the determined content of the effect to the display control device 72. For such a command, a signal path provided to connect the sub MPU 82 and the display MPU 102 is used.

  The display control device 72 includes a display MPU 102, a display control board 101 on which a VDP 103 provided as a drawing LSI and an image ROM 104 are mounted. In the display MPU 102, a display effect in a predetermined period according to a command received from the sub MPU 82. The internal command corresponding to the content of the determined display effect is periodically transmitted to the VDP 103.

  In the VDP 103, image data is read from the image ROM 104 in accordance with an internal command received from the display MPU 102, and drawing data at the update timing of each image is created using the read image data. Then, by outputting a drawing signal corresponding to the created drawing data to the symbol display device 31, an image corresponding to each update timing is displayed on the display screen G of the symbol display device 31.

  Returning to the description of the sound light control device 71, the sub MPU 82 executes light emission control not only for the display control device 72 but also for the various light emitting units 44 a to 44 k when the content of the effect in the predetermined period is determined. In this case, in FIG. 6, the sub MPU 82 and the various light emitting units 44 a to 44 k are described as being directly connected, but the present invention is not limited to this, and the sub MPU 82 and the various light emitting units 44 a to 44 k are connected. A drive circuit may be interposed between them, and a relay board may be interposed.

  The sub MPU 82 executes drive control of the speaker unit 45 when the content of the effect in the predetermined period is determined. In controlling the driving of the speaker unit 45, the sound output LSI 86 and the common ROM 87 are used.

  The common ROM 87 is configured to use, as a read-only memory, a memory that does not require external power supply for storing and holding, such as a NOR flash memory or a NAND flash memory. Since the common ROM 87 is not directly connected to the CPU 83 but is externally attached to the sound output LSI 86, it is easier to increase the data capacity than the direct ROM 84. Specifically, the data capacity is 1 Gbit. However, this data capacity is arbitrary and may be 500 Mbits or 4 Gbits.

  The sound output LSI 86 includes an I / F 91, a register 92, a sound data processing unit 93, a DAC 94, and a data transfer unit 95, and outputs sound from the speaker unit 45 according to data transmitted from the sub MPU 82. Execute control to

  The I / F 91 is an interface for the sound output LSI 86 to communicate with the sub MPU 82 via the bus B1 provided as a signal path group for bidirectional communication. The bus B1 connected to the I / F 91 is composed of eight signal paths L1 to L8, and data is transmitted and received between the sub MPU 82 and the sound output LSI 86 via the signal paths L1 to L8. Is called.

  The register 92 has a function as a storage means for temporarily storing various data used in the sound output LSI 86, and uses a memory that requires an external power supply for storage and storage for both reading and writing. Is configured to do. In addition, random access is possible, and when compared with the same data capacity, the time required for reading is faster than that of the direct ROM 84 and the common ROM 87.

  The register 92 has a data capacity of many bytes so that a plurality of data can be stored and held simultaneously, and has a data capacity in units of kilobytes or megabytes. Specifically, it has a data capacity of about 10 kilobytes.

  The sound data processing unit 93 converts the sequence data and parameter data transmitted from the sub MPU 82 and stored in the register 92 so that they can be used for sound output, and the contents of the conversion result and the common ROM 87 The digital music sound data is created using the sound data read out from. By the way, the sequence data includes time data indicating the output start timing and output order of a series of sounds, and the parameter data includes data that defines the pitch, volume and tone color of the sound at a predetermined timing. It is.

  The sound data processing unit 93 has a function of a plurality of tone generation channels so that a plurality of different sounds can be output at the same time, and synthesizes digital tone data created for each tone generation channel to generate digital synthesized tone data. It has a function to create. In addition, although it has a function for 16 channels as a plurality of sound generation channels, the number of channels is arbitrary. Further, by using virtual tracks, a larger number of tracks (for example, 64 tracks) than the actual number of sounding channels can be used. However, a configuration in which such virtual tracks are not used may be used.

  The DAC 94 is a digital / analog converter. The DAC 94 has a function of outputting the digital tone data or digital synthesized tone data created by the sound data processing unit 93 to an analog signal and outputting it to the speaker unit 45 as an analog audio signal.

  The data transfer unit 95 is connected to the common ROM 87 via a bus B2 provided as a signal path group for bidirectional communication, and has a function of transferring data read from the common ROM 87 to the register 92. ing. The bus B2 provided between the data transfer unit 95 and the common ROM 87 is composed of 16 signal paths, and the number of signal paths is larger than that of the bus B1 between the sub MPU 82 and the I / F 91. It is a large number. The data communication speed between the data transfer unit 95 and the common ROM 87 is faster than the data communication speed between the sub MPU 82 and the I / F 91. In the data transfer unit 95, sound data necessary for sound output is read from the common ROM 87 based on the data converted from the sequence data and parameter data in the sound data processing unit 93 and stored in the register 92.

  Here, the data transfer unit 95 not only has a function of transferring necessary sound data to the register 92 in the sound data processing unit 93, but also reads out necessary data from the common ROM 87 in the sub MPU 82 and stores it in the register 92. It has a function of transferring data stored in the register 92 to the sub MPU 82. A configuration related to such data transfer will be described below.

<Data Structure of Direct ROM 84 and Common ROM 87>
First, the data structures of the direct ROM 84 and the common ROM 87 will be described with reference to FIG. FIG. 7A is an explanatory diagram for explaining the data configuration of the direct ROM 84, and FIG. 7B is an explanatory diagram for explaining the data configuration of the common ROM 87.

  As shown in FIG. 7A, in the direct ROM 84, a program and processing data (1), a program and processing data (2) for executing processing for effect control by the CPU 83 of the sub MPU 82, ..., A program and processing data (P) are stored in advance. These programs and processing data include a data table used for executing each effect, sequence data and parameter data for providing to the sound output LSI 86. All the programs and processing data necessary for executing the effect control processing by the CPU 83 are stored in the direct ROM 84.

  The direct ROM 84 controls not only the program and processing data (1), the program and processing data (2),..., The program and processing data (P), but also the light emission control of the various light emitting units 44a to 44k. The light emission data (1), the light emission data (2),..., The light emission data (Q) used for performing are stored in advance. In each light emission data, information on the type, lighting period, and lighting order of the light emitting units to be turned on among the various light emitting units 44a to 44k is set in a predetermined production period. The contents differ depending on the type of each light emission data. Each light emission data stored in the direct ROM 84 has different light emission control periods and different light emission pattern contents.

  On the other hand, as shown in FIG. 7B, the common ROM 87 has sound data (1), sound data (2),..., Sound used for outputting a predetermined sound from the speaker unit 45. Data (S) is stored in advance. Each of these sound data includes melody actually generated by an instrument corresponding to various timbres and waveform data obtained by sampling the sound, and melody with lyrics is pronounced by an instrument corresponding to various timbres. In addition to the generated melody, waveform data obtained by sampling the voice is included. All the sound data is stored in the common ROM 87.

  Here, details of the sound data will be described with reference to FIG. FIG. 8A is a diagram showing an example of a sound waveform as an analog signal, and FIG. 8B is a diagram showing the waveform as a digital signal.

  The sound data is converted from an analog signal as shown in FIG. 8A to a pulse train by pulse code modulation (PCM) at a predetermined sampling frequency and a predetermined number of quantized signals as shown in FIG. 8B. Digital signal data. Specifically, the sampling frequency is 44.1 kHz and the number of quantized signals is 16 bits. Therefore, sound waveform data composed of analog signals for 1 sec has a data amount of 1 × 44.1 k × 16 bits. Incidentally, the sampling period T1 in this case is 22.7 μsec.

  The sound data is set so as to be readable from the common ROM 87 for each pulse code-modulated data, that is, for each sample. That is, an address is set for each sample of data, and the data transfer unit 95 of the sound output LSI 86 can perform data transfer from the common ROM 87 in units of one sample of data.

  The sampling frequency is not limited to 44.1 kHz as long as satisfactory sampling can be realized, and may be, for example, 32 kHz, 48 kHz, or 96 kHz. Further, the number of quantized signals is not limited to 16 bits, and may be any number of bits other than 16 bits as long as satisfactory quantization can be realized.

  Returning to the description of FIG. 7B, the common ROM 87 stores not only sound data (1), sound data (2),..., Sound data (S), but also light emission data (Q + 1), light emission data (Q + 2). ),..., Emission data (R) are stored in advance. These light emission data have different light emission control periods and the contents of the light emission patterns.

  As described above, the light emission data used in the sub MPU 82 is not only in the direct ROM 84 directly connected to the CPU 83 of the sub MPU 82 via the bus but also in the common ROM 87 connected to the sound output LSI 86. It is remembered. In other words, the light emission data is distributed and stored in the direct ROM 84 and the common ROM 87.

  By storing the light emission data in the common ROM 87 in this way, it is possible to increase the data capacity of the light emission data without directly increasing the storage capacity of the ROM 84. In particular, since the direct ROM 84 is connected to the CPU 83 via the internal bus in the sub MPU 82 as described above, it is relatively difficult to increase the data capacity. In order to increase the number of buses, it is necessary to expand the internal bus width, and it is not easy to cope with it. On the other hand, the common ROM 87 is not directly connected to the CPU 83 as described above, but increases its data capacity because it is externally attached to the sound output LSI 86. It is relatively easy. By storing the light emission data in the common ROM 87, it is possible to cope with an increase in the data capacity of the light emission data.

  Basically, when data is set in the ROM, about several percent (for example, about 2%) of the total data capacity is blank (unused area). In this case, for example, assuming that the data capacity of the common ROM 87 is 1 Gbit, the blank is 20 Mbit. This data capacity is larger than the 2 Mbyte data capacity of the direct ROM 84. According to this configuration, it is possible to distribute and store the light emission data using such a blank.

  Furthermore, since the sound data corresponds to a melody or voice for a predetermined period, the data capacity for performing a series of outputs becomes relatively large. As a result, the sound data is difficult to be accommodated in data capacity, and a blank is easily generated in the common ROM 87 from this point. And according to this structure, it becomes possible to distribute and preserve | save light emission data using such a blank.

  The light emission data stored in the common ROM 87 is used by the sub MPU 82. When it becomes necessary to use the sub MPU 82, the light emission data is sent to the sound output LSI 86 in response to a transfer instruction from the sub MPU 82. The light emission data is read from the common ROM 87, and the read light emission data is transferred to the sub MPU 82. For this transfer, the bus B1 connecting the sub MPU 82 and the sound output LSI 86 is used. That is, the light emission data distributed and stored in the common ROM 87 is transferred to the sub MPU 82 using a signal path for data transfer from the sub MPU 82 to the sound output LSI 86 or from the sound output LSI 86 to the sub MPU 82. . As a result, for example, as compared with a configuration in which a ROM different from the direct ROM 84 is externally attached to the sub MPU 82 and the light emission data that is redundant is stored in the ROM, the surplus without increasing the number of signal paths. It becomes possible to store the light emission data.

  Of the program and processing data used in the sub MPU 82 and the light emission data, all of the program and processing data are directly stored in the ROM 84, and a part of the light emission data is stored in the common ROM 87. By adopting such a configuration, it is possible to distribute data satisfactorily. That is, if the program and the processing data are distributed to the common ROM 87, a program and processing data for transferring the program and the processing data to the RWM 85 of the sub MPU 82 are separately required, and the program is designed. It becomes complicated. On the other hand, the light emission data is originally a method in which the address where the light emission data is stored is grasped, the light emission data is read based on the address, transferred, and developed so that it can be used. Therefore, even if the light emission data is distributed, the program design is unlikely to be complicated.

  Further, when an effect-type command is transmitted from the main control device 50, the sub MPU 82 first executes a predetermined process corresponding to the command using a program, and emits light emission data in the course of executing the predetermined process. Various light-emitting parts 44a-44k are controlled using. That is, the program needs to be read out suddenly upon reception of a command from the main controller 50, and the read timing is highly arbitrary. On the other hand, the emission data is used during the execution of a predetermined process. Arbitrary timing of reading is low. Further, since the light emission data is used on the premise that the predetermined process using the program is executed, the priority of reading is higher in the program, and if the reading of the program is delayed, the process waits. Under such circumstances, the program is directly stored in the ROM 84, and at least a part of the light emission data is stored in the common ROM 87, so that the program is unique in the sub MPU 82 regardless of the state of the sound output LSI 86. Thus, it is possible to satisfactorily realize an increase in the data amount of the light emission data that tends to be larger than the program.

  Furthermore, since all of the light emission data is not stored in the common ROM 87, a part of the light emission data is directly stored in the ROM 84 and the rest is stored in the common ROM 87. While suppressing the capacity from being extremely increased, the excellent effects as described above can be obtained.

<Configuration of Register 92 of Sound Output LSI 86>
Next, the configuration of the register 92 used for instructing the sound output LSI 86 from the sub MPU 82 and transferring the sound data stored in the common ROM 87 from the sound output LSI 86 to the sub MPU 82 will be described with reference to FIG. Will be described with reference to FIG. FIG. 9 is a conceptual diagram for explaining the configuration of the register 92.

  As shown in FIG. 9, in the register 92 of the sound output LSI 86, areas 111 to 115 where data is set when the sub MPU 82 issues a sound output instruction to the sound output LSI 86, and a data transfer instruction from the sub MPU 82. The buffers 116 to 120 for temporarily storing and reading the data read from the common ROM 87, the area 121 where data is set when a data transfer instruction is given to the sound output LSI 86, and the sound output An area 122 for recognizing the internal state of the LSI 86 in the sub MPU 82 is provided separately.

  The areas 111 to 122 are described in detail as areas where data is set when a sound output instruction is given, a first parameter area 111, a second parameter area 112, and a third parameter area 113. And a plurality of parameter areas 111 to 114 such as a fourth parameter area 114. In addition, an area 115 for sequence data is provided.

  Each parameter area 111 to 114 stores parameter data necessary for outputting melody and sound effects, and parameter data necessary for outputting sound. By providing a plurality of parameter areas 111 to 114 in this way, a plurality of sounds can be generated simultaneously. The sequence data already described is stored in the sequence data area 115.

  Incidentally, since the sound output LSI 86 has a function for 16 channels, parameter data for a plurality of channels (specifically, 4 channels) is stored in one parameter area. In a configuration using a virtual track, a larger number of parameters may be stored in one parameter area.

  A transfer instruction area 121 is provided as an area in which data setting is performed when a data transfer instruction from the sub MPU 82 to the sound output LSI 86 is performed. In the transfer instruction area 121, address data of light emission data necessary for the sub MPU 82 is stored, and data for giving an instruction to transfer the light emission data read from the common ROM 87 to the sound output LSI 86 to the sub MPU 82 is stored. Is done.

  A plurality of external read buffers 116 to 120 are provided as areas for temporarily storing and reading data read from the common ROM 87 based on a data transfer instruction from the sub MPU 82. The necessary light emission data in the sub MPU 82 is temporarily stored in the external read buffers 116 to 120 and transferred to the sub MPU 82 when a predetermined read timing is reached.

  A flag area 122 is provided as an area for the sub MPU 82 to recognize the internal state of the sound output LSI 86. As the flag area 122, for example, a read completion flag is provided, and in response to a data transfer instruction from the sub MPU 82, transfer of the corresponding data from the common ROM 87 to the external read buffers 116 to 120 is completed. In this case, “1” is stored in the read completion flag, and the fact is grasped in the sub MPU 82.

  The areas 111 to 115, 121 to 122 and the buffers 116 to 120 are all accessible from the sub MPU 82, but are simultaneously accessed to the areas 111 to 115, 121 to 122 and the buffers 116 to 120. Instead of this, the accessible target is switched. That is, the number of areas that can be accessed simultaneously in the sub MPU 82 corresponds to the number of signal paths L1 to L8 that constitute the bus B1 between the sub MPU 82 and the sound output LSI 86 (each signal path L1 to L1 of the bus B1). (See FIG. 6 for L8).

  Specifically, a first parameter area 111 and one external read buffer 116 are allocated as the first area 131 corresponding to the first signal path L1 constituting the bus B1, and the bus B1 is configured. As the second area 132 corresponding to the second signal path L2, the second parameter area 112 and one external read buffer 117 are allocated and correspond to the third signal path L3 constituting the bus B1. As the third area 133, the third parameter area 113 and one external read buffer 118 are allocated, and the fourth parameter is set as the fourth area 134 corresponding to the fourth signal path L4 constituting the bus B1. Area 114 and one external read buffer 119 are allocated. Further, as the fifth area 135 corresponding to the fifth signal path L5 constituting the bus B1, an area 115 for sequence data and one external read buffer 120 are allocated.

  A transfer instruction area 121 is assigned as an area corresponding to the sixth signal path L6 constituting the bus B1, and a flag area 122 is assigned as an area corresponding to the seventh signal path L7 constituting the bus B1. ing.

  The register 92 is provided with a selector 136 corresponding to each of the first area 131 to the fifth area 135, and the sub MPU 82 can access the register 92 as the first area 131 to the fifth area 135. The area can be switched. This switching is performed through binary switching to the selector area 137 provided in the register 92 in correspondence with the eighth signal path L8 constituting the bus B1.

  Specifically, when the information in the selector area 137 is “0” which is an initial value, the first area 131 to the fifth area 135 are for sound output control depending on the setting of the area to be accessed by the selector 136. This corresponds to the areas 111 to 115. That is, when the information in the selector area 137 is an initial value, the sub MPU 82 can access the parameter areas 111 to 114 and the sequence data area 115, and the sound output LSI 86 can be accessed. The sound output instruction can be performed. That is, the sound output LSI 86 enters the first interference state with respect to the sub MPU 82.

  When the information in the selector area 137 is “1” which is a switching execution value, the first area 131 to the fifth area 135 are externally read buffers 116 to 120 according to the setting of the area to be accessed by the selector 136. It becomes a thing corresponding to. That is, when the information in the selector area 137 is the switching execution value, the sub MPU 82 can access the external read buffers 116 to 120 and can read the data for which the transfer instruction has been issued. It becomes a state. That is, the sound output LSI 86 enters the second interference state with respect to the sub MPU 82.

  On the other hand, the transfer instruction area 121, the flag area 122, and the selector area 137 are not subject to switching by the selector 136. Therefore, regardless of the interference state of the sound output LSI 86, the sub MPU 82 can access the transfer instruction area 121, the flag area 122, and the selector area 137.

<Various types of processing executed by the sub MPU 82>
Next, processing executed by the sub MPU 82 based on a program will be described.

  The sub-MPU 82 executes the effect control process periodically (for example, 2 msec) in a situation where the operating power is supplied. Incidentally, a program for executing the effect control process is read directly from the ROM 84 in a stage before the effect control process is executed.

  In the effect control process, as shown in the flowchart of FIG. 10, first, in step S <b> 301, it is determined whether an effect command is received from the main control device 50. The effects commands include the combination of the change command and the type command, the final stop command, the opening command, the opening command, the closing command, and the ending command, which have already been described. If any production command is received, the process proceeds to step S302.

  In step S302, a data table read process is executed. In the reading process, the data table corresponding to the presentation command received this time is directly read from the ROM 84. The data table is stored as a program and processing data in the direct ROM 84, and a plurality of types are set according to the type of effect. Then, the sub MPU 82 executes light emission control and sound output control in each effect by executing the processing defined in the data table while referring to the data table. Specifically, in the data table, the outline of the corresponding effect is determined in accordance with the passage of time, and the sub MPU 82 refers to the data table to execute information on the type of light emission data to be read out. Information on the type and contents of the light emission data to be output, and information on the type of sequence data and parameter data to be output. Incidentally, the sub MPU 82 specifies information to be referred to in the data table at each processing timing by using the update of the pointer of the data table.

  In the subsequent step S303, display system command output processing is executed. In the output process, the display system command corresponding to the data table read in step S 302 is directly read from the ROM 84 and the read display command is output to the display control device 72. As a result, the display control device 72 can cause the symbol display device 31 to display an image corresponding to the display effect relating to the current execution instruction. The display commands are stored in the direct ROM 84 as programs and processing data.

  If a negative determination is made in step S301, or if the process of step S303 is executed, it is determined in step S304 whether or not it is the light emission data transfer instruction timing based on the information in the data table. If it is the transfer instruction timing, whether or not the light emission data corresponding to the current transfer instruction timing is stored in the direct ROM 84 among the direct ROM 84 and the common ROM 87 based on the information in the data table in step S305. Determine whether.

  In the case of the direct ROM 84, by giving a transfer instruction to the direct ROM 84 in step S306, the light emission data to be transferred this time is read out to the attached RWM 85 and developed. Thereby, it is possible to execute light emission control using the light emission data.

  On the other hand, in the case of the common ROM 87, a read address setting process for the sound output LSI 86 is executed in step S307. More specifically, the address data in which the light emission data to be transferred this time is stored in the common ROM 87 is directly read from the program and processing data in the ROM 84, and the read address data is read via the bus B1. Transmit to the output LSI 86. The address data transmitted to the sound output LSI 86 is stored in the transfer instruction area 121 in the register 92 of the sound output LSI 86.

  In the subsequent step S308, a light emission data transfer waiting state is set through flag setting in the RWM 85. By setting the transfer waiting state, the sub MPU 82 can recognize that it is in the transfer waiting state after giving the light output data transfer instruction to the sound output LSI 86.

  If a negative determination is made in step S304, if the process of step 306 is executed, or if the process of step S308 is executed, the process proceeds to step S309. In step S309, it is determined based on the information in the data table whether or not it is the execution timing of light emission control. If it is the execution timing of the light emission control, the content of the light emission data developed in the RWM 85 is confirmed in step S310, and the light emission control corresponding to the confirmed light emission data is performed in various light emitting units in the subsequent step S311. Execute for 44a-44k.

  If a negative determination is made in step S309, or if the process of step S311 is executed, the process proceeds to step S312. In step S312, it is determined based on the information in the data table whether or not it is the execution timing of the sound output control. If it is the execution timing of the sound output control, in step S313, the sequence data and parameter data of the current sound output control target are directly read from the program and processing data in the ROM 84, and in the subsequent step S314, the reading is performed. The sequence data and parameter data thus transmitted are transmitted to the sound output LSI 86 via the bus B1. In this case, the sound output LSI 86 is in the first interference state, and the parameter data transmitted to the sound output LSI 86 is stored in the corresponding parameter areas 111 to 114 in the register 92 of the sound output LSI 86 and the sequence. The data is stored in the sequence data area 115 in the register 92 of the sound output LSI 86.

  If a negative determination is made in step S312, or if the process of step S314 is executed, the process proceeds to step S315. In step S315, it is determined whether or not the light emission data transfer is awaiting. If the light emission data transfer is awaited, the light emission data transfer process is executed in step S316.

  If a negative determination is made in step S315, or if the process of step S316 is executed, the process proceeds to step S317. In step S317, it is determined whether a sound output signal is received. The sound output in-progress signal is a signal that is periodically output from the sound output LSI 86 via the bus B1 in a state where the sound output LSI 86 can output the sound according to the output instruction from the sub MPU 82. The sound output signal is periodically monitored by a process different from the effect control process. If the sound output signal is not received in a situation that should have been received, it is determined in step S317 that the sound output signal is not received.

  If the sound output signal is received, an affirmative determination is made in step S317, and the effect control process is terminated as it is. On the other hand, if no sound output signal is received, the non-output process is executed in step S318, and then the effect control process is terminated. In the non-output process, a notification process is performed to indicate that the sound cannot be output satisfactorily. As the notification process, for example, a configuration in which a predetermined light emitting unit emits light in a predetermined mode is conceivable, and in addition to or instead of the error display to the display control device 72, the symbol display device 31 A configuration for displaying an error is conceivable.

  Next, the process for transferring the light emission data in step S316 will be described with reference to the flowchart of FIG.

  First, in step S401, it is determined whether or not the wait time for reading has been set. In the wait time for reading, in response to the data transfer instruction from the sub MPU 82, the data transfer unit 95 of the sound output LSI 86 reads the light emission data related to the transfer instruction from the common ROM 87, and the external read buffers 116 to 116 of the register 92. This is the time for the sub MPU 82 to wait for access to the external read buffers 116 to 120 until data writing to 120 is completed. Specifically, the setting of the read address for the transfer instruction area 121 in the register 92 of the sound output LSI 86 is completed, and the area accessible by the sub MPU 82 in the register 92 is set for data transfer (that is, the sound output LSI 86 is set). As a time for the sub MPU 82 to wait for access to the external read buffers 116 to 120 until the sampling period × n (n is an integer of 2 or more) after the second interference state is set) Is set. Note that the specific time of the sampling cycle × n is arbitrary, but may be set to wait for, for example, 48 sample cycles or more.

  If a negative determination is made in step S401, the process proceeds to step S402. In step S402, it is determined whether or not the setting of the read address for the register 92 of the sound output LSI 86 has been completed. If this setting has not been completed, the transfer process is terminated.

  When the setting is completed, in step S403, the register 92 outputs a signal so that the information in the selector area 137 in the register 92 of the sound output LSI 86 is switched from “0” to “1”. An area accessible by the sub MPU 82 is set for data transfer (that is, the sound output LSI 86 is set to the second interference state). In subsequent step S404, numerical information corresponding to the wait time for reading is set in a predetermined timer counter of the RWM 85. The waiting time for reading set here is updated so as to be periodically subtracted, and is specifically subtracted every time the effect control process (FIG. 10) is activated. Thereafter, the transfer process ends.

  Here, as already described, the data table read in step S302 of the effect control process (FIG. 10) in the sub MPU 82 includes information on the type of light emission data to be read and information on the type and content of light emission data to be executed. Information on the type of sequence data and parameter data to be output is set. In this case, in the data table, when the sound output LSI 86 is in the first interference state, the data output from the external read buffers 116 to 120 is not executed and the sound output LSI 86 is in the second interference state. In such a case, the execution timing of each process is set in advance (that is, at the design stage of the pachinko machine 10) so that setting of sequence data and parameter data relating to sound output is not executed.

  For example, when reading light emission data from the common ROM 87 in the sub MPU 82, a sequence related to sound output in a section from when the transfer instruction is given to when reading of the light emission data according to the transfer instruction is completed. The data table is set so that data and parameter data are not set. Specifically, the time period required for completing the setting of the address for reading, the time required for setting the accessible area for data transfer, the waiting time for reading, and the external reading A section corresponding to the sum of the time required to read out the light emission data from the buffers 116 to 120 is set.

  By setting the wait time for reading in step S404, in the next process for transferring the light emission data, an affirmative determination is made in step S401, and the process proceeds to step S405. In step S405, it is determined whether data is being transferred from the sound output LSI 86 to the sub MPU 82. If data transfer is not in progress, it is determined in step S406 whether a wait time for reading has elapsed. If it has not elapsed, the transfer process is terminated.

  If it has elapsed, in step S407, it is determined whether or not “1” is set in the read completion flag provided in the flag area 122 in the register 92 of the sound output LSI 86. It is determined whether or not the transfer of the light emission data related to the transfer instruction to the external read buffers 116 to 120 is completed. If “1” is not set in the read completion flag, the transfer process is terminated.

  If “1” is set in the read completion flag, the data transfer start instruction is executed in step S408, and then the transfer process ends. The transfer instruction is performed by outputting a signal through the sixth signal path L6 of the bus B1, and data related to the transfer instruction (for example, data indicating that transfer should be started, data at a transfer destination address) is The data is stored in the transfer instruction area 121 in the register 92 of the sound output LSI 86.

  By performing the transfer instruction as described above, the sound output LSI 86 is caused to transfer the light emission data read in the external read buffers 116 to 120 to the RWM 85. In this transfer, since the light emission data is transferred using the first to fifth signal paths L1 to L5 in the bus B1 connecting the sub MPU 82 and the sound output LSI 86, a single signal path is used. Thus, the transfer speed can be increased as compared with the case where the transfer is performed. The data capacity of the light emission data transferred in response to a single transfer instruction is arbitrary. For example, the light emission data having a data capacity of 192 bytes is divided and transferred to the external read buffers 116 to 120. The divided light emission data is simultaneously transferred via a plurality of signal paths L1 to L5.

  In addition, when instructing the start of data transfer, the sound output LSI 86 is supplied with information indicating in which address area of the RWM 85 light emission data related to the current transfer instruction should be written. Thereby, the light emission data is transferred to the area of the address designated by the sub MPU 82 in the RWM 85. In this case, the common ROM 87 stores a plurality of types of light emission data. Therefore, the light emission data stored in advance in the common ROM 87 and written in the RWM 85 at a predetermined timing is the light emission data stored in the common ROM 87 in advance after the use. When other light emission data is written to the RWM 85 at a timing different from the above timing, at least a part is erased by overwriting.

  When the data transfer start instruction is executed, in the next light emission data transfer process, an affirmative determination is made in step S405, and the process proceeds to step S409. In step S409, it is determined whether or not the data transfer of the light emission data related to the current transfer instruction has been completed. Incidentally, when the data transfer start instruction is executed in step S408, the light emission data transfer is completed so that the light emission data transfer related to the start instruction is completed at the timing when the next light emission data transfer process is executed. Since the execution cycle of the data transfer process and the transfer rate of the data transfer via the first to fifth signal paths L1 to L5 of the bus B1 are set, a negative determination is basically made in step S409. There is nothing. However, if the data transfer is delayed for some reason, or if the data transfer is not completed successfully due to noise, the data transfer is re-executed again, so a negative determination is made in step S409. There is.

  If a negative determination is made in step S409, the transfer process is terminated as it is, and if an affirmative determination is made in step S409, the process proceeds to step S410. In step S410, the signal output is performed so that the information in the selector area 137 in the register 92 of the sound output LSI 86 is switched from “1” to “0”, so that the area in the register 92 accessible by the sub MPU 82 is controlled in sound output. (Ie, the sound output LSI 86 is set to the first interference state). Thereafter, the transfer process ends.

<Operation in Sound Data Processing Unit 93 of Sound Output LSI 86>
Next, the operation of the sound data processing unit 93 of the sound output LSI 86 will be described with reference to the flowchart of FIG.

  The sound data processing unit 93 is provided as a dedicated circuit that operates independently of the sub MPU 82 and the data transfer unit 95, creates digital musical tone data based on the sequence data and parameter data transmitted from the sub MPU 82, By supplying the created digital musical sound data to the DAC 94, a melody without lyrics, a melody with lyrics, sound effects and sound are output from the speaker unit 45.

  The operation will be described in detail. First, it is determined whether or not sequence data and parameter data to be processed are stored in each parameter area 111 to 114 and sequence data area 115 in the register 92 (step S501). . In this determination, for example, “1” is set in the sequence data area 115 and the parameter areas 111 to 114 when the sequence data and parameter data are newly set by the signal output from the sub MPU 82. In addition, an area in which “0” is set when the sound data processing unit 93 performs processing is provided. Based on the data in the area, the sound data processing unit 93 stores sequence data and parameter data to be processed. Determine if it exists.

  When the sequence data and parameter data to be processed exist (step S501: YES), the parameter data is set for each tone generation channel provided in the register 92 according to the time data included in the sequence data to be processed. Are written in the corresponding areas determined by the sequence data (step S502). Incidentally, the sound data processing section 93 can access the parameter areas 111 to 114 and the sequence data area 115 regardless of the state of the selector 136.

  The sequence data and each parameter data set at one time are set as data capable of generating digital musical tone data for a plurality of consecutive samples for a plurality of sound generation channels. Then, according to the time data included in the sequence data, the corresponding parameter data for a plurality of samples is written in time series for each sound generation channel area.

  In addition, in the parameter data to be written here, the address of the sound data necessary for the corresponding sound generation channel and the corresponding output timing is set. The data transfer unit 95 can access the area for each tone generation channel regardless of the state of the selector 136, reads out the sound data at the address set in the parameter data for the most recent sample from the common ROM 87, and registers it. 92 is written.

  The multiple samples may be all or part of a series of sounds (for example, from the start to the end of a melody), but are part of the amount of data transferred at a time. Is preferred. In addition, the sound data processing unit 93 stops the output based on the instruction from the sub MPU 82 even in the middle of outputting a series of sounds according to the sequence data and parameter data already received, and generates a new series of sounds. It is good also as a structure which can start an output.

  The sound data processing unit 93 determines whether or not it is the creation timing of the digital musical sound data based on a signal input from a clock circuit (not shown) provided in the sound output LSI 86 (step S503). The signal output period from the clock circuit corresponds to the sampling period.

  If it is the creation timing (step S503: YES), the digital musical tone data is obtained for each tone generation channel based on the parameter data of the corresponding sample and the sound data already transferred to the register 92 by the data transfer unit 95. Create (step S504). Further, the digital musical tone data created for each of the sound generation channels is synthesized to create digital synthesized musical tone data (step S505). Incidentally, among the parameter data written in the area for each tone generation channel, the data for which digital musical tone data has been created is deleted, and the parameter data for the most recent sample is updated.

  The sound data processing unit 93 is a clock circuit (not shown) provided in the sound output LSI 86 and outputs a digital synthesized musical tone data based on a signal input from a clock circuit that outputs a signal at a timing different from that in step S503. It is determined whether or not there is (step S506). The signal output period from the clock circuit corresponds to the sampling period.

  If it is the output timing (step S506: YES), the generated digital synthesized musical tone data corresponding to the current output is supplied to the DAC 94 (step S507). The DAC 94 converts the digital synthesized musical tone data supplied from the sound data processing unit 93 into an analog signal and outputs it as an analog musical tone signal to the speaker unit 45. Thereby, a predetermined sound is output from the speaker unit 45. In some cases, a plurality of types of sounds may not be output at the same time. In this case, digital synthesized musical tone data is not created, and a single digital musical tone data is supplied to the DAC 94, and a corresponding single tone is output to the speaker. Output from the unit 45.

  In the sound data processing unit 93, whether or not the sound data is transferred from the data transfer unit 95 to the register 92 as necessary, and whether an analog musical sound signal is output from the DAC 94 to the speaker unit 45. It is determined whether or not sound is being output through monitoring such as whether or not (step S508). If the sound is being output (step S508: YES), a sound output signal is output via the bus B1 connecting the sub MPU 82 and the sound output LSI 86. In this case, the signal path used in the bus B1 is the eighth signal path L8 used when the sub MPU 82 accesses the selector area 137, and the sub MPU 82 outputs a signal via the eighth signal path L8. The sound output signal is output at a timing that is not performed.

<Operation in Data Transfer Unit 95 of Sound Output LSI 86>
Next, the operation of the data transfer unit 95 of the sound output LSI 86 will be described with reference to the flowchart of FIG.

  The data transfer unit 95 is provided as a dedicated circuit that operates independently of the sub MPU 82 and the sound data processing unit 93, and as already described, based on the parameter data written in the register 92, the common ROM 87. The sound data is transferred from the computer to the register 92. Further, based on the read address transmitted from the sub MPU 82, the light emission data is transferred from the common ROM 87 to the external read buffers 116 to 120 of the register 92 and the transferred light emission data is transferred to the sub MPU 82. Run.

  The operation will be described in detail. In the data transfer unit 95, first, a signal from a clock circuit (not shown) provided in the sound output LSI 86 that outputs a signal at a timing different from that in steps S503 and S506. Based on the input, it is determined whether or not it is the transfer timing of the sound data (step S601). The signal output period from the clock circuit corresponds to the sampling period.

  If it is the transfer timing (step S601: YES), as already described, the sound data at the address set in the parameter data for the most recent sample is read from the common ROM 87 in each sounding channel area. Write to the register 92 (step S602).

  The data transfer unit 95 determines whether unprocessed address data is set in the transfer instruction area 121 in the register 92 (step S603). Incidentally, the data transfer unit 95 can access the transfer instruction area 121 regardless of the state of the selector 136.

  If unprocessed address data is set (step S603: YES), the light emission data corresponding to the address is read to the external read buffers 116 to 120 in the register 92 (step S604). In this case, the reading priority of the light emission data is set in advance in the external read buffers 116 to 120, and it is necessary to transfer the light emission data exceeding the data capacity of the buffer 116 having the highest priority. Next, if the light emission data including the buffer 117 having the next highest priority is set as the transfer destination of the light emission data, and the light emission data exceeding the data capacity of both the buffers 116 and 117 needs to be transferred, the next highest priority is given. Including the buffer 118, it is set as the transfer destination of the light emission data. Then, it is possible to set up to a maximum of light emission data corresponding to the total data capacity of the external read buffers 116 to 120 as one transfer target. In this regard, light emission data set as one transfer target includes data of various data capacities up to the sum of the data capacities of the external read buffers 116 to 120. However, the present invention is not limited to the above-described configuration, and the address of the transfer destination of the light emission data from the common ROM 87 in each of the external read buffers 116 to 120 is indicated together with the read address (that is, address data) from the sub MPU 82. It is good also as a structure to be made.

  The data transfer unit 95 determines whether or not light emission data is being read from the common ROM 87 to the external read buffers 116 to 120 (step S605), and if it is being read (step S605: YES). Whether the reading is completed is determined (step S606). If the reading is completed (step S606: YES), “1” is set to the reading completion flag provided in the flag area 122 of the register 92 (step S607).

  The data transfer unit 95 determines whether or not a data transfer start instruction is issued from the sub MPU 82 (step S608). If a data transfer start instruction has been issued (step S608: YES), the light emission data relating to the current transfer instruction object stored in the external read buffers 116 to 120 is transferred to the sub MPU 82 (step S608). S609). In this case, the light emission data is transferred to the area of the address designated by the sub MPU 82 in the RWM 85.

  The data transfer unit 95 determines whether or not the transfer of the light emission data has been completed (step S610). When the transfer of the light emission data has been completed (step S610: YES), the read completion flag provided in the flag area 122 of the register 92 is cleared to “0” (step S611).

<How the light emission data stored in the common ROM 87 is transferred to the sub-MPU 82>
Next, how the light emission data stored in the common ROM 87 is transferred to the sub MPU 82 will be described with reference to the timing chart of FIG.

  FIG. 14A shows the setting state of address data for the transfer instruction area 121 in the register 92, and FIG. 14B shows the reading state of the light emission data for the buffers 116 to 120 for external reading. FIG. 14C shows the setting status of the information of the read completion flag, FIG. 14D shows the setting status of the area accessible by the sub MPU 82 in the register 92, and FIG. 14E shows the setting of the read address. FIG. 14 (f) shows a situation where the selector area 137 is set, and FIG. 14 (g) shows reading of light emission data from the external readout buffers 116 to 120. FIG. 14 (h) shows the setting status of sequence data and parameter data.

  Setting of a read address for the sound output LSI 86 by the sub MPU 82 is started at timing t1, and setting of the address is completed at timing t2. When the setting of the address is completed, transfer of light emission data corresponding to the address from the common ROM 87 to the external read buffers 116 to 120 is started. Further, at the timing t2, which is the timing when the setting of the read address is completed, switching of the selector area 137 in the register 92 from “0” to “1” is started. At t3, the accessible area in the sub MPU 82 is switched from the sound output control areas 111 to 115 to the external read buffers 116 to 120.

  That is, the state of the sound output LSI 86 is switched from the first interference state to the second interference state, and the switching of the interference state is performed after the setting of the read address of the light emission data related to the transfer instruction is completed. As a result, the sequence data and parameter data can be set while overlapping with the timing for setting the read address, and the external read buffer 116 to the timing before the read address setting is completed. Compared to the configuration in which switching to 120 is performed, there is a time margin for setting sequence data and parameter data.

  At the timing t3, not only the accessible area is switched, but also the sub MPU 82 starts measuring the read wait time T2. Thereafter, at the timing t4, the reading of the light emission data to the external reading buffers 116 to 120 is completed, and the reading completion flag is set to “1”. However, at the timing of t4, reading of the wait time T2 for reading is being performed in the sub MPU 82, so reading of the light emission data from the external reading buffers 116 to 120 is not completed. Thereafter, at the timing of t5, the measurement of the read wait time T2 is completed, whereby the transfer of the light emission data from the external read buffers 116 to 120 to the sub MPU 82 is started.

  As a condition for starting the reading of the light emission data from the external read buffers 116 to 120 as described above, not only the reading completion flag is set to “1” in the sound output LSI 86 but also the sub MPU 82. In this case, the measurement of the waiting time T2 for reading is completed, so that the electrical noise is actually transmitted although the transfer of the light emission data to the external reading buffers 116 to 120 is not completed. When the read completion flag is set to “1” due to the influence of the above, reading of the light emission data from the external read buffers 116 to 120 is prevented from starting. In addition to the completion of the measurement of the waiting time T2 for reading in the sub MPU 82, it is a condition that “1” is set in the reading completion flag in the sound output LSI 86, so that some communication abnormality is caused. As a cause, when the time required for reading the light emission data to the external read buffers 116 to 120 exceeds the read wait time T2, the light emission data read is not completed but the external read data is not read. Reading from the buffers 116 to 120 is prevented from starting.

  Thereafter, at the timing of t6, reading of the light emission data related to the current transfer instruction is completed, so that the reading completion flag is cleared to “0” and “1” to “0” in the selector area 137 in the register 92. Switching to is started. At t7, the accessible area in the sub MPU 82 is switched from the external read buffers 116 to 120 to the sound output control areas 111 to 115.

  Here, as shown in FIG. 14H, in the sequence data area 115 and the parameter areas 111 to 114 of the register 92, the light emission data transfer instruction based on the setting of the read address is performed. The sequence data SD1 and the parameter data PD1 are set until the timing t8, which is the timing after the transfer of the light emission data related to the transfer instruction to the sub MPU 82 is completed and the sound output LSI 86 returns to the first interference state. to continue. The timing of t8 is a period in which sound is output based on the sequence data SD1 and parameter data PD1, and new sequence data SD2 and parameter data are generated based on the signal output from the sub MPU 82 during the period. PD2 is set in the area 115 for sequence data and the areas 111 to 114 for each parameter.

  That is, for the sound output period that overlaps the period in which the light emission data of the common ROM 87 is read out to the sub-MPU 82, the period in which the corresponding sequence data and parameter data are read out is started. The period during which the digital musical tone data can be created by the set sequence data and parameter data is set before, and the period during which the reading is performed is completed (that is, the transfer to the sub MPU 82 is completed). The output LSI 86 is configured to be included until after returning to the first interference state. As a result, even if the sound output LSI 86 is set to the second interference state in order to transfer the light emission data in the sound output LSI 86, the sound output can be continued without being interrupted. Become.

<Relationship between sound data transfer timing and light emission data transfer timing>
Next, the relationship between the sound data transfer timing and the light emission data transfer timing will be described with reference to the timing chart of FIG.

  As already described, the sound data is read from the common ROM 87 to the register 92 by one sample for each sound generation channel in correspondence with the sampling period. Specifically, FIG. 15A illustrates sound data every time the sampling period T1 elapses, such as the timing from t1 to t3, the timing from t3 to t5, and the timing from t7 to t9. Starts to be sent. Incidentally, there are a plurality of periods corresponding to a plurality of sampling periods between the timing t6 and the timing t7.

  The time required to transmit the sound data at each timing (time from t1 to t2, time from t3 to t4, time from t5 to t6, time from t7 to t8, and time from t9 to t10) is T3. The transmission period T3 is sufficiently shorter than the sampling period T1. Incidentally, the number of sound generation channels may differ depending on the type of sound to be output, and the transmission period T3 may vary depending on the number of sound generation channels. In this case, even when sound data for the maximum number of sound generation channels is transmitted, the transmission period T3 is sufficiently shorter than the sampling period T1.

  As described above, sound data for a series of sounds is transmitted in a time-division manner corresponding to the sampling period in units of a predetermined number of samples, specifically, “1 sample” × “number of sounding channels used”. In, a period in which the sound data is not transmitted occurs between the sound data of each transmission unit. The emission data is transmitted using this non-transmitted period.

  Specifically, the transfer to the register 92 is started for the sound data of the next transmission unit at the timing after the timing t2 when the transfer of the sound data of one transmission unit to the register 92 is completed. The light emission data transfer from the common ROM 87 to the register 92 is started at a timing t11 which is a timing before the timing t3. Then, the transfer of the light emission data is completed at the timing t12 which is the timing before the timing t3 when the transfer to the register 92 is started for the sound data of the next transmission unit. As a result, the light emission data can be transferred to the register 92 by utilizing the data transfer idle time due to the sampling period.

  As described above, in the light emission data transferred to the register 92 as described above, the measurement of the wait time for reading is completed in the sub MPU 82 and the reading completion flag is set to “1” in the sound output LSI 86. Is transferred to the sub MPU 82 on the condition. In this case, the transfer of the light emission data to the sub-MPU 82 is started after a plurality of sampling periods have elapsed since the transfer of the light emission data to the register 92 has been completed.

  Specifically, FIG. 15 (A) will be described. The transfer is started toward the sub MPU 82 at the timing t13 after the completion of the transfer of the sound data of the transmission unit that has been transferred at the timing t7. Then, the transfer of the emission data toward the sub MPU 82 is completed at the timing t14 which is the timing before the timing t9 when the transfer to the register 92 is started for the sound data of the next transmission unit.

  According to the embodiment described in detail above, the following excellent effects are obtained.

  The common ROM 87 is configured to store not only the sound data used in the sound output LSI 86 but also the light emission data used in the sub MPU 82, so that the direct ROM directly connected to the sub MPU 82 is used. Even without increasing the storage capacity of the ROM 84, the data capacity of the light emission data can be increased. In particular, since the direct ROM 84 is connected to the CPU 83 via the internal bus in the sub MPU 82, it is relatively difficult to increase the data capacity, and an attempt is made to increase the data capacity. Then, it is necessary to expand the internal bus width, and it is not easy to cope with it. On the other hand, the common ROM 87 is not directly connected to the CPU 83 but is externally attached to the sound output LSI 86, so that it is relatively easy to increase the data capacity. It is. By storing the light emission data in the common ROM 87, it is possible to cope with an increase in the data capacity of the light emission data.

  The light emission data read from the common ROM 87 to the sound output LSI 86 is transferred to the sub MPU 82 via the bus B 1 that transmits sequence data and parameter data for instructing sound output from the sub MPU 82 to the sound output LSI 86. . A signal indicating that sound is being output is also transmitted from the sound output LSI 86 to the sub MPU 82 via the bus B1. As a result, the light emission data stored in the common ROM 87 is transferred to the sub MPU 82 by using the bus B1 provided for executing various controls in the sub MPU 82 and the sound output LSI 86. The hardware configuration for transfer can be simplified.

  The register 92 of the sound output LSI 86 stores sequence data and parameter data transmitted from the sub MPU 82 for instructing sound output, that is, an area for parameters accessed to the sub MPU 82 for instructing sound output. 111 to 114 and an area 115 for sequence data, and external read buffers 116 to 120 for storing light emission data to be transmitted to the sub MPU 82, that is, accessing the sub MPU 82 for reading the light emission data. It is provided separately. As a result, since the sound output control data and the light emission data can be individually stored on the sound output LSI 86 side, the timing of the sound output instruction from the sub MPU 82 and the light emission data from the common ROM 87 are stored. This makes it easier to adjust the read timing.

  The sound output LSI 86 is provided with a selector 136, and the sub MPU 82 has accessible areas between the parameter areas 111 to 114 and the sequence data area 115 and the external read buffers 116 to 120. Can be switched. As a result, the number of addresses accessible in the sub MPU 82 can be increased while suppressing the number of signal paths L1 to L8 of the bus B1. Therefore, it is possible to achieve an excellent effect as described above while simplifying the hardware configuration related to data communication.

  Switching between the first interference state in which the sub MPU 82 can access the parameter areas 111 to 114 and the sequence data area 115 and the second interference state in which the external read buffers 116 to 120 can be accessed. Is executed based on an instruction from the sub MPU 82. This makes it easy to adjust the sound output instruction timing from the sub MPU 82 and the light emission data read timing from the common ROM 87.

  The register 92 of the sound output LSI 86 is provided with a selector area 137. When the sub MPU 82 accesses the selector area 137 and switches information in the area 137, the first interference state and the second interference area 137 are changed. Switching between the interference states is performed, and the sub MPU 82 is accessible even in any interference state. Thereby, the processing load of the sub MPU 82 can be reduced with respect to switching of the interference state. In particular, since the interference state is switched through binary switching of the selector area 137, the effect of reducing the processing load is enhanced.

  The sound output LSI 86 reads out sound data from the common ROM 87 as time division data (or time division information) and reads out light emission data from the time when one time division data is read until the next time division data is read out. I do. This makes it easy to adjust the timing for reading sound data from the common ROM 87 and the timing for reading light emission data.

  Further, the sound data is read out in a time-sharing manner based on the sampling period, and the light emission data is read out without hindering the periodic reading. Since sound data is divided and transmitted in a time-sharing manner, there is a high possibility that sound output cannot be performed satisfactorily when the reading is delayed. In this case, since the light emission data is read while not disturbing the periodic reading of the sound data by time division, the sound output can be satisfactorily performed and the excellent effects as described above can be obtained. be able to.

  The time division data is sound data for a predetermined number of samples, specifically, one sample. That is, the sound data converted into a digital signal is read out in a time division manner, and the light emission data is read out using a configuration in which the sound data is read out in the time division manner. Thereby, it is possible to effectively use the free time related to the reading of the sound data and achieve the excellent effects as described above.

  The sub MPU 82 and the sound output LSI 86 are provided on the sound light control board 81. Thereby, when the light emission data stored in the common ROM 87 is transferred to the sub MPU 82, the light emission data can be transferred while suppressing the influence of noise during the transfer.

<Second Embodiment>
In the above embodiment, the digital musical sound data creation cycle is set corresponding to the sampling cycle for one tone generation channel, and the reading of the sound data from the common ROM 87 is made to correspond to the sampling cycle one sample at a time. It was set as the structure performed. Instead, in the present embodiment, the digital musical tone data creation cycle is set to a predetermined number (for example, “3”) of sampling cycles (hereinafter, this cycle is also referred to as one frame). In addition, the sound data is read out from the common ROM 87 for each of a plurality of specific samples (that is, one frame) corresponding to the period of the one frame.

  Specifically, in the sound data processing unit 93, when the determination in step S503 of FIG. 12 is performed, the signal input from the clock circuit provided in the sound output LSI 86 is used as a trigger for the positive determination. The signal output cycle from 1 corresponds to the cycle for the one frame. When the determination in step S506 is performed, a signal input from the clock circuit provided in the sound output LSI 86 is used as a trigger for an affirmative determination, and the signal output cycle from the clock circuit is also a cycle for the one frame. It corresponds to.

  Similarly, for the data transfer unit 95, when the determination in step S601 of FIG. 13 is performed, the signal input from the clock circuit provided in the sound output LSI 86 is used as a trigger for the positive determination. The output period corresponds to the period for one frame.

  As described above, for one sound generation channel, the unit of sound data transferred from the common ROM 87 in response to one transfer instruction to the common ROM 87 is one frame corresponding to a plurality of specific sampling periods. As a result, it is possible to reduce the header information attached thereto as compared with the case where sound data is transferred sample by sample.

  The relationship between the sound data transfer timing and the light emission data transfer timing in the case of the above configuration will be described with reference to the timing chart of FIG.

  As described above, the sound data is read from the common ROM 87 to the register 92 for each sound generation channel for each frame in correspondence with the cycle for one frame. When FIG. 15B is specifically described, transmission of sound data is started every time a period T4 of one frame elapses, such as the timing from t1 to the timing from t3.

  The time required for transmitting the sound data at each timing (time from t1 to t2 and time from t3 to t4) is T5, and this transmission period T5 is sufficiently shorter than the period T4 for one frame. It has become. Incidentally, the number of sound generation channels may differ depending on the type of sound to be output, and the transmission period T5 may vary depending on the number of sound generation channels. In this case, even when sound data for the maximum number of sound generation channels is transmitted, the transmission period T5 is sufficiently shorter than the period T4 for one frame.

  As described above, the sound data of a series of sounds is for a predetermined number of frames, specifically, “one frame (for a specific plurality of samples)” × “number of sound generation channels used” for one frame. In the configuration in which transmission is performed in a time-sharing manner corresponding to the period of time, a period in which the sound data is not transmitted occurs between sound data of each transmission unit, and the period in which the sound data is not transmitted is greater than in the case of the first embodiment. Also gets longer. The light emission data is transmitted using this non-transmitted period.

  Specifically, the transfer to the register 92 is started for the sound data of the next transmission unit at the timing after the timing t2 when the transfer of the sound data of one transmission unit to the register 92 is completed. The transfer of the light emission data from the common ROM 87 to the register 92 is started at a timing t5 which is a timing before the timing t3. Then, the transfer of the light emission data is completed at the timing t6 which is the timing before the timing t3 when the transfer to the register 92 is started for the sound data of the next transmission unit. As a result, it is possible to transfer the light emission data to the register 92 using the idle time of the data transfer due to the existence of a cycle of one frame, and the transfer can be performed more easily than in the first embodiment. It is possible to carry it. In addition, it is possible to increase the amount of light emission data transmitted in response to one transfer instruction as compared to the first embodiment.

  Incidentally, in the emission data transferred to the register 92, measurement of the wait time for reading is completed in the sub MPU 82 and “1” is set in the reading completion flag in the sound output LSI 86, as in the first embodiment. On the condition that it is transmitted to the sub MPU 82. Further, the point that the light emission data is transferred to the sub-MPU 82 is performed so as not to overlap the entire sound data transfer period, as in the first embodiment.

  In the present embodiment, when sound data is read out, the number of samples included in one time-division data does not need to be fixed at a specific number, and the time-division data and the next The number of samples included in the time division data may be different. For example, at least one of the two time-division data that interpose the light emission data transfer may be configured to include a smaller number of samples than the case where the light emission data transfer is not intervened. In this case, it is possible to increase the data capacity of the light emission data read at a time.

<Other embodiments>
In addition, it is not limited to the description content of each embodiment mentioned above, A various deformation | transformation improvement is possible within the range which does not deviate from the meaning of this invention. For example, you may change as follows.
Incidentally, the configurations of the following different modes may be applied individually or in combination to the configurations of the above embodiments.

  (1) A part of the light emission data is directly stored in the ROM for ROM 84, and the rest is not limited to the configuration stored in the ROM for common use 87. All of the light emission data is stored in the common ROM 87. It is good also as a structure.

  (2) Not only sound data but also light emission data may be read from the common ROM 87 in a time-sharing manner. In other words, both the first information and the second information stored in the common ROM 87 may be read out in a time division manner. In this case, it is possible to provide a means for adjusting the timing so that the readout timing of each information does not overlap. The readout cycle of each information is made constant so that the readout timing of each information does not overlap. May be set.

  (3) The data stored in the common ROM 87 connected to the sound output LSI 86 is not limited to a combination of sound data and light emission data. For example, a combination of sound data used by the sound output LSI 86 and a program used by the sub MPU 82 may be used. In this configuration, in a configuration in which a part of the program is directly stored in the ROM for ROM 84 and the rest is stored in the common ROM 87, at least an initial startup program is stored in the ROM for direct storage, and processing based on this program is performed. It is only necessary to read the subsequent processing program from the common ROM 87 during the execution of. On the other hand, in the configuration in which all the programs are stored in the common ROM 87, a circuit may be provided so that the initial startup program is transferred from the common ROM 87 through the sound output LSI 86 at the time of initial startup. A configuration may be employed in which a memory is separately provided.

  Further, a combination of sound data used in the sound output LSI 86, a program used in the sub MPU 82, and light emission data used in the sub MPU 82 may be used. In this case, in the configuration in which all of the program and the light emission data are stored in the common ROM 87, the direct ROM 84 is not necessary. Of the programs used in the sub MPU 82, only the boot program may be stored in advance in a memory directly connected to the CPU 83 of the sub MPU 82, and the rest may be stored in the common ROM 87.

  (4) The memory storing the program or data used in the sub MPU 82 may be a memory connected to the VDP 103 provided as the display MPU 102 or the drawing LSI, instead of the memory connected to the sound output LSI 86. .

  (4-1) For example, the image ROM 104 may store at least one of the program of the sub MPU 82 and the light emission data together with the image data. In this case, the sub MPU 82 and the VDP 103 may be electrically connected without using the display MPU 102, and the light emission data may be read from the image ROM 104 by the VDP 103 and the light emission data may be transmitted from the VDP 103 to the sub MPU 82. . Alternatively, the signal path between the sub MPU 82 and the display MPU 102 can be bidirectionally communicated, and the signal path between the display MPU 102 and the VDP 103 can also be bidirectionally communicated. The light emission data read out from the image ROM 104 by the VDP 103 May be transmitted to the sub MPU 82 via the display MPU 102. In this case, it is possible to use an existing signal path as compared with a configuration in which the sub MPU 82 and the VDP 103 are directly connected.

  Here, the image data is read according to the update timing of the image displayed on the display screen G, and the image data used at each update timing is time-divided in the update period of the image including a plurality of update timings. Data. In this configuration, it is preferable that the information used in the sub MPU 82 is read from the image ROM 104 by using the time between reading of the image data in time division.

  (4-2) For example, at least one of the program and the light emission data of the sub MPU 82 may be stored in the program ROM built in the display MPU 102. In this configuration, the signal path between the sub MPU 82 and the display MPU 102 can be bidirectionally communicated, so that the existing signal path can be used.

  Incidentally, in the configurations of (4-1) and (4-2), a common ROM is provided among a plurality of different control devices.

  (5) A configuration may be adopted in which a common ROM is used among a plurality of CPUs that execute predetermined processing using a program. In this case, one CPU may appropriately read out programs from a common ROM as the game progresses, and the other CPUs may be configured to read out necessary programs collectively when the power is turned on. .

  (6) A common memory that stores data in advance is used between a control unit that performs sound output control using sound data and a control unit that performs image display control using image data. It is good also as a structure to be made. For example, a common ROM may be used between the sound output LSI 86 and the VDP 103 provided as the drawing LSI. In this configuration, the ROM connected to the sound output LSI 86 may store at least a part of the image data together with the sound data. Instead, the ROM connected to the VDP 103 stores the sound along with the image data. It is good also as a structure in which at least one part of data is memorize | stored. In this case, the sound output LSI 86 and the VDP 103 may be directly connected without passing through the subordinate MPUs 82 and 102, or may be connected through the subordinate MPUs 82 and 102.

  Further, for example, in a configuration in which an MPU, a sound output LSI, and a drawing LSI are provided on one control board, a configuration having a common memory as described above may be applied. Further, in the configuration in which the sound data and the image data are stored in advance in the common memory as described above, the sound data is read out in time division, and the image data is also read out in time division. The time division timing may be adjusted so as not to overlap.

  (7) Areas to be switched among areas accessible by the sub MPU 82 by switching information to the selector area 137 are areas for sound output control such as areas 111 to 114 for parameters and an area 115 for sequence data. In other words, the sound output LSI 86 does not have to be the entire area for instructing the sound output control of the speaker unit 45 that is the device to be controlled, and may be a part of the area.

  For example, the sequence data area 115 in which data for instructing the flow of operation of the control target device in a predetermined period is excluded from the switching target area, and the sound output LSI 86 is in any interference state. Alternatively, the sub MPU 82 may be accessible. In this case, even when the interference state for light emission data transfer (that is, the first interference state) is entered, it is possible to instruct the flow of operation of the device to be controlled.

  Further, in addition to the sequence data area 115, a part of each parameter area 111 to 114 is also excluded from the switching target area, and the sub MPU 82 is accessible even if the sound output LSI 86 is in any interference state. It is good also as a structure. In this case, even if it becomes the interference state for light emission data transfer (that is, the first interference state), it is still possible to set parameters for some of the plurality of sound generation channels.

  (8) The common ROM 87 is directly connected to the sound output LSI 86 and is not directly connected to the sub MPU 82. Instead, the common ROM 87 is common to the bus connecting the sound output LSI 86 and the sub MPU 82. A configuration in which the ROM 87 is connected may be adopted. In this case, it is preferable to separately provide a circuit for adjusting the access timing between the sound output LSI 86 and the sub MPU 82 so that the common ROM 87 is not accessed simultaneously.

  (9) The signal path for transmitting the sound output signal from the sound output LSI 86 to the sub MPU 82 is not limited to the eighth signal path L8 used when the sub MPU 82 accesses the selector area 137. The signal paths L1 to L5 may be used when the sequence data or the parameter data is transmitted from the sub MPU 82 and the light emission data is transmitted from the sound output LSI 86.

  (10) In the configuration in which the light emission data is stored in advance in each of the direct ROM 84 and the common ROM 87 as in the above embodiment, the direct ROM 84 is more arbitrarily selected as an execution target than the common ROM 87. High light emission data may be stored in advance.

  (10-1) For example, the start timing of the game times depends on the winning timing of the game balls to the operation ports 23 and 24, and the light emission data at the start of the game times is in the middle of the game times, for example, at the time of reach Compared with the light emission data and the light emission data in the opening / closing execution mode, the arbitraryness selected as the execution target is high. Therefore, the light emission data used at the start of the game times is directly stored in the ROM 84, and the subsequent light emission data such as when reaching or in the opening / closing execution mode is stored in the common ROM 87. As a result, when it is necessary to suddenly start a game round, it is only necessary to read the light emission data directly from the ROM 84, so that the start timing of the light emission control based on the light emission data can be advanced, and the subsequent game Since the timing of execution of the light emission data corresponding to the contents is known in advance, the light emission data may be read from the common ROM 87 in advance.

  (10-2) In addition to or instead of the configuration of (10-1) above, a configuration may be adopted in which light emission data for abnormality notification is directly stored in the ROM 84. Abnormality notification executed when a predetermined abnormal event is detected is also highly flexible in its execution timing in relation to the occurrence timing of the abnormal event being arbitrary. Therefore, by storing light emission data for abnormality notification directly in the ROM 84, it is possible to quickly start abnormality notification for the occurrence of an abnormal event.

  Incidentally, as a specific configuration when abnormality notification is performed, for example, an abnormality command is transmitted from the main control device 50 to the sub MPU 82, and the sub MPU 82 performs abnormality in step S301 in the effect control process (FIG. 10). If it is determined that a command has been received, a configuration may be considered in which a data table for abnormality notification is read in step S302 and light emission control is executed according to the data table.

  Further, in the configuration in which the light emission data for abnormality notification as described above is directly stored in the ROM 84, for example, the light emission data corresponding to the light emission control on the front side of the abnormality notification is directly stored in the ROM 84 and the rear side is also stored. The light emission data corresponding to the light emission control may be stored in the common ROM 87. In this case, the light emission data corresponding to the rear light emission control is read in advance from the common ROM 87 during the period in which the front light emission control is performed using the light emission data read from the direct ROM 84. Thus, it is possible to quickly and continuously execute the light emission control using the light emission data while distributing and storing the light emission data for abnormality notification.

  (10-3) In addition to or instead of the configurations of (10-1) and (10-2), the light emission data for notifying the abnormality of the sound output LSI 86 may be directly stored in the ROM 84. Good.

  Further, the configurations (10-1) to (10-3) may be applied to a configuration in which the target of information to be distributed and stored is not light emission data. For example, the present invention may be applied to a configuration that distributes and stores image data, may be applied to a configuration that distributes and stores sound data, or may be applied to a configuration that distributes and stores programs.

  (11) The sound data may not be read from the common ROM 87 in a time division manner. For example, sound data necessary to output a series of melody, a series of sound effects, and a series of sounds from the speaker unit 45 is read from the common ROM 87 and light is emitted using a period in which the sound data is not read. It is good also as a structure which reads data. However, in adjusting the read timing of the light emission data, the sound data is read out in a time division manner as in each of the above embodiments, and after one time division data is read out until the next time division data is read out. It is preferable that the light emission data is read out using the time between.

  (12) The sound source method in the sound output LSI 86 is not limited to that in the above embodiment, and for example, a waveform memory method, FM method, or AM method may be adopted.

  The sound output LSI 86 is not provided as a dedicated circuit, but may have a CPU and execute processing according to a program to realize the operation in the above embodiment. The CPU may be associated with each of the data transfer units 95, and each may execute processing according to a program to realize the operation in the above embodiment. In this case, the program may be stored in the common ROM 87 together with the sound data, or the program may be stored in a ROM provided separately from the common ROM 87.

  (13) The configuration in which the sub MPU 82 accesses the register 92 of the sound output LSI 86 using the bus B1 is not limited to the configuration in the above embodiment. For example, even if any area of the register 92 is accessed, information may be transmitted in parallel using all the signal paths L1 to L8 of the bus B1. Even in this case, in view of the relationship between the number of signal paths L1 to L8 and the number of accessible addresses in the sub MPU 82, the accessible area is switched using the selector 136. Is preferred.

  (14) The sound data read from the common ROM 87 may be transferred to the sound data processing unit 93 instead of being transferred to the register 92. In this case, each timing is set so that the period in which the sound data is transferred from the common ROM 87 toward the sound output LSI 86 and the period in which the light emission data is transferred from the common ROM 87 toward the sound output LSI 86 do not overlap. The period during which the light emission data is transferred from the sound output LSI 86 to the sub MPU 82 may overlap with the period during which the sound data is transferred from the common ROM 87.

  In addition to the above configuration, the data after analyzing the sequence data and the parameter data is not stored in the register 92, but is stored in the sound data processing unit 93, and in response to an instruction from the sound data processing unit 93. Based on this, the data transfer unit 95 may transfer the sound data.

  (15) Instead of the configuration in which the switching of the interference state in the sound output LSI 86 is all performed based on the instruction from the sub MPU 82, for example, the switching from the first interference state to the second interference state is based on the instruction from the sub MPU 82. The switching from the second interference state to the first interference state may be performed by the sound output LSI 86 at the timing when the light emission data transfer from the sound output LSI 86 to the sub MPU 82 is completed or after that.

  (16) The sound output LSI 86 may be configured to perform not only sound output control but also image display control. In this case, three or more types of interference states including an interference state for sound output control, an interference state for image display control, and an interference state for data transfer may be set as interference states for the sound output LSI 86. .

  (17) The distribution mode of the light emission data and the program used in the sub MPU 82 to the direct ROM 84 and the common ROM 87 is not limited to those in the above-described embodiments. For example, during the opening / closing execution mode The light emission data and the program to be used may be stored in the common ROM 87, and the light emission data and the program to be used in a state other than the opening / closing execution mode may be directly stored in the ROM 84. In this case, the light emission data and the program having high arbitrary timing used by the sub MPU 82 are stored in the direct ROM 84 that can complete the reading at an early stage, and after the game times that are the winning results are executed. It is possible to distribute the light emission data and the program in which the use timing occurs to the common ROM 87.

  (18) In each of the above embodiments, the area accessible from the sub MPU 82 is switched among the parameter areas 111 to 114 and the sequence data area 115 and the external read buffers 116 to 120. In addition, the switching can be performed collectively by switching the information in the selector area 137, but the present invention is not limited to this, and a selector area 137 may be provided for each switching target. A selector area 137 may be provided for each combination. In these cases, it is possible to switch the accessible area in the sub MPU 82 more finely. For example, some data for giving an instruction to the sound output LSI 86 is one of the buffers 116 to 120 for external reading. It becomes possible to write in the situation where data is being read from the buffer of the copy.

  (19) In each of the above embodiments, by switching the information in the selector area 137, the areas accessible in the sub-MPU 82 are the parameter areas 111 to 114, the sequence data area 115, and the external readout. However, the present invention is not limited to this. For example, the sub MPU 82 can write data to the register 92 by switching information in the selector area 137. It is also possible to perform a switch between a normal state and a state in which data can be read from the register 92.

  (20) The hold information related to winning in the upper working port 23 and the hold information related to winning in the lower working port 24 are stored separately, and the hold information related to winning in the lower working port 24 has priority. The structure digested may be applied, and conversely, the structure in which the hold information related to winning in the upper working port 23 is preferentially digested may be applied.

  Further, in the above configuration, the plurality of operation ports are not arranged vertically, but the first operation port corresponding to the upper operation port 23 and the second operation port corresponding to the lower operation port 24 are arranged on the left and right. It is good also as a structure arranged in parallel, It is good also as a structure in which these both operation ports were arranged in parallel diagonally. Furthermore, it is good also as a structure which arrange | positions both operation openings apart so that only the winning to the 1st operation opening or the winning to the 2nd operation opening can be aimed according to the operation mode of the launching handle 41.

  Further, in the above configuration, the main display unit 33 is acquired based on the first display area for displaying the result of the determination of whether or not the hold information is acquired based on the winning of the upper operating port 23 and the winning of the lower operating port 24. A second display area for displaying the result of the determination of whether or not the held information is correct may be provided. In this case, the change display of the pattern in the first display area is based on whether the hold information acquired based on the winning to the upper working port 23 is the target of the determination of the success or failure. Is started and a stop result corresponding to the determination of the success / failure is displayed, and the change display for one game time is ended. In addition, the change display of the pattern is displayed in the second display area based on whether the hold information acquired based on the winning to the lower working port 24 is the target of the determination of the success or failure. At the same time, the stop result corresponding to the determination of success / failure is displayed, and the display of the variation of one game time is ended.

  (21) A player in the case where the hold information related to winning in the upper working port 23 becomes a target of the success / failure determination and the case where the hold information related to winning in the lower working port 24 becomes a target of the success / failure determination. It is good also as a structure from which the profit which is obtained differs. In the configuration in which a plurality of operation ports are provided, the number of operation ports is not limited to two, and may be three or more. Moreover, it is good also as a structure provided with only one working port.

  (22) Display control based on a command output from the main control device 50 instead of a configuration in which the display control device 72 is controlled by the sound light control device 71 based on a command output from the main control device 50 The device 72 may be configured to control the sound light control device 71. Further, instead of the configuration in which the sound light control device 71 and the display control device 72 are separately provided, both the control devices may be provided as a single control device, and one of the functions of the two control devices may be provided. May be integrated into the main controller 50, and both functions of these two controllers may be integrated into the main controller 50. The configuration of commands output from the main control device 50 to the sound control device 71 and the configuration of commands output from the sound control device 71 to the display control device 72 are also arbitrary.

  (23) The device for executing the effect for the game times is not limited to the symbol display device 31, and the effect for the effect for the game times is executed by operating the decorative member provided in a movable manner. It is also possible to have a configuration in which an effect for game times is executed by turning on a predetermined light emitting unit, or a configuration in which an effect for game times is executed by a combination of all or a part of the above aspects. Good.

  (24) In each of the above-described embodiments, one game round in the main display unit 33 is started based on the determination of whether or not the main controller 50 has made a decision. However, the present invention is not limited to this. On the other hand, when the condition for determining whether or not the main control device 50 is determined is satisfied, the game times are started at a timing before the timing at which the determination is actually made, and the determination is made after that. It is good also as a structure by which the subsequent display mode, display continuation time, and stop result in the game time are determined. In this case, the main control device 50 first transmits a variation command when the game turn start timing is reached, and then determines whether or not the game is successful, determines the display duration, and determines the type. The configuration may be such that commands are transmitted, and the transmission timing of these time commands and type commands may be shifted.

  (25) In each of the above embodiments, the main display unit 33 is configured to display a stop result corresponding to each game result. However, instead of this, the main display unit 33 may be omitted. Even if it is a game result, it is good also as a structure by which a common stop result is displayed on the main display part 33, and since the stop result is displayed on the main display part 33 at random, as a result from the display of the main display part 33 It is good also as a structure which cannot identify which game result it is.

  (26) Other types of pachinko machines different from the above-described embodiments, such as pachinko machines in which an electric accessory is released a predetermined number of times when a game ball enters a specific area of a special device, The present invention can also be applied to a pachinko machine that generates a big hit when a ball enters, a pachinko machine equipped with another accessory, an arrangement ball machine, a sparrow ball, and the like.

  Also, a non-ball-type gaming machine, for example, a plurality of reels with a plurality of types of symbols attached in the circumferential direction, starts rotation of the reel by inserting a medal and operating a start lever, and a stop switch is operated. If a specific symbol or a combination of specific symbols is established on the effective line visible from the display window after the reel has stopped after a predetermined time has passed, a privilege such as paying out medals is given to the player The present invention can also be applied to a slot machine.

  In addition, the gaming machine main body that is supported by the outer frame so as to be openable and closable is provided with a storage unit and a take-in device. Thus, the present invention can also be applied to a gaming machine in which a pachinko machine and a slot machine are fused, which starts rotating the reel.

<Invention Group Extracted from Each Embodiment>
Hereinafter, the characteristics of the invention group extracted from each of the above-described embodiments will be described while showing effects and the like as necessary. In the following, for easy understanding, the corresponding configuration in each of the above embodiments is appropriately shown in parentheses, but is not limited to the specific configuration shown in parentheses.

<Feature A group>
Feature A1. First control means (sub MPU 82) that executes first control using information for first control (program and processing data, light emission data) that is at least one of the program and data;
Information storage means (common ROM 87) for storing in advance second control information (sound data) which is at least one of the program and data;
Second control means (sound output LSI 86) for executing second control using the information for second control stored in the information storage means;
With
At least a part of the information for the first control used in the first control means is stored in advance in the information storage means.

  According to the characteristic A1, the information storage means includes at least a part of the first control information used by the first control means as well as the second control information used by the second control means. Is memorized. Thus, by providing the information storage means that is commonly used for the first control means and the second control means, it is possible to increase the amount of information stored in advance while suppressing the number of storage means. Therefore, it is possible to optimize the configuration for storing information in advance.

Feature A2. A first path (bus B1) used when communication is performed between the first control unit and the second control unit;
A second path (bus B2) used when reading information from the information storage means in the second control means;
With
When the information for the first control stored in the information storage means is used by the first control means, the information for the first control is sent to the second control means via the second path. After being read, the gaming machine is read to the first control means via the first path.

  In the gaming machine of feature A2, various controls are executed by performing communication between the first control unit and the second control unit using the first route, and the second control unit uses the second route. The second control is executed using the second control information read from the information storage means. In this case, when transferring the first control information stored in the information storage means to the first control means, the first route and the second route are used. As a result, information is transferred from the information storage means to the first control means using the paths provided for executing various controls by the first control means and the second control means. As described above with respect to the feature A1, it is possible to achieve an excellent effect while simplifying the hardware configuration for transferring the data.

Feature A3. The first control means executes a predetermined process by using a first control program which is a part of the first control information, and a first part which is a part of the first control information. The operation of the first device (various light emitting units 44a to 44k) is controlled by executing the predetermined process using the data for 1 control,
The first control program is stored in advance in first control storage means (direct ROM 84) connected to the first control means,
The gaming machine according to Feature A2, wherein at least part of the first control data is stored in advance in the information storage means.

  In the gaming machine of feature A3, the first control means executes a predetermined process using a program and controls the operation of the first device using data for the first control. Various controls can be performed as the control. In this case, of the first control information used by the first control means, the program is stored in the first control storage means, and at least a part of the first control data is stored in the information. Stored in the means. As a result, the amount of data for the first control data that tends to be larger than that of the program, while ensuring the execution of the predetermined process by suppressing the complication of the configuration regarding the reading of the program. It is possible to achieve an increase in

Feature A4. The upstream instruction information (various commands) is transmitted to the first control means so as to control the progress of the game according to the operation result generated based on the operation by the player and to execute the control according to the operation result. Upstream control means (main control device 50),
The first control means executes a predetermined process (effect control process) by using a first control program that is a part of the first control information, thereby responding to the upstream instruction information. The control content is determined, and the first device is caused to perform an operation according to the determined control content by using the first control data that is a part of the first control information. Yes,
The first control program is stored in advance in first control storage means (direct ROM 84) connected to the first control means,
The gaming machine according to Feature A2, wherein at least part of the first control data is stored in advance in the information storage means.

  According to the feature A4, when the upstream instruction information is transmitted from the upstream control means, the first control means first executes a predetermined process corresponding to the upstream instruction information using the program, The operation of the first device is controlled using data in the process of execution. In other words, the first control program needs to be read out suddenly upon reception of the upstream instruction information, and the read timing is highly arbitrary. On the other hand, the first control data executes a predetermined process. Since it is used in the process, the arbitrary timing of reading is low. Furthermore, since the data for the first control is used on the assumption that the predetermined processing using the program is executed, the priority for reading is higher in the program for the first control, and the reading of the program is delayed. If it does, it will be in a processing waiting state. Under such circumstances, the first control program is stored in the first control storage means, and at least a part of the first control data is stored in the information storage means. As a result, the first control program can be read independently by the first control means regardless of the state of the second control means, while the data amount for the first control tends to be larger than that of the program. It is possible to satisfactorily increase the amount of data for data.

  Feature A5. A part of the first control data is stored in advance in the first control storage unit, and a part of the data is stored in the information storage unit in advance. A3 or A4 The gaming machine described in 1.

  According to the feature A5, since the data for the first control is distributed and stored in each of the storage means and the information storage means for the first control, it is possible to prevent the storage capacity of the information storage means from being extremely increased. However, an excellent effect as described above can be obtained.

  Feature A6. The second control means uses the information for the second control based on operation instruction information (sequence data and parameter data) transmitted from the first control means through the first route to the second device ( The gaming machine according to any one of features A2 to A5, which controls the operation of the speaker unit 45).

  According to the feature A6, the information is transferred from the information storage means to the first control means using the first route for transmitting the operation instruction information from the first control means to the second control means. As described above, the excellent effects as described above can be achieved while simplifying the hardware configuration for transferring the data.

  Note that the more specific configuration of the feature A6 is as follows: “The second control unit does not use a program based on information transmitted from the first control unit through the first route and A configuration in which the operation of the second device is controlled using the data for the second control, which is the information for the second control, is conceivable.

Feature A7. The second control means transmits information corresponding to the operation status of the second device through the first route,
The gaming machine according to Feature A6, wherein the first control means executes processing (processing in step S318) according to a reception result of information corresponding to the operation status.

  According to the feature A7, by using the first path provided so as to enable bidirectional communication in order to control the operation of the second device well and to make the first control means recognize the operation state. The information for the first control read from the information storage means can be transferred from the second control means to the first control means.

  Feature A8. The second control means has an operation instruction storage area for storing the operation instruction information (areas for parameters 111 to 114 and an area 115 for sequence data), and is read from the information storage means Second control storage means having a transmission waiting storage area (external read buffers 116 to 120) for storing the first control information until it is time to transmit to the first control means. A gaming machine according to Feature A6 or A7, comprising a register 92).

  According to the feature A8, the second control unit can individually store the operation instruction information received from the first control unit side and the first control information read from the information storage unit. Therefore, it becomes easy to adjust the transmission timing of the operation instruction information from the first control means and the read timing of the information for the first control from the information storage means.

  Feature A9. The second control unit includes a first state (first interference state) in which the operation instruction information is transmitted to the second control unit through the first route, and the first state read from the information storage unit. It further comprises selection means (selector 136) for selecting one of a second state (second interference state) in which control information is transmitted to the first control means through the first path. The gaming machine according to any one of features A6 to A8.

  According to the feature A9, using the same first route, the operation instruction information is transmitted to the second control unit and the first control information is transmitted to the first control unit. The hardware configuration relating to the transmission of information is simplified.

  Feature A10. The first control unit includes a switching unit (a function of executing the process of step S403 and the process of step S410 in the sub MPU 82) for switching the state selected by the selection unit. Game machines.

  According to feature A10, since the switching between the first state and the second state is performed by the first control unit with respect to the communication state of the first route, the transmission timing of the operation instruction information toward the second control unit side And the transmission timing of the first control information toward the first control means side can be easily adjusted.

Feature A11. The storage means for second control has a storage area (selector area 137) to be selected for storing information corresponding to the state selected by the selection means,
The switching means switches information of the storage area to be selected based on transmitting information to the second control means, and the situation where the first state is selected by the selection means and the first The gaming machine according to Feature A10, wherein the information of the storage area to be selected can be switched in any of the situations where the two states are selected.

  According to the feature A11, the first control unit only needs to switch the information of the storage area to be selected in the second control unit when switching the communication state of the first path. Reduction is achieved.

Feature A12. When the first control means reads the first control information stored in the information storage means, the first control means transmits read instruction information for the first control information to the second control means. (The function of executing the process of step S307 in the sub MPU 82)
When the state selected by the selection unit is switched from the first state to the second state, the switching unit executes the switching after the reading instruction information is completely transmitted by the reading instruction unit. The gaming machine according to Feature A10 or A11, characterized in that.

  According to the feature A12, when the communication state of the first route is switched from the first state to the second state, it is possible to ensure a long period during which the first state is maintained, and toward the second control means side. Time margin is set for setting the transmission timing of the operation instruction information.

Feature A13. The first control means includes
When reading the information for the first control stored in the information storage means, the read instruction means for transmitting the read instruction information for the first control information to the second control means (in step S307 in the sub MPU 82) Processing function), and
Transfer instruction means for transmitting, to the second control means, transfer instruction information for instructing transfer of the first control information read from the information storage means to the second control means to the first control means. A function of executing the process of step S408 in the sub MPU 82);
With
The second control unit executes completion information setting unit (step S607 in the data transfer unit 95) that sets completion information when reading of the information instructed by the read instruction information from the information storage unit is completed. Function)
The transfer instruction means executes the process of step S404 in the RWM 85 and the sub MPU 82 that starts measuring a predetermined transfer instruction waiting period after the read instruction information is transmitted from the read instruction means. Function), and when the measurement means completes measurement of the transfer instruction waiting period and the completion information is set, the transfer instruction information is transmitted to the second control means. The gaming machine according to any one of features A2 to A12.

  According to the feature A13, although the information corresponding to the read instruction from the first control means has not been read to the second control means, the completion information is set by the influence of electrical noise or the like. Even if the information is transmitted, the completion of the measurement of the transfer instruction waiting time on the first control means side is a condition for transmitting the transfer instruction information, so information from the second control means to the first control means Transfer does not start.

  Further, the reading of the information for the first control from the information storage means in the second control means is delayed from the schedule for some reason, and the reading of the information is not completed even though the transfer instruction waiting time has elapsed. However, since the completion information is set in the second control means is a condition for transmitting the transfer instruction information, the transfer of information from the second control means to the first control means is not started.

  As described above, according to this configuration, it is possible to accurately transfer the information for the first control stored in the information storage unit to the first control unit.

Feature A14. The second control means includes
Operation control means (sound data processing unit 93) for controlling the operation of the second device using the second control information;
Based on a transfer instruction from the first control unit, a transfer execution unit (data transfer unit) that reads the first control information stored in the information storage unit and transmits the read information to the first control unit. 95)
With
The operation control means can control the operation of the second device even during a period in which the information for the first control is transferred by the transfer execution means. The gaming machine according to any one of A13.

  According to the feature A14, since the second device can be operated even during the period in which the information for the first control stored in the information storage unit is transmitted, the first stored in the information storage unit It becomes easy to adjust the transfer timing of control information.

Feature A15. The operation control unit uses the second control information based on operation instruction information (sequence data and parameter data) transmitted from the first control unit through the first path. Control the operation,
The first control means, when the information for the first control is transferred by the transfer execution means, at least before the transmission of the information for the first control through the first path is started The gaming machine according to Feature A14, wherein the operation instruction information is transmitted in an amount of information necessary to control the operation of the second device until the timing after the transmission is completed.

  According to the feature A15, it is possible to cause the second device to perform an operation according to the operation instruction from the first control unit even during the period in which the information for the first control is transferred. In particular, since the operation instruction information including the necessary amount of information is transmitted in advance, there is no need to interrupt the transmission of the operation instruction information in the middle of the transfer period, and the transmission of the operation instruction information. As described above, the excellent effects as described above can be obtained while suppressing the complication of the configuration.

Feature A16. Of the second control information, information corresponding to a predetermined period (a series of sound data) used in the second control unit within a predetermined period is read out from the information storage unit by time division. Reading means (function for executing the processing of step S601 and step S602 in the data transfer unit 95);
Among the information for the first control stored in the information storage means, specific information (light emission data read at a time) is read from the information storage means, and one time division is performed in the time division readout means. Until the next time-division information is read after the information (sound data for one sample in the first embodiment, sound data for a plurality of samples in the second embodiment) is read Reading means for specific information for performing the reading (function for executing the processes of steps S603 and S604 in the data transfer unit 95);
The gaming machine according to any one of features A1 to A15, comprising:

  According to the feature A16, it is easy to adjust the timing for reading the second control information from the information storage unit and the timing for reading the first control information.

Feature A17. The information corresponding to the predetermined period includes three or more pieces of time-division information, and the time-division reading unit periodically reads out the time-division information every specific period.
The gaming machine according to Feature A16, wherein the reading means for specific information reads the specific information from the information storage means within the range of the specific period.

  According to the feature A17, the second control information is divided and transmitted as time-division information. If the reading is delayed, there is a possibility that the second control in the second control means cannot be performed satisfactorily. high. In this case, since the specific information related to the information for the first control is read while not hindering the periodic reading of the time-division information, the description has already been made while the second control can be executed satisfactorily. It is possible to achieve such excellent effects.

Feature A18. The second control information is sound data sampled and quantized at a predetermined sampling frequency,
The second control means creates digital musical sound data using the sound data, and outputs a predetermined sound from the sound output means using the created digital musical sound data,
The game machine according to Feature A16 or A17, wherein the time division information is sound data of a predetermined number of samples.

  According to the feature A18, the sound data converted into a digital signal is read out in a time division manner, and the specific information related to the information for the first control is read out using the configuration read out in the time division manner. Thereby, it is possible to effectively use the free time related to the reading of the sound data and achieve the excellent effects as described above.

  Feature A19. The gaming machine according to any one of features A1 to A18, wherein the first control means and the second control means are provided on the same control board (sound light control board 81).

  According to the feature A19, it is possible to achieve an excellent effect as described above while suppressing the influence of noise during transfer.

  The invention of the above-described feature group A is effective for the following problems.

  As a kind of gaming machine, a pachinko gaming machine, a slot machine, and the like are known. These gaming machines are equipped with general-purpose control elements such as a CPU and read-only storage elements such as a ROM, and a series of processes are executed by the general-purpose control elements according to a program read from the read-only storage elements. The game is controlled. It is also known that a general-purpose control element, a read-only memory element, etc. are integrated into one chip.

  In the above gaming machine, in order to reduce the processing load on one general-purpose control element, there is a configuration with a separate general-purpose control element or a configuration with a dedicated control element provided as a dedicated circuit for executing a predetermined process. Are known.

  As an example of the former configuration, the main control device for overall management of the game is provided with one general-purpose control element, and the sub-control device for controlling effects using a speaker, a lamp, a display device, and the like. A configuration in which one general-purpose control element is provided is known. In this case, each of the main control device and the sub-control device is provided with a read-only storage element, and the general-purpose control element of the main control device executes main control based on the program read from the corresponding storage element, and The general-purpose control element of the control device controls the execution of effects based on the program read from the corresponding storage element and the data input from the main control device.

  Further, as an example of the latter configuration, a control device for controlling an effect using a speaker or the like is provided with one general-purpose control element, and from the speaker by performing sound output control using sound data. A configuration in which a dedicated control element that outputs a predetermined sound is provided is known. In this case, each of the general-purpose control element and the dedicated control element is provided with a read-only storage element, and the general-purpose control element determines the output content of the sound for a predetermined period based on the program read from the corresponding storage element. In addition, the dedicated control element executes control for outputting sound according to the command from the general-purpose control element using the sound data read from the corresponding storage element.

  Note that such control using the general-purpose control element and the dedicated control element is used not only for sound output control from a speaker but also for image display control in a display device such as a liquid crystal display device.

  Here, in the above gaming machine, it is necessary to increase the degree of attention to the game, and as one of the techniques, a technique for diversifying or complicating the game contents can be considered. However, when the capacity of programs and control data increases to adopt such a method, if the number and capacity of read-only storage elements are simply increased, the cost increases accordingly. End up. Even if the capacity of the program and control data does not increase, it is preferable to reduce the number or capacity of read-only storage elements in order to reduce the cost of the gaming machine.

<Feature B group>
Feature B1. First control means (sub MPU 82) that executes first control using information for first control (program and processing data, light emission data) that is at least one of the program and data;
Second control means (sound output LSI 86) for executing second control using information (sound data) for second control which is at least one of a program and data;
A specific path (bus B1) used when communication is performed between the first control unit and the second control unit;
Information storage means (common ROM 87) for storing in advance at least part of the first control information;
Transfer execution means (data transfer unit 95) for transmitting the first control information stored in the information storage means to the first control means through the specific path;
A gaming machine characterized by comprising:

  According to the feature B1, information for the first control is transmitted to the first control means side through a specific route used when communication is performed between the first control means and the second control means. As a result, the specific route can be shared, and it is possible to satisfactorily increase the capacity of information used by the first control means.

Feature B2. The first control means executes a predetermined process by using a first control program which is a part of the first control information, and a first part which is a part of the first control information. The operation of the first device (various light emitting units 44a to 44k) is controlled by executing the predetermined process using the data for 1 control,
The first control program is stored in advance in first control storage means (direct ROM 84) connected to the first control means,
The gaming machine according to Feature B1, wherein at least part of the first control data is stored in advance in the information storage means.

  In the gaming machine of feature B2, the first control means executes a predetermined process using a program and controls the operation of the first device using the first control data. Various controls can be performed as the control. In this case, of the first control information used by the first control means, the program is stored in the first control storage means, and at least a part of the first control data is stored in the information. Stored in the means. As a result, the amount of data for the first control data that tends to be larger than that of the program, while ensuring the execution of the predetermined process by suppressing the complication of the configuration regarding the reading of the program. It is possible to achieve an increase in

Feature B3. The upstream instruction information (various commands) is transmitted to the first control means so as to control the progress of the game according to the operation result generated based on the operation by the player and to execute the control according to the operation result. Upstream control means (main control device 50),
The first control means executes a predetermined process (effect control process) by using a first control program that is a part of the first control information, thereby responding to the upstream instruction information. The control content is determined, and the first device is caused to perform an operation according to the determined control content by using the first control data that is a part of the first control information. Yes,
The first control program is stored in advance in first control storage means (direct ROM 84) connected to the first control means,
The gaming machine according to Feature B1, wherein at least part of the first control data is stored in advance in the information storage means.

  According to the feature B3, when the upstream instruction information is transmitted from the upstream control means, the first control means first executes a predetermined process corresponding to the upstream instruction information using the program, The operation of the first device is controlled using data in the process execution process. In other words, the first control program needs to be read out suddenly upon reception of the upstream instruction information, and the read timing is highly arbitrary. On the other hand, the first control data executes a predetermined process. Since it is used in the process, the arbitrary timing of reading is low. Furthermore, since the data for the first control is used on the assumption that the predetermined processing using the program is executed, the priority for reading is higher in the program for the first control, and the reading of the program is delayed. If it does, it will be in a processing waiting state. Under such circumstances, the first control program is stored in the first control storage means, and at least a part of the first control data is stored in the information storage means. As a result, the first control program can be read independently by the first control means regardless of the state of the second control means, while the data amount for the first control tends to be larger than that of the program. It is possible to satisfactorily increase the amount of data for data.

  Feature B4. A part of the first control data is stored in advance in the first control storage unit and a part of the data is stored in the information storage unit in advance B2 or B3 The gaming machine described in 1.

  According to the feature B4, since the data for the first control is distributed and stored in each of the storage means for the first control and the information storage means, it is possible to prevent the storage capacity of the information storage means from being extremely increased. However, an excellent effect as described above can be obtained.

  Feature B5. The second control means controls the operation of the second device (speaker unit 45) based on operation instruction information (sequence data and parameter data) transmitted from the first control means through the specific route. The gaming machine according to any one of features B1 to B4.

  According to the feature B5, since the information is transferred from the information storage unit to the first control unit using the specific route for transmitting the operation instruction information from the first control unit to the second control unit, the information is While simplifying the hardware configuration for transferring, it is possible to achieve the excellent effects as described above.

  Note that the more specific configuration of the feature B5 is as follows: “The second control unit performs second control without using a program based on information transmitted from the first control unit through the specific route. For example, a configuration in which the operation of the second device is controlled using the data for use "is conceivable.

Feature B6. The second control means transmits information corresponding to the operation status of the second device through the specific route,
The gaming machine according to Feature B5, wherein the first control means executes processing (processing in step S318) according to a reception result of information corresponding to the operation status.

  According to the feature B6, using a specific route provided to enable bidirectional communication in order to control the operation of the second device well and to make the first control means recognize the operation status, The first control information read from the information storage means can be transferred from the second control means to the first control means.

  Feature B7. The second control means has an operation instruction storage area for storing the operation instruction information (areas for parameters 111 to 114 and an area 115 for sequence data), and is read from the information storage means Second control having a transmission waiting storage area (external read buffers 116 to 120) for storing the information for the first control until the timing at which the transfer execution means transmits to the first control means. A gaming machine according to Feature B5 or B6, further comprising a storage means (register 92).

  According to the feature B7, the second control unit can individually store the operation instruction information received from the first control unit side and the first control information read from the information storage unit. Therefore, it becomes easy to adjust the transmission timing of the operation instruction information from the first control means and the read timing of the information for the first control from the information storage means.

  Feature B8. The second control means includes a first state (first interference state) in which the operation instruction information is transmitted to the second control means through the specific path, and the first control read from the information storage means. Selecting means (selector 136) for selecting either the second state (second interference state) in which the information for transmission is transmitted to the first control means through the specific path by the transfer execution means The gaming machine according to any one of features B5 to B7.

  According to the feature B8, the operation information is transmitted to the second control unit and the information for the first control is transmitted to the first control unit using the same specific route. Simplification of the hardware configuration related to the transmission of.

  Feature B9. The first control unit includes a switching unit (a function of executing the process of step S403 and the process of step S410 in the sub MPU 82) for switching the state selected by the selection unit. Game machines.

  According to the feature B9, the first control unit switches between the first state and the second state for the communication state of the specific route, so that the transmission timing of the operation instruction information toward the second control unit side It becomes easy to adjust the transmission timing of the information for the first control toward the first control means side.

Feature B10. The storage means for second control has a storage area (selector area 137) to be selected for storing information corresponding to the state selected by the selection means,
The switching means switches information of the storage area to be selected based on transmitting information to the second control means, and the situation where the first state is selected by the selection means and the first The gaming machine according to Feature B9, wherein the information in the storage area to be selected can be switched in any of the situations where the two states are selected.

  According to the feature B10, since the first control unit only needs to switch the information of the storage area to be selected in the second control unit when switching the communication state of the specific path, the control load of the first control unit is reduced with respect to the switching. Is planned.

Feature B11. When the first control means reads the first control information stored in the information storage means, the first control means transmits read instruction information for the first control information to the second control means. (The function of executing the process of step S307 in the sub MPU 82)
When the state selected by the selection unit is switched from the first state to the second state, the switching unit executes the switching after the reading instruction information is completely transmitted by the reading instruction unit. A gaming machine according to Feature B9 or B10.

  According to the feature B11, when the communication state of the specific route is switched from the first state to the second state, it is possible to secure a long period during which the first state is maintained, which is directed to the second control means side. There is a time margin for setting the operation instruction information transmission timing.

Feature B12. The first control means includes
When reading the information for the first control stored in the information storage means, the read instruction means for transmitting the read instruction information for the first control information to the second control means (in step S307 in the sub MPU 82) Processing function), and
Transfer instruction means for transmitting transfer instruction information for instructing transfer of the first control information read from the information storage means to the second control means to the first control means. The function of executing the process of step S408 in the MPU 82);
With
The transfer execution means executes completion information setting means (step S607 in the data transfer unit 95) that sets completion information when reading of the information instructed by the read instruction information from the information storage means is completed. Function)
The transfer instruction means executes the process of step S404 in the RWM 85 and the sub MPU 82 that starts measuring a predetermined transfer instruction waiting period after the read instruction information is transmitted from the read instruction means. Function), and when the measurement means completes measurement of the transfer instruction wait period and the completion information is set, the transfer instruction information is transmitted to the transfer execution means. The gaming machine according to any one of features B1 to B11.

  According to the feature B12, although the information corresponding to the read instruction from the first control unit has not been read to the second control unit, the completion information is set due to the influence of electrical noise or the like. Even if the information is transmitted, the completion of the measurement of the transfer instruction waiting time on the first control means side is a condition for transmitting the transfer instruction information, so information from the second control means to the first control means Transfer does not start.

  Further, the reading of the information for the first control from the information storage means in the second control means is delayed from the schedule for some reason, and the reading of the information is not completed even though the transfer instruction waiting time has elapsed. However, since the completion information is set in the second control means is a condition for transmitting the transfer instruction information, the transfer of information from the second control means to the first control means is not started.

  As described above, according to this configuration, it is possible to accurately transfer the information for the first control stored in the information storage unit to the first control unit.

Feature B13. The second control means includes the transfer execution means and operation control means (sound data processing unit 93) for controlling the operation of the second device using the second control information. ,
The operation control means is capable of controlling the operation of the second device even during a period in which the transfer information is transferred by the transfer execution means. The gaming machine according to any one of B12.

  According to the feature B13, since the second device can be operated even during the period in which the information for the first control stored in the information storage unit is transmitted, the first stored in the information storage unit It becomes easy to adjust the transfer timing of control information.

Feature B14. The operation control unit uses the second control information based on operation instruction information (sequence data and parameter data) transmitted from the first control unit through the specific route. Control
When the transfer execution unit transfers the first control information, the first control unit transmits the first control information at least before the transmission of the first control information through the specific path is started. The gaming machine according to Feature B13, wherein the operation instruction information is transmitted in an amount of information necessary to control the operation of the second device until the timing after the completion of.

  According to the feature B14, it is possible to cause the second device to perform an operation according to the operation instruction from the first control unit even during the period in which the information for the first control is transferred. In particular, since the operation instruction information including the necessary amount of information is transmitted in advance, there is no need to interrupt the transmission of the operation instruction information in the middle of the transfer period, and the transmission of the operation instruction information. As described above, the excellent effects as described above can be obtained while suppressing the complication of the configuration.

  The invention of the above-mentioned feature B group is effective for the following problems.

  As a kind of gaming machine, a pachinko gaming machine, a slot machine, and the like are known. These gaming machines are equipped with general-purpose control elements such as a CPU and read-only storage elements such as a ROM, and a series of processes are executed by the general-purpose control elements according to a program read from the read-only storage elements. The game is controlled. It is also known that a general-purpose control element, a memory element for reading, etc. are integrated into one chip and provided as one control element.

  In the above gaming machine, in order to reduce the processing load on one general-purpose control element, there is a configuration with a separate general-purpose control element or a configuration with a dedicated control element provided as a dedicated circuit for executing a predetermined process. Are known.

  As an example of the former configuration, the main control device for overall management of the game is provided with one general-purpose control element, and the sub-control device for controlling effects using a speaker, a lamp, a display device, and the like. A configuration in which one general-purpose control element is provided is known. In this case, each of the main control device and the sub-control device is provided with a read-only storage element, and the general-purpose control element of the main control device executes main control based on the program read from the corresponding storage element, and The general-purpose control element of the control device controls the execution of effects based on the program read from the corresponding storage element and the data input from the main control device.

  Further, as an example of the latter configuration, a control device for controlling an effect using a speaker or the like is provided with one general-purpose control element, and from the speaker by performing sound output control using sound data. A configuration in which a dedicated control element that outputs a predetermined sound is provided is known. In this case, each of the general-purpose control element and the dedicated control element is provided with a read-only storage element, and the general-purpose control element determines the output content of the sound for a predetermined period based on the program read from the corresponding storage element. In addition, the dedicated control element executes control for outputting sound according to the command from the general-purpose control element using the sound data read from the corresponding storage element.

  Note that such control using the general-purpose control element and the dedicated control element is used in image display control in a display device such as a liquid crystal display device in addition to sound output control from a speaker.

  Here, in order to increase the capacity of the program or control data used in the predetermined control element, a storage element is not newly integrated in the predetermined control element, but separately from the predetermined control element. It is conceivable to store the increased program or control data in the provided storage element. In this case, the capacity can be increased without significantly changing the design of the predetermined control element. However, when the number of input terminals of a predetermined control element is increased in order to input a signal from the storage element provided separately, the design needs to be changed as the number of input terminals increases.

<Feature C group>
Feature C1. A control unit (sub MPU 82) on the instruction output side and a control unit (sound output LSI 86) on the instruction reception side are provided, and specific control (speaker unit) is performed by the control unit on the instruction reception side based on an instruction from the control unit on the instruction output side In the gaming machine in which the sound output control from 45) is executed,
The control means on the instruction receiving side is:
Receiving side storage means (register 92) accessed via the specific path (bus B1) by the instructing side control means;
First execution means (sound data processing unit 93) for executing the first specific control;
Second execution means (a function of reading and transferring the light emission data in the data transfer unit 95) for executing the second specific control in order to control an object different from the case of the first specific control;
A first interference state in which the instruction-side control means accesses the receiving-side storage means in order to cause the first execution means to execute the first specific control; and Selecting means (selector 136) for selecting an interference state to be executed from a plurality of interference states including a second interference state in which the instructing-side control means accesses the receiving-side storage means in order to execute
With
The instructing-side control means includes a switching means for switching the interference state selected by the selection means (function for executing the processing of step S403 and the processing of step S410 in the sub MPU 82). Machine.

  According to the feature C1, the control unit on the instruction receiving side executes not only the first specific control but also the second specific control on the basis of an instruction from the control unit on the instruction issuing side. It becomes possible to make it complicated or complicated. In this case, the interference state by the control unit on the instruction side is selected by the selection unit, and when the receiving side storage unit is accessed to execute the first specific control and the second specific control is executed. In either case of accessing the receiving side storage means, the instruction side control means uses the same specific route. As a result, it is possible to achieve the excellent effects as described above while simplifying the hardware configuration related to access by the control means on the instruction side.

  Furthermore, since the switching of the interference state is performed by the control unit on the instruction side, adjustment is made between the access timing for executing the first specific control and the access timing for executing the second specific control. It becomes easy.

  As described above, it is possible to give a plurality of functions to the control unit on the instruction receiving side while improving the configuration related to the communication between the control unit on the instruction issuing side and the control unit on the instruction receiving side.

Feature C2. The receiving side storage means has a first storage area (areas for each parameter 111 to 114 and an area 115 for sequence data) that is accessed by the control means on the instructing side in the first interference state. A second storage area (external read buffers 116 to 120) accessed by the control unit on the instruction side in the second interference state;
The selecting means sets the storage area to be accessed by the instructing control means via the specific path as the first storage area when the first interference state is selected, and The gaming machine according to Feature C1, wherein the gaming machine is the second storage area when the second interference state is selected.

  According to the feature C2, the first storage area accessed by the instructing control unit in the first interference state and the second storage area accessed by the instructing control unit in the second interference state are individually Since it is provided, it is easy to adjust the timing at which the instruction-side control means accesses to execute the first specific control and the timing at which the instruction-side control means accesses to execute the second specific control. Become.

Feature C3. The receiving-side storage means has a selection target storage area (selector area 137) for storing information corresponding to the interference state selected by the selection means,
The switching means switches information in the storage area to be selected based on transmitting information to the control means on the instruction receiving side, and the first interference state is selected by the selection means. The gaming machine according to feature C1 or C2, wherein the information of the storage area to be selected can be switched in any of the situation and the situation in which the second interference state is selected.

  According to the feature C3, since the control unit on the instruction side only needs to switch the information on the storage area to be selected in the control unit on the instruction receiving side when switching the interference state, the processing of the control unit on the instruction side regarding the switching The load can be reduced.

Feature C4. The second interference state is a state in which the control unit on the instruction side reads the information stored in the receiving side storage unit by accessing the receiving side storage unit,
When the information stored in the receiving storage means is read, the instruction sending control means transmits read instruction information of the information to the instruction receiving control means (step S307 in the sub MPU 82). Function to execute the processing of)
When the state selected by the selection unit is switched from the first interference state to the second interference state, the switching unit executes the switching after transmission of the read instruction information by the read instruction unit is completed. The gaming machine according to any one of features C1 to C3, characterized in that:

  According to the feature C4, when the interference state is switched from the first interference state to the second interference state, it is possible to ensure a long period during which the first interference state is maintained, and the first interference state In this case, there is a time margin for access by the control means on the instructing side.

  Feature C5. The first execution means is configured to control the operation of a predetermined device (speaker unit 45) as the first specific control, and even if the interference state is the second interference state, The gaming machine according to any one of features C1 to C4, wherein the operation can be controlled.

  According to the feature C5, since it is possible to operate a predetermined device even in the second interference state, it is easy to adjust the setting timing of the second interference state.

Feature C6. The first execution means controls the operation of a predetermined device (speaker unit 45) based on the operation instruction information transmitted from the instruction-side control means.
When the control means on the instructing side sets the second interference state, before switching to the second interference state, the predetermined device until the timing after the end of the second interference state to be switched. The game machine according to any one of features C1 to C5, wherein the operation instruction information is transmitted in an amount of information necessary to control the operation of the game.

  According to the feature C6, even in the second interference state, it is possible to cause a predetermined device to perform an operation corresponding to the operation instruction from the control unit on the instruction output side. In particular, since the operation instruction information including the necessary amount of information is transmitted in advance, there is no need to interrupt the transmission of the operation instruction information in the middle of the second interference state. An excellent effect as described above can be obtained while suppressing the complexity of the configuration.

  Feature C7. The control unit on the instruction issuing side executes predetermined processing using a program, while the control unit on the instruction receiving side performs an instruction from the control unit on the instruction issuing side without using a program. The gaming machine according to any one of the features C1 to C6, wherein the first specific control and the second specific control are executed based on the characteristics.

  According to the feature C7, in the configuration in which the general-purpose control element is provided as the instruction-side control unit and the dedicated control element is provided as the instruction-receiving side control unit, the excellent effects as described above can be achieved.

  The feature C group invention is effective for the following problems.

  As a kind of gaming machine, a pachinko gaming machine, a slot machine, and the like are known. These gaming machines are known to have a control means on the instruction output side and a control means on the instruction reception side in order to reduce the processing load on the single control means.

  As an example of the configuration, a general-purpose control element that executes processing for determining the content of the effect is provided as a control unit on the instruction side in the control device for controlling the effect using a speaker or the like, As a control means on the instruction receiving side, a configuration is known in which a dedicated control element that outputs a predetermined sound from a speaker based on an instruction received from a general-purpose control element is known.

  In this case, each of the general-purpose control element and the dedicated control element is provided with a read-only storage element, and the general-purpose control element determines the output content of the sound for a predetermined period based on the program read from the corresponding storage element. In addition, the dedicated control element executes control for outputting sound according to an instruction from the general-purpose control element using sound data read from the corresponding storage element.

  Note that such control using the general-purpose control element and the dedicated control element is used in image display control in a display device such as a liquid crystal display device in addition to sound output control from a speaker.

  Here, in the above gaming machine, it is necessary to increase the degree of attention to the game. As one of the techniques, there is a technique for diversifying or complicating the game contents. It is conceivable to give a plurality of functions to the control means. When a plurality of functions are added to the control unit on the instruction receiving side, information corresponding to each function is communicated between the control unit on the instruction receiving side and the control unit on the instruction issuing side. . In this case, if the number of signal paths between the instruction-side control means and the instruction-receiving-side control means is increased with the increase of the function, the existing hardware configuration related to signal communication is greatly changed. The necessity arises and it is not preferable.

<Feature D group>
Feature D1. Information storage means (common ROM 87) for storing in advance information that is at least one of a program and data;
The first control information (light emission data) is read from the information storage means via a predetermined path (bus B2), and second control information (sound data) different from the first control information is Read means for reading through a predetermined path (function of reading data from the common ROM 87 in the data transfer unit 95);
First control means (sub-MPU 82) for executing first control (light emission control based on the processing in steps S309 to S311) using the first control information read by the reading means;
Second control means (sound output LSI 86) for executing second control (sound output control based on the processing in steps S503 to S507) using the second control information read by the reading means; ,
With
The reading means includes
Of the second control information, information corresponding to a predetermined period (a series of sound data) used in the second control unit within a predetermined period is read out from the information storage unit by time division. Reading means (function for executing the processing of step S601 and step S602 in the data transfer unit 95);
Specific information (emission data read at a time) that is at least a part of the first control information stored in the information storage unit is stored in the time-division readout unit. Reads after information (sound data for one sample in the first embodiment, sound data for a plurality of samples in the second embodiment) is read until the next time division information is read Reading means for specific information (function to execute the processing of step S603 and step S604 in the data transfer unit 95),
A gaming machine characterized by comprising:

  According to the feature D1, since the information storage means stores the information for the first control and the information for the second control in advance, compared with the structure for storing each information in a different storage means, It is possible to increase the amount of information stored in advance while suppressing the number.

  Further, the information for the second control is read out in a time division manner, and the information for the first control is read out while being read out in the time division manner. Thereby, in the configuration in which the information for the first control and the information for the second control are stored in advance in the information storage means, the timing for reading the information for the first control from the information storage means, and the second control information It becomes easy to adjust the timing for reading information.

  As described above, it is possible to optimize the configuration for storing information in advance.

  Feature D2. The second control means executes the second control by using time-division information that has already been read while the specific information is being read by the reading means for specific information. The gaming machine according to Feature D1, wherein the gaming machine is a product.

  According to the feature D2, it is possible to achieve an excellent effect as described above while ensuring continuous execution of the second control in the second control means.

Feature D3. The information corresponding to the predetermined period includes three or more pieces of time-division information, and the time-division reading unit periodically reads out the time-division information every specific period.
The gaming machine according to feature D1 or D2, wherein the reading unit for specific information reads out the specific information from the information storage unit within the range of the specific period.

  According to the feature D3, since the information for the second control is divided and transmitted as time division information, if the reading is delayed, there is a possibility that the second control in the second control means cannot be performed satisfactorily. high. In this case, since the specific information related to the information for the first control is read while not hindering the periodic reading of the time-division information, the description has already been made while the second control can be executed satisfactorily. It is possible to achieve such excellent effects.

Feature D4. The second control information is sound data sampled and quantized at a predetermined sampling frequency,
The second control means creates digital musical sound data using the sound data, and outputs a predetermined sound from the sound output means using the created digital musical sound data,
The gaming machine according to any one of features D1 to D3, wherein the time division information is sound data of a predetermined number of samples.

  According to the feature D4, the sound data converted into a digital signal is read out in a time division manner, and the specific information related to the information for the first control is read out using the configuration read out in the time division manner. Thereby, it is possible to effectively use the free time related to the reading of the sound data and achieve the excellent effects as described above.

  Feature D5. The game machine according to Feature D4, wherein the time division information is sound data for one sample.

  According to the feature D5, a period in which the sound data is not read out easily occurs, and the timing for reading out the information for the first control can be easily adjusted.

  Feature D6. The game machine according to Feature D4, wherein the time division information is sound data for a plurality of samples, and the number of samples included in each time division information is the same.

  According to the feature D6, it is possible to reduce the amount of data attached when data is read, compared to a configuration in which sound data is read for each sample. In this case, since the number of samples included in each time-division information is the same, it becomes possible to periodically read out the time-division information, and a certain free time in any period between time divisions Will occur. Therefore, it is not necessary to adjust the amount of information regardless of which timing is used to read the first control information.

Feature D7. Information storage means (common ROM 87) for preliminarily storing data used for controlling predetermined devices (various light emitting units 44a to 44k, speaker unit 45);
The first control data (light emission data) is read from the information storage means via a predetermined path (bus B2), and the second control data (the control target device is different from the first control data) Reading means (sound data) for reading through the predetermined path (function of reading data from the common ROM 87 in the data transfer unit 95);
First control means (sub MPU 82) for controlling the operation of the first device (various light emitting units 44a to 44k) using the first control data read by the reading means;
Second control means (sound output LSI 86) for controlling the operation of the second device (speaker unit 45) using the second control data read by the reading means;
With
The reading means includes
Of the second control data, data corresponding to a predetermined period (a series of sound data) used within a predetermined period in the second control means is read out in time division from the information storage means. Reading means (function for executing the processing of step S601 and step S602 in the data transfer unit 95);
Specific data (emission data read at a time) that is at least a part of the first control data stored in the information storage unit is converted into one time-division by the time-division reading unit. Data is read out after the data is read (one sample of sound data in the first embodiment, multiple samples of sound data in the second embodiment) until the next time-division data is read out Reading means for specific data (function to execute the processing of step S603 and step S604 in the data transfer unit 95),
A gaming machine characterized by comprising:

  According to the feature D7, since the data for the first control and the data for the second control are stored in advance in the information storage unit, compared to the configuration in which each data is stored in a different storage unit, It is possible to increase the amount of information stored in advance while suppressing the number.

  Further, the second control data is read out in a time division manner, and the first control data is read out using the time during which the data is read out in the time division manner. Thus, in the configuration in which the first control data and the second control data are stored in advance in the information storage unit, the timing for reading the first control data from the information storage unit, and the second control data It becomes easy to adjust the timing for reading data.

  As described above, it is possible to optimize the configuration for storing data in advance.

Feature D8. Information storage means (common ROM 87) for storing in advance information that is at least one of a program and data;
The first control information (light emission data) is read from the information storage means via a predetermined path (bus B2), and second control information (sound data) different from the first control information is Read means for reading through a predetermined path (function of reading data from the common ROM 87 in the data transfer unit 95);
First control means (sub-MPU 82) for executing first control (light emission control based on the processing in steps S309 to S311) using the first control information read by the reading means;
Second control means (sound output LSI 86) for executing second control (sound output control based on the processing in steps S503 to S507) using the second control information read by the reading means; ,
With
The reading means includes
Divided readout for reading out information corresponding to a predetermined period (a series of sound data) used in the second control unit within a predetermined period of time from among the information for the second control and reading out the information from the information storage unit Means (function for executing the processing of step S601 and step S602 in the data transfer unit 95);
Specific information (emission data read at a time) that is at least part of the first control information stored in the information storage means is stored in the division reading means as one division information ( For specific information to be read from when the sound data for one sample is read in the first embodiment and the sound data for a plurality of samples in the second embodiment until the next division information is read Reading means (function of executing the processing of step S603 and step S604 in the data transfer unit 95),
A gaming machine characterized by comprising:

  According to the feature D8, since the information storage means stores the information for the first control and the information for the second control in advance, compared with the structure in which each information is stored in a different storage means, It is possible to increase the amount of information stored in advance while suppressing the number.

  Further, the information for the second control is read out in a divided manner, and the information for the first control is read out while being read out in the divided portion. Thereby, in the configuration in which the information for the first control and the information for the second control are stored in advance in the information storage means, the timing for reading the information for the first control from the information storage means, and the second control information It becomes easy to adjust the timing for reading information.

  As described above, it is possible to optimize the configuration for storing information in advance.

  The invention of the above-described feature group D is effective for the following problems.

  As a kind of gaming machine, a pachinko gaming machine, a slot machine, and the like are known. These gaming machines are equipped with general-purpose control elements such as a CPU and read-only storage elements such as a ROM, and a series of processes are executed by the general-purpose control elements according to a program read from the read-only storage elements. The game is controlled. It is also known that a general-purpose control element, a read-only memory element, etc. are integrated into one chip.

  In the above gaming machine, in order to reduce the processing load on one general-purpose control element, there is a configuration with a separate general-purpose control element or a configuration with a dedicated control element provided as a dedicated circuit for executing a predetermined process. Are known.

  As an example of the former configuration, the main control device for overall management of the game is provided with one general-purpose control element, and the sub-control device for controlling effects using a speaker, a lamp, a display device, and the like. A configuration in which one general-purpose control element is provided is known. In this case, each of the main control device and the sub-control device is provided with a read-only storage element, and the general-purpose control element of the main control device executes main control based on the program read from the corresponding storage element, and The general-purpose control element of the control device controls the execution of effects based on the program read from the corresponding storage element and the data input from the main control device.

  Further, as an example of the latter configuration, a control device for controlling an effect using a speaker or the like is provided with one general-purpose control element, and from the speaker by performing sound output control using sound data. A configuration in which a dedicated control element that outputs a predetermined sound is provided is known. In this case, each of the general-purpose control element and the dedicated control element is provided with a read-only storage element, and the general-purpose control element determines the output content of the sound for a predetermined period based on the program read from the corresponding storage element. In addition, the dedicated control element executes control for outputting sound according to the command from the general-purpose control element using the sound data read from the corresponding storage element.

  Note that such control using the general-purpose control element and the dedicated control element is used in image display control in a display device such as a liquid crystal display device in addition to sound output control from a speaker.

  Here, in the above gaming machine, it is necessary to increase the degree of attention to the game, and as one of the techniques, a technique for diversifying or complicating the game contents can be considered. However, when the capacity of programs and control data increases to adopt such a method, if the number and capacity of read-only storage elements are simply increased, the cost increases accordingly. End up. Even if the capacity of the program and control data does not increase, it is preferable to reduce the number or capacity of read-only storage elements in order to reduce the cost of the gaming machine.

  The basic configuration of the gaming machine to which the above features can be applied is shown below.

  Pachinko gaming machine: operation means operated by a player, game ball launching means for launching a game ball based on the operation of the operation means, a ball path for guiding the launched game ball to a predetermined game area, and a game A gaming machine that includes each gaming component arranged in an area, and gives a bonus to a player when a gaming ball passes through a predetermined passing portion of each gaming component.

  Revolving type gaming machine such as a slot machine: equipped with a picture display device for variably displaying a plurality of pictures, variably starting display of the plurality of pictures due to the operation of the start operation means, and due to the operation of the stop operation means In addition, the game machine is configured such that the variable display of the plurality of patterns is stopped when a predetermined time elapses and a privilege is given to the player according to the pattern after the stop.

  DESCRIPTION OF SYMBOLS 10 ... Pachinko machine, 44a-44k ... Various light emission parts as 1st apparatus, 45 ... Speaker part as 2nd apparatus or predetermined | prescribed apparatus, 50 ... Main control apparatus as upstream control means, 82 ... 1st control means Or sub-MPU as control means on the instruction output side, 84... ROM for direct use as storage means for first control, 85... RWM, 86... Sound output LSI as control means on the second control means or instruction receiving side, 87: Common ROM as information storage means, 92: Register as storage means for second control or receiving side storage means, 93: Sound data processing unit as operation control means or first execution means, 95: Transfer execution Data transfer unit as means or second execution means, 111 to 114... Operation instruction storage area or parameter area constituting the first storage area, 115... Operation instruction storage area Is an area for sequence data constituting the first storage area, 116 to 120... An external read buffer constituting the storage area for waiting for transmission or the second storage area, 136... Selector as a selection means, 137. A selector area as a storage area, B1... A bus as a first route or a specific route, B2... A bus as a second route or a predetermined route.

Claims (2)

First control means for performing first control using information for first control which is at least one of a program and data;
Second control means for executing second control using information for second control which is at least one of a program and data;
A specific route used when communication is performed between the first control unit and the second control unit;
Information storage means for storing in advance at least part of the information for the first control;
Transfer execution means for transmitting the first control information stored in the information storage means to the first control means through the specific path;
With
The information storage means is electrically connected to the second control means;
The second control means includes
The transfer execution means;
Read storage means for storing information read from the information storage means;
Means for controlling the operation of a predetermined device based on operation instruction information transmitted from the first control means through the specific route as the second control;
With
The transfer execution means transmits the information read from the information storage means and stored in the read storage means to the first control means through the specific path, whereby the transfer storage means stores the information stored in the information storage means. 1 control information is transmitted to the first control means ,
The first control unit stores the information for the first control information when the information for the first control stored in the information storage unit is transmitted to the first control unit by the transfer execution unit. The operation necessary for controlling the operation of the predetermined device in the second control means until the completion of transmission of the information for the first control to the first control means before the reading from the means is started. A gaming machine comprising means for transmitting instruction information to the second control means . The game machine according to claim 1, wherein a game is played using a game medium.

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