JP6051959B2 - Communication method and communication apparatus - Google Patents

Description

  The present invention relates to a packet composed of a synchronization data part including a bit string of a fixed arrangement pattern and used for synchronization and a physical data part including a bit string of a fixed arrangement pattern and having data handled in a physical layer. The present invention relates to a communication method and a communication device that transmit / receive data to / from the communication device.

  In general, the distance between a transmitting station and a receiving station that perform wireless communication varies and is not constant. Therefore, the power input to the receiving station antenna takes various values. On the other hand, it is difficult for a single AD (analog-digital) converter used in wireless communication to process a wide range of signal power with high accuracy, and there are few AD converters that enable this. Therefore, it is necessary to adjust the gain so that the AD converter can appropriately operate with respect to the input signal. Such a technique is called AGC (Automatic Gain Control).

  Further, in a state where the oscillation frequency of the transmitting station that performs wireless communication and the oscillation frequency of the receiving station are operating slightly different from each other, it is necessary to match both with high accuracy each time a packet is received. Such a technique is called frequency synchronization.

  Furthermore, it is necessary to notify the timing of significant data start or end from the transmitting station that performs wireless communication to the receiving station so that the receiving station can extract significant data. Such a technique is called timing synchronization or frame synchronization.

  As described above, when performing a reception operation in general wireless communication, gain adjustment, frequency synchronization, and timing synchronization are necessary. In order to execute these operations, it is necessary to send a redundant signal from the transmitting station to the receiving station. Several systems are defined by the standardization of communication systems.

  In recent years, autonomous distributed systems that use CSMA / CA (Carrier Sense Multiple Access / Collision Avoidance) to determine transmission timing at each terminal have been widely used. As a system using CSMA / CA, a wireless local area network (LAN), Bluetooth (registered trademark), and the like are well known. IEEE 802.15.4 is standardized by IEEE (The Institute of Electrical and Electronic Engineers) for PAN (Personal Area Network), and CSMA / CA is also defined in this standard.

  In IEEE802.15.4, IEEE802.15.4g, and IEEE802.15.4d, the packet is configured as shown in FIG. The packet is composed of SHR 101 (synchronization header), PHR 102 (PHY header), and PHY payload 103. Further, the SHR 101 includes a preamble 1011 and an SFD 1012 (start of frame delimiter).

  The preamble 1011 includes a bit string of a known fixed arrangement pattern. The SFD 1012 is a signal indicating the end of the preamble 1011 and indicating that the signal received next to the SFD 1012 is the PHR 102.

  The PHR 102 includes a mode switch 1021, a reserved bit 1022, an FCS type 1023, data whitening 1024, and a frame length 1025. Mode switch 1021 is a value indicating whether or not there is a change in the data transmission rate / modulation method. Reserved bit 1022 is a signal not particularly used. FCS (Frame Check Sequence) type 1023 is a signal indicating the number of bytes used in CRC (Cyclic Redundancy Check). Data whitening 1024 is a signal indicating whether or not data whitening is used. Frame length 1025 indicates the length of the PHY payload 103.

  The PHY payload 103 includes an MHR (MAC header) 1031, a MAC payload 1032, and an MFR (MAC Footer) 1033. The MHR 1031 includes the MAC (Media Access Control) address of the destination station and the MAC address of the calling station. The MAC payload 1032 includes payload data to be sent. The MFR 1033 includes FCS.

  FIG. 9 is a flowchart showing a processing flow according to the prior art. First, in step 201, a preamble search is performed. When receiving the preamble 1011, the receiving station detects the oscillation frequency of the transmitting station from the received signal, and adjusts the oscillation frequency of itself (receiving station) to the detected frequency of the transmitting station. At the same time, an optimum gain is set for receiving subsequent signals. Subsequently, when a preamble is detected in step 202, the process proceeds to the next step 203. Subsequently, when an SFD is detected in step 203, timing synchronization is performed using the detected SFD, and the process proceeds to the next step 204. Subsequently, PHR demodulation is performed in step 204, PHY payload demodulation is performed in step 205, and the result of FCS is confirmed in step 206.

  Similarly, in IEEE 802.11, gain adjustment, frequency synchronization, and timing synchronization are executed at a place called PLCP (Physical Layer Convergence Protocol) preamble in a packet.

  When using a method of detecting a packet using the preamble 1011 and the SFD 1012, such as IEEE802.15.4, IEEE802.15.4g, IEEE802.15.4d, IEEE802.11. There is a possibility that the demodulated signal becomes accidentally equal to the bit string of the fixed array pattern of the specified preamble 1011 and SFD 1012. As a result, simple noise is determined to be an incoming packet, and demodulation processing is performed. The frequency of occurrence of erroneous packet detection increases as the bit length of the SHR 101 decreases.

  As a technique for avoiding such erroneous packet detection, it is set based on RSSI (Received Signal Strength Indication) after calculating the cross-correlation between the bit string (replica) of the preamble pattern held by the receiving station and the received signal. A method for comparing the threshold value and the cross-correlation is disclosed (see Patent Document 1).

  However, in the method disclosed in this document, it is necessary to calculate the cross-correlation, which places a burden on the arithmetic unit.

In addition, the following four techniques are already known as existing techniques for preventing erroneous packet detection.
(1) The RSSI signal level output from the RF processing unit that demodulates the received signal or modulates the transmission signal is converted into signal strength (power), and whether the signal strength is greater than a certain threshold value. This is used to determine the arrival of a received packet.
(2) A power value is calculated from the demodulated signal (I signal, Q signal) level output from the RF processing unit, and the arrival of the received packet is determined by comparing the power value with a certain threshold value.
(3) A reception packet is detected by calculating a cross-correlation between a preamble (replica) and a received signal and comparing the correlation value with a certain threshold value.
(4) The reception packet is detected by calculating the autocorrelation value of the preamble part of the reception signal and comparing the correlation value with a certain threshold value.

JP 2009-278409 (Claim 1, FIG. 3) JP 2011-146974 (Claim 10, FIG. 3) JP2003-244118

  FIG. 10 is a timing chart for explaining the problems of the prior art. It is assumed that the reception signal of the receiving station follows noise 5011, desired packet 5012, and noise 5013 in this order. As for the operation of the receiving station, it is assumed that preamble search 5021, frame demodulation processing (packet error detection) 5022, and preamble search 5023 follow in this order.

  In the preamble search 5021, when a part of the noise 5011 is erroneously detected as the preamble and the SHR, the demodulation process of the frame composed of the subsequent PHR / PHY payload is started. Even if the desired packet 5012 arrives during the frame demodulation process 5022, the already started frame demodulation process is continued. After the desired packet 5012 passes, frame demodulation is completed. After the demodulation is completed, a preamble search 5023 is performed on the noise 5013. Thus, in the related art, it may occur that the desired packet 5012 is not properly detected.

  An object of the present invention is to provide a communication method and a communication apparatus that can appropriately and easily determine that a regular packet has been received.

The present invention relates to a packet composed of a synchronization data part including a bit string of a fixed arrangement pattern and used for synchronization and a physical data part including a bit string of a fixed arrangement pattern and having data handled in a physical layer. A communication method for sending and receiving to and from
Among the packets received at the receiving station, a synchronous sequence pattern detection step for detecting whether or not the bit sequence of the fixed sequence pattern included in the synchronous data portion is a regular sequence pattern;
Of the packets received at the receiving station, a physical array pattern detection step for detecting whether or not a bit string of a fixed array pattern included in the physical data portion is a predetermined array pattern;
A normal reception determination step of determining whether or not the receiving station has received a normal packet,
In the synchronous arrangement pattern detection step, it is detected that the bit string of the fixed arrangement pattern included in the synchronous data portion is a predetermined arrangement pattern, and in the physical arrangement pattern detection step, the fixed arrangement pattern included in the physical data portion is detected. The communication method is characterized in that, when it is detected that a bit string of an arrangement pattern is a prescribed arrangement pattern, the receiving station determines that the receiving station has received a normal packet in the normal reception determination step.

The present invention also relates to a communication device for receiving a packet composed of a synchronous data portion including a bit string of a fixed array pattern and used for synchronization and a physical data section including a bit array of the fixed array pattern and having data handled in a physical layer. Because
Synchronous arrangement pattern detecting means for detecting whether or not a bit string of a fixed arrangement pattern included in the synchronous data portion is a prescribed arrangement pattern among packets received at the receiving station;
Of the packets received at the receiving station, physical array pattern detection means for detecting whether or not the bit array of the fixed array pattern included in the physical data portion is a regular array pattern;
Regular reception determination means for determining whether or not the receiving station has received a regular packet,
In the synchronous arrangement pattern detecting means, it is detected that the bit string of the fixed arrangement pattern included in the synchronous data section is a predetermined arrangement pattern, and in the physical arrangement pattern detecting means, the fixed arrangement pattern included in the physical data section is detected. The communication apparatus is characterized in that, when it is detected that the bit string of the arrangement pattern is a prescribed arrangement pattern, the normal reception determining means determines that the receiving station has received a normal packet.

  As described above, according to the present invention, in the synchronous array pattern detecting step, it is detected that the bit string of the fixed array pattern included in the synchronous data portion is a predetermined array pattern, and in the physical array pattern detecting step, When it is detected that the bit string of the fixed arrangement pattern included in the data portion is the prescribed arrangement pattern, the receiving station determines that the receiving station has received a normal packet in the normal reception determination step. It can be determined appropriately and simply that it has been received.

It is a block diagram which shows the structure of the communication system which concerns on Embodiment 1 of this invention. 3 is a configuration diagram illustrating a configuration of a packet used in the communication system according to Embodiment 1. FIG. 3 is a flowchart showing a processing flow according to the first embodiment. 3 is a timing chart illustrating the operation of the first embodiment. It is a flowchart which shows the processing flow which concerns on Embodiment 2 of this invention. It is a flowchart which shows the processing flow which concerns on Embodiment 3 of this invention. It is a flowchart which shows the processing flow which concerns on Embodiment 4 of this invention. It is a flowchart which shows the processing flow which concerns on Embodiment 5 of this invention. It is a flowchart which shows the processing flow which concerns on a prior art. It is a timing chart for demonstrating the subject of a prior art.

Embodiment 1 FIG.
FIG. 1 is a block diagram showing a configuration of a communication system according to Embodiment 1 of the present invention. The communication system includes a transmission station 10 and a reception station 20. The transmitting station 10 transmits a packet by wireless communication, and the receiving station 20 receives the transmitted packet. The transmission station 10 includes a calculation unit 11, an RF (Radio Frequency) processing unit 12, and an antenna 13. The receiving station 20 includes a calculation unit 21, an RF processing unit 22, and an antenna 23. The transmitting station 10 and the receiving station 20 (in particular, the receiving station 20) described here correspond to the communication device of the present invention.

  In this example, a system based on IEEE802.15.4g is assumed as an example. However, the present invention can also be applied to a system using a packet format in which a fixed value exists in a packet such as IEEE802.15.4 or IEEE802.11. It is. Therefore, the present invention can be applied to a wireless LAN, bluetooth (registered trademark), and the like. In addition, this system is not limited to one-to-one wireless communication, and may be used in a one-to-N network.

  FIG. 2 is a configuration diagram illustrating a configuration of a packet used in the communication system according to the first embodiment. The packet is composed of an SHR 101 (synchronization header), a PHR 102 (PHY header), and a PHY payload 103. The SHR 101 corresponds to a synchronization data part used for synchronization, and includes a preamble 1011 and an SFD 1012 (start of frame delimiter). The PHR 102 and the PHY payload 103 constitute a physical data unit 100. The physical data part 100 constitutes a part having data handled in the physical layer in the packet.

  The preamble 1011 includes a bit string of a known fixed arrangement pattern. The SFD 1012 is a signal indicating the end of the preamble 1011 and indicating that the signal received next to the SFD 1012 is the PHR 102.

  The PHR 102 includes a mode switch 1021, a reserved bit 1022, an FCS type 1023, data whitening 1024, and a frame length 1025. The Mode switch 1021 is a value indicating whether or not there is a change in the data transmission rate / modulation method, and a single value may be used depending on the system. Reserved bit 1022 is a signal not particularly used. FCS (Frame Check Sequence) type 1023 is a signal indicating the number of bytes used in CRC (Cyclic Redundancy Check). Data whitening 1024 is a signal indicating whether or not data whitening is used to scramble data (scramble). Data whitening is performed only on the PHY payload 103. This data whitening value may also be a single value throughout the system. Frame length 1025 indicates the length of the PHY payload 103. Here, a system in which Mode switch 1021, reserved bit 1022, FCS type 1023, and data whitening 1024 are fixed values is considered. The fixed value also includes a bit string of a fixed array pattern.

  The PHY payload 103 includes an MHR (MAC header) 1031, a MAC payload 1032, and an MFR (MAC Footer) 1033. The MHR 1031 includes the MAC (Media Access Control) address of the destination station and the MAC address of the calling station. The MAC payload 1032 includes payload data to be sent. The MFR 1033 includes FCS.

  FIG. 3 is a flowchart showing a processing flow according to the first embodiment. In step 301, the preamble is searched, and in step 302, it is determined whether or not the bit string of the received and demodulated signal matches the prescribed preamble arrangement pattern (replica). The specified preamble bit string (replica) may be shorter than the preamble bit string specified as the packet format. At this time, if a part of the bit string of the received and demodulated signal matches the bit string (replica) of the preamble, the process proceeds to step 303, and if not, the process returns to step 301.

  Next, in step 303, it is determined whether or not the signal following the preamble matches the bit string (replica) of the SFD arrangement pattern. If the signal following the preamble does not match the SFD, the process returns to step 301, and if it matches, the process proceeds to step 304. In step 304, the signal following the SFD is demodulated and processed as PHR.

  Next, in step 305, it is determined whether or not the place where Mode switch, reserved bit, FCS type, and data whitening are described in the bit string demodulated as PHR is a fixed value in the system. Since the fixed value also forms a bit string of a fixed array pattern, it can be determined whether or not it is a bit string of a fixed array pattern, as in the preamble and SFD. If those values are not fixed values, the process returns to step 301, and if they are fixed values, the process proceeds to step 306. In step 306, the subsequent signal is demodulated by the frame length described in PHR, and the process proceeds to step 307. In step 307, CRC is performed based on the demodulated signal, and it is confirmed whether or not the demodulated signal has an error (that is, the result of FCS). Then, it returns to the process 301 and repeats the process of the processes 301-307.

  The step 302 or 303 described here is the synchronous sequence pattern detection step (means) of the present invention, the step 304 is the demodulation step of the present invention, and the step 305 is the physical sequence pattern detection step (means) of the present invention. Each corresponds to a reception determination step (means).

  As described above, in step 302 and step 303, it is detected that the bit sequence of the fixed arrangement pattern included in the synchronization data portion of the packet is a prescribed arrangement pattern, and in step 305, the physical data portion of the packet is changed to the physical data portion. When it is detected that the bit sequence of the included fixed arrangement pattern is a prescribed arrangement pattern, it is determined that the receiving station has received a normal packet, and the process proceeds to the next step 306. Therefore, it can be determined appropriately and simply that a regular packet has been received.

  Further, in the physical data portion demodulation step consisting of PHR demodulation (step 304) and PHY payload demodulation (step 306), when it is detected that the synchronization data portion has a prescribed arrangement pattern, the physical data portion Is started, that is, PHR is demodulated (step 304). However, if it is not determined that a normal packet has been received, the demodulation of the physical data portion is terminated, that is, the PHY payload is not demodulated, and the preamble search (step 301) is resumed. Therefore, when it is detected that the synchronization data portion is a prescribed arrangement pattern, even if demodulation of the physical data portion is once started, if it is not detected that the physical data portion is a prescribed arrangement pattern, By ending demodulation of the physical data portion, the demodulation process can be quickly ended and the preamble search can be resumed.

  In Step 305, if the demodulation process is started only by detecting that any one of Mode switch, reserved bit, FCS type, and data whitening is a fixed value (fixed array pattern) as defined. It is enough. This is because, in addition to being able to detect that the synchronization data part (preamble and SFD) is as specified, if one of the physical data parts is detected to be a fixed value as specified, the entire packet can be detected. This is because it can be determined that there is no signal degradation as noted.

  In the same step 305, it is possible to detect a packet error only by detecting that any one of Mode switch, reserved bit, FCS type, and data whitening is not a fixed value (fixed array pattern) as defined. It is sufficient to determine that there is, end the demodulation process, and restart the preamble search 301. This is because if there is an error in any of Mode switch, reserved bit, FCS type, or data whitening, the main cause of this error is interference from other transmitting stations or low received signal level. In such a case, there is a high possibility that an error has occurred in the subsequent packet, and even if the packet is discarded without being treated as a regular packet, the performance of the receiving station It is because it does not have a big influence on itself.

  FIG. 4 is a timing chart for explaining the operation of the first embodiment. The received signal of the receiving station is assumed to be followed by noise 7011, desired packet 7012, and noise 7013 in this order. As for the operation of the receiving station, it is assumed that preamble search 7021, frame demodulation processing (packet error detection) 7022, preamble search 7023, frame demodulation processing (packet normal detection) 7024, and preamble search 7025 follow in this order.

  In the preamble search 7021, if a part of the noise 7011 is erroneously detected as a preamble and SHR, a demodulation process of a frame including a subsequent PHR / PHY payload is started. Here, when a fixed value included in the PHR is detected, it is determined that the packet is erroneously detected, and the preamble search 7023 is resumed. Thereafter, when the desired packet 7012 arrives, the preamble and SHR are appropriately detected, it is determined that a normal packet has been received, and reception / demodulation of the desired packet 7012 is appropriately performed. Here, the preamble search 7025 is resumed.

  In contrast to FIG. 10, in FIG. 10, the desired packet 5012 cannot be demodulated, so the transmitting station needs to retransmit the packet. In FIG. 4, frame demodulation 7024 is performed on the desired packet 7012 at an appropriate timing. This eliminates the need to retransmit the packet, thereby reducing the power consumption of the transmitting station.

  As described above, in the first embodiment, it is detected that the bit sequence of the fixed arrangement pattern included in the synchronous data portion of the packet is a predetermined arrangement pattern, and the fixed arrangement included in the physical data portion of the packet. When it is detected that the bit string of the pattern is a regular arrangement pattern, it is determined that the receiving station has received a normal packet, so that it can be appropriately and easily determined that a normal packet has been received. .

  In addition, when it is detected that the synchronization data portion is a prescribed arrangement pattern, even if the physical data portion is not detected to be a prescribed arrangement pattern even if the demodulation of the physical data portion is once started, By ending demodulation of the physical data portion, the demodulation process can be quickly completed.

Embodiment 2. FIG.
FIG. 5 is a flowchart showing a processing flow according to Embodiment 2 of the present invention. In the first embodiment, erroneous packet detection is determined using a fixed value included in the PHR. In the second embodiment, erroneous detection is determined using both fixed values of the PHR and the MHR in the PHY payload.

  Steps 1201 to 1205 indicate the same processes as steps 301 to 305 in FIG. If it is determined in step 1205 that the signal included in the PHR is a predetermined fixed value (fixed array pattern), the process proceeds to step 1206, and the MHR is demodulated. After demodulating the MHR, in Step 1207, it is determined whether or not the signal included in the PHR is a prescribed fixed value (fixed array pattern). If it is not a fixed value (packet error detection), the process returns to step 1201 to resume the preamble search. If the value is a fixed value (regular packet detection), the process proceeds to step 1208. In step 1208, the MAC payload and FCS, that is, the remaining part of the packet is demodulated. Subsequently, in step 1209, the result of the FCS is confirmed, the process returns to the head preamble search (step 1201), and the processing in steps 1201 to 1209 is repeated.

  Step 1202 or step 1203 described here is the synchronous sequence pattern detection step (means) of the present invention, step 1206 is the demodulation step (means) of the present invention, and steps 1205 and 1207 are the physical sequence pattern detection of the present invention. Step 1207 corresponds to the step (means), and step 1207 corresponds to the regular reception determination step (means).

  As described above, in the second embodiment, the physical data portion of the packet includes a plurality of fixed values (fixed arrangement pattern), in particular, the PHR includes one or more fixed values, and the MHR also includes one or more fixed values. Including. When any of the plurality of fixed values matches the prescribed arrangement pattern, the received packet is determined as a regular packet. For this reason, it can determine more appropriately that it is what received the regular packet.

Embodiment 3 FIG.
FIG. 6 is a flowchart showing a processing flow according to Embodiment 3 of the present invention. In the third embodiment, a process for determining whether or not the data length of the PHY payload is as specified is added to the first embodiment.

  Steps 1001 to 1005 indicate the same processes as steps 301 to 305 in FIG. If it is determined in step 1005 that the signal included in the PHR is a specified fixed value (fixed array pattern), the process proceeds to step 1006, where the data length is specified by comparing the data length of the PHY payload with a specified threshold value. It is determined whether or not it passes. That is, it is determined whether or not the data length of the PHY payload is equal to or less than a specified threshold value (maximum value). If it is not the prescribed data length, the process returns to step 1001 to resume the preamble search. If it is the prescribed data length, the process proceeds to step 1007. Steps 1007 to 1008 indicate the same processes as steps 306 to 307 in FIG.

  Step 1002 or step 1003 described here is the synchronous sequence pattern detection step (means) of the present invention, step 1004 is the demodulation step (means) of the present invention, and step 1005 is the physical sequence pattern detection step (means) of the present invention. ) And regular reception determination step (means), and step 1006 corresponds to the data length comparison step (means) of the present invention.

  As described above, in Embodiment 3, the physical data portion of the packet includes the payload portion (PHY payload) including the payload data and the data length portion (Frame length) including the information indicating the data length of the payload portion. Further, in the data length comparison step of comparing the data length of the payload part with a predetermined threshold to determine whether the data length exceeds the threshold, when it is determined that the data length of the payload part does not exceed the threshold, It is determined that a normal packet has been received. When it is determined that the data length exceeds the threshold, it is determined that the packet is erroneously detected. Therefore, it is possible to more appropriately determine that a regular packet has been received.

Embodiment 4 FIG.
FIG. 7 is a flowchart showing a processing flow according to Embodiment 4 of the present invention. In the third embodiment, the packet is detected by the preamble and the SFD, and it is determined that the signal being demodulated is a desired packet by using the fixed value of the PHR. The packet erroneous detection determination based on the fixed value of PHR is executed simultaneously.

  After demodulating the signals corresponding to SFD and PHR in step 1103, if the fixed values included in the SFD and PHR are equal to the prescribed fixed values (fixed arrangement pattern) in step 1104, the process proceeds to step 1105. Otherwise, return to Step 1101. The other steps 1101, 1102, 1105 to 1107 show the same processing as the steps 1001, 1002, 1006 to 1008 in FIG.

  Step 1104 described here is the synchronous sequence pattern detection step (means), physical sequence pattern detection step (means) and regular reception determination step (means) of the present invention, and step 1103 is the demodulation step (means) of the present invention. Step 1105 corresponds to the data length comparison step (means) of the present invention.

  As described above, in the fourth embodiment, the step of detecting that the fixed value included in the synchronous data portion of the packet is a fixed value (fixed array pattern) as defined, and the fixed value included in the physical data portion is The step of detecting that the value is a fixed value (fixed array pattern) as specified is executed simultaneously. This makes it possible to more appropriately determine that a legitimate packet has been received, simplify the processing flow, and shorten the processing time.

Embodiment 5. FIG.
FIG. 8 is a flowchart showing a processing flow according to Embodiment 5 of the present invention. The fifth embodiment is obtained by adding a step of determining whether or not the communication quality is as specified to the first embodiment.

  Steps 401 to 405 show the same processes as steps 301 to 305 in FIG. If it is determined in step 405 that the signal included in the PHR is a specified fixed value (fixed array pattern), the process proceeds to step 406, and whether the communication quality is as specified by comparing the communication quality with a specified threshold value. Determine. That is, for example, when an SFD is received, its SNR (Signal to Noise Ratio) is detected, and it is determined whether or not the SNR detection value is equal to or greater than a prescribed threshold value (maximum value). If it is not the prescribed communication quality, the process returns to step 401 and the preamble search is resumed. If it is the prescribed communication quality, the process proceeds to step 407. Steps 407 to 408 indicate the same processes as steps 306 to 307 in FIG.

  Step 402 or 403 described here is the synchronous sequence pattern detecting step (means) of the present invention, step 404 is the demodulating step of the present invention, and step 405 is the physical sequence pattern detecting step (means) of the present invention. The reception determination step (means) corresponds to the quality detection step (means) and the quality comparison step (means) of the present invention.

  As described above, in the fifth embodiment, a quality detection step (means) for detecting communication quality when a synchronous data portion, particularly SFD is received in a packet, and comparing the detected communication quality with a predetermined threshold value. And a quality comparison step (means) for determining whether or not the threshold is exceeded. When it is determined in the quality comparison step that the communication quality has exceeded the threshold value, the receiving station determines that the regular packet has been received. This makes it possible to more appropriately determine that a regular packet has been received.

  The communication quality (SNR) is detected by calculating the SNR using the received signal when a signal corresponding to the SFD is received. Specifically, the received signals are arranged in an IQ plane, the average signal point of the received signals corresponding to a certain signal point is set as the desired signal point, and the variance of the desired signal is calculated. Also, the variance of noise is calculated based on the difference between the desired signal point and the received signal. A value obtained by dividing the variance of the desired signal by the variance of the noise is defined as SNR.

  In FIG. 8, the step 406 is arranged immediately after the step 405, but when calculating the SNR based on the SFD, the step 406 can be arranged immediately after the step 403.

  Further, the SNR is calculated using the preamble, SFD, and PHR received after the gain adjustment and the frequency synchronization are completed. In step 406, it is determined whether or not the calculated SNR exceeds the threshold value. Proceed to step 407, otherwise return to step 401. As a result, a more appropriate SNR can be calculated, so that it is possible to more appropriately determine that a regular packet has been received.

DESCRIPTION OF SYMBOLS 10 Transmitting station 11,21 Operation part 12,22 RF processing part 13,23 Antenna 20 Receiving station 100 Physical data part 101 SHR (synchronous data part)
1011 Preamble 1012 SFD
102 PHR
1021 Mode switch
1022 Reserved bit
1023 FCS type
1024 Data whitening
1025 Frame length
103 PHY payload
1031 MHR
1032 MAC payload
1033 MFR

Claims (6)

A packet composed of a synchronization data part including a bit string of a fixed arrangement pattern and used for synchronization and a physical data part including a bit string of a fixed arrangement pattern and having data handled in a physical layer is transmitted between the transmitting station and the receiving station. A communication method for transmitting and receiving,
Among the packets received at the receiving station, a synchronous sequence pattern detection step for detecting whether or not the bit sequence of the fixed sequence pattern included in the synchronous data portion is a regular sequence pattern;
Of the packets received at the receiving station, a physical array pattern detection step for detecting whether or not a bit string of a fixed array pattern included in the physical data portion is a predetermined array pattern;
A regular reception determination step of determining whether or not the receiving station has received a regular packet ;
A demodulation step of demodulating the physical data portion of the packet ,
In the synchronous arrangement pattern detection step, it is detected that the bit string of the fixed arrangement pattern included in the synchronous data portion is a predetermined arrangement pattern, and in the physical arrangement pattern detection step, the fixed arrangement pattern included in the physical data portion is detected. When it is detected that the bit string of the arrangement pattern is a prescribed arrangement pattern, in the normal reception determination step, it is determined that the receiving station has received a normal packet ,
In the synchronous arrangement pattern detection step, when it is detected that the bit sequence of the fixed arrangement pattern included in the synchronous data portion is a prescribed arrangement pattern, the demodulation step starts demodulating the physical data portion,
The communication method according to claim 1, wherein, in the normal reception determination step, the demodulation in the demodulation step is terminated when the reception station does not determine that a normal packet has been received . The physical data portion includes a plurality of fixed array pattern bit strings,
In the physical arrangement pattern detection step, when it is detected that the bit strings of the plurality of fixed arrangement patterns included in the physical data part are both regular arrangement patterns, in the normal reception determination step, the receiving station The communication method according to claim 1, wherein the packet is determined to have been received. The physical data portion includes a payload portion composed of payload data, and a data length portion composed of information indicating the data length of the payload portion,
The communication method further includes a data length comparison step of comparing the data length of the payload portion with a predetermined threshold to determine whether the data length exceeds the threshold,
In the data length comparison step, when it is determined that the data length of the payload portion does not exceed the threshold value, the normal reception determination step determines that the receiving station has received a normal packet. The communication method according to claim 1. The communication method according to claim 1, wherein the synchronous array pattern detection step and the physical array pattern detection step are executed simultaneously. A quality detection step of detecting communication quality when receiving the synchronous data portion of the packet;
A quality comparison step of comparing the communication quality detected in the quality detection step with a predetermined threshold to determine whether the communication quality exceeds the threshold;
The said receiving station determines with the said receiving station having received the regular packet in the said regular reception determination process, when it determines with the said communication quality exceeding the said threshold value in the said quality comparison process. Communication method. A communication device for receiving a packet composed of a synchronization data portion including a bit sequence of a fixed arrangement pattern and used for synchronization and a physical data portion including data of a fixed arrangement pattern and including data handled in a physical layer,
Synchronous arrangement pattern detecting means for detecting whether or not a bit string of a fixed arrangement pattern included in the synchronous data portion is a prescribed arrangement pattern among packets received at the receiving station;
Of the packets received at the receiving station, physical array pattern detection means for detecting whether or not the bit array of the fixed array pattern included in the physical data portion is a regular array pattern;
Regular reception determination means for determining whether or not the receiving station has received a regular packet ;
Demodulating means for demodulating the physical data portion of the packet ,
In the synchronous arrangement pattern detecting means, it is detected that the bit string of the fixed arrangement pattern included in the synchronous data section is a predetermined arrangement pattern, and in the physical arrangement pattern detecting means, the fixed arrangement pattern included in the physical data section is detected. When it is detected that the bit string of the arrangement pattern is a prescribed arrangement pattern, in the normal reception determination means, it is determined that the receiving station has received a normal packet ,
In the synchronous arrangement pattern detecting means, when it is detected that the bit string of the fixed arrangement pattern included in the synchronous data portion is a prescribed arrangement pattern, the demodulation means starts demodulating the physical data portion,
The communication apparatus according to claim 1 , wherein when the receiving station does not determine that the receiving station has received a normal packet, the demodulating unit ends the demodulation .

Images