JP6048247B2 - Semiconductor device - Google Patents

Semiconductor device Download PDF

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JP6048247B2
JP6048247B2 JP2013057094A JP2013057094A JP6048247B2 JP 6048247 B2 JP6048247 B2 JP 6048247B2 JP 2013057094 A JP2013057094 A JP 2013057094A JP 2013057094 A JP2013057094 A JP 2013057094A JP 6048247 B2 JP6048247 B2 JP 6048247B2
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substrate
circuit element
heat
back surface
heat dissipation
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JP2014183217A (en
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竹内　伸二
伸二 竹内
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Denso Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1305—Bipolar Junction Transistor [BJT]
    • H01L2924/13055—Insulated gate bipolar transistor [IGBT]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate

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  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Description

本発明は、回路素子と、回路素子を搭載する基板と、回路素子及び基板に形成された配線（２２，２３）により構成される回路の検査に使用される、基板に形成された検査電極と、回路素子で発生した熱を放熱する放熱部材と、基板と放熱部材とを固定する固定部材と、を備える半導体装置に関するものである。   The present invention relates to a circuit element, a substrate on which the circuit element is mounted, a test electrode formed on the substrate, which is used for testing a circuit composed of the circuit element and wiring (22, 23) formed on the substrate. The present invention relates to a semiconductor device including a heat radiating member that radiates heat generated in a circuit element, and a fixing member that fixes a substrate and the heat radiating member.

従来、例えば特許文献１に示されるように、発熱性電子部品、及び、低発熱性電子部品が実装された基板、及び、基板に取り付けられた放熱部材を有する電子部品モジュールが提案されている。発熱性電子部品は、基板の第１の面に配置されており、第１の面の裏面である第２の面には、発熱性電子部品、及び、低発熱性電子部品のテストに用いるテスト用電極が設けられている。   2. Description of the Related Art Conventionally, as disclosed in, for example, Patent Document 1, an electronic component module having a heat generating electronic component, a substrate on which a low heat generating electronic component is mounted, and a heat dissipation member attached to the substrate has been proposed. The exothermic electronic component is arranged on the first surface of the substrate, and a test used for testing the exothermic electronic component and the low exothermic electronic component is provided on the second surface which is the back surface of the first surface. An electrode is provided.

上記した基板と放熱部材とは、シリコン接着剤を介して機械的に接続されている。そして、上記したテスト用電極は、基板と放熱部材との間に位置するシリコン接着剤によって被覆保護されている。   The substrate and the heat dissipation member described above are mechanically connected via a silicon adhesive. The test electrode is covered and protected by a silicon adhesive located between the substrate and the heat dissipation member.

特開２０１０−４０５６９号公報JP 2010-40569 A

上記したように、特許文献１に示される電子部品モジュールでは、基板と放熱部材との間に位置するシリコン接着剤によって、テスト用電極が被覆保護されている。基板と放熱部材との間に配置されるシリコン接着剤の厚さは、両者を安定して機械的に固定する程度に設定される。そのため、テスト用電極と放熱部材との距離は、上記したシリコン接着剤の厚さ程度となっており、テスト用電極と電気的に接続された基板の配線に高電圧が印加され、その高電圧がテスト用電極に印加されると、テスト用電極（検査電極）と放熱部材との電気絶縁性が低下する虞がある。   As described above, in the electronic component module disclosed in Patent Document 1, the test electrode is covered and protected by the silicon adhesive located between the substrate and the heat dissipation member. The thickness of the silicon adhesive disposed between the substrate and the heat radiating member is set to such an extent that the two can be stably mechanically fixed. Therefore, the distance between the test electrode and the heat radiating member is about the thickness of the silicon adhesive described above, and a high voltage is applied to the wiring of the substrate electrically connected to the test electrode. Is applied to the test electrode, the electrical insulation between the test electrode (inspection electrode) and the heat radiating member may be reduced.

そこで、本発明は上記問題点に対応し、検査電極と放熱部材との電気絶縁性が低下することが抑制された半導体装置を提供することを目的とする。   In view of the above-described problems, an object of the present invention is to provide a semiconductor device in which a decrease in electrical insulation between a test electrode and a heat dissipation member is suppressed.

上記した目的を達成するために、本発明のひとつは、回路素子（１０）と、回路素子を一面（２０ａ）に搭載し、搭載した回路素子と自身に形成された配線（２２，２３）とにより回路が構成された基板（２０）と、基板の一面の裏面（２０ｂ）に形成された、回路の検査に使用される検査電極（３０）と、回路素子で発生した熱を放熱する放熱部材（４０）と、基板と放熱部材とを固定する固定部材（５０）と、を有し、基板の裏面と放熱部材とが対向しており、基板の裏面における放熱部材との非対向領域に、検査電極が形成されており、固定部材は、接着剤であり、基板の裏面における放熱部材との対向領域、及び、非対向領域それぞれに、接着剤が設けられ、対向領域に設けられた接着剤を介して、基板と放熱部材とが機械的に接続され、非対向領域に設けられた接着剤によって、検査電極が被覆保護されていることを特徴とする。また、本発明の他のひとつは、回路素子（１０）と、回路素子を一面（２０ａ）に搭載し、搭載した回路素子と自身に形成された配線（２２，２３）とにより回路が構成された基板（２０）と、基板の一面の裏面（２０ｂ）に形成された、回路の検査に使用される検査電極（３０）と、回路素子で発生した熱を放熱する放熱部材（４０）と、基板と放熱部材とを固定する固定部材（５０）と、を有し、基板の裏面と放熱部材とが対向しており、基板の裏面における放熱部材との非対向領域に、検査電極が形成されており、固定部材は、ねじであり、回路素子で発生し、基板に伝達された熱を放熱部材に伝達するための放熱ゲル（６０）をさらに有し、基板の裏面における放熱部材との対向領域、及び、非対向領域それぞれに、放熱ゲルが設けられ、対向領域に設けられた放熱ゲルを介して、基板と放熱部材とが熱的に接続され、非対向領域に設けられた放熱ゲルによって、検査電極が被覆保護されていることを特徴とする。 In order to achieve the above-described object, one of the present inventions includes a circuit element (10), a circuit element mounted on one surface (20a), and the mounted circuit element and wiring (22, 23) formed on itself. A substrate (20) on which a circuit is configured, a test electrode (30) used for circuit inspection formed on the back surface (20b) of one surface of the substrate, and a heat dissipation member that radiates heat generated in the circuit element (40) and a fixing member (50) for fixing the substrate and the heat radiating member, the back surface of the substrate and the heat radiating member are opposed to each other, in a non-facing region on the back surface of the substrate with the heat radiating member, An inspection electrode is formed , the fixing member is an adhesive, and an adhesive is provided in each of a region facing the heat dissipation member and a non-facing region on the back surface of the substrate, and an adhesive provided in the facing region. The board and heat dissipation member are mechanically connected via Are, by an adhesive provided on the non-facing regions, the inspection electrode, characterized in that it is covered and protected. In another aspect of the present invention, a circuit is configured by the circuit element (10), the circuit element mounted on one surface (20a), and the mounted circuit element and the wiring (22, 23) formed on itself. A substrate (20), a test electrode (30) formed on the back surface (20b) of one surface of the substrate, used for circuit inspection, and a heat dissipating member (40) for dissipating heat generated by the circuit elements, A fixing member (50) for fixing the substrate and the heat radiating member, the back surface of the substrate and the heat radiating member are opposed to each other, and a test electrode is formed in a non-facing region of the back surface of the substrate with the heat radiating member. The fixing member is a screw, and further includes a heat radiating gel (60) for transmitting the heat generated in the circuit element and transmitted to the substrate to the heat radiating member, and is opposed to the heat radiating member on the back surface of the substrate. Radiation gel is provided in each of the region and non-opposing region Is, through a heat radiation gel provided in the opposing region, the substrate and the heat radiating member is thermally connected by the heat radiating gel provided in the non-facing regions, the inspection electrode, characterized in that it is covered and protected .

これらによれば、基板と放熱部材との間に検査電極が設けられた構成と比べて、検査電極（３０）と放熱部材（４０）との距離が長くなる。このため、検査電極（３０）と放熱部材（４０）との電気絶縁性が高められ、検査電極（３０）に高電圧が印加された場合であっても、検査電極（３０）と放熱部材（４０）との電気絶縁性が低下することが抑制される。 According to these , the distance between the test electrode (30) and the heat dissipation member (40) becomes longer than in the configuration in which the test electrode is provided between the substrate and the heat dissipation member. For this reason, even if it is a case where the electrical insulation of a test electrode (30) and a heat radiating member (40) is improved and a high voltage is applied to a test electrode (30), a test electrode (30) and a heat radiating member ( 40) It is suppressed that electrical insulation with 40) falls.

第１実施形態に係る半導体装置の概略構成を示す断面図である。It is sectional drawing which shows schematic structure of the semiconductor device which concerns on 1st Embodiment. 半導体装置の下面図である。It is a bottom view of a semiconductor device. 半導体装置の変形例を示す下面図である。It is a bottom view which shows the modification of a semiconductor device. 半導体装置の変形例を示す下面図である。It is a bottom view which shows the modification of a semiconductor device.

以下、本発明の実施の形態を図に基づいて説明する。
（第１実施形態）
図１及び図２に基づいて、本実施形態に係る半導体装置を説明する。なお、図１は、半導体装置１００の一部分を示す断面図である。図１に示すように、半導体装置１００は、要部として、回路素子１０と、基板２０と、検査電極３０と、放熱部材４０と、固定部材５０と、を有する。図１に示すように、回路素子１０は、基板２０の一面２０ａに搭載され、検査電極３０は、一面２０ａの裏面２０ｂに形成されている。そして、基板２０は固定部材５０によって放熱部材４０に固定されている。これにより、回路素子１０で発生し、基板２０に伝達された熱が、固定部材５０を介して放熱部材４０に伝達され、放熱部材４０にて放熱される。 Hereinafter, embodiments of the present invention will be described with reference to the drawings.
(First embodiment)
The semiconductor device according to the present embodiment will be described with reference to FIGS. FIG. 1 is a cross-sectional view showing a part of the semiconductor device 100. As shown in FIG. 1, the semiconductor device 100 includes a circuit element 10, a substrate 20, a test electrode 30, a heat radiating member 40, and a fixing member 50 as main parts. As shown in FIG. 1, the circuit element 10 is mounted on one surface 20a of the substrate 20, and the inspection electrode 30 is formed on the back surface 20b of the one surface 20a. The substrate 20 is fixed to the heat radiating member 40 by a fixing member 50. Thereby, the heat generated in the circuit element 10 and transmitted to the substrate 20 is transmitted to the heat radiating member 40 via the fixing member 50 and is radiated by the heat radiating member 40.

回路素子１０は、高発熱素子１１と低発熱素子１２とを有する。高発熱素子１１はＩＧＢＴなどの能動素子であり、低発熱素子１２はコンデンサなどの受動素子や、小信号ダイオードなどの能動素子である。回路素子１０が半導体チップで形成されている場合は、図１に示すように、ワイヤー２１や外部配線２２を介して、基板２０と電気的に接続されている。また、回路素子１０は、一面２０ａに設けられた樹脂１３によって被覆保護されている。ちなみに、半導体チップに代えて、モールドＩＣを採用する場合、上記したワイヤー２１は省略され、樹脂１３による回路素子１０の被覆保護は必須ではなくなる。また、この場合、回路素子１０は、リードと半田（図示略）を介して、基板２０と機械的及び電気的に接続される。   The circuit element 10 includes a high heat generating element 11 and a low heat generating element 12. The high heat generating element 11 is an active element such as an IGBT, and the low heat generating element 12 is a passive element such as a capacitor or an active element such as a small signal diode. When the circuit element 10 is formed of a semiconductor chip, as shown in FIG. 1, the circuit element 10 is electrically connected to the substrate 20 via a wire 21 and an external wiring 22. The circuit element 10 is covered and protected by a resin 13 provided on the one surface 20a. Incidentally, when a molded IC is used instead of the semiconductor chip, the above-described wire 21 is omitted, and the covering protection of the circuit element 10 by the resin 13 is not essential. In this case, the circuit element 10 is mechanically and electrically connected to the substrate 20 via leads and solder (not shown).

基板２０は、自身に搭載される各回路素子１０を電気的に接続する配線基板である。一面２０ａと裏面２０ｂそれぞれに外部配線２２が形成され、その内部に、一面２０ａと裏面２０ｂとを電気的に接続する内部配線２３が形成されている。回路素子１０と検査電極３０とは、配線２２，２３を介して電気的に接続され、回路（図示略）が構成されている。   The board | substrate 20 is a wiring board which electrically connects each circuit element 10 mounted in self. External wiring 22 is formed on each of the one surface 20a and the back surface 20b, and an internal wiring 23 that electrically connects the one surface 20a and the back surface 20b is formed therein. The circuit element 10 and the inspection electrode 30 are electrically connected via wirings 22 and 23 to form a circuit (not shown).

検査電極３０は、上記した、回路素子１０と配線２２，２３とによって構成される回路の検査に使用されるものである。検査電極３０は、基板２０の配線２２，２３に接続されている。そのため、検査電極３０には、各回路素子１０を流れる信号と同電位となっている。基板２０を放熱部材４０に機械的に接続する前に、検査電極３０にテスターなどを当てることで、各回路素子１０に信号が正常に伝達されているか否かが検査される。   The inspection electrode 30 is used for the inspection of the circuit constituted by the circuit element 10 and the wirings 22 and 23 described above. The inspection electrode 30 is connected to the wirings 22 and 23 of the substrate 20. Therefore, the test electrode 30 has the same potential as the signal flowing through each circuit element 10. Before mechanically connecting the substrate 20 to the heat radiating member 40, a tester or the like is applied to the inspection electrode 30 to inspect whether or not a signal is normally transmitted to each circuit element 10.

放熱部材４０は、回路素子１０で発生した熱を放熱するものであり、Ｃｕなどの金属から成る。図１に示すように、放熱部材４０は基板２０の裏面２０ｂと対向しており、裏面２０ｂにおける放熱部材４０との非対向領域に、検査電極３０が形成されている。   The heat dissipating member 40 dissipates heat generated in the circuit element 10 and is made of a metal such as Cu. As shown in FIG. 1, the heat radiating member 40 faces the back surface 20b of the substrate 20, and the inspection electrode 30 is formed in a non-facing region of the back surface 20b with the heat radiating member 40.

固定部材５０は、基板２０と放熱部材４０とを機械的に接続するものである。本実施形態に係る固定部材５０は、絶縁性を有する接着剤であり、具体的に言えば、シリコン接着剤である。図１に示すように、固定部材５０は、裏面２０ｂにおける放熱部材４０との対向領域、及び、非対向領域それぞれに設けられている。そして、対向領域に設けられた固定部材５０を介して、基板２０と放熱部材４０とが機械的に接続され、非対向領域に設けられた固定部材５０によって、検査電極３０が被覆保護されている。   The fixing member 50 mechanically connects the substrate 20 and the heat radiating member 40. The fixing member 50 according to the present embodiment is an adhesive having insulating properties, and specifically, is a silicon adhesive. As shown in FIG. 1, the fixing member 50 is provided in each of a region facing the heat radiating member 40 on the back surface 20 b and a non-facing region. And the board | substrate 20 and the thermal radiation member 40 are mechanically connected via the fixing member 50 provided in the opposing area | region, and the test | inspection electrode 30 is coat-protected by the fixing member 50 provided in the non-opposing area | region. .

次に、本実施形態に係る半導体装置１００の作用効果を説明する。上記したように、放熱部材４０は基板２０の裏面２０ｂと対向しており、裏面２０ｂにおける放熱部材４０との非対向領域に、検査電極３０が形成されている。これによれば、基板と放熱部材との間に検査電極が設けられた構成と比べて、検査電極３０と放熱部材４０との距離が長くなる。このため、検査電極３０と放熱部材４０との電気絶縁性が高められ、検査電極３０に高電圧が印加された場合であっても、検査電極３０と放熱部材４０との電気絶縁性が低下することが抑制される。   Next, functions and effects of the semiconductor device 100 according to this embodiment will be described. As described above, the heat radiating member 40 faces the back surface 20b of the substrate 20, and the inspection electrode 30 is formed in a non-facing region of the back surface 20b with the heat radiating member 40. According to this, the distance between the test electrode 30 and the heat radiating member 40 becomes longer than the configuration in which the test electrode is provided between the substrate and the heat radiating member. For this reason, the electrical insulation between the test electrode 30 and the heat radiating member 40 is enhanced, and the electrical insulation between the test electrode 30 and the heat radiating member 40 decreases even when a high voltage is applied to the test electrode 30. It is suppressed.

固定部材５０によって、検査電極３０が被覆保護されている。これによれば、固定部材とは別の部材によって、検査電極が被覆保護される構成と比べて、部品点数の増大が抑制される。   The inspection electrode 30 is covered and protected by the fixing member 50. According to this, an increase in the number of parts is suppressed as compared with a configuration in which the inspection electrode is covered and protected by a member different from the fixing member.

以上、本発明の好ましい実施形態について説明したが、本発明は上記した実施形態になんら制限されることなく、本発明の主旨を逸脱しない範囲において、種々変形して実施することが可能である。   The preferred embodiments of the present invention have been described above. However, the present invention is not limited to the above-described embodiments, and various modifications can be made without departing from the spirit of the present invention.

本実施形態では、固定部材５０が接着剤である例を示した。しかしながら、固定部材５０としては、上記例に限定されない。例えば、図３に示すように、固定部材５０として、ねじを採用することもできる。しかしながら、この場合、基板２０と放熱部材４０との伝熱経路を確保するために、回路素子１０で発生し、基板２０に伝達された熱を放熱部材４０に伝達するための放熱ゲル６０を有する構成が好ましい。これによれば、放熱ゲルを有さない構成と比べて、放熱性が向上される。   In the present embodiment, an example in which the fixing member 50 is an adhesive is shown. However, the fixing member 50 is not limited to the above example. For example, as shown in FIG. 3, a screw may be employed as the fixing member 50. However, in this case, in order to secure a heat transfer path between the substrate 20 and the heat radiating member 40, the heat dissipation gel 60 for transmitting the heat generated in the circuit element 10 and transmitted to the substrate 20 to the heat radiating member 40 is provided. A configuration is preferred. According to this, compared with the structure which does not have a thermal radiation gel, heat dissipation is improved.

ちなみに、図３に示す変形例では、基板２０の裏面２０ｂにおける放熱部材４０との対向領域、及び、非対向領域それぞれに、放熱ゲル６０が設けられている。そして、対向領域に設けられた放熱ゲル６０を介して、基板２０と放熱部材４０とが熱的に接続され、非対向領域に設けられた放熱ゲル６０によって、検査電極３０が被覆保護されている。これによれば、放熱ゲルとは別の部材によって、検査電極が被覆保護される構成と比べて、部品点数の増大が抑制される。   Incidentally, in the modification shown in FIG. 3, the heat radiating gel 60 is provided in each of the region facing the heat radiating member 40 and the non-facing region on the back surface 20 b of the substrate 20. And the board | substrate 20 and the thermal radiation member 40 are thermally connected through the thermal radiation gel 60 provided in the opposing area | region, and the test | inspection electrode 30 is coat-protected by the thermal radiation gel 60 provided in the non-opposing area | region. . According to this, an increase in the number of parts is suppressed as compared with a configuration in which the inspection electrode is covered and protected by a member different from the heat dissipation gel.

本実施形態では、図２に示すように、複数の検査電極３０それぞれと対向領域との間の距離が一定である例を示した。しかしながら、複数の検査電極３０それぞれが接続される配線２２，２３は異なり、その配線２２，２３に印加される電圧も異なる。そのため、複数の検査電極３０それぞれに印加される電圧には、ばらつきがある。したがって、高電圧が印加される検査電極３０と放熱部材４０との電気絶縁性を高める必要がある。そこで、図４に示すように、検査電極３０として、第１電圧が印加される第１検査電極３１と、第１電圧よりも高電圧の第２電圧が印加される第２検査電極３２と、を有する構成においては、第２検査電極３２と対向領域との間の距離が、第１検査電極３１と対向領域との間の距離よりも長い構成が好ましい。すなわち、第２検査電極３２と放熱部材４０との間の距離が、第１検査電極３１と放熱部材４０との間の距離よりも長い構成が好ましい。これによれば、第２検査電極と対向領域（放熱部材）との間の距離が、第１検査電極と対向領域（放熱部材）との間の距離よりも短い構成と比べて、検査電極３０と放熱部材４０との電気絶縁性が高められる。したがって、検査電極３０と放熱部材４０との電気絶縁性が低下することが抑制される。なお、検査電極３０と放熱部材４０との間の距離は、検査電極３０に印加される電圧に正比例する。すなわち、検査電極３０に印加される電圧が高くなればなるほど、検査電極３０と放熱部材４０とが離れるように、両者の間の距離が長く設定される。   In the present embodiment, as shown in FIG. 2, an example is shown in which the distance between each of the plurality of inspection electrodes 30 and the counter region is constant. However, the wirings 22 and 23 to which the plurality of inspection electrodes 30 are connected are different, and the voltages applied to the wirings 22 and 23 are also different. Therefore, the voltages applied to each of the plurality of inspection electrodes 30 vary. Therefore, it is necessary to improve electrical insulation between the inspection electrode 30 to which a high voltage is applied and the heat radiating member 40. Therefore, as shown in FIG. 4, as the test electrode 30, a first test electrode 31 to which a first voltage is applied, a second test electrode 32 to which a second voltage higher than the first voltage is applied, In the configuration having the above, it is preferable that the distance between the second inspection electrode 32 and the opposing region is longer than the distance between the first inspection electrode 31 and the opposing region. That is, a configuration in which the distance between the second inspection electrode 32 and the heat radiating member 40 is longer than the distance between the first inspection electrode 31 and the heat radiating member 40 is preferable. According to this, compared with the configuration in which the distance between the second inspection electrode and the opposing region (heat radiating member) is shorter than the distance between the first inspection electrode and the opposing region (heat radiating member), the inspection electrode 30 is used. The electrical insulation between the heat dissipation member 40 and the heat dissipation member 40 is improved. Therefore, it is suppressed that the electrical insulation between the test electrode 30 and the heat dissipation member 40 is lowered. The distance between the inspection electrode 30 and the heat radiating member 40 is directly proportional to the voltage applied to the inspection electrode 30. That is, as the voltage applied to the test electrode 30 becomes higher, the distance between the test electrode 30 and the heat radiating member 40 is set longer so that the test electrode 30 and the heat radiating member 40 are separated from each other.

なお、図２〜図４では、検査電極３０が、紙面の上方から下方に向かって一列に並んで配置される例を示した。しかしながら、検査電極３０の配置としては、上記例に限定されず、例えば、紙面の上方から下方に向かって複数列並んでいても良いし、紙面の左方から右方に向かって並んでいても良い。   2 to 4 show examples in which the inspection electrodes 30 are arranged in a line from the top to the bottom of the drawing. However, the arrangement of the inspection electrodes 30 is not limited to the above example. For example, a plurality of rows may be arranged from the upper side to the lower side of the paper surface, or may be arranged from the left side to the right side of the paper surface. good.

１０・・・回路素子
２０・・・基板
２０ａ・・・一面
２０ｂ・・・裏面
３０・・・検査電極
４０・・・放熱部材
５０・・・固定部材
１００・・・半導体装置 DESCRIPTION OF SYMBOLS 10 ... Circuit element 20 ... Board | substrate 20a ... One side 20b ... Back side 30 ... Inspection electrode 40 ... Radiation member 50 ... Fixing member 100 ... Semiconductor device

Claims (3)

回路素子（１０）と、前記回路素子を一面（２０ａ）に搭載し、搭載した前記回路素子と自身に形成された配線（２２，２３）とにより回路が構成された基板（２０）と、前記基板の一面の裏面（２０ｂ）に形成された、前記回路の検査に使用される検査電極（３０）と、前記回路素子で発生した熱を放熱する放熱部材（４０）と、前記基板と前記放熱部材とを固定する固定部材（５０）と、を有し、
前記基板の裏面と前記放熱部材とが対向しており、
前記基板の裏面における前記放熱部材との非対向領域に、前記検査電極が形成されており、
前記固定部材は、接着剤であり、
前記基板の裏面における前記放熱部材との対向領域、及び、前記非対向領域それぞれに、前記接着剤が設けられ、
前記対向領域に設けられた接着剤を介して、前記基板と前記放熱部材とが機械的に接続され、
前記非対向領域に設けられた接着剤によって、前記検査電極が被覆保護されていることを特徴とする半導体装置。 A circuit element (10), the circuit element mounted on one surface (20a), and a circuit board configured by the mounted circuit element and wiring (22, 23) formed on the circuit element (10); A test electrode (30) formed on the back surface (20b) of one surface of the substrate and used for testing the circuit, a heat radiation member (40) for radiating heat generated in the circuit element, the substrate and the heat radiation A fixing member (50) for fixing the member,
The back surface of the substrate and the heat dissipation member are opposed to each other,
The inspection electrode is formed in a non-opposing region with the heat dissipation member on the back surface of the substrate ,
The fixing member is an adhesive;
The adhesive is provided in each of the facing region of the heat dissipation member on the back surface of the substrate and the non-facing region,
Through the adhesive provided in the facing region, the substrate and the heat dissipation member are mechanically connected,
The semiconductor device , wherein the inspection electrode is covered and protected by an adhesive provided in the non-facing region . 回路素子（１０）と、前記回路素子を一面（２０ａ）に搭載し、搭載した前記回路素子と自身に形成された配線（２２，２３）とにより回路が構成された基板（２０）と、前記基板の一面の裏面（２０ｂ）に形成された、前記回路の検査に使用される検査電極（３０）と、前記回路素子で発生した熱を放熱する放熱部材（４０）と、前記基板と前記放熱部材とを固定する固定部材（５０）と、を有し、
前記基板の裏面と前記放熱部材とが対向しており、
前記基板の裏面における前記放熱部材との非対向領域に、前記検査電極が形成されており、
前記固定部材は、ねじであり、
前記回路素子で発生し、前記基板に伝達された熱を前記放熱部材に伝達するための放熱ゲル（６０）をさらに有し、
前記基板の裏面における前記放熱部材との対向領域、及び、前記非対向領域それぞれに、前記放熱ゲルが設けられ、
前記対向領域に設けられた放熱ゲルを介して、前記基板と前記放熱部材とが熱的に接続され、
前記非対向領域に設けられた放熱ゲルによって、前記検査電極が被覆保護されていることを特徴とする半導体装置。 A circuit element (10), the circuit element mounted on one surface (20a), and a circuit board configured by the mounted circuit element and wiring (22, 23) formed on the circuit element (10); A test electrode (30) formed on the back surface (20b) of one surface of the substrate and used for testing the circuit, a heat radiation member (40) for radiating heat generated in the circuit element, the substrate and the heat radiation A fixing member (50) for fixing the member,
The back surface of the substrate and the heat dissipation member are opposed to each other,
The inspection electrode is formed in a non-opposing region with the heat dissipation member on the back surface of the substrate ,
The fixing member is a screw;
A heat dissipating gel (60) for transmitting heat generated in the circuit element and transmitted to the substrate to the heat dissipating member;
The heat dissipating gel is provided in each of the opposing region of the heat dissipation member on the back surface of the substrate and the non-opposing region ,
The substrate and the heat dissipation member are thermally connected through a heat dissipation gel provided in the facing region,
The semiconductor device , wherein the inspection electrode is covered and protected by a heat radiating gel provided in the non-facing region . 前記検査電極として、第１電圧が印加される第１検査電極（３１）と、前記第１電圧よりも高電圧の第２電圧が印加される第２検査電極（３２）と、を有し、
前記第２検査電極と前記対向領域との間の距離は、前記第１検査電極と前記対向領域との間の距離よりも長いことを特徴とする請求項１又は請求項２に記載の半導体装置。 The inspection electrode includes a first inspection electrode (31) to which a first voltage is applied and a second inspection electrode (32) to which a second voltage higher than the first voltage is applied,
3. The semiconductor device according to claim 1 , wherein a distance between the second inspection electrode and the opposing region is longer than a distance between the first inspection electrode and the opposing region. .
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