JP5967832B2 - Semiconductor power converter - Google Patents

Description

  The present invention relates to a semiconductor power converter, and more particularly to a semiconductor power converter capable of confirming the soundness of a device under test.

  Conventionally, in a semiconductor power conversion device that drives an electric motor or the like as a load, a test for confirming the soundness of the main circuit is performed as necessary. In order to confirm the soundness of the main circuit in a semiconductor power conversion device, it is sufficient to prepare a load facility that satisfies both the current rating and the voltage rating. It is not a good idea in terms of economy to prepare the load equipment. For this reason, the AC outputs of two semiconductor power converters are connected to each other, one semiconductor power converter is operated as an AC voltage source, and the other semiconductor power converter is operated as a current controller. There has been proposed a technique for performing (see, for example, Patent Document 1).

Japanese Patent Laying-Open No. 2003-219661 (page 4-5, FIG. 1)

  The technique disclosed in Patent Document 1 is effective in minimizing the rating of test equipment when one of the two semiconductor power converters is a device under test and the other is a test equipment. It is a technique. However, when the output frequency is increased, there is a problem that the response of the current control cannot follow.

  The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a semiconductor power converter capable of responding to current control even when the output frequency is increased.

  In order to achieve the above object, a semiconductor power conversion device according to the present invention tests an AC output of a device under test including a first converter that converts alternating current into direct current and a first inverter that converts this direct current into alternating current. A semiconductor power converter connected to equipment and controlled by a control device to test the device under test with a desired input and output, wherein the test equipment receives a second AC voltage A converter, a second inverter that converts the direct current output of the second converter into alternating current, and connects the alternating current output to the alternating current output of the first inverter via an alternating current reactor; and a current that flows through the alternating current reactor And a controller for outputting a first AC voltage reference in response to a conversion phase input, the voltage reference being provided via a first gain. A second converter that outputs a second AC voltage reference in response to a conversion phase input, and PWM converts the first AC voltage reference. A first PWM signal generator for controlling and supplying a gate signal to the first inverter; and a second PWM for controlling the second AC voltage reference by PWM and supplying the gate signal to the second inverter. A signal generator, an integrator having a frequency reference as an input and an output phase reference as a conversion phase to the first converter; a current reference; and a current detected by the current detector as a direct current amount And a current controller that outputs a phase difference command so that the input is minimized, and the difference between the phase reference and the phase difference command is used as a conversion phase to change the second value. To give to the converter It is characterized.

  According to the present invention, it is possible to provide a semiconductor power converter capable of responding to current control even when the output frequency is increased.

1 is a circuit configuration diagram of a semiconductor power conversion device according to a first embodiment of the present invention. The internal block block diagram of the control apparatus of the semiconductor power converter device which concerns on Example 1 of this invention. The internal block block diagram of the control apparatus of the semiconductor power converter device which concerns on Example 2 of this invention.

  Embodiments of the present invention will be described below with reference to the drawings.

  Hereinafter, a semiconductor power conversion device according to a first embodiment of the present invention will be described with reference to FIGS. 1 and 2.

1 is a basic circuit configuration diagram of a semiconductor power conversion device according to a first embodiment of the present invention, and FIG. 2 is an internal block configuration diagram of a control unit in FIG.

  In FIG. 1, a desired voltage is supplied from a variable voltage AC power source 1 to a three-phase converter 21 of a test facility 2. In addition, the test facility 2 includes a single-phase inverter 22, a three-phase inverter 23, a three-phase filter 24, and an AC reactor 25. The DC output of the three-phase converter 21 is connected to the DC link of the single-phase inverter 22 and is also connected to the DC link of the three-phase inverter 23. The AC side of the single-phase inverter 22 is connected to the AC terminal of the single-phase inverter 32 of the device under test 3 via the AC reactor 25. The device under test 3 has a three-phase converter 31 in addition. The AC terminal of the three-phase inverter 23 is connected to the AC terminal of the three-phase converter 31 via the AC filter 24.

  Both the single-phase inverter 22 and the single-phase inverter 32 have a configuration in which switching elements are bridge-connected, and an ON / OFF signal is given to the switching elements from the control device 4. Further, the current flowing through the AC reactor 4 is detected by the current detector 26 and is given to the control device 4 as current feedback. With the configuration shown in FIG. 1, it is possible to give a desired input voltage, input frequency, output voltage, output frequency, and output current to the device under test 3, and an equivalent test of the device under test 3 is possible. Become.

  The internal configuration of the control device 4 will be described below with reference to FIG.

The control device 4 in the first embodiment includes the single-phase inverter 32 and the test equipment 2 of the device under test 3 so that the output of the device under test 3 is the frequency reference f *, voltage reference V *, and current reference i *. The single-phase inverter 22 is controlled. The input voltage and input frequency of the device under test 3 can be given by controlling the output of the three-phase inverter 23 in an open loop.

  As shown in FIG. 2, the integrator 41 outputs a phase reference θ * by integrating a given frequency reference f *. The voltage reference V * is amplified by the gain 42 and supplied to the converter 44. Similarly, the voltage reference V * is amplified by the gain 43 and supplied to the converter 45. In the first embodiment, the gain 42 and the gain 43 have the same amplification factor. A phase reference θ * is given to the phase input of the converter 44. Thereby, the converter 44 outputs the AC voltage reference Vu having the phase θ *. The AC voltage reference Vu is converted into a PWM gate signal by the PWM signal generator 46 and supplied to the switching elements constituting the single-phase inverter 32 of the device under test 3. As a result, a single-phase AC voltage having a desired frequency and amplitude is output from the single-phase inverter 32 of the device under test 3.

  On the other hand, the current feedback If detected by the current detector 26 is converted into an effective value (amplitude value) via the RMS converter 48, and the difference between the value and the current reference I * is given to the current controller 49. By adopting such a configuration, the reference value of the current control can be set to a direct current amount, and even if the frequency reference f * increases, it can be made irrelevant to the response of the current controller 49. In the present application, since the current controller 49 does not need to respond sensitively to load fluctuations, for example, the response time can be on the order of seconds. Therefore, the conversion delay time of the RMS converter 48 is not a problem at all.

  Current control is performed as described above. In the first embodiment, the current controller 49 outputs the phase difference command θd so that the input deviation is minimized. The difference between the phase difference command θd and the phase reference θ * is given to the converter 45 as a phase input, and the converter 45 outputs an AC voltage reference Vx for one phase that has been subjected to phase rotation conversion at this phase. This AC voltage reference Vx is converted into a PWM gate signal by the PWM signal generator 47 and applied to the switching elements constituting the single-phase inverter 22 of the test facility 2.

  With the above configuration, it is possible to control the current flowing through the AC reactor 25, that is, the output current of the inverter 32, to a desired current reference I *.

  Hereinafter, a semiconductor power conversion device according to a second embodiment of the present invention will be described with reference to FIG.

FIG. 3 is an internal block configuration diagram of the control device 4A of the semiconductor power conversion device according to the second embodiment of the present invention. In the second embodiment, the same parts as those in the internal block configuration diagram of the control device 4 of the semiconductor power conversion device according to the first embodiment of the present invention shown in FIG. The second embodiment differs from the first embodiment in that the output of the current controller 49 is used as a voltage correction command, and the gain of the gain 43A is adjusted according to the voltage correction command. The phase input is a value obtained by subtracting the power factor reference φ * from the phase reference θ *.

  In the first embodiment, the gains of the gain 42 and the gain 43 are the same, and the magnitudes of the AC output voltages of the inverter 32 and the inverter 22 are made to coincide with each other. By adjusting the phase input, the output current of the inverter 32 is set to the desired current reference I *. On the other hand, in the second embodiment, the phase input of the converter 45 is fixed to a value obtained by subtracting the power factor reference φ * from the phase reference θ * to thereby adjust the output voltages of the single-phase inverter 32 and the single-phase inverter 22. By fixing the phase difference and adjusting the magnitude of the output voltage of the single-phase inverter 22, the output current of the single-phase inverter 32 becomes the desired current reference I *. If comprised in this way, it will become possible to test the single phase inverter 32 of the to-be-tested apparatus 3 with a desired power factor. That is, if the power factor reference φ * = 0 is set, the phase difference between the output voltages of the single-phase inverter 32 and the single-phase inverter 22 is set to zero, and the voltage amplitude of the single-phase inverter 22 is simply adjusted. The output current can be the desired current reference I *.

  Although two embodiments of the present invention have been described above, they are presented as examples and are not intended to limit the scope of the invention. The novel embodiment can be implemented in various other forms, and various omissions, replacements, and changes can be made without departing from the scope of the invention. These embodiments and modifications thereof are included in the scope and gist of the invention, and are included in the invention described in the claims and the equivalents thereof.

  For example, although the inverter 22 and the inverter 32 have been described as single-phase outputs, the present application is established even if both are three-phase outputs. In this case, the current detected by the current detector is developed into a d-axis current (reactive current) and a q-axis current (active current), and these currents are independently controlled so as to be a desired current reference, respectively. As a result, the input phase of the converter 45 and / or the gain of the gain 43A may be controlled.

  In addition, the inverter 23 and the AC filter 24 in the test facility 2 are not necessarily provided, and the converter 31 may be fed from an external AC power source. That is, if the input frequency of the converter 31 does not need to be variable, power may be supplied from the AC power source 1.

  In addition, the RMS converter used in the embodiment may be any converter that converts an instantaneous value of an alternating current into a direct current amount, and may be a converter that converts, for example, an average value of an absolute value of current or a zero peak value. .

DESCRIPTION OF SYMBOLS 1 AC power supply 2 Test equipment 3 Device under test 4, 4A Control device 21 Three-phase converter 22 Single-phase inverter 23 Three-phase inverter 24 AC filter 25 AC reactor 26 Current detector 31 Three-phase converter 32 Single-phase inverter 41 Integrator 42, 43, 43A Gain 44, 45 Converter 46, 47 PWM signal generator 48 RMS converter

Claims (5)

A device under test is desired by connecting an AC output of a device under test comprising a first converter for converting alternating current to direct current and a first inverter for converting direct current to alternating current to a test facility and controlling the device by a control device. A semiconductor power conversion device that performs a test with inputs and outputs of
The test equipment is
A second converter that receives an AC voltage;
A second inverter that converts the direct current output of the second converter into alternating current and connects the alternating current output to the alternating current output of the first inverter via an alternating current reactor;
A current detector for detecting a current flowing through the AC reactor;
The control device includes:
A first converter that provides a voltage reference via a first gain and outputs a first AC voltage reference in response to a phase input;
A second converter, wherein the voltage reference is provided via a second gain and outputs a second AC voltage reference in response to a phase input;
A first PWM signal generator for PWM-controlling the first AC voltage reference and supplying a gate signal to the first inverter;
A second PWM signal generator for PWM-controlling the second AC voltage reference and supplying a gate signal to the second inverter;
An integrator having a frequency reference as an input and an output phase reference as a phase input to the first converter;
A difference between a current reference and a value obtained by converting the current detected by the current detector into a DC amount as an input, and a current controller that outputs a phase difference command so that the input is minimized,
A semiconductor power conversion device, wherein a difference between the phase reference and the phase difference command is given to the second converter as a phase input. A device under test is desired by connecting an AC output of a device under test comprising a first converter for converting alternating current to direct current and a first inverter for converting direct current to alternating current to a test facility and controlling the device by a control device. A semiconductor power conversion device that performs a test with inputs and outputs of
The test equipment is
A second converter that receives a variable AC voltage;
A second inverter that converts the direct current output of the second converter into alternating current and connects the alternating current output to the alternating current output of the first inverter via an alternating current reactor;
A current detector for detecting a current flowing through the AC reactor;
The control device includes:
A first converter that provides a voltage reference via a first gain and outputs a first AC voltage reference in response to a phase input;
A second converter, wherein the voltage reference is provided via a second gain having a variable gain, and outputs a second AC voltage reference in response to a phase input;
A first PWM signal generator for PWM-controlling the first AC voltage reference and supplying a gate signal to the first inverter;
A second PWM signal generator for PWM-controlling the second AC voltage reference and supplying a gate signal to the second inverter;
An integrator having a frequency reference as an input and an output phase reference as a phase input to the first converter;
A difference between a current reference and a value obtained by converting the current detected by the current detector into a direct current amount, and a current controller that outputs a voltage correction command so that the input is minimized;
The difference between the power factor reference and the phase reference is given to the second converter as a phase input, and the amplification factor of the second gain is adjusted according to the voltage correction command. Semiconductor power conversion device. The test equipment is
A third inverter that converts the direct current output of the second converter into alternating current and outputs the alternating current output through an alternating current filter;
3. The semiconductor power conversion device according to claim 1, wherein an output of the AC filter is supplied to the first converter. 4.   4. The semiconductor power conversion device according to claim 1, wherein both the first inverter and the second inverter are single-phase output inverters. 5.   5. The semiconductor power conversion device according to claim 1, wherein the direct current amount of the current is an RMS value of the current. 6.

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