JP5945244B2 - Multiplex transmission system and multiple transmission method - Google Patents

Description

  The present invention relates to a multiplex transmission system and a multiplex transmission method for easily multiplexing and transmitting a plurality of OTU signals.

  In Optical Transport Network (OTN), which is internationally standardized in ITU-T, when a plurality of OTUk signals are multiplexed and transmitted, each OTUk signal (k is 1 to 4) to ODUk signal (k is 1 to 4). Demapping and ODUk multiplexing are performed to generate a faster OTUk signal. FIG. 3 is a diagram illustrating a frame structure of OTUk and ODUk and an ODUk multiplexing method. The OTUk signal is terminated at the OTUk layer, and the ODUk signal is extracted. The extracted ODUk signal is multiplexed into a higher OPUk payload. At the time of multiplexing, Asynchronous Mapping Procedure (AMP) or Generic Mapping Procedure (GMP) is used, and the frequency difference between the multiplexed ODUk signal and the OPUk payload is absorbed. The OPUk signal in which each ODUk signal is multiplexed is mapped to the ODUk and OTUk signals. In this way, by multiplexing the ODUk signals that manage the path of the low-speed client signal including the overhead and generating a higher-speed path, detailed path management becomes possible and flexible network operation becomes possible (for example, Non-Patent Document 1).

ITU-T G. 709 “Interfaces for the Optical Transport Network (OTN)”

  In the OTN that has been internationally standardized by ITU-T, the range from 2.5 Gbps class OTU1 to 100 Gbps class OTU4 is defined. When transmitting at a higher rate than the currently standardized OTU4, or when transmitting at a rate other than the standardized 10 Gbps, 40 Gbps, or 100 Gbps, the current standardized multiplexing method is supported. I can't. In the digital coherent optical transmission / reception system, it is possible to increase the transmission rate by changing the modulation multi-level by using BPSK, QPSK, 16QAM, 64QAM, etc. as the modulation system. Further, in the super channel scheme that collects a plurality of subcarriers, the transmission rate can be increased by changing the number of subcarriers. The increase in transmission rate due to the modulation multi-level and the number of subcarriers makes the transmission rate variable with a smaller granularity than the transmission rate granularity (4 times or 2.5 times) of the OTN multiplexing layer that has been standardized so far. (Transmission rate is 2, 3, 4,... N times).

  However, the current OTN multiplexing scheme has a problem that it cannot cope with a link technology that changes such a transmission rate with a small granularity.

  The present invention has been made in view of such circumstances. Multiplexing capable of easily multiplexing a plurality of OTU signals and realizing transmission at various rates including rates not defined by standardization. It is an object to provide a transmission system and a multiplex transmission method.

  The present invention is a multiplex transmission system that multiplexes and transmits a plurality of OTU signals, wherein among the OTU signals, a frame synchronization pattern of at least one of the OTU signals is different from the frame synchronization pattern of other OTU signals. Frame synchronization pattern changing means for changing to be MLD processing, MLD processing is performed on each of the OTU signals, and a plurality of the OTU signals subjected to MLD processing are multiplexed into a predetermined number of lanes for each predetermined bit length Transmitting means for transmitting a multiplexed signal; and receiving the multiplexed signal, performing frame synchronization using the frame synchronization pattern for the OTU signals having different frame synchronization patterns, and multiplexing the predetermined bits The signal is separated for each length, the MLD restoration process is performed on each separated signal, and each of the OTU signals is processed. By restoring the serial frame synchronization pattern in the original pattern, characterized by comprising a receiving means for restoring the original of the OTU signals.

  The present invention is characterized in that the frame synchronization pattern changing means changes the frame synchronization pattern so that it does not coincide with the frame synchronization pattern of another OTU signal even if the signal logic is inverted.

  The present invention is characterized in that the frame synchronization pattern changing means changes the frame synchronization pattern by exchanging a first half part and a second half part of the frame synchronization pattern.

  The present invention is characterized in that the transmission means multiplexes the OTU signals subjected to the MLD processing so that each of the OTU signals is distributed to two or more lanes.

  In the present invention, when the receiving means performs frame synchronization of the received signal, it performs frame synchronization on two or more of the OTU signals having a pattern different from the frame synchronization pattern of the other OTU signals. When one or more of the OTU signals are in frame synchronization, the bit phase for performing signal separation for each predetermined bit length is not changed.

  The present invention is characterized in that the transmission means aligns the frame phase of each of the OTU signals before multiplexing the plurality of OTU signals subjected to the MLD processing.

  The present invention is characterized in that the transmission means aligns the multiframe phases of the OTU signals before multiplexing the plurality of OTU signals subjected to the MLD processing.

  The present invention is a multiplex transmission method performed by a multiplex transmission system that multiplexes and transmits a plurality of OTU signals, and among the OTU signals, a frame synchronization pattern of at least one of the OTU signals is used as the frame of another OTU signal. A frame synchronization pattern changing step for changing the pattern so as to be different from the synchronization pattern, MLD processing is performed on each of the OTU signals, and a plurality of the OTU signals subjected to MLD processing are stored in a predetermined lane for each predetermined bit length. A transmission step of transmitting a multiplexed signal that is multiplexed into a number; receiving the multiplexed signal; performing frame synchronization using the frame synchronization pattern for the OTU signals having different frame synchronization patterns; Further, the signal is separated for each predetermined bit length, and MLD restoration processing is performed on each separated signal. And having a receiving step for restoring the frame synchronization pattern of the OTU signals respectively to the original pattern.

  According to the present invention, it is possible to easily multiplex a plurality of OTU signals and realize transmission at various rates including a rate not defined by standardization.

It is a block diagram which shows the structure of one Embodiment of this invention. It is explanatory drawing which shows operation | movement of the signal processing part 13 shown in FIG. It is explanatory drawing which shows the multiplexing system by a prior art.

  Hereinafter, a multiplex transmission system according to an embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a block diagram showing the configuration of the embodiment. In this figure, reference numeral 1 denotes a digital coherent transmitter that transmits information. Reference numeral 2 denotes a digital coherent receiver that receives information transmitted by the digital coherent transmitter 1. Reference numeral 3 denotes a transmission path connecting the digital coherent transmitter 1 and the digital coherent receiver 2. By using a digital coherent transmission system as the transmission system, the modulation multilevel can be flexibly changed, and a multiplex transmission system corresponding to various transmission rates can be realized.

  Reference numerals 11 and 12 are framers for converting a 100 Gbps client signal into a unified signal frame format (100G OTL 4.10) for long-distance optical transmission. In this example, a 2-channel client signal is input. The input client signals may be three or more channels. In that case, the same number of framers as the number of input client signals may be provided.

  Reference numeral 13 denotes a signal processing unit that performs signal processing of signals output from the framers 11 and 12. Reference numerals 141 and 142 denote multilane processing units that perform multilane processing on respective signals in the 100G OTL 4.10 format. Reference numerals 151 and 152 denote error correction units that perform error correction coding processing for performing error correction of the signals subjected to multilane processing. Reference numerals 161 and 162 denote MLD processing units for performing a multi lane distribution (MLD) process.

  When the number of input client signals is three or more, a multilane processing unit, error correction unit, and MLD processing unit in the signal processing unit 13 may be added according to the number of input client signals.

  Reference numeral 17 denotes an FAS changing unit that changes a frame synchronization pattern (FAS: Frame Alignment Signal) of a signal of one channel among the signals of the two channels so as to be different from the frame synchronization pattern of the other signal. Reference numeral 18 denotes a multiplexing unit that multiplexes two-channel signals. The FAS changing unit 17 may change the FAS for the signal multiplexed by the multiplexing unit 18. If the bit position of each channel is known, the FAS can be changed for the multiplexed signal.

  In describing the configurations of the digital coherent transmitter 1 and the digital coherent receiver 2 with reference to FIG. 1, the publicly known functions and configurations that the digital coherent transmitter and the digital coherent receiver normally have are described in the present invention. Unless the description is directly related, the description and illustration of the configuration are omitted.

  Next, the operation of the multiplex transmission system shown in FIG. 1 will be described. Here, as an example, a configuration and signal processing in a case where a 100 Gbps class OTU4 signal is multiplexed on two channels and transmitted by 200 Gbps class polarization multiplexing (DP) -16QAM will be described. The FAS changing unit 17 converts a frame synchronization pattern (FAS) of a plurality of OTUk or OTUkV signals (hereinafter, OTUk or OTUkV signals are collectively referred to as OTU signals) into at least one OTU signal (for example, the OTU of the first channel). The signal frame synchronization pattern is changed to be different from the frame synchronization pattern of other OTU signals (for example, the OTU signal of the second channel). A multi-lane distribution (MLD) process is performed on each OTU signal, and a plurality of OTU signals subjected to the MLD process are time-multiplexed into the number of lanes necessary for transmission for each predetermined bit length. The predetermined bit length is a predetermined bit length, and 1 bit, 8 bits, 64 bits, 128 bits, etc. may be selected and used.

  By changing the frame synchronization pattern, the FAS changing unit 17 prevents the frame synchronization pattern from appearing at various timings in the time-multiplexed signal pattern, and the digital coherent receiver 2 side Frame synchronization is possible. In addition, the MLD processing performed by the MLD processing units 161 and 162 is ITU-TG. As in OTL3.4 and OTL4.10 standardized in 709, lane identification and rearrangement are performed by distributing data signals to multiple lanes for each predetermined bit length and rotating the lane order for each frame. And distribution processing to multiple lanes that realize deskew.

  When the MLD processing units 161 and 162 perform the MLD processing conforming to the standard, it is possible to divert the standard MLD processing circuit when the multiplex transmission method is realized by the electronic circuit. However, it is not always necessary that the MLD process conforms to OTL3.4 and OTL4.10. On the digital coherent receiver 2 side, frame synchronization is performed using a frame synchronization pattern for an OTU signal having a pattern different from the frame synchronization pattern of other OTU signals, and the signal is separated for each of a predetermined multiplexed bit length. The frame synchronization pattern set for each signal in each separated signal is used to perform frame synchronization, MLD restoration processing is performed, the frame synchronization pattern of each OTU signal is rewritten to the original pattern, and the original OTU signal is Restore.

  The multilane processing units 141 and 142 distribute data to 4 lanes every 16 bytes (predetermined bit length is 128) for each of the OTU4 signals. The number of bytes (bit length) and the number of lanes for data distribution are not limited to 16 bytes and 4 lanes. Then, the MLD processing units 161 and 162 perform MLD processing for rotating the order of lanes at the head of the next OTU4 frame, and generate signals of a total of 8 lanes. FIG. 2 is a diagram illustrating an example of the MLD process. FIG. 2A shows an example in which the order of lanes is rotated by MLD processing for the first channel (processing performed by the MLD processing unit 161). The OTU4 signal for the first channel is distributed to four lanes every 16 bytes. It shows how it works. FIG. 2B shows an example in which the order of the lanes is rotated by MLD processing for the second channel (processing performed by the MLD processing unit 162), and the OTU4 signal for the second channel is increased to 4 lanes every 16 bytes. It shows how it is distributed. At this time, the frame synchronization pattern is changed so that the two channels do not match. In the case of 2-channel multiplexing, the frame synchronization pattern can be changed only on one channel.

  Here, an example of 16 bytes (128 bits) as the predetermined bit length has been described, but a bit length other than 128 bits may be used. The longer the bit length, the larger the delay and the circuit scale to be realized. Therefore, all the frame synchronization patterns (FAS) can be included, and an optimal value may be selected from the relationship between the delay and the circuit scale.

  In the case of 4-channel multiplexing, four types of fixed patterns A, B, C, and D may be prepared as frame synchronization patterns and used for each channel, or two types of fixed patterns A and B may be prepared. The fixed pattern A may be used for one channel, and the fixed pattern B may be used for the other three channels.

  The multiplexing unit 18 time-multiplexes the MLD-processed 2-channel signal every 16 bytes to generate a 4-lane data signal (see FIG. 2C). At this time, time multiplexing units and multiplexing methods may not be common to the channels. On the digital coherent receiver 2 side, frame synchronization of each lane is established using the frame synchronization pattern of one channel (frame synchronization pattern 1), data is separated every 16 bytes, and MLD restoration processing ( The original OTU4 signal is restored by performing (including restoration of the frame synchronization pattern).

  Although it has been described that frame synchronization before channel separation is performed using a frame synchronization pattern of any one of a plurality of channels, frame synchronization is performed using a frame synchronization pattern of a plurality of channels. May be.

When the frame synchronization pattern of each channel is different, frame synchronization may be performed on each channel. In this case, even if the signals of some channels are abnormal and frame synchronization cannot be achieved, if any channel is normal, received signal processing can be performed. Here, the data pattern when the frame phases of the two channels match is described, but the frame phases do not necessarily have to match. When the frame phases of the two channels do not match, after the channel separation of one channel and the channel separation, frame synchronization may be performed again on the other channel.

  Further, if the frame phases match, there is an advantage that if one frame is synchronized, the other frame can be synchronized. Further, when the frame phases are matched, the phase relationship between the two channels is only in a specific state (a state where the frame phases are matched), so that there is an advantage that the verification can be simplified when mounted on an electronic circuit.

  When the phase relationship between the two channels is arbitrary, it is necessary to verify whether the electronic circuit operates correctly with respect to a large number of signal patterns that are out of phase. For example, if the frame length is 10,000 bits and the frame phase is arbitrary, the number of patterns is 10,000. If the frame phases are matched, the number of patterns is 1.

  The error correction units 151 and 152 perform error correction coding on the entire ODUk / ODUkV signal in the plurality of OTU signals, and perform error correction decoding on the digital coherent receiver 2 side. By performing error correction processing on all OTU signals to be transmitted as one signal, the BER characteristics of each transmission lane can be averaged, and the BER in a specific transmission lane (for example, one of the subcarriers) The effects of deterioration can be averaged. On the other hand, when error correction is performed on each of the ODUk / ODUkV signals in each OTU signal, the error correction tends to cause the output BER to deteriorate rapidly as the input BER deteriorates. When the deterioration occurs, the BER after error correction of the transmission lane is greatly deteriorated, and the BER of the entire signal is also greatly deteriorated.

  Note that the frame synchronization pattern change of the OTU signal may not match the frame synchronization pattern of other OTU signals even if the signal logic is inverted. Even if the signal logic here is inverted, to make it not coincide with the frame synchronization pattern of other OTU signals, for example, confirm whether the frame synchronization pattern when the logic is inverted does not match with the other frame synchronization pattern, The one that does not match is to select. As a result, even when the signal logic is inverted due to signal demodulation in the digital coherent optical transmission system or logic inversion in the optical modulation / demodulation device, the occurrence of erroneous frame synchronization can be prevented and stable separation processing can be realized.

  Further, when changing the frame synchronization pattern of the OTU signal, a process of switching the first half and the second half of the frame synchronization pattern may be performed. In the OTU signal, the frame synchronization pattern is composed of two types of patterns OA1 and OA2. By changing the order of OA1 and OA2 and changing to OA2 and OA1, it is possible to realize a pattern that does not match the frame synchronization pattern (OA1, OA2) of the original OTU signal even if there is a logic inversion.

  Alternatively, each OTU signal subjected to MLD processing may be time-multiplexed for each predetermined bit length so that it is distributed to two or more lanes necessary for transmission. For example, if the number of OTU signals to be transmitted / received is 8 and the number of lanes required for transmission is 4 lanes (25 Gbps NZR signal is transmitted by 4 WDM), 2 channels of OTU signal can be multiplexed to 1 lane However, multiplexing is performed so that one channel of the OTU signal is distributed to at least two transmission lanes. Thereby, the FEC of each OTU signal is distributed to a plurality of transmission lanes and averaged, thereby averaging the influence of BER deterioration in a specific transmission lane (for example, one of the subcarriers). it can.

  When performing frame synchronization of the received signal after transmission, frame synchronization is performed on two or more OTU signals having a pattern different from the frame synchronization pattern of other OTU signals, and one or more OTU signals are transmitted. When the frame synchronization is established, signal separation processing may be performed without changing the bit phase for performing signal separation for each predetermined bit length. For example, when the received signal is separated into four signals every 8 bits, the signal separation process is continued without changing the timing (bit boundary) for dividing the received signal into four signals. Thereby, even if a part of the OTU signal is interrupted on the transmission side, frame synchronization and signal separation processing can be continued on the digital coherent receiver 2 side.

  Further, the frame phase or multiframe phase of each OTU signal may be aligned before multiplexing a plurality of OTU signals subjected to MLD processing for each predetermined bit length. In this case, since the frame phase relationship of the plurality of OTU signals is only in a specific state, verification can be simplified when mounted on an electronic circuit. In addition, frame synchronization can be established in one lane, and at the same time, the frame phase of another lane is specified, so that the frame synchronization processing of each channel after signal separation can be simplified.

  Further, before multiplexing a plurality of OTU signals subjected to MLD processing for each predetermined bit length, the multiframe phases of the respective OTU signals may be aligned. In this case, since the multi-frame phase relationship between a plurality of OTU signals is only in a specific state, verification can be simplified when mounted on an electronic circuit. In addition, frame synchronization and multi-frame synchronization can be established in one lane, and at the same time, the frame phase and multi-frame phase of other lanes are specified. It can be simplified.

  In the above description, an example in which 100 Gbps class OTU4 signals are multiplexed on two channels and transmitted by 200 Gbps class polarization multiplexing (DP) -16QAM has been described. However, 10 Gbps class and 40 Gbps class OTU signals are multiplexed. 20 Gbps class and 80 Gbps class transfer may be used. Further, the number to be multiplexed is not limited to 2, and may be 3 or more.

  As described above, in the digital coherent transmitter, among the OTU signals, the frame synchronization pattern of at least one OTU signal is changed to be different from the frame synchronization pattern of the other OTU signals, and the MLD process is performed. A multiplexed signal obtained by multiplexing a plurality of OTU signals in a predetermined number of lanes for each predetermined bit length is transmitted, and a digital coherent receiver uses a frame synchronization pattern for an OTU signal having a different frame synchronization pattern. Synchronization is performed, the signal is separated for each of the multiplexed predetermined bit lengths, and the MLD restoration process is performed on each of the separated signals, so that the frame synchronization pattern of each OTU signal is restored to the original pattern. . This makes it possible to perform frame synchronization at the rate of each channel including rates other than the standardized 10 Gbps, 40 Gbps, and 100 Gbps classes, thus realizing a multiplex transmission system that realizes transmission at various rates. it can.

  The digital coherent transmitter 1 and the digital coherent receiver 3 in the above-described embodiment may be realized by a computer. In that case, a program for realizing this function may be recorded on a computer-readable recording medium, and the program recorded on this recording medium may be read into a computer system and executed. Here, the “computer system” includes an OS and hardware such as peripheral devices. The “computer-readable recording medium” refers to a storage device such as a flexible medium, a magneto-optical disk, a portable medium such as a ROM and a CD-ROM, and a hard disk incorporated in a computer system. Furthermore, the “computer-readable recording medium” dynamically holds a program for a short time like a communication line when transmitting a program via a network such as the Internet or a communication line such as a telephone line. In this case, a volatile memory inside a computer system serving as a server or a client in that case may be included and a program held for a certain period of time. Further, the program may be for realizing a part of the functions described above, and may be a program capable of realizing the functions described above in combination with a program already recorded in the computer system. It may be realized using hardware such as PLD (Programmable Logic Device) or FPGA (Field Programmable Gate Array).

  As mentioned above, although embodiment of this invention has been described with reference to drawings, the said embodiment is only the illustration of this invention, and it is clear that this invention is not limited to the said embodiment. is there. Therefore, additions, omissions, substitutions, and other modifications of the components may be made without departing from the technical idea and scope of the present invention.

  It can also be applied to applications where it is indispensable to multiplex a plurality of signals easily and realize transmission at various rates including rates not defined by standardization.

  DESCRIPTION OF SYMBOLS 1 ... Digital coherent transmitter, 11, 12 ... Framer, 13 ... Signal processing part, 141, 142 ... Multilane processing part, 151, 152 ... Error correction part, 161, 162 ..MLD processing unit, 17 ... FAS changing unit, 18 ... multiplexing unit, 2 ... digital coherent receiver, 3 ... transmission path

Claims (8)

A multiplex transmission system for multiplexing and transmitting a plurality of OTU signals,
Frame synchronization pattern changing means for changing a frame synchronization pattern of at least one of the OTU signals out of the OTU signals so as to be different from the frame synchronization pattern of other OTU signals;
Transmitting means for performing MLD processing on each of the OTU signals, and transmitting a multiplexed signal obtained by multiplexing the plurality of OTU signals subjected to MLD processing in a predetermined number of lanes for each predetermined bit length;
The multiplexed signal is received, the OTU signal having a different frame synchronization pattern is subjected to frame synchronization using the frame synchronization pattern, and the signal is separated for each of the multiplexed predetermined bit lengths. And a receiving means for restoring the original OTU signal by performing MLD restoration processing on each of the signals and restoring the frame synchronization pattern of each of the OTU signals to the original pattern. . The frame synchronization pattern changing means includes
2. The multiplex transmission system according to claim 1, wherein the frame synchronization pattern is changed so as not to coincide with the frame synchronization pattern of another OTU signal even if the signal logic is inverted. The frame synchronization pattern changing means includes
The multiplex transmission system according to claim 2, wherein the frame synchronization pattern is changed by exchanging a first half part and a second half part of the frame synchronization pattern. The transmission means includes
4. The multiplex transmission system according to claim 1, wherein multiplexing is performed so that each of the OTU signals subjected to the MLD process is distributed to two or more lanes. 5. The receiving means includes
When performing frame synchronization of the received signal, frame synchronization is performed for two or more of the OTU signals having a pattern different from the frame synchronization pattern of the other OTU signals. 5. The multiplex transmission system according to claim 1, wherein when the frame synchronization is established, a bit phase for performing signal separation for each predetermined bit length is not changed. 6. The transmission means includes
6. The multiplex transmission system according to claim 1, wherein a frame phase of each of the OTU signals is aligned before multiplexing the plurality of OTU signals subjected to the MLD processing. 6. The transmission means includes
7. The multiplex transmission system according to claim 1, wherein, before multiplexing the plurality of OTU signals subjected to the MLD process, the multiframe phases of the respective OTU signals are aligned. A multiplex transmission method performed by a multiplex transmission system for multiplexing and transmitting a plurality of OTU signals,
A frame synchronization pattern changing step of changing a frame synchronization pattern of at least one of the OTU signals to be different from the frame synchronization pattern of other OTU signals, among the OTU signals;
A transmission step of performing MLD processing on each of the OTU signals, and transmitting a multiplexed signal obtained by multiplexing the plurality of OTU signals subjected to MLD processing into a predetermined number of lanes for each predetermined bit length;
The multiplexed signal is received, the OTU signal having a different frame synchronization pattern is subjected to frame synchronization using the frame synchronization pattern, and the signal is separated for each of the multiplexed predetermined bit lengths. A multiplex transmission method comprising: a receiving step of performing MLD restoration processing on each of the signals and restoring the frame synchronization pattern of each of the OTU signals to an original pattern.

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