JP5920657B2 - AC adapter - Google Patents

Description

    The present invention relates to an AC adapter used as a power source for a notebook computer or the like, particularly from a notebook computer or the like when a predetermined output voltage is not required in a light load or no load state in a sleep mode of the notebook computer or the like. The control relates to the control for reducing the output voltage in response to the instruction.

If the notebook PC is shut down or put into sleep mode when AC power is received, the AC adapter supplies no load unless the battery is charged.
The standby power of the AC adapter when the notebook computer is shut down or put into sleep mode is about 0.1 to 0.5 W, so the momentum for further reducing standby power is increasing.
Here, the AC adapter is completely turned off from the commercial AC power source by a seesaw switch or the like that is disconnected from the AC outlet, but it is not in a general environment.

For this reason, in order to reduce the standby power of the AC adapter, a method for reducing the standby power of the AC adapter by detecting the presence / absence of a connection by attaching or not attaching a DC plug to a device such as a notebook computer is disclosed. .
In Patent Document 1, a terminal for outputting the battery voltage from the battery on the device side and a detection terminal on the AC adapter output side are provided in correspondence with each other, and a switching element and a switching control circuit of the AC adapter are provided by a signal from the detection terminal. The switching oscillation operation is started or stopped according to the presence or absence of connection of the apparatus by switching the operation / stop of the connection between the devices.

  In Patent Document 2, it is detected that a DC plug is not attached to a DC jack as an output terminal and a battery is not connected to a charger output as a no-load state, and standby power at no load is detected. An AC adapter with a charger that lowers the power is disclosed.

JP 2003-88111 A JP 2006-20437 A

The laptop is equipped with a battery, which is connected to a dedicated AC adapter to charge the battery and supply power. Here, a system check function for determining whether or not a notebook personal computer can be used is mounted on a notebook personal computer or a battery and a corresponding AC adapter. Prevents so-called erroneous connection between devices, and actively generates heat from charging at a voltage different from the set voltage, and abnormal heat generation during continuous operation of the AC adapter that does not satisfy the power, leading to smoke and fire. It is to prevent.
To install this system check function between the notebook computer and the AC adapter, in addition to the two normal DC supply lines, a three-core cable with one additional signal line for system check is required. It has been adopted. Normally, a digital signal is used for the system check, and communication is performed immediately after the notebook personal computer or the AC adapter is turned on through the cable to which the digital signal is added. After the system check is completed, it is a general usage method that there is no need for communication again.
However, in the prior art, there is a description that the standby power reduction is performed by detecting the no-load time depending on whether the DC plug is connected or not, but regarding the standby power reduction at the no-load time including this system check function, Not disclosed.

  An object of the present invention is to share a standby power reduction signal and a system check signal in a no-load state with a single signal line in an AC adapter having the system check function.

In order to solve the above-described problems, an AC adapter according to the present invention applies input power to a primary winding of a transformer, and turns on and off a switching element connected to the primary winding of the transformer by a control circuit. And a switching power supply that induces a pulse voltage in the secondary winding of the transformer and supplies the output voltage rectified and smoothed by the secondary side rectifying and smoothing circuit to the load via the DC plug. A feedback circuit that feeds back from the secondary side to the primary side to control the switching element by the control circuit so that the compared voltage difference disappears compared to the reference voltage, and a signal from the load device via the DC plug A means for starting / stopping the output voltage or changing it to a second voltage lower than the rated voltage, and a load device and a switching power supply through a DC plug Authentication means for performing authentication between devices, and the DC plug is composed of a three-core cable, and one of the cables of the DC plug is connected to the front of the load device.
A signal for changing the output voltage to a second voltage lower than the rated voltage and an authentication for performing authentication between the devices.
It is characterized by sharing the signal of the verification means.
Also, AC adapter according to the present invention, the signal of the authentication means for performing authentication between devices is performed by a digital signal, a signal for varying the output voltage from the load device to a second voltage less than the rated voltage
It is performed on a DC signal.
In addition, the AC adapter according to the present invention includes means for starting / stopping the output voltage by a signal from the load device via the DC plug and means for changing the output voltage to a second voltage lower than the rated voltage, and performs authentication between the devices. One of the selection is performed by inputting a pulse signal having a frequency lower than the pulse period of the digital signal to be performed or a DC signal.

  According to the AC adapter according to the present invention, it is possible to share a system check signal for authenticating the AC adapter and a standby power reduction signal at no load with one signal line.

It is a block diagram which shows the AC adapter which concerns on Example 1 of this invention. It is a sequence diagram which shows each part operation | movement of the AC adapter which concerns on FIG. It is a block diagram which shows the AC adapter which concerns on the application of Example 1 of this invention. It is a sequence diagram which shows each part operation | movement of the AC adapter which concerns on FIG. It is a block diagram which shows the AC adapter which concerns on Example 2 of this invention. It is a sequence diagram which shows each part operation | movement of the AC adapter which concerns on FIG.

  Hereinafter, an AC adapter according to an embodiment of the present invention will be described in detail with reference to the drawings. In the following description of the drawings, the same or similar parts are denoted by the same or similar reference numerals.

  FIG. 1 is a configuration diagram illustrating an AC adapter according to a first embodiment of the present invention.

The configuration of the AC adapter according to the present embodiment will be described with reference to FIG. The AC adapter 1 includes a switching power supply 2 that receives an AC power supply Vac, an authentication circuit 3 that authenticates a connection between the load device 6 and the AC adapter 1, and a signal selection circuit 4. After the voltage of the AC power supply Vac is converted into a DC voltage by the switching power supply 2, it is connected to the load device 6 via the terminals p1 and p2 of the DC plug 5.
Moreover, although the electric power supply apparatus 2 shown in FIG. 1 is comprised by the flyback converter, it can also be comprised by a forward converter etc. and a converter can be substituted to another system.

Further, the DC plug 5 is provided with a terminal p3, and a system check signal terminal between the AC adapter 1 and the load device 6 is connected. Thus, authentication can be performed by transmitting and receiving a digital signal by an authentication circuit provided for each of whether or not the AC adapter is compatible with the load device 6.
In the sleep mode from the load device 6 side, which is a notebook computer, the switch 1 is turned on and a DC signal is transmitted from the built-in battery to the AC adapter 1 side, and the AC adapter is connected via the terminal p3 of the DC plug 5 in the same manner as described above. One side receives and stops or changes the output voltage Vo to an output voltage lower than the rated voltage.

The switching power supply 2 shown in FIG. 1 is composed of a flyback converter, rectifies the AC voltage of the AC power supply Vac with a bridge diode DB1, and smoothes it with a capacitor C1 to obtain a DC voltage. A series circuit of a primary winding P of the transformer T, a switching element Q1, and a resistor R3 is connected in parallel with the capacitor C1. A series circuit of a diode D4 and a smoothing capacitor C5 is connected to the secondary winding S of the transformer T, and a voltage between both terminals of the smoothing capacitor C5 is an output voltage Vo to the load device 6.
Here, the negative electrode of the smoothing capacitor C5 is connected to the terminal p2, which is GND, and the positive electrode of the smoothing capacitor Co is connected to the terminal p1.
In addition to the above-mentioned components, the flyback converter includes MOSFETQ2, diodes D1 to D3, zener diode ZD1, photocouplers PC1 and PC2, resistors R1 to R4, capacitors C1 to C4, and switching element Q1 as primary components. A control circuit IC1 that performs control is provided.
In addition, the shunt regulator IC2 and resistors R5 to R7 are provided as secondary parts. The shunt regulator IC2 compares the internal reference voltage with the voltage obtained by dividing the output voltage Vo with the series resistance of resistors R5 and R6, and compares the errors. Feedback control of the output voltage Vo is performed by transmitting a signal to the photocoupler PC1-2 connected to the primary side via the photocoupler PC1-1.

The output terminal Drv of the control circuit IC1 for generating a switching pulse as a gate drive signal is connected to the gate of the switching element Q1 on the primary side, and the above-described photocoupler PC1-2 is connected to the control terminal Pfb of the control circuit IC1. It is connected. The control circuit IC1 determines the pulse width of the switching pulse based on the signal from the photocoupler PC1-2.
MOSFET Q2, resistors R1 and R2, diode D1, and zener diode ZD1 constitute a start-up circuit for generating a power supply voltage of control circuit IC1. A resistor R1 is connected between the drain and gate of the MOSFET Q2, and the drain is connected to the anode of the capacitor C1. A series circuit of a Zener diode ZD1, a diode D1, and a resistor R2 is connected between the gate and source of the MOSFET Q2, and the connection point of the diode D1 and the resistor R2 is connected to the power supply terminal + Vcc of the control circuit IC1. A photocoupler PC2-2 is connected between the gate of the MOSFETQ2 and the cathode of the capacitor C1, and the MOSFETQ2 is turned on / off based on a signal from the secondary photocoupler PC2-1. The MOSFET Q2 supplies a current (constant current) obtained by dividing the Zener voltage of the Zener diode ZD1 by the resistor R2 to the control circuit IC1 when the secondary photocoupler PC2-1 is in the OFF state.
A capacitor C3 is connected in parallel between the power supply terminal + Vcc of the control circuit IC1 and the ground gnd. The capacitor C3 is connected from the primary auxiliary winding Pd of the transformer T via the diode D3, rectifies and smoothes the voltage of the primary auxiliary winding Pd after the start of switching, and supplies the power supply voltage of the control circuit IC1. The cathode of the capacitor C3 and the ground gnd of the control circuit IC1 are connected to the cathode of the capacitor C1.

The authentication circuit 3 shown in FIG. 1 includes a power supply circuit including a resistor R8, a Zener diode ZD2, and a capacitor C7, and an authentication integrated circuit IC3 connected to the power supply circuit described above. Similarly, an authentication integrated circuit IC4 having a similar function is also mounted on the load device 6 side, and the authentication integrated circuit IC4 obtains power from the internal battery BT1 of the load device 6. The authentication integrated circuits IC3 and IC4 are connected to the resistor R14 on the load device 6 side via the DC plug p3.
The authentication integrated circuits IC3 and IC4 are authenticated only when the AC power supply of the AC adapter 1 is received and when the DC plug is connected to the load device 6. First, an authentication signal is transmitted as a digital signal from the AC adapter 1 side. Then, the two-way communication from the load device 6 is performed to complete the authentication. After the authentication is completed, the input / output terminals of the authentication integrated circuits IC3 and IC4 are in an open state, and become an L level potential.
Here, when the AC adapter 1 that cannot be used by the load device 6 is connected, since the authentication is denied, the state where no power is supplied on the load device 6 side is continued.

1 includes a photocoupler PC2, transistors Q3 to Q6, diodes D5 to D7, resistors R9 to R13, capacitors C8 and C9, and includes transistors Q3 and Q4, a diode D6, resistors R9 and R10. The latch circuit includes a pulse mask circuit including transistors Q5 and Q6, diodes D5 to D7, capacitors C8 and C9, and resistors R11 to R13. The latch circuit and the pulse mask circuit are connected in parallel to the input / output terminals of the authentication integrated circuits IC3 and IC4.
Here, when the digital signal of the authentication signal is output, the transistor Q6 of the pulse mask circuit is turned on, and the latch circuit maintains the off state. When a DC signal is input from the load device 6 side, the transistor Q6 of the pulse mask circuit does not operate and the transistor Q5 is turned on to turn on the latch circuit. When the latch circuit is turned on, a current flows to the photocouplers PC1-1 and PC2-1 through the diodes D5 and D6, the control circuit IC1 turns off the gate drive signal to the switching element Q1, and the starting circuit composed of the MOSFET Q2 is Turns off. As a result, the AC adapter 1 stops outputting and enters a standby state, and only the power consumption of the resistor R1 is obtained.

FIG. 2 is a sequence diagram showing the operation of each part of the AC adapter according to FIG.
Next, the operation of each part of the AC adapter 1 according to the first embodiment will be described with reference to FIG.
At time t0 shown in FIG. 2, the AC adapter 1 is connected to the AC power source and started to be turned on. At time t0, the AC power supply Vac is supplied to the switching power supply 2 and the starting circuit charges the capacitor C3. At time t1, the control circuit IC1 operates to start switching of the switching element Q1, and the output voltage Vo starts to rise.

  When the time t2 is reached, the output voltage Vo exceeds the power supply voltage of the authentication integrated circuit IC3, the authentication integrated circuit IC3 starts authentication with the authentication integrated circuit IC4 of the load device 6, and the digital signal is output during the period from time t2 to t3. Send and receive. The output voltage reaches the rated voltage before reaching the time t3, and when the authentication on the load device 6 side is completed, the load current Io of the load device 6 starts to flow at the time t3.

At time t4, the load device 6 enters the sleep mode, and the load current Io becomes zero. The battery BT1 mounted on the load device 6 will be described as being fully charged.
From time t4 to t6, the AC adapter 1 is in a no-load state, but at time t5, the switch SW1 of the load device 6 is turned on, and a DC voltage is input to the AC adapter 1 via the p3 terminal of the DC plug. . When the DC voltage is input, the transistor Q6 is turned on by the time constant of the capacitor C8 and the resistor R13 through the series circuit of the capacitor C8 and the resistor R13, and the transistor Q5 is turned off. However, the time constant of the capacitor C8 and the resistor R13 has elapsed, and the transistor Q5 is turned on at time t6 after the time constant of the resistors R11, R12 and the capacitor C9 has elapsed. The device is turned on and a current is passed through the photocouplers PC1-1 and PC2-1. As a result, the primary-side photocouplers PC1-2 and PC2-2 are turned on, the pfb terminal voltage of the control circuit IC1 is made zero, the switching operation of the switching element Q1 is stopped, and the gate voltage of the MOSFET Q2 is made zero. Then, the power supply from the starting circuit to the control circuit IC1 is stopped. The power supply voltage + Vcc of the control circuit IC1 after time t5 is obtained from the primary auxiliary winding Pd of the starter circuit and the transformer T because the primary side photocouplers PC1-2 and PC2-2 are in the ON state. Since it cannot be discharged, it will continue to discharge and become zero volts. This state continues until time t7 until the sleep mode of the load device 6 is completed. That is, since the switching of the AC adapter 1 is stopped during the period from the time t6 to the time t7, the power consumption from the AC power source Vac is the power consumption of the resistor R1 (about 10 to several tens mW), thereby realizing extremely low standby power. .

Next, when the sleep mode of the load device 6 is canceled at time t7, the switch SW1 of the load device 6 is turned off, and zero voltage is input to the AC adapter 1 side via the p3 terminal of the DC plug. As a result, the transistor Q5 is turned off at time t8 after elapse of the time constant by the resistors R11, R12 and the capacitor C9, the latch circuit composed of the transistors Q3, Q4, etc. is turned off, and the photocouplers PC1-1 and PC2 The current flowing to -1 becomes zero, the start-up circuit starts operating, and the + Vcc voltage of the control circuit IC1 is charged.
Next, at time t9, the control circuit IC1 is activated, outputs a gate drive signal, and starts switching of the switching element Q1, whereby the output voltage Vo starts to rise.
When the time t10 is reached, the output voltage Vo exceeds the power supply voltage of the authentication integrated circuit IC3, the authentication integrated circuit IC3 starts authentication with the authentication integrated circuit IC4 of the load device 6, and the digital signal is output during the period of time t10 to t11. Send and receive. The output voltage reaches the rated voltage before reaching the time t11, and when the authentication on the load device 6 side is completed, the load current Io of the load device 6 starts to flow at the time t11, and the AC adapter 1 performs normal power supply. .

  As described above, the AC adapter 1 according to the present embodiment can share the system check signal for authenticating the AC adapter and the standby power reduction signal at no load with one signal line.

  FIG. 3 is a configuration diagram illustrating an AC adapter 1a according to an application of the first embodiment. 3 that are substantially the same as those in FIG. 1 are denoted by the same reference numerals and description thereof is omitted.

The AC adapter 1a according to the application of the first embodiment changes the output voltage from the rated voltage to a low voltage lower than the rated voltage and outputs the standby power by the switching stop operation in the sleep mode of the first embodiment. It is in. That is, the power loss of the switching power supply 2 is reduced by changing the output voltage to a low voltage.
The difference from the first embodiment is the switching power supply 2a and the signal selection circuit 4a. Specifically, the latch circuit composed of the transistors Q3, Q4, etc., the photocoupler PC2, and the diodes D1, D5, D6 are deleted. The zener diode ZD3 has been added. Zener diode ZD3 is added between the cathode of shunt regulator IC2 and the collector of transistor Q5.
This is because when the load device 6 enters the sleep mode and a DC voltage is input to the AC adapter 1a via the p3 terminal of the DC plug, the transistor Q5 is turned on, and the photocoupler is connected via the added Zener diode ZD3. Apply PC1-1 current. That is, the output voltage Vo is clamped by a voltage obtained by adding the Zener voltage of the Zener diode ZD3 and the forward voltage of the photocoupler PC1-1. Note that the Zener voltage of the Zener diode ZD3 is preferably set in the range of 1/2 to 3/4 of the rated voltage in order to maintain the switching operation of the switching power supply 2a.

FIG. 4 is a sequence diagram showing the operation of each part of the AC adapter 1a according to the application of the first embodiment. 4 that are substantially the same as those in FIG. 2 are assigned the same reference numerals, and descriptions thereof are omitted.
At time t4, the load device 6 enters the sleep mode, and the load current Io becomes zero. The battery BT1 mounted on the load device 6 will be described as being fully charged.
From time t4 to t5a, the AC adapter 1a is in a no-load state, but at time t5a, the switch SW1 of the load device 6 is turned on, and a DC voltage is input to the AC adapter 1a via the p3 terminal of the DC plug. . When the DC voltage is input, the transistor Q6 is turned on by the time constant of the capacitor C8 and the resistor R13 through the series circuit of the capacitor C8 and the resistor R13, and the transistor Q5 is turned off. However, when the time constants of the capacitor C8 and the resistor R13 have elapsed, and further the time constants of the resistors R11, R12, and the capacitor C9 have elapsed, the transistor Q5 is turned on, and a current flows through the photocoupler PC1-1 through the Zener diode ZD3. As a result, the output voltage Vo becomes the voltage clamped by the voltage obtained by adding the Zener voltage of the Zener diode ZD3 and the forward voltage of the photocoupler PC1-1 to the control circuit IC1 via the photocoupler PC1-2. The pfb terminal voltage is controlled, and the switching operation of the switching element Q1 is intermittent oscillation. The power supply voltage + Vcc of the control circuit IC1 after time t6a drops to a + Vcc voltage proportional to the output voltage because the output voltage Vo is lower than the rated voltage. This state continues until time t7a until the sleep mode of the load device 6 is completed.
That is, during the period from time t6a to t7a, switching of the switching power supply 2a is intermittently oscillated, so the power consumption of the AC adapter 1a is 1 / period of intermittent oscillation, and standby power lower than the normal oscillation frequency is realized. .
After the sleep mode is completed, when the time constants of the resistors R11, R12, and the capacitor C9 elapse at time t8a, the transistor Q5 is turned off, the output voltage clamp by the zener diode ZD3 is released, and the output voltage Vo is rated at time t9a. Return to voltage. Further, the load current Io on the load device 6 side starts to flow at time t10a.

  As described above, the AC adapter 1a according to the application of the first embodiment can share the system check signal for authenticating the AC adapter and the standby power reduction signal at no load with one signal line.

  FIG. 5 is a configuration diagram illustrating an AC adapter 1b according to the second embodiment. 5 that are substantially the same as those in FIG. 1 are given the same reference numerals, and descriptions thereof are omitted.

The AC adapter 1b according to the second embodiment can further select the function of changing the output voltage from the rated voltage to a low voltage lower than the rated voltage and outputting the switching stop operation in the sleep mode of the first embodiment. It is added. The selection of the switching operation of the AC adapter 1b during the sleep mode of the load device is selected by a signal output from the load device to the p3 terminal of the DC plug. Here, the sleep mode in which the switching stop operation is performed will be described as the first sleep mode, and the mode in which the output voltage is changed from the rated voltage to a low voltage lower than the rated voltage will be described as the second sleep mode.
The difference from the first embodiment is that the signal selection circuit is changed to become a signal selection circuit 4b. Specifically, a low frequency pulse detection circuit 7 is newly added. Also, the load device is changed to a load device 6b to which a switch SW2 and a low-frequency pulse generator PG1 are added in order to output a signal for the switching stop operation in the sleep mode.

Details of the components of the second embodiment which are different from those in FIG. 1 showing the configuration of the first embodiment will be described.
The added low frequency pulse detection circuit 7 is built in the signal selection circuit 4b and includes a transistor Q7, diodes D8 to D12, a Zener diode ZD3, capacitors C10 and C11, and resistors R16 and R17.
A series circuit of a capacitor C11, a resistor R16, a diode D11, and a capacitor C10 is connected between the p3 terminal of the DC plug and GND, and the base and emitter of the transistor Q7 are connected between the capacitor C10 via a resistor R17. The cathode of the diode D12 is connected to the anode connection point of the resistor R16 and the diode D10, and the anode of the diode D12 is connected to GND.
Due to the configuration of the capacitors C10 and C11, the resistor R16, and the diodes D11 and D12, when the low frequency pulse signal is input to the p3 terminal of the DC plug, the low frequency pulse voltage is rectified and smoothed in the capacitor C10, via the resistor R17. The base current of transistor Q7 can be obtained.
The collector of the transistor Q7 is connected to the anode of the Zener diode ZD3, and the cathode of the Zener diode ZD3 is connected to the cathode of the shunt regulator IC2.
Here, when the low-frequency pulse signal is input to the p3 terminal of the DC plug, the added low-frequency pulse detection circuit 7 supplies a current to the photocoupler PC1-1 through the Zener diode ZD3 and outputs the output voltage Vo. Feedback control is performed by clamping with a voltage obtained by adding the Zener voltage of the Zener diode ZD3 and the forward voltage of the photocoupler PC1-1.
The cathode of the diode D9 is connected to the collector of the transistor Q7, and the anode of the diode D9 is connected to the connection point between the resistor R11 of the signal selection circuit 4b and the anode of the diode D8. The cathode of the diode D8 is connected to the collector of the transistor Q6, and is connected to the cathode of the diode D10 of the low frequency pulse detection circuit 7.
The anode of the diode D10 is connected to the anode connection point of the resistor R16 and the diode D11. When the digital signal is detected by the signal selection circuit 4b, the transistor Q6 is turned on to prevent the capacitor C10 from being charged, and the low frequency pulse detection circuit 7 It has a role to prevent malfunctions.
In addition, the added diodes D8 and D9 serve as a diode OR, and when the digital signal is detected by the signal selection circuit 4b or when the low frequency pulse detection circuit 7 is operated, the operation of the latch circuit including the transistors Q3 and Q4 is stopped. Let

The load device 6b is connected to a series circuit of a switch SW2 and a low frequency pulse generation circuit PG1 in parallel with the switch SW1. When the switch SW2 is turned on, the low frequency pulse generation circuit PG1 is supplied with the voltage of the battery BT1 as a power supply voltage, and outputs a low frequency pulse signal to the AC adapter 1 via the resistor R15 and the p3 terminal of the DC plug.
Here, the load device 6b has a specification in which the switches SW1 and SW2 are not turned on at the same time.

FIG. 6 is a sequence diagram of the AC adapter 1b according to FIG.
Next, the operation of each part of the AC adapter 1b according to the second embodiment will be described with reference to FIGS. 6 that are substantially the same as those in FIGS. 1 to 3 are denoted by the same reference numerals and description thereof is omitted.
In the period from time t0 to t4 shown in FIG. 6, C is in a state where the AC voltage of the AC power supply Vac is input and the output voltage Vo which is the rated voltage is supplied to the load device 6b.

During a period from time t5 to t7, the load device 6b enters the first sleep mode, the switch SW1 is turned on at time t5b, and a DC signal is input to the AC adapter 1b via the p3 terminal of the DC plug.
As a result, the transistor Q6 is turned on momentarily for the time constant period of the capacitor C8 and the resistor R13. Next, after the transistor Q6 is turned off, the transistor Q7 of the low frequency pulse detection circuit 7 is turned on only for a time period tx of the capacitor C10 and the resistor R17. After the transistor Q7 is turned off, the transistor Q5 is turned on at time t6b after the time constant of the capacitor C9 and the resistors R11 and R12. When the transistor Q5 is turned on, the latch circuit composed of the transistors Q3, Q4, etc. of the signal selection circuit 4b latches, and a current is supplied to the photocouplers PC1-1 and PC2-1 to drive the gate of the starting circuit and the control circuit IC1. The signal is stopped and the switching of the AC adapter 1b is stopped. That is, the operation of the first embodiment is realized, and extremely low standby power is realized.
Next, the sleep mode of the load device 6b is released at time t7, the output voltage Vo returns to the rated voltage after time t10, and the load current Io flows through the load device 6b at time t11.

At time t12b, the load device 6b enters the second sleep mode, and the load current of the load device 6b becomes zero A. In the second sleep mode, not the switch SW1 of the load device 6b but the switch SW2 is turned on at time t13b, the low frequency pulse generator PG1 is started, and the low frequency pulse is supplied to the AC adapter via the p3 terminal of the DC plug. Output to 1b.
As a result, the transistor Q7 of the low frequency pulse detection circuit 7 of the AC adapter 1b is turned on, and the output voltage Vo is clamped by a voltage obtained by adding the Zener voltage of the Zener diode ZD3 and the forward voltage of the photocoupler PC1-1. Thus, the pfb terminal voltage of the control circuit IC1 is controlled via the photocoupler PC1-2 so that the switching operation of the switching element Q1 becomes intermittent oscillation.
Further, the + Vcc terminal voltage of the control circuit IC1 after the time t13b is a voltage proportional to the output voltage Vo because the output voltage Vo is lower than the rated voltage. This state continues until time t15b after completion time t14b of the second sleep mode of the load device 6b, and switching of the switching power supply 1b is in an intermittent oscillation state. Therefore, the power consumption of the AC adapter 1b is equal to the period of the intermittent oscillation. As in the application example of the first embodiment, standby power lower than the normal oscillation frequency is realized.
Further, the period from time t14b to time t15b is a delay time in which the transistor Q7 is kept on by the charging voltage of the capacitor C10 of the low frequency pulse detection circuit 7.
During the period from time t15b to t16b, the output voltage Vo of the AC adapter 1b returns to the rated voltage, and the load current Io of the load device 6b starts to flow at time t17b.

  As described above, the AC adapter 1b according to the second embodiment shares a system check signal for authenticating the AC adapter and a plurality of sleep mode standby power reduction signals by one signal line, as in the first embodiment. can do.

As mentioned above, although an example of the embodiment of the present invention has been described, the present invention is not limited to the specific embodiment, and various modifications are possible within the scope of the gist of the present invention described in the claims. Can be changed. For example, although the switching power supply 2 has been described using a flyback converter, it can also be changed using a forward converter or the like.
Further, the DC signal at the time of the first sleep mode of the load device 6b or the low frequency pulse signal at the time of the second sleep mode is separated, and one of the sleep modes is set for each load device, and the AC adapter 1b is appropriately set. You may make it correspond.
In addition, the signal in the sleep mode from the load device side may change its role as a signal to correspond to the energy saving mode in which the power supply is switched from the battery to the AC power supply in the daytime period to compensate for the shortage of power supply in summer. It is possible to flexibly correspond to the purpose of the signal.
In the above description, the load device has been described using a notebook personal computer as an example. However, the load device can also be used for a portable device equipped with a battery.

1, 1a, 1b AC adapter 2, 2a, 2b Switching power supply 3, 3a, 3b Authentication circuit 4, 4a, 4b Signal selection circuit 5 DC plug 6, 6b Load device 7 Low frequency pulse detection circuit C1-C11 Capacitor D1-D12 Diode ZD1 to ZD3 Zener diode IC1 Control circuit IC2 Shunt regulator IC3, IC4 Authentication integrated circuit DB1 Bridge diode Q1, Q2 MOSFET
Q3-Q7 Transistor PC1, PC2 Photocoupler PG1 Low frequency pulse generator R1-R17 Resistor SW1, SW2 Switch T Transformer p1-p3 DC plug terminal Vac AC power supply

Claims (3)

By applying input power to the primary winding of the transformer and causing the control circuit to turn on and off the switching element connected to the primary winding of the transformer, a pulse voltage is induced in the secondary winding of the transformer, It consists of a switching power supply that supplies the output voltage rectified and smoothed by the secondary side rectifying and smoothing circuit to the load device via the DC plug,
Compare the output voltage with a predetermined reference voltage, 1 from the secondary side to eliminate the compared voltage difference
A feedback circuit that feeds back to the next side and controls on / off of the switching element by the control circuit;
Means for starting / stopping the output voltage or changing the output voltage to a second voltage lower than a rated voltage by a signal from the load device via the DC plug;
The load device and the switching power supply include authentication means for performing authentication between devices via the DC plug,
The DC plug is composed of three cables, and one of the DC plug cables is
A signal for varying the output voltage from the load device to a second voltage lower than a rated voltage, and the device
AC adapter characterized by sharing the signal of the authentication means that performs authentication between . The signal of the authentication means for performing authentication between the devices is performed by a digital signal, and the signal for changing the output voltage from the load device to a second voltage lower than a rated voltage is performed by a DC signal. The AC adapter according to claim 1. Means for starting / stopping the output voltage according to a signal from the load device via the DC plug, and means for varying the second voltage lower than the rated voltage;
A pulse signal having a frequency lower than a pulse period of a digital signal for performing authentication between the devices, or
2. The AC according to claim 1, wherein either one is selected by inputting a DC signal.
adapter.

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