JP5910707B2 - Signal shaping circuit - Google Patents

Description

  The present invention relates to a signal shaping circuit for shaping a drive signal.

  In recent years, data transmission speeds have increased between racks, between boards, and within boards with the dramatic improvement in performance of CPUs (Central Processing Units) in high-end servers such as information equipment and communication equipment. Under such circumstances, the speeding up of conventional electrical wiring is approaching its limit, and an optical interconnect technology capable of higher-speed data transmission is being studied.

  In a high-speed optical interconnect, on the transmission side, a light signal is directly modulated to transmit an optical signal, and on the reception side, the optical signal is received by a light receiving element and converted into an electrical signal. When the light emitting element is driven at a high speed, waveform deterioration such as eye closing occurs due to relaxation oscillation of the light emitting element or band limitation, and transmission quality deteriorates. On the other hand, pre-emphasis that corrects (emphasizes or suppresses) a rising portion and a falling portion of a driving signal of a light emitting element in advance is known.

  The pre-emphasis generation circuit is composed of a main signal amplification circuit and a current subtraction circuit that delays the input signal by branching the input signal into two. The main signal amplifier circuit includes a differential pair of transistors, a current source, and a current supply source. The current subtraction circuit includes a differential pair of transistors that amplify the differential signal delayed for pre-emphasis, and obtains a pre-emphasis component based on a difference between the input signal and the delayed delay component. A pre-emphasis signal is obtained by a main signal amplification circuit and a current subtraction circuit (see, for example, Patent Documents 1 and 2 below).

JP 2007-81608 A JP 2008-219895 A

  However, in the conventional pre-emphasis generation circuit, the current supply source is configured to supply current to the pre-emphasis generation circuit in addition to the main signal amplification circuit, and therefore, a transistor constituting a current supply source with high current supply capability In this case, a capacitor with a large maximum rated current is required, which increases the parasitic capacitance and becomes a limiting factor for high-speed operation. In addition, when the main signal amplification circuit and the pre-emphasis generation circuit are each provided with a current supply source, the overall power consumption increases.

  The disclosed technique solves the above-described problems, and an object thereof is to generate a pre-emphasis signal at high speed.

In order to solve the above-described problems and achieve the object, the disclosed technology is a signal shaping circuit that outputs a drive signal shaped from an input signal from an output terminal, and connects a light emitting element as a load to one of the output terminals, A differential pair that switches an output current; a current source that adjusts a magnitude of a direct current with respect to the load; a main signal amplifier circuit that amplifies the input signal; and an output current that switches, A pre-emphasis generation circuit that includes a differential pair connected to a source and generates a pre-emphasis signal that symmetrically emphasizes rising and falling portions of the drive signal, the main signal amplification circuit, the pre-emphasis generation circuit, and A DC constant current source connected to the output terminal, and the pre-emphasis generation circuit is connected to the DC constant current source via a capacitor.

  According to the disclosed technology, the pre-emphasis signal can be generated at high speed.

FIG. 1A is a circuit diagram of a signal shaping circuit according to the first embodiment. FIG. 1-2 is a waveform diagram showing currents in the respective parts of FIG. 1-1. FIG. 2 is a diagram for explaining a definition relating to a current waveform. FIG. 3 is a circuit diagram illustrating a modification of the signal shaping circuit according to the first embodiment. FIG. 4 is a circuit diagram illustrating a modification of the signal shaping circuit according to the first embodiment. FIG. 5A is a circuit diagram of a signal shaping circuit according to the second embodiment. FIG. 5B is a waveform diagram illustrating currents in the respective units in FIG. FIG. 6 is a circuit diagram of a modification of the signal shaping circuit according to the second embodiment. FIG. 7 is a circuit diagram of a modification of the signal shaping circuit according to the second embodiment. FIG. 8A is a circuit diagram of a signal shaping circuit according to the third embodiment. FIG. 8-2 is a waveform diagram showing currents at various parts in FIG. FIG. 9 is a circuit diagram of a modification of the signal shaping circuit according to the third embodiment. FIG. 10 is a circuit diagram of a modification of the signal shaping circuit according to the third embodiment. FIG. 11 is a circuit diagram of a signal shaping circuit according to the fourth embodiment. FIG. 12A is a circuit diagram of a signal shaping circuit according to the fifth embodiment. 12-2 is a waveform diagram showing currents in the respective parts in FIG. 12-1.

  Hereinafter, preferred embodiments of the disclosed technology will be described in detail with reference to the accompanying drawings.

(Embodiment 1)
FIG. 1A is a circuit diagram of a signal shaping circuit according to the first embodiment. The signal shaping circuit 100 includes an input terminal 101, a delay unit 102, amplifiers 103 and 104, a main signal amplification circuit 110, a pre-emphasis generation circuit 120, and output terminals 131 and 132.

  For example, an anode of a light emitting element 141 that is a driving target as a load is connected to the output terminal 132, and an anode of a dummy light emitting element 142 having characteristics equivalent to those of the light emitting element 141 is connected to the output terminal 131. The signal shaping circuit 100 is an anode driving type for anode driving a light emitting element. As the light-emitting element 141, an LD such as a VCSEL (Vertical Cavity Surface Emitting Laser) is used.

  The drive signal input from the input terminal 101 is branched into two, one input to the amplifier 103 and the other input to the amplifier 104 via the delay unit 102. The amplifier 103 outputs positive and negative outputs to the main signal amplifier circuit 110. The amplifier 104 outputs positive and negative outputs to the pre-emphasis generation circuit 120. The delay unit 102 delays the drive signal input from the input terminal 101 by a fixed delay amount τ, and outputs the delayed drive signal to the pre-emphasis generation circuit 120 via the amplifier 104.

  The main signal amplifier circuit 110 is a differential amplifier circuit, and includes transistors 111 and 112, current sources (bias current sources) 115 and 116, and a current source 117.

  A positive phase signal output from the amplifier 103 is applied to the base of the transistor 111. The collector of the transistor 111 is connected to the current source 115 and to the output terminal 131. The emitter of the transistor 111 is connected to the current source 117.

  A negative phase signal output from the amplifier 103 is applied to the base of the transistor 112. The collector of the transistor 112 is connected to the current source 116 and also to the output terminal 132. The emitter of the transistor 112 is connected to the current source 117.

  The pre-emphasis generation circuit 120 is a differential amplifier circuit, and includes transistors 121 and 122, inductances 125 and 126, and a current source 127.

  A positive phase signal output from the amplifier 104 is applied to the base of the transistor 121. The collector of the transistor 121 is connected to the inductance 125 and also connected to the current source 116 of the main signal amplifier circuit 110 via the capacitor 151. The emitter of the transistor 121 is connected to the current source 127.

  A negative phase signal output from the amplifier 104 is applied to the base of the transistor 122. The collector of the transistor 122 is connected to the inductance 126 and also connected to the current source 115 of the main signal amplifier circuit 110 via the capacitor 152. The emitter of the transistor 122 is connected to the current source 127.

  As described above, in the first embodiment, the pre-emphasis generation circuit 120 is AC-coupled to the main signal amplification circuit 110 via the capacitors 151 and 152.

  FIG. 1-2 is a waveform diagram showing currents in the respective parts of FIG. 1-1. The current of each part on the current source 116 (transistor 112) side is described. A difference current between currents i <b> 2-i <b> 1 illustrated in FIG. 1A is output from the output terminal 132. Here, i1 is DC-cut by the capacitor 151.

  FIG. 2 is a diagram for explaining a definition relating to a current waveform. In FIG. 2, the horizontal axis represents time, and the vertical axis represents LD drive current. As shown in FIG. 2, for current i, ima is an amplitude amount, ipre is an amplitude amount for pre-emphasis, iave is an average current value, and imark and isspace are upper and lower values of the amplitude. Here, the extinction ratio ER = imark / ispace, the average current iave = (ispace + imark) / 2, and the pre-emphasis amount PRE = ipre / ima.

Here, the current amount of the current source 116 in the case of ER = 2 (3 dB), 3.5 (5 dB), PRE = 40%, and ima = 5 mA in the configuration of the first embodiment described above will be described.
iave = Is4-Is2 / 2
ima = Is2 = 2iave · (ER−1) / (ER + 1)
PRE = Is1 / ima

From the above, Is4 = ima · (ER) / (ER−1)
When ER = 2, Is4 = 10 mA
When ER = 3.2, Is4 = 7.27 mA.

On the other hand, as a comparative reference example, a configuration different from the configuration described in the first embodiment, that is, a configuration in which the pre-emphasis generation circuit is not AC-coupled to the main signal amplifier circuit via a capacitor (direct connection). The case will be described.
iave = Is4-1 / 2 (Is1 + Is2)
ima = Is2−Is1 = 2iave · (ER−1) / (ER + 1)
PRE = Is1 / ima

From the above, Is4 = ima [PRE + ((ER) / (ER-1))],
When ER = 2, Is4 = 12 mA
When ER = 3.2, Is4 = 9.27 mA.
As described above, according to the first embodiment, 17% to ER = 3.2 when about ER = 2 as compared with the conventional method (a configuration in which the main signal amplifier circuit is not AC-coupled via the capacitor). Sometimes 22% speedup is possible.

  According to the above configuration, a signal obtained by subtracting the data of the pre-emphasis generation circuit 120 from the data of the main signal amplification circuit 110 at a specific ratio by the delay amount τ set by the delay unit 102 has a rising and falling waveform. An enlarged pre-emphasis signal can be generated.

  Further, inductances 125 and 126 are used as loads of the pre-emphasis generation circuit 120, and the pre-emphasis generation circuit 120 is AC-coupled to the main signal amplification circuit 110 via capacitors 151 and 152. Thereby, the current sources 115 and 116 need only supply DC power to the transistors 111 and 112.

  Accordingly, the transistors 111 and 112 having a small maximum rated current can be used, and the transistors 111 and 112 having a small parasitic capacitance can be used. Therefore, a pre-emphasis generation circuit that operates at high speed can be obtained.

  FIG. 3 is a circuit diagram illustrating a modification of the signal shaping circuit according to the first embodiment. In the configuration example illustrated in FIG. 3, the current source 116 and the output terminal 132 are each provided, and only the light emitting element 141 that is a driving target is driven. That is, the current source 115 is short-circuited to the power source (the current source 115 is not provided). Other configurations are the same as those in FIG. 1-1. As described above, it is possible to reduce the power consumption by the amount corresponding to the configuration in which the current source 115 shown in FIG. 1-1 is not provided and to reduce the cost by reducing the number of components. Further, the operation speed can be maintained as in FIG.

  FIG. 4 is a circuit diagram illustrating a modification of the signal shaping circuit according to the first embodiment. In the configuration example illustrated in FIG. 4, the current source 116 and the output terminal 132 are provided as one, and only the light emitting element 141 that is a driving target is driven. A resistor 401 is provided instead of the current source 115 shown in FIG. Other configurations are the same as those in FIG. 1-1. As described above, it is possible to reduce the power consumption by the amount corresponding to the configuration in which the current source 115 shown in FIG. 1-1 is not provided and to reduce the cost by reducing the number of components. Then, by providing the resistor 401 in one of the differential pairs, it is possible to balance the load on the light emitting element 141 as a load connected to the output terminal 132. Further, the operation speed can be maintained as in FIG. 1-1.

(Embodiment 2)
FIG. 5A is a circuit diagram of a signal shaping circuit according to the second embodiment. The signal shaping circuit 500 includes an input terminal 101, a delay unit 102, amplifiers 103 and 104, a main signal amplification circuit 110, a pre-emphasis generation circuit 120, output terminals 131 and 132, and a subtraction unit 501.

  Then, the input terminal 101 and the output of the delay unit 102 are connected, and these are input to the subtraction unit 501. As a result, the delay signal of the delay unit 102 is subtracted from the input drive signal, and the pre-emphasis generation circuit 120 generates an emphasis signal. Then, the emphasis signal is added to the main signal of the main signal amplifier circuit 110.

  The anode of the light emitting element 141 to be driven is connected to the output terminal 132, and the dummy light emitting element 142 having a characteristic equivalent to that of the light emitting element 141 or a dummy circuit equivalent to the light emitting element is connected to the output terminal 131. .

  The amplifier 103 outputs positive and negative outputs to the main signal amplifier circuit 110. The delay unit 102 delays the drive signal input from the input terminal 101 by a fixed delay amount τ, and outputs the delayed drive signal to the subtraction unit 501. The subtraction unit 501 subtracts the delay signal of the delay unit 102 from the input drive signal, and the amplifier 104 outputs a positive / negative output to the pre-emphasis generation circuit 120.

  The main signal amplifier circuit 110 is a differential amplifier circuit, and includes transistors 111 and 112, current sources (bias current sources) 115 and 116, and a current source 117.

  A positive phase signal output from the amplifier 103 is applied to the base of the transistor 111. The collector of the transistor 111 is connected to the current source 115 and to the output terminal 131. The emitter of the transistor 111 is connected to the current source 117.

  A negative phase signal output from the amplifier 103 is applied to the base of the transistor 112. The collector of the transistor 112 is connected to the current source 116 and also to the output terminal 132. The emitter of the transistor 112 is connected to the current source 117.

  The pre-emphasis generation circuit 120 is a differential amplifier circuit, and includes transistors 121 and 122, inductances 125 and 126, and a current source 127.

  A positive phase signal output from the amplifier 104 is applied to the base of the transistor 121. The collector of the transistor 121 is connected to the current source 116 of the main signal amplifier circuit 110. The emitter of the transistor 121 is connected to the current source 127.

  A negative phase signal output from the amplifier 104 is applied to the base of the transistor 122. The collector of the transistor 112 is connected to the current source 115 of the main signal amplifier circuit 110. The emitter of the transistor 122 is connected to the current source 127.

  As described above, in the second embodiment, the pre-emphasis generation circuit 120 generates an emphasis signal, and adds this emphasis signal to the main signal of the main signal amplification circuit 110.

  FIG. 5B is a waveform diagram illustrating currents in the respective units in FIG. The current of each part on the current source 116 (transistor 112) side is described. A current obtained by adding the current emphasis component current i1 and the main signal component current i2 shown in FIG. Thus, by adopting a configuration in which the emphasis components are added, the current of the current source 116 (Is4) can be driven with a bias current smaller than that of the conventional one.

  That is, when the average current of the light emitting element 141 is Is4-0.5 (Is1 + Is2), the modulation current of the light emitting element 141 is Is1, and the emphasis current Is2, the bias current Is4 of the current source 116 is Is4−0.5 · Is2. Become. On the other hand, in the configuration in which the input signal is delayed, the average current of the light emitting element 141 is Is4-0.5 (Is1 + Is2), the modulation current of the light emitting element 141 is Is1-Is2, and the emphasis current Is2. Is4 = Is4-0.5 · Is2. Thus, according to the configuration of the second embodiment, the current value of the bias current Is4 of the current source 116 can be reduced by 0.5 · Is2.

  FIG. 6 is a circuit diagram of a modification of the signal shaping circuit according to the second embodiment. In the configuration example illustrated in FIG. 6, the current source 116 and the output terminal 132 are provided as one, and only the light emitting element 141 that is a driving target is driven. Other configurations are the same as those in FIG. As described above, it is possible to reduce the power consumption by the amount corresponding to the configuration in which the current source 115 shown in FIG. Further, the operation speed can be increased as in FIG. 5-1.

  FIG. 7 is a circuit diagram of a modification of the signal shaping circuit according to the second embodiment. In the configuration example illustrated in FIG. 7, the current source 116 and the output terminal 132 are each provided, and only the light emitting element 141 that is a driving target is driven. A resistor 701 is provided instead of the current source 115 shown in FIG. Other configurations are the same as those in FIG. As described above, it is possible to reduce the power consumption by the amount corresponding to the configuration in which the current source 115 shown in FIG.

  By providing the resistor 801 on one side of the differential pair, it is possible to balance the load on the light emitting element 141 as a load connected to the output terminal 132. In addition, the voltage between the collector and the emitter of the transistor 111 can be easily designed. Further, the operation speed can be increased as in FIG. 5-1.

(Embodiment 3)
FIG. 8A is a circuit diagram of a signal shaping circuit according to the third embodiment. In this configuration example, the configuration of the first embodiment (FIG. 1-1) and the configuration of the second embodiment (FIG. 5-1) are combined. In the signal shaping circuit 800 illustrated in FIG. 8A, the pre-emphasis generation circuit 120 is AC-coupled to the main signal amplification circuit 110 via capacitors 151 and 152.

  Also, the input terminal 101 and the output of the delay unit 102 are connected, and these are input to the subtraction unit 501. As a result, the delay signal of the delay unit 102 is subtracted from the input drive signal, and the pre-emphasis generation circuit 120 generates an emphasis signal. Then, the emphasis signal is added to the main signal of the main signal amplifier circuit 110.

  FIG. 8-2 is a waveform diagram showing currents at various parts in FIG. According to the third embodiment, the size of the current source 116 (Is4) can be made smaller than that of any of the first and second embodiments, and a further increase in speed can be achieved. Further, since the emphasis component signal i1 generated in the second embodiment includes many high-frequency components, it easily passes through the low-frequency cutoff frequency of the capacitor C1.

  FIG. 9 is a circuit diagram of a modification of the signal shaping circuit according to the third embodiment. In the configuration example illustrated in FIG. 9, the current source 116 and the output terminal 132 are each provided, and only the light emitting element 141 that is a driving target is driven. Other configurations are the same as those in FIG. As described above, it is possible to reduce the power consumption by the amount corresponding to the configuration in which the current source 115 shown in FIG. And the high-speed operation | movement can be maintained like FIG. 8-1.

  FIG. 10 is a circuit diagram of a modification of the signal shaping circuit according to the third embodiment. In the configuration example illustrated in FIG. 10, the current source 116 and the output terminal 132 are each provided, and only the light emitting element 141 that is a driving target is driven. A resistor 1001 is provided instead of the current source 115 shown in FIG. Other configurations are the same as those in FIG. As described above, it is possible to reduce the power consumption by the amount corresponding to the configuration in which the current source 115 shown in FIG.

  Then, by providing the resistor 1001 in one of the differential pairs, it is possible to balance the load with respect to the light emitting element 141 as a load connected to the output terminal 132. In addition, the voltage between the collector and the emitter of the transistor 111 can be easily designed. And the high-speed operation | movement can be maintained like FIG. 8-1.

(Embodiment 4)
FIG. 11 is a circuit diagram of a signal shaping circuit according to the fourth embodiment. Embodiment 4 is a cathode drive type in which a light emitting element to be driven and a cathode of a dummy light emitting element are connected to an output terminal. The configuration of the signal shaping circuit 1100 of the fourth embodiment is the same as the basic configuration of the anode type shown in the second embodiment (FIG. 5A). The cathode of the light emitting element 141 is connected, and the cathode of the dummy light emitting element 142 having the same characteristics as the light emitting element 141 is connected to the output terminal 131. The current sources 115 and 116 have one end connected to the output terminals 131 and 132 and the other end grounded.

  The cathode drive type configuration shown in FIG. 11 can be applied to each of Embodiments 1 to 3 described above. Also in the cathode drive type configuration shown in the fourth embodiment, similarly to the anode drive type shown in the first to third embodiments, the amplitude, bias current amount and adjustment range due to pre-emphasis are increased. Can be suppressed. Thereby, the bias current of the light emitting element can be reduced, and the operation speed can be increased.

(Embodiment 5)
FIG. 12A is a circuit diagram of a signal shaping circuit according to the fifth embodiment. The signal shaping circuit 1200 according to the fifth embodiment includes an offset circuit 1201 that adds a DC level offset to the emphasis signal generated by the pre-emphasis generation circuit 120. The offset circuit 1201 is a current source having one end connected between the subtracting unit 501 and the amplifier 104 and the other end grounded, and a variable current value.

  12-2 is a waveform diagram showing currents in the respective parts in FIG. 12-1. By the offset circuit 1201, the value of the current i1 can be varied, and the emphasis signal can have an asymmetric waveform. Thereby, the rising amount / falling amount of the pre-emphasis component in the waveform of the output terminal 132 can be adjusted. In the example illustrated in FIG. 12B, the falling edge of the pre-emphasis component output from the output terminal 132 is enhanced. However, the present invention is not limited to this, and it is also possible to adjust the rising and falling edges of the pre-emphasis component output from the output terminal 132 to be symmetric.

  According to the configuration of the fifth embodiment, an asymmetric pre-emphasis component can be generated by adjusting the rise and fall of the pre-emphasis component. As a result, the asymmetry of the rise and fall of the light emitting element 141 can be compensated.

  According to the embodiment described above, the circuit speed can be increased, and the pre-emphasis signal can be generated at high speed.

  The following additional notes are disclosed with respect to the above-described embodiments.

(Supplementary note 1) In a signal shaping circuit for shaping a drive signal,
A main signal amplification circuit for amplifying the drive signal;
A pre-emphasis generating circuit that symmetrically emphasizes rising and falling portions of the drive signal;
A current source provided in the main signal amplifier circuit;
A capacitor for coupling the main signal amplifier circuit and the pre-emphasis generation circuit;
A signal shaping circuit comprising:

(Appendix 2) In a signal shaping circuit for shaping a drive signal,
A main signal amplification circuit for amplifying the drive signal;
A pre-emphasis generating circuit that symmetrically emphasizes rising and falling portions of the drive signal;
A subtraction circuit that subtracts the input drive signal and a delayed signal obtained by delaying the drive signal and inputs the subtraction signal to the pre-emphasis generation circuit;
An adder circuit for adding the output of the pre-emphasis generation circuit to the output of the main signal amplifier circuit;
A signal shaping circuit comprising:

(Supplementary note 3) In a signal shaping circuit for shaping a drive signal,
A main signal amplification circuit for amplifying the drive signal;
A pre-emphasis generating circuit that symmetrically emphasizes rising and falling portions of the drive signal;
A current source provided in the main signal amplifier circuit;
A capacitor for coupling the main signal amplifier circuit and the pre-emphasis generation circuit;
A subtraction circuit that subtracts the input drive signal and a delayed signal obtained by delaying the drive signal and inputs the subtraction signal to the pre-emphasis generation circuit;
An adder circuit for adding the output of the pre-emphasis generation circuit to the output of the main signal amplifier circuit;
A signal shaping circuit comprising:

(Supplementary Note 4) The main signal amplifier circuit includes:
A differential pair that connects a light emitting element as a load to one output terminal and switches the output current,
A current source for adjusting the magnitude of the direct current with respect to the load;
The pre-emphasis generation circuit includes:
The signal shaping circuit according to any one of appendices 1 to 3, further comprising a differential pair that switches an output current and is connected to the current source.

(Supplementary note 5) The signal shaping circuit according to any one of Supplementary notes 1 to 4, wherein one of the current sources on the differential pair side not connected to the load is short-circuited to a power source.

(Supplementary note 6) The signal shaping according to any one of Supplementary notes 1 to 4, wherein a resistor is short-circuited to a power source instead of the one current source on the differential pair side not connected to the load. circuit.

(Additional remark 7) The signal shaping circuit as described in any one of additional marks 2-6 provided with the offset circuit which sets DC level offset with respect to the output value of the said subtraction circuit.

(Supplementary note 8) The signal shaping circuit according to any one of supplementary notes 1 to 7, wherein the signal shaping circuit is an anode drive type in which an anode of a light emitting element is connected to the output terminal.

(Supplementary note 9) The signal shaping circuit according to any one of Supplementary notes 1 to 7, wherein the signal shaping circuit is a cathode drive type in which a cathode of a light emitting element is connected to the output terminal.

100, 500, 800, 1100, 1200 Signal shaping circuit 101 Input terminal 102 Delay unit 103, 104 Amplifier 110 Main signal amplifier circuit 111, 112 Transistor 115, 116 Current source 117, 127 Current source 120 Pre-emphasis generation circuit 121, 122 Transistor 125, 126 Inductance 131, 132 Output terminal 141 Light emitting element 142 Dummy light emitting element 151, 152 Capacitor 501 Subtraction unit 401, 701, 1001 Resistor 1201 Offset circuit

Claims (3)

In the signal shaping circuit that outputs the drive signal shaped from the input signal from the output terminal,
A light emitting element that is a load is connected to one of the output terminals, and includes a differential pair that switches an output current, and a current source that adjusts the magnitude of a direct current with respect to the load, and amplifies the input signal. A main signal amplifier circuit,
A pre-emphasis generation circuit that generates a pre-emphasis signal that switches an output current and includes a differential pair connected to the current source, and that symmetrically emphasizes rising and falling portions of the drive signal;
A DC constant current source connected to the main signal amplifier circuit, the pre-emphasis generation circuit, and the output terminal;
The signal shaping circuit, wherein the pre-emphasis generation circuit is connected to the DC constant current source via a capacitor. 2. The signal shaping circuit according to claim 1 , wherein one of the current sources on the differential pair side not connected to the load is short-circuited to a power source. 2. The signal shaping circuit according to claim 1 , wherein a resistor is short-circuited to a power source instead of one of the current sources on the differential pair side not connected to the load.

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