JP5907102B2 - Semiconductor device - Google Patents

Description

  The present invention relates to a semiconductor device.

  Recently, in hybrid vehicles and electric vehicles, switching elements such as IGBTs (Insulated Gate Bipolar Transistors) are widely used to drive motors.

  In order to drive a motor with a switching element, a switching element called an upper arm and a switching element called a lower arm facing the upper arm are usually connected in series in the vertical direction, and the motor becomes a load at the connection point of the upper and lower arms Are connected to each other and the opposing arms are alternately turned on to control the current flowing through the winding.

  However, when one of the upper and lower arms is switched on and the opposing arm causes a short-circuit failure, the voltage of the gate electrode of the turned-on element rises, overcurrent flows and damages the element. There was a case.

  For example, Patent Document 1 describes a technique for detecting a short circuit of an IGBT based on a voltage at a gate terminal of the IGBT and cutting off a current flowing through the IGBT.

  Patent Document 2 describes a technique for protecting a MOSFET from a short-circuit current by connecting a thyristor to a gate electrode of a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor).

JP 2011-29818 A Japanese Patent Laid-Open No. 01-318430

  However, in the conventional technique described in Patent Document 1, it takes time until the current is interrupted after the short circuit is detected, and the switching element may be damaged.

  In the prior art described in Patent Document 2, since the thyristor is directly connected to the gate, it is difficult to match the characteristics of the thyristor element with the breakdown voltage and current characteristics of the MOSFET to be protected.

  Accordingly, the present invention has been made in view of the above-described problems in the prior art, and an object of the present invention is to provide a semiconductor device capable of quickly reducing the gate voltage even when the gate voltage of the switching element rapidly increases. To do.

In view of the above problems, a semiconductor device according to the present invention has a first drive electrode, and is connected to the first switching unit operated by the first drive electrode and the first drive electrode side. The voltage of the first drive electrode with respect to the GND-side electrode of the first switching unit becomes conductive when the voltage is equal to or higher than the first voltage, and the conductivity is maintained at a second voltage lower than the first voltage. A second switching unit having a snapback characteristic; and a third switching unit that operates when the second switching unit conducts and sucks the charge of the first drive electrode.

  According to the embodiment of the present invention, it is possible to provide a semiconductor device that can quickly decrease the gate voltage even when the gate voltage of the switching element rapidly increases.

Circuit diagram in the first embodiment Vce graph (a), Vge graph (b), Ic graph (c) in the first embodiment Circuit diagram in the second embodiment Circuit diagram in the third embodiment Vce graph (a), Vge graph (b), Ic graph (c) in the third embodiment The graph which simulated Vge in a 3rd embodiment

Hereinafter, embodiments of the present invention will be described based on the three aspects of Embodiments 1 to 3 with reference to the drawings.
[First Embodiment]
FIG. 1 is an example of a circuit diagram in the first embodiment.

  In FIG. 1, the semiconductor device 1 includes an IGBT element Q1 (hereinafter abbreviated as “Q1”) as a “first switching unit”. In the present embodiment, an IGBT is described as an example of the switching element, but the switching element may be a MOSFET, for example.

  Q1 includes a collector, an emitter, and a gate as a “first drive electrode”. Further, Q1 has a sense emitter terminal SE for flowing a current by dividing a part of the collector current Ic flowing from the collector, and is converted into a voltage by a current flowing through a sense resistor R1 connected to the sense emitter terminal SE. Thus, the overcurrent detector 12 detects an overcurrent.

  A diode D1 is connected between the collector and emitter of Q1. The diode D1 is connected so that the direction from the emitter to the collector of Q1 becomes a forward direction, and the coil of the motor to be driven misses back electromotive force generated when the current is interrupted to prevent Q1 from being damaged. The diode D1 is not necessary when a MOSFET is used as the switching element.

  A capacitive impedance Cgc exists between the collector and the gate of Q1, and the fluctuation of the collector voltage is transmitted to the gate G through the capacitive impedance Cgc. Accordingly, when the voltage at the collector of Q1 rises rapidly, the voltage at the gate also rises rapidly.

  An emitter of an IGBT element (upper arm) (not shown) facing Q1 is connected in series to the collector of Q1, forming a set of upper and lower arms. Q1 shown is a lower arm. In the motor driving by the semiconductor device, when the motor is constituted by three-phase windings, the windings are usually driven sequentially by a set of three upper and lower arms.

  The IGBTs forming the upper and lower arms including Q1 are sequentially driven by the drive control circuit 11 connected to the gate G. Q1 is turned on when a voltage is applied to the gate electrode G by the drive control circuit 11, and turned off when a negative voltage is applied to the gate electrode G.

  In the first embodiment, the dynamic clamp circuit A surrounded by a dotted line is connected to the “first drive electrode side”. A “dynamic clamp circuit” is a circuit that stabilizes an abnormal voltage generated by a surge or the like by returning it to a predetermined voltage, and has the same meaning as an active clamp. In the present embodiment, the gate voltage of Q1 is stabilized.

  In the dynamic clamp circuit A, the cathode of a Zener diode Z1 (hereinafter abbreviated as “Z1”) is connected to the gate of Q1 so that the direction from the gate of Q1 to GND (ground) is opposite. The anode of Z1 is connected to the anode of a thyristor T1 (hereinafter abbreviated as “T1”) as a “second switching unit” so that the direction from the gate G of Q1 toward GND is the forward direction. Further, one end of a resistor R2 (hereinafter abbreviated as “R2”) is connected to the cathode of T1, and the other end of R2 is connected to GND. In other words, Z1 in the reverse direction and T1 and R2 in the forward direction are connected in series between the gate of Q1 and GND.

  Between the gate of Q1 and GND, an n-channel MOSFET element M1 (hereinafter abbreviated as “M1”) is used as a “third switching unit”. The drain of M1 is the gate of Q1 and the source of M1 is the GND. Connect to be connected to. The gate of M1 is connected between the cathode of T1 and the resistor R2. T1 is driven by the voltage generated at R2.

  Note that an operation in which the switching element is in a conductive (ON) state is referred to as turn-on, and an operation in which the switching element is in a non-conductive (OFF) state is referred to as turn-off.

  Here, an operation when the upper arm causes a short-circuit fault when Q1 is ON will be described with reference to FIG. FIG. 2 is an example (a) of a Vce graph, an example (b) of a Vge graph, and an example (c) of an Ic graph in the first embodiment. Here, Vce is a voltage between the collector and emitter of Q1. Vge is the gate-emitter voltage of Q1. Ic is the collector current of Q1.

  In FIG. 2A, the turn-on voltage Vg_on is applied to Vge at time t <t1, and Q1 is in the ON state.

  If a short circuit failure occurs in the upper arm at time t = t1, Vce of Q1 rises rapidly to the short circuit voltage and becomes a constant value. Corresponding to the increase in Vce, Vge increases with the time constant of the capacitive impedance Cgc, as shown in FIG. Further, as Vge increases, the collector current Ic also increases as shown in FIG.

  The portions indicated by the dotted lines in FIGS. 2B and 2C are graphs when the operation according to the first embodiment is not performed. Vge greatly exceeds the turn-on voltage Vg_on of Q1, a large current flows through Ic, heat corresponding to the amount of current is generated in Q1, and Q1 may be damaged. Since the voltage generated by the capacitive impedance Cgc rises according to the AC component of Vce and does not generate a voltage for the DC component, the value of Vge becomes a predetermined upper limit when the value of Vce becomes a constant value. And then slowly returned to the turn-on voltage. Also, the value of Ic gradually decreases as the value of Vge decreases. Since Ic becomes heat due to the internal resistance value when Q1 is ON, for example, if a switching element having a large rated value of Ic is used, damage due to heat can be prevented. However, when the rated current increases, the element becomes larger, and a large heat radiating part is required, so that it is difficult to use it in a vehicle, for example. In the present embodiment, Vge and Ic are reduced from the graph indicated by the dotted line in FIGS. 2B and 2C to the graph indicated by the solid line.

  Here, the breakdown voltage of Z1 is Vz1, the trigger voltage of T1 as “first voltage” is Vtrig, and the hold voltage of T1 as “second voltage” is Vhold. The trigger voltage of the thyristor is a voltage at which the thyristor is turned on when the voltage between the anode and the cathode of the thyristor becomes a value higher than this, and the hold voltage is the anode − at the holding current Ihold that holds the on state of the turned on thyristor This is the voltage between the cathodes. The thyristor has a snapback characteristic that is turned on with a trigger voltage and maintains a conductive state with a hold voltage that is lower than the trigger voltage. The voltage generated by Ihold flowing through R2 is applied to the gate of M1.

  In the first embodiment, the charge of the gate of Q1 is extracted by M1. The gate threshold voltage of M1 is set to be R2 · Ihold.

In FIG. 2B, the detection threshold value Vg_hi is a voltage for detecting an abnormality when the gate voltage of Q1 exceeds this value. The clamp voltage Vg_low is a clamp voltage for extracting the charge of the gate of Q1. The inflow of Ic can be limited by making the clamp voltage Vg_low lower than the turn-on voltage of Q1. The detection threshold Vg_hi and the clamp voltage Vg_low are expressed by the following equations.
Vg_hi = Vtrig + Vz1 (B)
Vg_low = Vhold + Vz1 + R2 · Ihold (b)
In the first embodiment, T1 having the characteristics of Vtrig, Vhold, and Ihold, Z1 having a breakdown voltage of Vz, and M1 having a gate threshold of R2 · Ihold are selected by the above formulas (A) and (B). A semiconductor device having desired characteristics of Vg_hi and Vg_low can be provided.

  When Vge becomes Vg_hi at t2 in FIG. 2B, when T1 is turned on, a current flows through R2 and M1 is turned ON, and Vge is at t3 by the hold voltage Vhold and hold current Ihold of T1. , Vg_low. Further, when M1 is turned on at t2 in FIG. 2C, Ic of Q1 is balanced according to the hold current Ihold of T1 from t3, and the charge accumulated in the gate of Q1 is stably stabilized. Can be pulled out. As a result, the amount of heat generated per unit time can be suppressed and damage to Q1 can be prevented.

  In the present embodiment, since the increase in the voltage of the gate electrode G due to the short circuit of the opposing arm can be detected without using, for example, a comparator or a control circuit, the voltage of the gate electrode G can be quickly reduced.

Further, since the hold current Ihold for driving M1 may be a small current, the Zener diode Z1, the thyristor T1, etc. can be downsized.
[Second Embodiment]
Next, a second embodiment will be described with reference to FIG. FIG. 3 is an example of a circuit diagram according to the second embodiment.

  In FIG. 3, the dynamic clamp circuit B in the dotted line portion performs an operation equivalent to the dynamic clamp circuit A in FIG. Further, the thyristor operation unit C performs an operation equivalent to the thyristor T1 in FIG. The circuit of the second embodiment shown in FIG. 3 is an example of the circuit of FIG. 1 in the first embodiment that is closer to the mounting, and selects the characteristics of the thyristor T1 in the first embodiment. Instead, the characteristics equivalent to those of the thyristor T1 can be obtained in the characteristics of the transistors and the like in the circuit C. Therefore, also in the second embodiment using the circuit of FIG. 3, the operation is the same as the operation described in FIG. Note that description of circuit portions other than the dotted line B overlapping with FIG. 1 is omitted.

In FIG. 3, a dynamic clamp circuit B is connected to the gate of Q1. The same M1 as in the first embodiment is used for the dynamic clamp circuit B. On the other hand, the second embodiment includes a transistor Q3 and a transistor Q4 (hereinafter abbreviated as “Q3” and “Q4”). In addition, a diode D2 and a diode D3 (hereinafter abbreviated as “D2” and “D3”) are provided. In addition, a Zener diode Z2, a Zener diode Z3, and a Zener diode Z4 (hereinafter abbreviated as “Z2”, “Z3”, and “Z4”) are provided. In addition to the resistor R2, a resistor R4 and a resistor R5 (hereinafter abbreviated as “R4” and “R5”) are provided.
Furthermore, a capacitor C2 and a capacitor C3 (hereinafter abbreviated as “C2” and “C3”) are provided. A forward D2 and reverse Z2 and Z3 are connected in series to the gate of Q1, and a cathode of Z4, a collector of Q3, and one end of R4 are connected in parallel to the anode of Z3. The emitter of Q3 and the anode of Z4 are connected to one end of R5. The base of Q4 is connected between the anode of Z4 and R5. The collector of Q4 is connected to the other end of R4 and the base of Q3. The emitter of Q4 is connected to one end of R2 together with the other end of R5, and the other end of R2 is connected to GND.

  Here, the breakdown voltages of Z2, Z3 and Z4 are Vz2, Vz3 and Vz4, respectively. The trigger voltage of the thyristor operation unit C is Vtrig, the trigger current is Itrig, and the hold voltage is Vhold. Further, the forward voltage of D2 is set to Vd2.

In the second embodiment, the voltage detection threshold Vg_hi and the clamp voltage Vg_low of the gate of Q1 are expressed by the following equations.
Vg_hi = Vtrig + Vd2 + Vz2 + Vz3 + Vz4 (C)
(However, Vtrig = (R5 + R2) · Itrig)
Vg_low = Vhold + Vd2 + Vz2 + Vz3 + R2 / Ihold (D)
Here, when the forward voltage drop between the collector and the emitter when Q3 is on is VceQ3on and the voltage drop between the base and the emitter of the transistor Q4 is VbeQ4,
Vhold = VceQ3on + VbeQ4 ... (e)
(However, the diversion by R4 and R5 is ignored).

  Here, the trigger voltage Vtrig is a voltage at which the base of Q4 is turned on, and a trigger current flowing in D2, Z2, Z3 and Z4, R5 and R2 is a voltage generated in R5 and R2 by Itrig. Also, the M1 gate threshold is set to R2 · Ihold as in the first embodiment.

Generally, when designing a circuit using a thyristor, a thyristor close to a desired characteristic is selected, and the circuit design is performed so as to match the characteristic of the thyristor. On the other hand, in the second embodiment, since the thyristor operation can be designed with an equivalent circuit, the degree of freedom in circuit design can be increased. In addition, it is possible to make it less susceptible to individual differences in thyristor characteristics.
[Third Embodiment]
Next, a third embodiment will be described with reference to FIG. FIG. 5 is an example of a circuit diagram according to the third embodiment.

  In the third embodiment, a compensation circuit D surrounded by a dotted line is added to the second embodiment. In general, the variation in the threshold voltage Vth is caused by, for example, a fixed charge or a trap charge in the gate oxide film. The M1 gate threshold voltage (threshold voltage) VM1th also varies with temperature. For example, when the temperature drops, the gate threshold voltage drops, and even when the current flowing through R2 is small, M1 turns on and enters a clamped state. Therefore, when the temperature is lowered, the gate voltage of Q1 to be clamped is also lowered.

  The compensation circuit D includes a MOSFET element M2 (hereinafter abbreviated as “M2”) equivalent to M1 between the anode of Z2 and the cathode of Z3, the source of M2 as the anode of Z2, and the drain of M2 To be connected to the cathode of Z3. At this time, M2 becomes a forward bias toward the gate of Q1. The “equivalent element” is an element having the same characteristic value of the switching element. For example, equivalent elements can be used by selecting elements of the same type. Further, by combining the manufacturing time and the manufacturing lot, it is possible to expect the use of an element with less individual difference between the characteristic values.

As for the gate voltage of M1, the current flowing through R2 is I, the gate voltage of Q1 is VQ1g, and the forward bias voltage when M2 is on is VM2on before the thyristor operates.
VQ1g = (R5 + R2) · I + Vd2 + Vz2−VM2on + Vz3 + Vz4 (f)
It becomes. Here, when VQ1g reaches the voltage detection threshold VQ1g_hi, the thyristor operation unit C operates, and the gate voltage VgM1 of M1 is
VQ1g_hi = VgM1 + Vd2 + Vz2-VM2on + Vz3 + VceQ3on + VbeQ4 (G)
It becomes the relationship.

  In Formula (g), since M2 is diode-connected, VM2on is VM2on = VM2th, where M2 is the threshold voltage VM2th.

  Here, the overdrive voltage of M1 is VM1g−VM1th, but since MOSFET elements M1 and M2 have the same temperature characteristics, VM1th = VM2th. Therefore, the M1 overdrive voltage can cancel the influence of VthM1 by the diode-connected M2. That is, in the third embodiment, even when the threshold voltage of M1 changes due to a temperature change and the voltage generated in R2 changes, the threshold voltage of M2 (negative voltage) also decreases. It is possible to compensate for variations in the gate clamp voltage.

  Note that R7 of the compensation circuit D clamps the source voltage of M2 to VQ1g-Vd2-Vz1. R6 sets the drain voltage of the diode-connected M2 to VQ1g-Vd2-Vz1 + VM2on, and supplies current to the lower circuit of FIG. 4 from Z3.

  Further, by making M1 and M2 the same component, it can be expected that not only temperature characteristics but also variations in characteristics due to manufacturing processes are reduced.

  Next, the effect of the third embodiment will be described with reference to FIG. FIG. 5 is an example (a) of a Vce graph, an example (b) of a Vge graph, and an example (c) of an Ic graph in the third embodiment. Here, the graph of FIG. 5A is the same as FIG.

  FIG. 5B illustrates the transition of Vge of Q1 due to variations in the threshold voltage VM1th of M1. When the threshold voltage VM1th of M1 varies, first, the voltage detection threshold Vg_hi varies. Since the rise of Vge is determined by the time constant of Cgc described in FIG. 1, when variation occurs in Vg_hi, the time to reach Vg_hi also varies between t21 and t22. Further, when the threshold voltage VM1th of M1 varies, the clamp voltage Vg_low also varies. Moreover, as shown in FIG.4 (b) and FIG.4 (c), the time until it becomes a clamp voltage also varies between t31-t32.

  All of the above variations are differences in the amount of heat generated within Q1. In the third embodiment, the compensation circuit D can compensate for variations such as temperature changes.

  Next, a simulation result in the third embodiment will be described with reference to FIG. 6. FIG. 6 is an example of a graph in which Vge in the third embodiment is simulated.

  In FIG. 6, the gate voltage Vg = about 15V is the turn-on voltage for Q1. When the opposing arm is short-circuited at about 0.40 μsec, the gate voltage Vg rapidly rises and exceeds the turn-on voltage. When the thyristor trigger voltage of 17 V is reached in about 0.55 μsec, the gate voltage Vg rapidly decreases to maintain the hold voltage of about 12 V. It can be seen that the hold voltage is clamped to a value lower than the turn-on voltage.

  As mentioned above, although the form for implementing this invention was explained in full detail, this invention is not limited to such specific embodiment, In the range of the summary of this invention described in the claim, Various modifications and changes are possible.

  For example, the switching element can be changed to another element.

Claims (6)

A first switching unit having a first drive electrode and operated by the first drive electrode;
Connected to the first drive electrode side, and the voltage of the first drive electrode with reference to the GND side electrode of the first switching unit becomes conductive when the voltage is equal to or higher than the first voltage. A second switching unit having a snapback characteristic for maintaining the conduction at a low second voltage;
A semiconductor device comprising: a third switching unit that conducts when the second switching unit conducts and sucks charges of the first drive electrode. The second switching unit and the third switching unit are configured such that the first switching unit operates with the voltage of the first drive electrode based on the GND-side electrode of the first switching unit. The semiconductor device according to claim 1, wherein a dynamic clamp circuit is formed that clamps to a voltage of 2. The first drive electrode side further includes a Zener diode connected from the first drive electrode to be opposite to the direction of the second switching unit,
The semiconductor device according to claim 1, wherein the second switching unit is connected in series with the Zener diode. On the first drive electrode side, a fourth equivalent to the third switching unit is connected so as to be forward biased from the first drive electrode to the direction of the second switching unit. The switching part is further provided,
4. The semiconductor device according to claim 1, wherein the second switching unit is connected in series with the fourth switching unit. 5.   The semiconductor device according to claim 1, wherein the second switching unit is a thyristor operation circuit.   6. The first switching unit according to claim 1, wherein the third switching unit is turned on by a holding current that flows through the second switching unit when the second switching unit holds the conduction at a second voltage. The semiconductor device according to one item.

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