JP5896595B2 - Two-layer RF structure wafer holder - Google Patents

Description

  The present invention relates to a wafer holder used in a semiconductor manufacturing apparatus for performing processing such as plasma CVD, reduced pressure CVD, and metal CVD on a semiconductor wafer, and in particular, a circular RF electrode and an annular RF electrode at different depths. A wafer holder having a two-layer RF structure embedded therein.

  In the manufacturing process of a semiconductor element, various processes such as a film forming process and an etching process are performed on a semiconductor wafer which is an object to be processed. In a semiconductor manufacturing apparatus that performs processing on such a semiconductor wafer, a wafer holder for holding the semiconductor wafer is used. Wafer holders that use ceramics such as aluminum nitride have been put into practical use, and there are conductors such as RF (high frequency) electrodes, electrostatic chuck electrodes, or resistance heating element circuits inside or on the surface. Is formed.

  For example, Patent Document 1 discloses a wafer holder including a resistance heating element circuit divided into a plurality of zones for the purpose of improving thermal uniformity and a conductor circuit embedded at a different depth from the resistance heating element circuit. It is shown. The conductor circuit is electrically connected to the resistance heating element through the via hole, and extends to an external terminal disposed at the center of the wafer holder. It is described that the external terminal can be prevented from being exposed to a corrosive environment by attaching a cylindrical body isolated from the outside to the central portion of the wafer holder.

  Patent Document 2 shows a wafer holder in which two internal electrodes are embedded at different depths in a ceramic substrate. In addition, a structure in which a columnar ceramic molded body is inserted into a via hole is shown in order to ensure conduction between these two internal electrodes. It is described that such a structure can prevent damage due to thermal stress.

  Further, Patent Document 3 discloses a wafer holder in which a disk electrode and a ring electrode are embedded in a ceramic substrate concentrically with each other and spaced apart in the thickness direction of the ceramic substrate. It is described that variation in the etching rate in the wafer surface can be suppressed by electrically connecting the ring electrode to the inside of the ceramic substrate.

JP 2001-342079 A JP 2002-231798 A Utility Model Registration No. 3154930

  Patent Documents 1 to 3 described above each show a structure for electrically connecting two conductor circuits embedded at different depths inside a ceramic substrate. 1 has a structure in which a conductive portion is formed inside a via hole, Patent Document 2 has a structure in which a columnar ceramic molded body is inserted into the via hole, and Patent Document 3 has a structure in which a plated layer is formed in a counterbore hole. It is disclosed.

  However, when these structures shown in Patent Documents 1 to 3 are used for a long period of time, the connection between the two conductor circuits is likely to break, and as a result, the thermal uniformity deteriorates. There may be a problem in reliability due to variations in the etching rate. Further, since two conductor circuits are connected to each other inside the ceramic substrate, when a mechanical trouble such as disconnection occurs at the connecting portion, it cannot be easily repaired.

  In addition, in a semiconductor manufacturing apparatus that performs processing such as plasma CVD, low-pressure CVD, and metal CVD, a wafer holder capable of generating plasma with uniform density and performing plasma processing uniformly over the entire surface of the wafer Was demanded. The present invention has been made in view of the above problems, and an object of the present invention is to provide a highly reliable wafer holder capable of uniformly performing plasma processing over the entire wafer surface.

  In order to solve the above problems, the inventors embedded a circular RF electrode and an annular RF electrode having a larger outer diameter so that the depths from the wafer mounting surface are different from each other in the ceramic substrate, In a wafer holder having a two-layer RF structure in which these are connected to different power supply circuits without being connected to each other, a plurality of connection circuits are interposed between the annular RF electrode and its external terminals, thereby making the annular RF electrode It has been found that the internal potential can be made more uniform, variation in the density of the generated plasma is suppressed, and the plasma treatment can be performed uniformly over the entire surface of the wafer.

  That is, a wafer holder provided by the present invention includes a ceramic substrate having a wafer mounting surface, and a circular RF electrode and an annular RF electrode embedded in the ceramic substrate so that the depths from the wafer mounting surface are different from each other. And the first and second external terminals electrically connected to the circular RF electrode and the circular RF electrode, respectively, and the circular RF electrode and the second external terminal interposed therebetween to electrically connect them. A plurality of connection circuits, wherein the plurality of connection circuits are radially formed at the same depth as the annular RF electrode and substantially rotationally symmetric with respect to the central axis of the annular RF electrode. Features.

  The wafer holder provided by the present invention may further include a second connection circuit interposed between the plurality of connection circuits and the second external terminals to electrically connect them.

  According to the present invention, since the electric potential in the annular RF electrode can be made uniform, variations in the density of generated plasma can be suppressed. As a result, the film quality of the film formed on the wafer by plasma processing can be made uniform over the entire wafer surface.

  Further, by providing the second connection circuit, the second external terminal of the annular RF electrode and the circular RF electrode embedded at a depth different from the depth at which the annular RF electrode is embedded are electrically connected. Interference with the first external terminal connected to can be avoided, and variation in density of generated plasma can be further suppressed. Therefore, the film quality of the film formed on the wafer by plasma processing can be made extremely uniform over the entire surface of the wafer.

  In particular, when it is necessary to dispose a plurality of external terminals in the support member that supports the ceramic substrate from the back side, the external terminals may interfere with each other, which may be an obstacle in designing. By providing the connection circuit, the degree of freedom in designing these external terminals is improved, and the above-described problems in designing can be easily solved.

It is a schematic longitudinal cross-sectional view which shows one specific example of the wafer holder of this invention. It is a schematic diagram which shows the positional relationship in the horizontal direction of the two RF electrodes embed | buried under the wafer holder of FIG. It is a schematic diagram which shows the pattern of the annular | circular shaped RF electrode and connection circuit which were each provided in the wafer holder of the samples 1-11 of the Example of this invention.

  Hereinafter, a specific example of the wafer holder of the present invention will be described with reference to FIG. A wafer holder 100 according to an embodiment of the present invention includes a ceramic substrate 1 made of a substantially disk-shaped ceramic material having a wafer mounting surface 1a. Examples of the ceramic material include aluminum nitride, silicon nitride, and alumina. Among them, aluminum nitride is preferable in that it has good thermal conductivity, and has high rigidity. In view of this, silicon nitride or alumina is preferable.

  The thickness of the ceramic substrate 1 is preferably thin in order to raise and lower the temperature at high speed. However, if the thickness is too thin, there is a problem that the rigidity is lowered. Considering these, the thickness of the ceramic substrate 1 is preferably 5 to 25 mm, more preferably 10 to 20 mm. A circular RF electrode 2 that plays a role of generating plasma and an annular RF electrode 3 having a larger outer diameter are embedded in the ceramic substrate 1 so as to have different depths from the wafer mounting surface 1a. Yes.

  The specific depth of the circular RF electrode 2 and the annular RF electrode 3 from the wafer mounting surface 1a affects the generation of stable plasma, and is thus determined based on the volume resistivity and dielectric constant of the ceramic substrate 1. . For example, the circular RF electrode 2 has an upper surface (that is, a surface on the wafer mounting surface 1a side) having a depth of 0.5 to 2.0 mm, more preferably 0.5 to 1.0 mm from the wafer mounting surface 1a. It is buried to become. On the other hand, the upper surface of the annular RF electrode 3 (that is, the surface on the wafer mounting surface 1a side) is 0.5 from the lower surface of the circular RF electrode 2 (that is, the surface opposite to the wafer mounting surface 1a side). It is embedded to a depth of ˜3.0 mm, more preferably 0.5 to 2.0 mm.

  FIG. 2 schematically shows a positional relationship when the circular RF electrode 2 and the annular RF electrode 3 are viewed from the wafer mounting surface 1a side. As can be seen from FIG. 2, the circular RF electrode 2 and the annular RF electrode 3 are arranged concentrically with respect to the central axis of the ceramic substrate 1. By arranging the circular RF electrode 2 and the annular RF electrode 3 in this way, the plasma distribution in the outer peripheral portion of the ceramic substrate 1 can be stabilized.

  In the specific example shown in FIG. 2, the circular RF electrode 2 and the annular RF electrode 3 do not overlap as viewed from the wafer mounting surface 1 a, but the present invention is not limited to this. The inner diameter may be made smaller than the outer diameter of the circular RF electrode 2 so that these electrodes are partially overlapped.

  The circular RF electrode 2 has a diameter of about 290 to 310 mm, for example, and the annular RF electrode 3 is sufficiently conductive to stabilize the potential of the outer peripheral portion of the ceramic substrate 1 as described above. The circuit width of the ring is about 1 to 20 mm, more preferably about 3 to 15 mm.

  A resistance heating element circuit 4 may be embedded in the ceramic substrate 1 at a different depth from the circular RF electrode 2 and the annular RF electrode 3. The structure of the resistance heating element circuit 4 is not particularly limited. For example, the resistance heating element circuit 4 can be formed by a spiral or disk-shaped conductive circuit arranged concentrically with respect to the central axis of the ceramic substrate 1.

  As shown in FIG. 1, the circular RF electrode 2, the annular RF electrode 3, and the resistance heating element circuit 4 are arranged in this order from the wafer mounting surface 1a side to the back surface 1b side opposite to the wafer mounting surface 1a. Embedded in the ceramic substrate 1 and spaced apart from each other in the thickness direction of the ceramic substrate 1. The circular RF electrode 2, the annular RF electrode 3, and the resistance heating element circuit 4 can be formed, for example, by embedding a screen printing method, a metal wire, a mesh, a foil, or the like. In this, it is more preferable to form by the screen printing method from the surface of the freedom degree of design. For screen printing, the thickness is preferably 0.02 to 0.05 mm, and for metal foil, the thickness is preferably 0.1 to 1 mm. Moreover, if it is a metal wire or a metal mesh, it is preferable that the wire diameter shall be 1 mm-4 mm.

  When the screen printing method is used, a conductive circuit pattern to be the circular RF electrode 2, the annular RF electrode 3, and the resistance heating element circuit 4 is formed using a conductive paste. The conductive paste can be obtained by adding an oxide powder to the metal powder as necessary, and mixing a binder and a solvent thereto. The metal powder is preferably tungsten (W), molybdenum (Mo), or tantalum (Ta) from the viewpoint of matching the thermal expansion coefficient with the ceramic that is the material of the ceramic substrate 1.

  The circular RF electrode 2, the annular RF electrode 3, and the resistance heating element circuit 4 are electrically connected to external terminals, respectively. Specifically, the circular RF electrode 2 is electrically connected to a first external terminal 5 extending from the back surface 1 b of the ceramic substrate 1 to the depth of the circular RF electrode 2. Similarly, the annular RF electrode 3 is electrically connected to a second external terminal 6 extending from the back surface 1b of the ceramic substrate 1 to the depth of the annular RF electrode 3, and the resistance heating element circuit 4 It is electrically connected to a third external terminal 7 extending from the back surface 1 b of the base 1 to the depth of the resistance heating element circuit 4.

  Here, the first external terminal 5 and the third external terminal 7 are directly connected to the circular RF electrode 2 and the resistance heating element circuit 4, respectively, while the second external terminal 6 is connected to the annular RF electrode 3. Are not directly connected to each other, but are indirectly connected through a plurality of connection circuits 11 embedded at the same depth as the annular RF electrode 3. That is, the plurality of connection circuits 11 are interposed between the annular RF electrode 3 and the second external terminal 6 to electrically connect them.

  The specific number of connection circuits 11 is not particularly limited as long as it is two or more, but it is more preferably four or more in order to make the potential uniform. Moreover, it is preferable that the some connection circuit 11 is comprised by the strip | belt-shaped member of width 1-20 mm, respectively more preferably 3-15 mm in width.

  The plurality of connection circuits 11 have a radial shape when viewed from the wafer mounting surface 1 a and are substantially rotationally symmetric with respect to the central axis of the annular RF electrode 3. By adopting such a shape, it becomes possible to keep the annular RF electrode 3 substantially equipotential over the entire region. Here, “substantially rotationally symmetric” means that not only strict rotational symmetry but also that at least one of the plurality of connection circuits 11 is slightly shifted from the rotationally symmetric position in the circumferential direction is included. Yes. The limit of the allowable circumferential deviation is specifically about 10 ° in the circumferential direction. With such a deviation, the potential of the annular RF electrode 3 can be kept substantially uniform.

  The method of connecting the external terminals 5, 6 and 7 to the circular RF electrode 2, the annular RF electrode 3 and the resistance heating element circuit 4 is not particularly limited, and can be attached by a known method. For example, counterboring is performed until the circular RF electrode 2, the connection circuit 11 connected to the annular RF electrode 3, and the resistance heating element circuit 4 are exposed from the back surface 1b opposite to the wafer mounting surface 1a of the ceramic substrate 1. Then, these exposed electrode parts and circuit parts may be metallized or directly connected to an external terminal such as tungsten or molybdenum using an active metal brazing without metallization. The connected external terminals may be plated as necessary to improve oxidation resistance.

  After mechanically attaching the external terminals 5, 6 and 7, in order to cover these external terminals 5, 6 and 7, a ceramic ring member is fitted into the counterbore hole formed in the ceramic base 1, and the ring member and The ceramic substrate 1 is preferably joined with an inorganic material such as glass. Although it does not specifically limit to the glass used for joining, Borosilicate, zinc borosilicate glass, crystallized glass, etc. can be used.

  By coating the external terminals with the ceramic ring member in this way, even when the wafer holder 100 is installed in the reaction vessel and various types of processing are performed on the wafer, these external terminals are used for each gas type. It can be protected from exposure to prevent oxidation and deterioration. In particular, since a corrosive gas is often used in the semiconductor manufacturing process, it is particularly preferable to cover with a ceramic ring member having excellent corrosion resistance. The material of the ceramic ring member is preferably the same material as that of the ceramic substrate 1 in consideration of the reliability of bonding.

  Lead wires 8, 9 and 10 are connected to these external terminals 5, 6 and 7, respectively. The lead wires 8, 9 and 10 are not electrically connected to each other, but are separately connected to a power supply circuit (not shown) or to the ground, whereby the circular RF electrode 2, the annular RF electrode 3, and the resistance heating element are connected. It is possible to apply different voltages to the circuit 4 or to set the circular RF electrode 2 and the annular RF electrode 3 to the same potential. As a result, the film quality of the film formed on the semiconductor wafer mounted on the wafer mounting surface 1a can be made uniform.

  For example, the circular RF electrode 2 and the annular RF electrode 3 embedded in the ceramic substrate 1 so as to be spaced apart from each other are individually connected via external terminals 5 and 6 and lead wires 8 and 9 connected thereto, respectively. By grounding, it is possible to realize a stable potential with no potential difference between the central portion and the outer peripheral portion of the ceramic substrate 1 and no potential difference in the circumferential direction of the ceramic substrate 1. Thereby, the density of the generated plasma can be made uniform.

  The plasma density may show a density distribution close to a normal distribution when the horizontal axis is graphed as an arbitrary straight line on the wafer mounting surface 1a passing through the center of the wafer mounting surface 1a and the vertical axis is the plasma density. . That is, the plasma density of the outer peripheral portion of the wafer mounting surface 1a is lower than that of the central portion. On the other hand, in the wafer holder 100 described above, since separate high frequency power can be applied to the circular RF electrode 2 and the annular RF electrode 3, the wafer mounting is performed by appropriately controlling these powers. It is possible to control the plasma density on the outer periphery of the surface 1a. In this way, the density distribution of the generated plasma can be corrected as appropriate, and an extremely uniform plasma density can be obtained.

  By the way, the above-described ceramic substrate 1 is generally supported by the support member 12 from the back surface 1b opposite to the wafer mounting surface 1a. Specifically, an upper end portion of a cylindrical support member 12 is attached to a substantially central portion on the back surface 1b side of the ceramic substrate 1, and the lower end portion of the support member 12 is subjected to semiconductor wafer processing such as plasma CVD. It is attached to the bottom of a reaction vessel (not shown).

  The ceramic substrate 1 and the support member 12 can be chemically bonded via a bonding layer. In this case, the material of the support member 12 is not particularly limited as long as it has a thermal expansion coefficient that is not significantly different from the thermal expansion coefficient of the ceramic material that is the material of the ceramic substrate 1. For example, when the ceramic substrate 1 is AlN, it is preferable to use AlN as the material of the support member 12.

The components of the bonding layer when chemically bonded are preferably composed of AlN, Al ₂ O _{3 and a} rare earth oxide. Since these components have good wettability with ceramics such as AlN which is the material of the ceramic substrate 1 and the support member 12, the bonding strength can be made relatively high, and the airtightness of the bonding surface can be easily obtained. Because you can. The support member 12 may be attached to the ceramic substrate 1 by a physical (mechanical) technique such as screwing.

  The support member 12 and the chamber (reaction vessel) can be attached by a general method, but the inside of the support member 12 can be easily isolated from the chamber atmosphere by using a seal member such as an O-ring at the joint. Can do. Thereby, when the external terminals 5, 6 and 7 and the lead wires 8, 9 and 10 are accommodated in the support member 12, these members can be protected from the corrosive environment in the chamber.

  As described above, when the ceramic substrate 1 is supported by the support member 12 at the center portion and a plurality of external terminals are disposed inside the ceramic substrate 1, there is a problem that the plurality of external terminals are close to each other and interfere with each other. is there. In this case, a second connection circuit 11a is provided between the plurality of connection circuits 11 and the second external terminal 6, and the plurality of connection circuits 11 and the second external terminal 6 are connected via the second connection circuit 11a. Are preferably electrically connected. Thus, by interposing the second connection circuit 11 a between the plurality of connection circuits 11 and the second external terminal 6, the first external terminal 5 connected to the circular RF electrode 2 or the resistance heating element circuit 4. In addition, the third external terminal 7 can be separated from the plurality of connection circuits 11 and the second external terminal 6, and good insulation can be ensured.

  The shape of the second connection circuit 11a is preferably an annular shape. However, in addition to the RF electrode and the heating element circuit, when the position of a thermocouple, a lift pin hole, etc. must be avoided, the shape is generally an annular shape or a polygonal annular shape. There may be. The width of the second connection circuit 11a is preferably 1 to 20 mm, more preferably 3 to 15 mm, like the plurality of connection circuits 11.

[Example 1]
In order to produce a wafer holder 100 as shown in FIG. 1, first, 0.5 part by weight of yttrium oxide as a sintering aid is added to 99.5 parts by weight of aluminum nitride powder, and then a binder and an organic solvent are added to perform ball mill mixing. Thus, a slurry was prepared. Granules were produced from the resulting slurry by spray drying, and this was press-molded to produce a compact.

  Next, this molded body was degreased at 700 ° C. in a nitrogen atmosphere and then sintered at 1850 ° C. in a nitrogen atmosphere to obtain an aluminum nitride sintered body. The obtained sintered body was processed to obtain a disc-shaped aluminum nitride sintered body having a diameter of 330 mm and a thickness of 2 mm and a disc-shaped aluminum nitride sintered body having a diameter of 330 mm and a thickness of 5 mm. Both of these two aluminum nitride sintered bodies had a surface roughness Ra of 0.8 μm and a flatness of 50 μm.

  Next, W paste was applied to each of these two aluminum nitride sintered bodies by screen printing to form a circuit pattern. Specifically, a circular pattern having a diameter of 300 mm for the circular RF electrode 2 was first printed on one surface of an aluminum nitride sintered body having a diameter of 330 mm and a thickness of 2 mm.

  Further, an annular pattern having an inner diameter of 305 mm and an outer diameter of 325 mm for the annular RF electrode 3 is formed on the other surface of the aluminum nitride sintered body having a diameter of 330 mm and a thickness of 2 mm in order to form a pattern shown in FIG. An annular pattern having an outer diameter of 100 mm and an inner diameter of 92 mm for the second connection circuit 11a arranged concentrically on the inner side thereof, and interposed between the annular RF electrode 3 and the second connection circuit 11a A radial pattern composed of four 4 mm wide bands for the plurality of connection circuits 11 was printed. This radial pattern was formed so as to be rotationally symmetric with respect to the center axis of both annular patterns.

  These patterns formed on both surfaces are degreased at 700 ° C. in a nitrogen atmosphere, and then fired at 1830 ° C. in a nitrogen atmosphere to form two types of RF electrodes on both surfaces of an aluminum nitride sintered body having a diameter of 330 mm and a thickness of 2 mm. Formed respectively. On the other hand, the aluminum nitride sintered body having a diameter of 330 mm and a thickness of 5 mm was subjected to screen printing, degreasing, and sintering on only one surface thereof in the same manner as described above to form the resistance heating element circuit 4.

  Next, an aluminum nitride sintered body having a thickness of 1 mm was bonded to one surface of the aluminum nitride sintered body having a diameter of 330 mm and a thickness of 2 mm on which the circular RF electrode 2 was formed. On the other surface on which the annular RF electrode 3 is formed, a 5 mm thick aluminum nitride sintered body on which the resistance heating element circuit 4 is formed is different from the surface on which the resistance heating element circuit 4 is formed. Were laminated so that they face each other.

  Further, an aluminum nitride sintered body having a thickness of 9 mm was bonded to the surface of the aluminum nitride sintered body having a thickness of 5 mm on which the resistance heating element circuit 4 was formed. When the above-mentioned aluminum nitride sintered bodies were bonded to each other, a material mainly composed of aluminum nitride was used as an adhesive, which was degreased and fired and then joined. The aluminum nitride sintered body having a thickness of 1 mm and the aluminum nitride sintered body having a thickness of 9 mm were both produced by the same method as the aluminum nitride sintered body having a thickness of 2 mm or 5 mm.

  With respect to the ceramic substrate 1 in which the circular RF electrode 2, the annular RF electrode 3, and the resistance heating element circuit 4 thus obtained are embedded, the resistance heating element circuit 4 from the surface on the resistance heating element circuit 4 side. The counterbore holes are processed so that the connection circuit 11 connected to the circular RF electrode 2 and the annular RF electrode 3 is exposed, and Ni for supplying power to the resistance heating element circuit 4 and both the RF electrodes 2 and 3 is exposed. The external terminals 5, 6 and 7 made of W with plating were connected.

Next, in order to hermetically seal the connection between the heating element circuit 4 and the RF electrodes 2 and 3 and the external terminals 5, 6 and 7, a ring made of AlN covering the separately prepared external terminals is attached to the ceramic substrate 1. In this state, crystallized glass bonding was performed at 800 ° C. for 1 hour in an N ₂ atmosphere. Thereafter, lead wires 8, 9 and 10 were connected to nickel electrodes at one end of the external terminals exposed from the ceramic substrate 1.

  Then, an AlN support member 12 having an outer diameter of 60 mm, an inner diameter of 54 mm, and a length of 150 mm was chemically bonded to the surface of the ceramic substrate 1 on the resistance heating element circuit 4 side via a bonding layer. The wafer holder 100 of Sample 1 was produced by the above method. Further, Samples 2 to 11 were prepared in the same manner as Sample 1 except that the patterns of the annular RF electrode 3 and the connection circuits 11 and 11a were formed in the patterns shown in B to K of FIG. A wafer holder 100 was prepared.

  In the patterns A to C in FIG. 3, the second external terminal 6 is not provided on the second connection circuit 11a, but the second external terminal 6 is formed on the conductive circuit protruding inward from a part of the second connection circuit 11a. 2 External terminals 6 were provided. In contrast, in the patterns of D to F and K in FIG. 3, the second external terminal 6 is provided on the second connection circuit 11a. 3, the connection circuit 11 is extended to the center of the annular RF electrode 3, and the second external terminal 6 is provided on the center.

  In order to evaluate the performance of the samples 1 to 11 thus produced, each sample was placed in a reaction vessel, a power supply line was connected to the lead wire 10 connected to the resistance heating element circuit 4, and both RF electrodes The lead wires 8 and 9 connected to 2 and 3 were grounded separately. And it evaluated according to the following evaluation test. The other end of the support member 12 was hermetically sealed with an O-ring at the bottom of the reaction vessel and fixed with a clamp.

<Evaluation test>
The reaction vessel was evacuated and the resistance heating element circuit 4 embedded in the ceramic substrate 1 was energized to heat the ceramic substrate 1 to 300 ° C. 13.56 MHz, 1500 W between parallel plate electrodes composed of an opposing flat plate upper electrode installed in the reaction vessel and both RF electrodes (circular RF electrode 2 and annular RF electrode 3) embedded in the ceramic substrate 1. High frequency power was applied to generate plasma.

Although by applying a high frequency power to generate plasma in the reaction gas atmosphere when performing a CVD process, in this evaluation test, it is not necessary to be deposited on the wafer, by using N ₂ in place of the reaction gas frequency Power was applied. Under this condition, high frequency power was applied for 1 minute, and the temperature distribution of the ceramic substrate 1 immediately after the application was completed was measured using a 300 mm 17-point wafer thermometer manufactured by Sensory.

  Since there is a correlation between the temperature distribution and the etching rate by plasma, it is possible to evaluate whether or not plasma is generated uniformly by evaluating the obtained temperature distribution. This is because if the generated plasma has a density distribution, the density distribution causes variations in heat input from the plasma, and as a result, a temperature distribution corresponding to the density distribution is generated. Table 1 shows the results of the temperature distribution of Samples 1 to 11 measured by the evaluation test.

  Here, ΔT indicates the difference between the maximum value and the minimum value in all temperature data obtained in the evaluation test for each sample, and ΔTφ94 is four points measured on the circumference of a diameter of 94 mm. The difference between the maximum value and the minimum value in the measured data is shown for each sample. Similarly, ΔTφ188 and ΔTφ282 show the difference between the maximum value and the minimum value among the four measurement data measured on the circumferences of diameters of 188 mm and 282 mm, respectively.

  As can be seen from Table 1, the wafer holders of Samples 1 to 8 have a small ΔT of about 2.1 to 2.8 ° C., and ΔTφ94, ΔTφ188, and ΔTφ282 are also about half or the same as ΔT. It was confirmed that uniform plasma was generated. On the other hand, the wafer holders of Samples 9 to 11 as comparative examples have a result that ΔT is significantly larger than Samples 1 to 8, and ΔTφ94, ΔTφ188, and ΔTφ282 are similarly larger than Samples 1 to 8. Yes. This is presumably because the connection circuit 11 connected to the annular RF electrode 3 had a biased asymmetric pattern, so that plasma was not uniformly generated, and the plasma density distribution was biased.

  In the wafer holders of samples 7 to 8, the third external terminal 7 electrically connected to the resistance heating element circuit 4, the first external terminal 5 electrically connected to the circular RF electrode 2, and the first 2 Since the external terminals 6 interfered with each other, the third external terminals 7 and the first external terminals 5 were installed at positions away from the center of the ceramic substrate 1. For this reason, it has been difficult to attach the support member 12 to the ceramic substrate 1. In this respect, the wafer holders of Samples 1 to 6 were more preferable.

  That is, since the wafer holders of the samples 1 to 6 have the second connection circuit 11a, the degree of freedom in design is improved, and the third external terminals 7 and the first first electrodes arranged at the center of the ceramic substrate 1 are improved. The plurality of connection circuits 11 could be formed rotationally symmetrically and radially with respect to the central axis of the circular RF electrode 2 without interference from the external terminal 5. Thus, when it is necessary to arrange these external terminals in the cylindrical support member 12, the wafer holders of the samples 1 to 6 are particularly preferable.

[Example 2]
Example 1 except that different power supply circuits are connected to the circular RF electrode 2 and the annular RF electrode 3 and different high frequency power is applied to the wafer holder 100 of the sample 1 produced in Example 1. The evaluation test was carried out in the same manner as in 1. Specifically, a power of 13.56 MHz and 200 W was applied to the circular RF electrode 2, and a power of 13.56 MHz and 100 W was applied to the annular RF electrode 3. The results are shown in Table 2 below together with the results of Sample 1 of Example 1.

  As can be seen from Table 2 above, ΔT is reduced by applying different high frequency power to the circular conducting RF electrode 2 and the annular RF electrode 3. This indicates that the difference in plasma density between the inner peripheral portion and the outer peripheral portion is further reduced. By applying different high frequency powers to the circular conducting RF electrode 2 and the annular RF electrode 3, plasma is generated. It was found that the density distribution of can be controlled well.

DESCRIPTION OF SYMBOLS 1 Ceramic substrate 1a Wafer mounting surface 2 Circular RF electrode 3 Toroidal RF electrode 4 Resistance heating element circuit 5 1st external terminal 6 2nd external terminal 7 3rd external terminal 8, 9, 10 Lead wire 11 Multiple connection circuits 11a Second connection circuit 12 Support member 100 Wafer holder

Claims (4)

A disc-shaped and integrated ceramic substrate having a wafer mounting surface; a circular RF electrode and an annular RF electrode embedded in the ceramic substrate so that the depths from the wafer mounting surface are different from each other; A plurality of first and second external terminals electrically connected to the shape RF electrode and the annular RF electrode, respectively, and a plurality of electrical terminals connected between the annular RF electrode and the second external terminal. A wafer holder including a connection circuit and a resistance heating element circuit embedded in the ceramic substrate , wherein the circular RF electrode, the annular RF electrode, and the resistance heating element circuit are arranged on the wafer mounting surface. from the circular RF electrodes, the circle is embedded in the order of the annular RF electrodes and the resistance heating body circuit, said plurality of connection circuits, and a circle in a radial at the same depth as the annular RF electrode Wafer holder, characterized in that it is formed in a substantially rotationally symmetrical with respect to the central axis of the Jo RF electrodes.   2. The wafer holding according to claim 1, further comprising a second connection circuit interposed between the plurality of connection circuits and the second external terminal to electrically connect them. body. The wafer holder according to claim 1 or 2, further comprising:
A cylindrical support member that is bonded to the back surface of the wafer mounting surface of the ceramic substrate and supports the ceramic substrate;
The wafer holder, wherein the first external terminal and the second external terminal are exposed to the inside of the support member and are connected to the first and second lead wires, respectively. A semiconductor manufacturing apparatus on which the wafer holder according to any one of claims 1 to 3 is mounted.

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