JP5860759B2 - Storage device - Google Patents

Description

  The present invention relates to a storage device, and more particularly to a drive device configured using a flash memory, that is, a so-called SSD (Solid State Drive) or FMD (Flash Memory Drive).

  A drive device using a flash memory is disclosed in Patent Document 1.

International Publication Number WO2008 / 018258

  Flash memory used in FMD (Flash Memory Drive), which is a replacement for hard disk drive (HDD) used as a storage device for consumer and industrial embedded devices, has a problem with rewriting endurance. Have certain restrictions. When such a storage device is incorporated in a computer system and used as a file memory, the address of the storage area where the number of rewrites frequently occurs is file management information such as PBR (Partition Boot Record), FAT (File Allocation Table). In the case of a system, it concentrates on FAT1, FAT2, DIR (Directory). Similarly, rewriting concentrates on file management information even in other types of OSs.

  In the storage device, the access life of the magnetic head of the HDD is about 300,000 times, and the flash memory (NAND type and AND type) is 100,000 to 300,000 times per block. The life of the storage device depends on the life of the storage unit.

  As described above, the life of the storage device has a problem of deterioration due to access to the storage unit, and determines the maximum life of the storage unit. In particular, a NAND flash memory having a large writing block size has a plurality of data smaller than the writing block size, and if writing frequently occurs, the writing life is reached in a short period. In particular, the file management unit on the OS frequently rewrites, and in recent OSs, the location information is frequently written so that the history can be traced even if a failure occurs, so the life of the storage device becomes extremely short. .

  In order to solve such a problem, in Patent Document 1, a drive connected to a host is composed of a nonvolatile memory unit made of a large-capacity flash memory and a volatile memory unit made of DRAM which is a volatile semiconductor memory, Stores data and file management information related to data storage in the nonvolatile memory unit, reads the file management information stored in the nonvolatile memory unit when the host power is turned on, writes it to the volatile memory unit, and reads it from the host In the operation and writing operation, reading and writing are performed based on the file management information temporarily stored in the volatile memory unit, and the file management information recorded in the volatile memory unit is read when the host power is turned off. Reducing the number of rewrites in the flash memory by writing to the non-volatile memory. There has been proposed.

  In the storage device of Patent Document 1, a power holding unit including a large-capacity capacitor (electric double layer capacitor having a capacity of at least 0.1 F) is provided in the drive in preparation for an unexpected power interruption on the host side. When the host's unexpected power shutdown occurs, the power supply for driving the drive is switched to the power supply holding unit in the drive and recorded in the volatile memory unit using the charge stored in the large capacity capacitor The file management information is read and written to the nonvolatile memory unit.

  However, when a large-capacity capacitor is installed, a circuit that detects deterioration of the large-capacity capacitor is required, and when the problem is that the circuit scale of the controller mounted in the drive increases and the capacitor deterioration is detected, the host side is not expected. Even when the power is shut off, there is a problem that the file management information update function from the volatile memory to the flash memory cannot be used.

  SUMMARY OF THE INVENTION An object of the present invention is to provide an SSD storage device that realizes further improvement in rewrite endurance of a non-volatile memory unit composed of flash and improvement in life as a semiconductor drive while maintaining a high data transfer rate for writing and reading. Is to provide.

  The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

  Of the inventions disclosed in the present application, the outline of typical ones will be briefly described as follows.

  That is, a storage device according to the present invention is a hard disk drive compatible storage device used by being connected to a host, and a controller that performs data write / read control with the host under the control of the host, and a file A flash comprising a management information section and a data section, wherein data sent from a host is stored in the data section, and file management information related to the data storage is stored in the file management information section A first memory composed of a memory and a second memory composed of a non-volatile random access memory, and is configured to be driven by power supplied from the host. (1) Data exchange with the host using a data management method compatible with the data management method for hard disks (2) the file management information is read from the file management information section in the first memory constituted by a flash memory, and the nonvolatile random access memory is constituted. A process of writing to the second memory; and (3) when there is a read operation and a write operation from the host to the storage device, based on the file management information in the second memory configured by a nonvolatile random access memory A process of reading and writing in the second memory and updating the file management information; and (4) in the second memory configured by a nonvolatile random access memory in response to a normal termination operation in the host. Updated from the second memory with the file management information updated to A process of writing to the first memory consists of a flash memory by reading the serial file management information and is characterized by comprising configured to run.

  The storage device according to the present invention is a hard disk drive compatible storage device used by being connected to a host, and a controller that performs data write / read control with the host under the control of the host, and a flash A first memory unit configured by a memory and a second memory unit configured by a non-volatile random access memory, and configured to be driven by power supplied from the host; The first memory unit configured by a memory includes data necessary for starting an OS and an application developed on a host, and file management information for managing file data stored in the first memory unit. The controller stores (1) data compatible with a data management system for hard disks. A process for managing writing / reading of data exchanged with the host in a management method; and (2) reading the file management information stored in the first memory unit configured by a flash memory to be nonvolatile A process of writing to the second memory unit composed of a random access memory; and (3) a nonvolatile random access when there is a read operation and a write operation to the storage device from an OS and an application operating on the host. A process of reading and writing based on the file management information stored in the second memory unit configured by a memory and updating the file management information stored in the second memory unit; ) Consists of non-volatile random access memory according to normal termination operation in the host A process of reading the updated file management information from the second memory unit and writing the updated file management information to the first memory unit configured by a flash memory in a state where the updated file management information is held in the second memory unit; , And is configured to execute.

  Of the inventions disclosed in the present application, effects obtained by typical ones will be briefly described as follows.

  While maintaining a high data transfer rate for writing and reading, the flash memory can be rewritten with improved durability and a longer life as a semiconductor drive, and unexpected in the host even in environments where it is difficult to mount large-capacity capacitors A storage device having a function of updating file management information from the RAM unit to the flash memory unit when the power supply is interrupted can be realized.

It is a block diagram which shows schematic structure of the memory | storage device by one embodiment of this invention. 1 is an example of an MRAM (Magnetic Random Access Memory) used in an embodiment of the present invention, where (a) is a circuit diagram showing a memory cell, and (b) is a configuration diagram including a partial cross-sectional view showing the configuration of the memory cell. It is. It is a memory map figure which shows the address space of the memory | storage device by one Embodiment of this invention. It is memory operation explanatory drawing of the memory | storage device by one Embodiment of this invention. 4 is a flowchart showing an operation when a data distribution function is added to a controller in the storage device according to the embodiment of the present invention. 4 is a flowchart showing an example of leveling processing when a rewrite frequency difference of 4 times occurs in the storage device according to the embodiment of the present invention. It is explanatory drawing which shows the operation example of the leveling process in the memory | storage device by one embodiment of this invention. 5 is a flowchart illustrating an operation example of data addition in the storage device according to the embodiment of the present invention. It is a block diagram which shows schematic structure at the time of adding the power supply holding | maintenance part to the memory | storage device by one Embodiment of this invention. It is a flowchart which shows the operation | movement of an emergency power-off sequence in the memory | storage device at the time of adding the power holding part to one embodiment of this invention. 6 is a flowchart showing an operation of a power-on / power-off sequence in the storage device according to the embodiment of the present invention. It is a top view which shows the layout on the board | substrate of the memory | storage device by one embodiment of this invention. It is a back view which shows the layout on the board | substrate of the memory | storage device by one embodiment of this invention.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. Note that components having the same function are denoted by the same reference symbols throughout the drawings for describing the embodiment, and the repetitive description thereof will be omitted.

(Outline configuration)
FIG. 1 is a block diagram showing a schematic configuration of a storage device according to an embodiment of the present invention.

  First, an example of the configuration of the storage device according to this embodiment will be described with reference to FIG. The storage device according to the present embodiment is an HDD compatible storage device (Flash Memory Drive: FMD) 100, and is not particularly limited. For example, 32 nonvolatile memories (flash memory, etc.) 101 having a storage capacity of 512 Mbits are provided. Alternatively, a file memory having a storage capacity for a plurality of pages is configured by mounting a large number such as 64 in one housing (package).

  These flash memories 101 are connected to the internal bus 102 through an interface (IF) not shown. The internal bus 102 is connected to the controller 103.

  The controller 103 includes a control unit constituted by a one-chip microcomputer or the like and an interface for connecting to a host 107 in a computer system compatible with ATA (AT Attachment) standard or SCSI (Small Computer System Interface) standard. The controller 103 exchanges data between the driver provided in the interface and the flash memory 101, that is, writes and reads data.

  Reference numeral 106 denotes a nonvolatile RAM mounted according to the present invention. Although the nonvolatile RAM 106 is not particularly limited, for example, a 64 Mbit (8 MB) MRAM (Magnetic Random Access Memory) configured by 16 Mbit × 4 chips can be used. As the non-volatile RAM 106, a ferroelectric memory FeRAM (Ferroelectric Random Access Memory), a phase change memory PRAM (phase-change RAM), or the like can be used in addition to the MRAM. Phase change memory is also called PCM (phase-change memory).

  The semiconductor drive 100 operates by receiving a power supply voltage VCC from the host 107 side constituting the computer system.

  In the flash memory 101, if the power is cut off at an unexpected timing on the system side due to a power failure, an operation, or a handling error in the middle of writing, the writing operation is interrupted. In general, data stored in a file format storage device is stored with an error detection / correction code added to a portion of a piece of data for the purpose of detecting or correcting error bits. If it is interrupted, the old and new data will be mixed, so the error detection and correction code will not match the old or new code, and reading this will always result in an error, which will destroy the data. Done. Even during the erasing operation, a similar error occurs if erasing is left unfinished.

  Furthermore, when the operating voltage drops due to power shutoff during writing to a certain page and sufficient writing is not performed, it is erroneously determined that writing to the page is impossible, and it is registered as a defective page, and the device is substantially Inconvenience such as failure occurs.

  The storage device 100 has, for example, the same outer size (70.0 × 100.0 × 9.5 mm) as that of a 2.5-inch hard disk drive device or the same outer size (101.6) as that of a 3.5-inch hard disk drive device. × 146.0 × 25.4 mm) and the connector pins connected to the interface circuit in the controller 103 are the same as those of the 2.5 inch hard disk drive device or 3.5 inch hard disk drive device. Used. Thus, the storage device 100 of this embodiment is an HDD (Hard Disk Drive) compatible storage device. The outer shape of the package may be an HDD compatible shape, but can be any shape or size depending on the form of incorporation.

  In this embodiment, the semiconductor non-volatile memory 101 such as a flash memory has a certain limit on the number of times of rewriting, and when it is used for the file memory as described above, the number of times of rewriting occurs, for example, Focusing on the areas where file management information such as FAT1, FAT2, and DIR is allocated in the case of PBR and FAT systems such as those described above, the rewrite frequency limit in the semiconductor nonvolatile memory 101 occurs in a specific area. In order to prevent this, the nonvolatile random access memory 106 is used.

  As the non-volatile random access memory 106, a magnetic random access memory (MRAM) can be used. FIG. 2B shows a schematic diagram of an MRAM memory cell, and FIG. 2A shows a circuit diagram of the memory cell. Here, an example in which a thin film magnetic body using a magnetic tunnel junction (MTJ: Magnetic Tunnel Junction) proposed in Japanese Patent Application Laid-Open No. 2011-23106 is used as a memory cell will be described, but a nonvolatile RAM is limited to this. is not. The memory cells illustrated in FIG. 2 are arranged in an array and are formed on a semiconductor substrate together with a control circuit to constitute a memory.

  The memory cell shown in FIG. 2A includes a magnetic tunnel junction MTJ and a MOSFET connected between the bit line BL and the reference line SL and having a resistance value that changes according to the data level of the stored data. It comprises an access transistor ATR, a write word line WWL that is selectively activated by a word line driver (not shown), and a read word line RWL that is selectively activated by a row decoder (not shown).

  In the schematic cross-sectional view of the memory cell shown in FIG. 2B, M1 to M3 are metal wiring layers embedded in the insulating material layer stacked on the semiconductor substrate SUB or disposed on the insulating material layer, respectively. , M1 constitute a reference line SL (connected to the ground potential Vss), M2 constitutes a bit line BL, and M3 constitutes a reference line SL. The access transistor ATR includes a p-type region PAR formed on the semiconductor substrate SUB, a source / drain region composed of an n-type region formed in the p-type region PAR, and a gate connected to the word word line RWL. With electrodes. M4 is a barrier metal and is a buffer material provided to electrically couple the magnetic tunnel junction MTJ and the metal wiring.

  When the power is turned on, the data at the address visible to the host 107 developed on the flash memory 101 is loaded into the nonvolatile RAM for each area of a predetermined address from the top address of the nonvolatile RAM 106. In other words, as shown in FIG. 3, when the flash memory has a storage capacity to which XXGB (gigabit) addresses are assigned from 0h to xxxh, for example, an area from the first address such as 0h to 20h (for example, 16 KB) is filed. It is an area where management information is recorded.

  When the host-side power-on is detected, as shown in FIG. 4, the controller 103 stores data (16 KB) in the area (16 KB) from the flash memory 101 to the head addresses 0h to 20h, that is, file management information (2). Read and write to the area of the nonvolatile RAM 106 from, for example, the top addresses 0h to 20h. The data (1) in the area (16 KB) from the first address written to the nonvolatile RAM 106 to 20h is the shadow information to which the data (2) on the flash memory 101 is projected as it is. A storage area exceeding 20h on the nonvolatile RAM 106 is used as a data buffer area. The non-volatile RAM 106 combines the high speed of a static RAM and a dynamic RAM, and data (file management information) written in the non-volatile RAM 106 is retained even when the host-side power supply is shut off.

  When the host side writes or reads data from or to the flash memory 101 while power is supplied from the host side, the controller 103 uses the flash memory as file management information necessary for writing or reading data. The processing is executed using the shadow information (1) written in the nonvolatile RAM 106 instead of the file management information (2) stored in 101. At this time, if the address of the data input from the host 107 side is (1) ≦ 20h, the controller 103 determines that the file management information, and performs memory access to the area from the top address of the nonvolatile RAM 106 to 20h to perform shadowing. Information (1), that is, file management information is updated.

  Here, the file system is a method for managing data recorded in a storage device, and management information such as management software and a management area provided in a recording medium may be referred to as a file system. A method for creating, moving, and deleting files and folders (directories) in a storage device, a method for recording data, a location of a management area, and a usage method are defined. Usually, a file system is provided as one of the functions of an OS (operating system), and a different file system is used for each OS. For example, FAT (File Allocation Table) is a file system used as a standard in the OS from MS-DOS to Windows (registered trademark) Me, and manages the physical arrangement on the disk of the cluster that constitutes the file. . For example, FAT32 can handle a disk of 2 GB or more. In order to be compatible with the hard disk as described above, the same file system as described above is also applied to the nonvolatile memory 101. In the OS after Windows (registered trademark) XP, a file system called NFTS can be used.

  Even if a power-off operation (normal end operation) on the host side is detected, the power supply from the host side is not immediately cut off, but the host executes an end process. In accordance with this termination process, the controller 106 executes a process of updating the file management information (2) recorded in the flash memory 101 based on the data (1) recorded in the nonvolatile RAM 106. That is, during the host termination process, the data (2) on the flash memory 101 is rewritten with the data (1) read from the nonvolatile RAM 106. For such rewriting, in the flash 101, the data file management information (2) held when the power is turned on is once erased, and the shadow information (held in the nonvolatile RAM 106 before the power is cut off) ( 1) is written to the flash memory 101 as file management information (2). Further, the nonvolatile RAM 106 retains the shadow information (1) retained before the power is turned off even after writing to the flash memory 101.

  By adopting such memory access, the file management information in the file memory is updated on the nonvolatile RAM 106 each time the memory is accessed, and writing to the flash memory 101 only needs to be performed at the end of host-side operation. Therefore, the writing operation to the flash memory 101 can be minimized.

  In the present embodiment, since the file management information is held in the nonvolatile memory RAM 106, the normal read (read) or update (write) from the host to the storage device 100 causes the flash memory to store the file management information. The file management information is not rewritten (erased or written) each time, and the above-described limit on the number of rewrites is not reached. In addition, since the management information is read and rewritten (updated) using the nonvolatile memory RAM 106, the memory access time to the flash memory 101 performed via the internal bus 102 and the flash memory interface (not shown) is compared. Thus, reading time and writing can be shortened, and memory access as a storage device can be speeded up. At the time of data writing, the number of times of writing to the flash memory can be greatly reduced, or the waiting time due to writing is eliminated, thereby improving the performance of the system.

  The file management information may be transferred between the flash memory 101 and the nonvolatile RAM 106 basically when the power is turned on and when the power is turned off as described above. In addition, since the updated file management information is always held in the nonvolatile RAM 106, the file management information reading process from the flash memory 101 and the writing process to the nonvolatile RAM 106 are performed at the time of restart after normal termination on the host side. By omitting, the system startup time can be further shortened.

  Since the file management information that is frequently rewritten is developed in the nonvolatile RAM 106, the number of times of rewriting to the flash memory can be reduced, and the number of times of writing can be reduced, so that the life of the drive device 100 can be extended. Since the host exchanges file management information that frequently accesses from the nonvolatile RAM 106, the system power performance can be improved.

  The file management information includes (1) non-defective product / defective product, (2) logical address, (3) in-chip address, (4) rewrite count, (5) ECC information, (6) ) Location of data, (7) Failure occurrence history, etc.

  As described above, frequently updated file management information is updated on the nonvolatile RAM, so that the number of rewrites on the flash memory is reduced and the life is extended. Further, since the nonvolatile RAM is faster than the flash memory, the processing speed as a drive is increased.

(Distribution of data by write size)
In the storage device according to the embodiment of the present invention, it is possible to provide a mechanism for allocating the write destination to the nonvolatile RAM 106 or the flash memory 101 when a write (write) command is generated in the controller 103 from the host 107. . This function is effective in an environment where a non-volatile RAM 106 having a sufficient capacity cannot be mounted.

As an example of determination of distribution by the controller 103, the following criteria can be set. (1) When the data size sent from the host is large, it is distributed to the flash memory 101, and when it is small, it is distributed to the nonvolatile RAM 106. As a criterion for discrimination, for example, the boundary is 1/2 block (1 block: 128 KB). The criterion for determination can be set as appropriate according to the data size allowed for the mounted nonvolatile RAM 106.
(2) Judging from the time interval and time stamp when the rewriting occurs, the data is reassigned to the nonvolatile RAM 106 when the rewriting frequency is high, and to the flash memory 101 when the rewriting frequency is low.
(3) When the filling rate in block units (128 KB / how much is added in the block?) Is allocated to the non-volatile RAM 106, and when it is low, it is allocated to the flash memory 101.

  FIG. 5 is a flowchart showing an operation when a data distribution function is added to the controller 103. First, when a write command is generated from the host 107 in step S1301, the controller 103 determines the data size in step S1302. At this time, in addition to the data size, according to the determination criteria (1) to (3), the data rewrite frequency, the satisfaction rate in block units, and the like are also determined. If the data size is, for example, ½ block or more, after adding ECC in step S1306, the process proceeds to step S1303, and the data is stored in the flash memory 101. If the data size is smaller than 1/2 block, for example, after adding ECC in step S1307, the process proceeds to step S1304, and the data is stored in the MRAM, that is, the nonvolatile RAM 106.

(Leveling process)
The controller 103 determines the number of rewrites based on file management data representing the data storage state on the flash memory 101 stored in the nonvolatile RAM 106, and performs equalization processing, that is, leveling processing. That is, data is moved between the nonvolatile RAM 106 and the flash memory 101 based on management data such as the number of times data is rewritten in the flash memory 101 and the number of ECC correction bits, and the controller 103 performs leveling processing.

  FIG. 6 is a flowchart showing an example of the operation of the leveling process when a four-fold difference in the number of rewrites occurs. First, when writing occurs from the host to the flash memory 101, an arbitrary block is selected in step S1401. Specifically, a center address block is selected by (timer) × (RANDOM) for the corresponding chip area in the file management information area. Note that (RANDOM) is an arbitrary random number.

  In step S1402, on the basis of the information on the number of rewrites of the file management information in the MRAM 106, 2 blocks are selected for every 256 blocks, and a total of 16 blocks are selected, and it is confirmed whether there is an existing rewrite block. To do.

  If there is no already-rewritten block, the block with the least number of rewrites is selected and data is written to the flash memory 101 in step S1403. If there is an already-rewritten block, the parameter is confirmed in step S1404, and it is confirmed whether or not “do not rewrite the already-written data block” is selected.

  If “Do not rewrite already written data block” is selected, in step S1405, (number of times of rewriting of already written block) × 4 is compared with (unwritten block), and the block with the least number of writes is selected. select. If this block is an already written block, equalization processing is performed, data is moved to the MRAM 106, and data is written after erasing. Next, the already written data is written back to the unwritten area with little rewriting.

  If “Do not rewrite already written data block” is selected, in step S1406, writing is performed on the least written block among unwritten blocks.

  FIG. 7 is an explanatory diagram illustrating an operation example of the leveling process. In FIG. 7, MRAM is a nonvolatile RAM 106, and Flash is a flash memory 101.

For example, the leveling process is performed in the following procedure.
(1) When a write occurs from the host 107, the controller 103 searches for file management information maintained in the MRAM.
(2) For example, the data A in the flash is moved to the data holding area in the MRAM (A → A ′).
(3) The controller 103 searches for 16 rewrite destinations.
(4) The rewrite destination data B is moved to the data holding area of the MRAM (B → B ′).
(5) The data B ′ in the MRAM is moved to the position where the data A in the flash was present.
(6) The data A ′ in the MRAM is moved to the position where the data B in the flash was.
(7) Update the file management information in the MRAM and end.

(Additional data)
When writing data to the flash memory 101, the controller 103 does not rewrite the entire block in one block of the flash memory 101, but appends only the data to be added to the empty page of the flash memory 101 in units of pages. The file management information in the nonvolatile RAM 106 is updated. By refraining from rewriting the entire block of the flash memory 101, it is possible to improve rewrite endurance. In the above-described additional writing, when the block filling rate increases (for example, when 100 KB is written out of 128 KB or 56 pages are written out of 64 pages), only the latest page of the same address is written and arranged.

  FIG. 8 is a flowchart showing an operation example of data addition in the storage device according to the embodiment of the present invention. First, when a write occurs in step S1601, in step S1602, the controller 103 confirms whether additional writing to the flash memory 101 is possible based on the file management information. If additional writing is not possible, in step S1603, the controller 103 executes a normal rewrite sequence without adding to the flash memory 101. If additional writing is possible, the controller 103 writes data to an empty page in the same block of the flash memory 101 in step S1604. In step S1605, the fullness rate in the block is confirmed. If, for example, 100 KB / 128 KB or more, only the latest page is written and arranged in step S1606. In step S1607, the file management information in the nonvolatile RAM 106 is updated. On the other hand, when the sufficiency rate in the block is, for example, 100 KB / 128 KB or less, the process proceeds to step S1608, and the appending operation ends.

(Calculation of number of remaining blocks)
The storage device according to the embodiment of the present invention has a function of outputting the number of remaining blocks. That is, upon receiving a request command from the host 107, the controller 103 calculates the number of remaining blocks based on the file management information in the nonvolatile RAM 106 and returns it to the host 107. By returning the number of remaining blocks, the host 107 can recognize the lifetime of the flash memory 101.

  According to the configuration of the storage device in FIG. 1, since the power holding unit including a large-capacity capacitor is not provided in the drive, the file management information update process for the flash memory 101 when an unexpected power interruption occurs on the system side However, even in this case, the data update process for the flash memory 101 can be performed using the data held in the nonvolatile RAM 106 when the host is restarted. Further, since the file management information is held in both the nonvolatile RAM 106 and the flash memory 101, even if an error occurs in one of the files, the data can be repaired by referring to the other data, thereby improving the system reliability.

  In addition, the updated file management information in the nonvolatile RAM 106 may be transferred to the flash memory 101 by a control signal input from the host 107 through the control line. Alternatively, the control signal may be generated at regular intervals to transfer the file management information from the nonvolatile RAM 106 to the flash memory 101 to update the information. In this case, if the file management information is not updated when the power is shut off, the power can be shut off as it is.

  In the storage device according to the embodiment of the present invention described above, the power supply holding unit described in Patent Document 1 is not necessarily required, but in an environment where mounting of a large-capacity capacitor is allowed, such a power supply holding unit is provided. As a result, the reliability of the semiconductor drive can be further improved.

  FIG. 9 is a block diagram showing a schematic configuration when a power holding unit is added to the storage device according to the embodiment of the present invention.

  In this embodiment, the package further includes a power supply detection unit 104 that detects power supply interruption, and a power supply holding unit 105 that includes a large-capacitance capacitor and a switch for securing an operating voltage when the power supply is cut off. The large-capacitance capacitor in the power holding unit 105 supplies a voltage to the flash memory 101, the controller 103, the nonvolatile RAM 106, and the power detection unit 104 by the accumulated charge even when an unexpected power interruption occurs on the system side. The flash memory 101 operates so as to maintain the operating voltage until it can be normally terminated. For example, an electric double layer capacitor is used as the large-capacity capacitor. Note that a rechargeable battery or the like may be used instead of the large-capacity capacitor in the power supply detection unit 104.

  In the nonvolatile memory 101, if the power supply on the system side is interrupted due to a power failure, operation, or mishandling during writing, the writing operation is interrupted. In general, data stored in a file format storage device is stored with an error detection / correction code added to a portion of a piece of data for the purpose of detecting or correcting error bits. If it is interrupted, the old and new data will be mixed, so the error detection and correction code will not match the old or new code, and reading this will always result in an error, which will destroy the data. Done. Even during the erasing operation, a similar error occurs if erasing is left unfinished.

  Furthermore, when the operating voltage drops due to power shutoff during writing to a certain page and sufficient writing is not performed, it is erroneously determined that writing to the page is impossible, and it is registered as a defective page, and the device is substantially Inconvenience such as failure occurs. The large-capacitance capacitor has a relatively large capacitance value of, for example, about 0.1 F in order to prevent the malfunction as described above and to secure an operation voltage that normally terminates normally in the nonvolatile memory 101. To be done.

  The power supply detection unit 104 receives the power supply voltage VCC from the host 107 side such as a computer or a computer-controlled system, and detects the power activation and shutdown.

  When an unexpected power cut-off or the like occurs on the system side, the operation voltage is maintained in the controller 103 and the flash memory 101 from the large-capacitance capacitor in the power holding unit 105 by the power detection unit 104 as described above, thereby preventing backflow. In addition, the interface circuit in the controller 103 is controlled so as not to respond to the signal from the system side, and in order to maintain the signal state immediately before the power is cut off, if the writing operation is in progress, the writing is continued as it is. Therefore, the write operation can be terminated normally. Similarly, even during erasure, the erase operation can be continued and the erase operation can be normally terminated.

  As described above, when the power supply on the system side is shut down due to a power failure, operation, or handling error, the flash memory 101 is normally terminated normally by the power supply detection unit 104 and the power supply holding unit 105 including a large-capacitance capacitor. Among them, an operation for transferring and recording the updated file management information in the nonvolatile RAM 106 to the flash memory 101 is included. As a result, the updated file management information is redundantly stored in both the nonvolatile RAM 106 and the flash memory 101, so that the reliability of the semiconductor drive can be further improved. Further, the large-capacity capacitor can be omitted. That is, since the operating voltage (VDD) of the flash memory 101 and the nonvolatile RAM 106 is a low voltage in the system, the operation lower limit voltage of the flash memory 101 and the nonvolatile RAM 106 is set after the system power supply (VCC) is shut off. The flash memory 101 can be normally terminated or the file management information can be transferred to the flash memory 101 by using the time until the time.

(Emergency power-off sequence)
In the embodiment in which the power holding unit 105 is added, when the power from the host 107 is cut off, the process proceeds to an emergency power cut-off sequence for data protection.

  The address of the flash memory 101 that is the write destination is determined in advance and stored in the memory. The memory for storing the address is the memory in the controller 103, the nonvolatile RAM 106, or the flash memory 101. The data storage address (emergency storage address) at the time of the emergency power-off is provided separately from general data.

  At this time, the urgent storage addresses are equally allocated to the memory buses of the plurality of flash memories 101 so that the data can be stored in parallel at high speed. As described above, by fixing the emergency storage address and allocating the save destination of the emergency data to a plurality of flash memories, overhead processing becomes unnecessary and processing can be performed at high speed.

  FIG. 10 is a flowchart showing the operation of the emergency power-off sequence. If an unexpected power interruption occurs in step S1001, the process proceeds to an emergency power interruption sequence in step S1002. In step S 1003, the data stored in the nonvolatile RAM 106 is moved to the flash memory 101. At that time, data is distributed and distributed to predetermined emergency storage addresses in the plurality of flash memories 101.

(Power-on / power-off sequence)
FIG. 11 is a flowchart showing the operation of the power-on / power-off sequence. In step S1101, when the power is turned on (power-on), in step S1102, the controller 103 reads the file management information in the flash memory 101 managed in a block different from the data, and writes and stores it in the nonvolatile RAM. In step S1103, the file management information is managed in the non-volatile RAM 106 during memory operation. In step S1104, when the power is turned off (power is cut off), the file management information is written back to the flash memory 101 in step S1105.

  Also, data that is frequently expected to be accessed is read from the flash memory 101 and written to the nonvolatile RAM 106 when the controller 103 is powered on.

(Layout)
FIG. 12 is a plan view showing a layout on the substrate of the storage device according to the embodiment of the present invention, and FIG. 13 is a rear view thereof.

  The storage device according to the present embodiment has a power holding large capacity capacitor 1705 (power holding unit 105), a flash memory 101, a controller 103, and a nonvolatile RAM 106 in a 2.5 inch (70.0 × 100.0 × 9.5 mm) outer shape. . As shown in FIG. 12, eight flash memories 101 and four electric double layer capacitors 1705 constituting the power holding unit 105 are arranged on the surface of the substrate 1700. As shown in FIG. 13, eight flash memories 101, a controller 103, and a nonvolatile RAM 106 are arranged on the back surface of the substrate 1700. In the embodiment of FIG. 1, the power supply holding part including the electric double layer capacitor can be omitted, which is a great merit in designing the circuit board.

  Although the invention made by the inventor has been specifically described based on the above embodiment, the present invention is not limited to the above embodiment, and various modifications can be made without departing from the scope of the invention.

  For example, the non-volatile RAM 106 is not limited to the MRAM, and a RAM that holds data and performs high-speed processing like a DRAM can be used without power supply. An address for loading a certain amount of data from the start address 0h to the nonvolatile RAM at the time of activation may be 100h (128KB) other than the above 20h, as long as it is suitable for the file system. The package can be applied to a smaller and thinner card in addition to the same outer size of the HDD.

  The present invention can be widely used as a storage device employing a file system using a flash memory.

101 Flash memory 103 Controller 106 Non-volatile RAM

Claims (5)

A hard disk drive compatible storage device used by connecting to a host,
The storage device
A controller that performs data write / read control with the host under the control of the host;
A file management information section and a data section, wherein data sent from a host is stored in the data section, and file management information related to the data storage is stored in the file management information section A first memory composed of a configured flash memory;
A second memory composed of a nonvolatile random access memory;
And is configured to be driven by power supplied from the host,
The controller is
(1) a process for managing writing / reading of data exchanged with the host in a data management system compatible with a data management system for a hard disk;
(2) A process of reading file management information from the file management information section in the first memory constituted by a flash memory and writing it to the second memory constituted by a nonvolatile random access memory;
(3) When there is a read operation and a write operation from the host to the storage device, the read is performed in the second memory based on the file management information in the second memory configured by a nonvolatile random access memory. Processing to update the file management information by writing
(4) The file management information updated from the second memory in a state in which the updated file management information is held in the second memory configured by a nonvolatile random access memory in response to a normal termination operation in the host. Processing for reading file management information and writing it to the first memory composed of flash memory;
A storage device configured to execute   The process (2) is executed when at least one of the hosts is started, and when the host is restarted after normal termination, it is stored in the second memory constituted by the nonvolatile random access memory in (4). The storage device according to claim 1, wherein the process (3) is executed based on the held file management information.   The controller further includes (5) a non-volatile random access memory when the data sent from the host has a preset condition in at least one of the data size, the rewrite frequency, and the fullness in block units. To store the data in the second memory, and when the condition is not set in advance, the processing for allocating the data storage destination is executed so that the data is stored in the first memory including the flash memory. The storage device according to claim 1, wherein the storage device is configured as follows.   When an abnormal termination due to unexpected power interruption occurs on the host side, the controller is stored in the second memory composed of a nonvolatile random access memory at the time of restart after the abnormal termination. Collating and comparing the file management information stored in the first memory composed of the flash memory and updating the file management information in the first memory and the second memory, respectively, or 4. The storage device according to claim 1, wherein the storage device is configured to execute a repair process. A hard disk drive compatible storage device used by connecting to a host,
The storage device
A controller that performs data write / read control with the host under the control of the host;
A first memory unit composed of flash memory;
A second memory unit composed of a nonvolatile random access memory;
And is configured to be driven by the power supplied from the host, and the first memory unit configured by the flash memory is configured to start an OS and an application deployed on the host. Necessary data and file management information for managing file data stored in the first memory unit are stored,
The controller is
(1) a process for managing writing / reading of data exchanged with the host in a data management system compatible with a data management system for a hard disk;
(2) a process of reading the file management information stored in the first memory unit configured by a flash memory and writing the file management information in the second memory unit configured by a nonvolatile random access memory;
(3) The file management stored in the second memory unit configured by a nonvolatile random access memory when there is a read operation and a write operation to the storage device from an OS and an application operating on the host A process of reading and writing based on the information and updating the file management information stored in the second memory unit;
(4) Updated from the second memory unit in a state where the updated file management information is held in the second memory unit configured by a nonvolatile random access memory in response to a normal termination operation in the host A process of reading the file management information and writing it to the first memory unit composed of a flash memory;
A storage device configured to execute

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