JP5811438B2 - Motor drive device - Google Patents

Description

  The present invention relates to a motor drive device that drives a plurality of three-phase motors.

  Conventionally, a three-phase brushless motor is known as a three-phase motor. Three-phase brushless motors are widely used because they have no brush wear and have high durability. The most common three-phase brush motor generates rotational torque by passing a three-phase alternating current through a three-phase coil. As a three-phase current, a rectangular wave has been often used because of the ease of making a drive circuit. However, in recent years, the sine wave current drive control using a sine wave can improve silence and drive efficiency. It became so. Furthermore, vector control that precisely controls the amplitude and phase of a three-phase sinusoidal current is becoming common. For this vector control, it is necessary to detect phase currents for at least two phases. However, if two current sensors are used to detect the phase current for two phases, the cost becomes high, so the bus current between the three-phase PWM (Pulse Width Modulation) inverter and the DC power supply is one current sensor. And a method of reproducing the original phase current (for at least two phases) from the detected value of the bus current is proposed (for example, see Patent Document 1). This method is called a single shunt current detection method (or a single shunt current detection method). In this one-shunt current detection method, by sampling the output signal of the current sensor that detects the bus current at an appropriate timing, the phase current of the phase (maximum phase) with the maximum voltage level applied to the three-phase motor is obtained. The phase current of the minimum phase (minimum phase), that is, the current for two phases is detected.

  In the one-shunt current detection method, the sensor cost can be kept low, but the bus current is generated in one phase of a PWM signal pulse (hereinafter referred to as “PWM pulse”) output from a three-phase PWM inverter. Only when the two-phase PWM pulse is ON. Therefore, in order to obtain the current level of the phase current for two phases from the detected value of the bus current, the bus current level in the section where only the one-phase PWM pulse is ON and the two-phase PWM pulse are ON. It is necessary to sample two of the bus current levels in a certain section.

  However, since the three-phase PWM pulse output from the PWM inverter is obtained by PWM-modulating a DC voltage at a high speed so as to become a three-phase sine wave current, naturally, the two PWM pulses are close to each other on the time axis. Or they may overlap. In such a case, the section in which the bus current to be sampled in the one-shunt current detection method appears is very short. Since the detection result of the bus current is generally “rounded” due to the band limitation of the current sensor or the detection amplifier, and the conversion speed of a general ADC (A / D converter) as a sampling means is limited, the above 2 It is difficult to sample the bus current in a sampling period that is shortened on the time axis due to the proximity or overlapping of two PWM pulses. That is, in the one-shunt current detection method, when the voltage levels of the phases are sufficiently separated from each other, the phase currents for two phases can be detected. For example, the maximum phase and the intermediate phase of the three phases can be detected. When the voltage level approaches, the maximum phase current cannot be detected (see paragraphs 0006 and 0069 of Patent Document 1 and FIG. 4). Similarly, when the voltage levels of the minimum phase and the intermediate phase approach each other, the phase current of the minimum phase cannot be detected.

  Therefore, in the motor control device described in Patent Document 1 and the reference disclosed in the background art, the pulse width is corrected in a section where two PWM pulses are close on the time axis, and the time axis is corrected. The two PWM pulses are kept away from each other. For example, in Patent Document 1, in a motor control device that performs vector control of a three-phase motor using a one-shunt current detection method, stepwise every 60 degrees of electrical angle according to the phase of the voltage command vector viewed from the U-phase axis. Define the rotating ab coordinates. In a rotating coordinate system that rotates at the same speed as the magnetic flux generated by the permanent magnet provided on the rotor of the motor, the direction of the maximum magnetic flux generated by the permanent magnet is taken as the d-axis, and the phase is advanced 90 degrees in electrical angle from the d-axis. When the q axis is taken as the coordinates, the coordinates selected as the coordinate axes are defined as dq coordinates. Then, the voltage command vector on the dq coordinate is converted to the ab coordinate, and based on the magnitude of the coordinate axis component (va, vb) of the voltage command vector in the ab coordinate, the voltage command vector is corrected without correcting the voltage command vector. Determine whether current can be detected. When correction is necessary, the magnitude of each coordinate axis component is corrected, and a three-phase voltage command value supplied to the inverter is created from the corrected voltage command vector.

  However, in the conventional method of correcting the pulse width, the algorithm is likely to be complicated, and it is difficult to implement it with a low-cost circuit or a microprocessor. Moreover, it is possible that the sampling timing of the bus current twice may be anywhere in the PWM period (one period of the PWM signal, that is, one period of the carrier signal) before or after the correction. In other words, the sampling timing of the bus current twice is not concentrated in a fixed interval in the PWM period (the first half in the first half and the second half in the second half). For this reason, an idle time cannot be made in the sampling operation of the ADC which is the current sampling means, and the ADC cannot be used for other uses or other motor current detection by time division. Accordingly, when driving control of a plurality of three-phase motors, an ADC is provided for each of the plurality of three-phase motors in order to detect the bus current by the one-shunt current detection method, resulting in an increase in cost.

  The present invention has been made in view of the above problems, and an object of the present invention is to provide one shunt current in each of a plurality of three-phase motors with a cheaper configuration as compared with a configuration including current sampling means for each of a plurality of three-phase motors. It is an object of the present invention to provide a motor drive device that enables stable phase current detection by a detection method.

In order to solve the above-mentioned problems, the invention of claim 1 is a motor drive device that applies a pulse voltage to each coil end of a plurality of three-phase motors and causes a three-phase current to flow to each of the plurality of three-phase motors. A pulse generating means for generating an applied pulse to be applied to the plurality of three-phase motors; and an application pulse to be applied to any one of the plurality of three-phase motors to be applied to another three-phase motor. Applying pulse delay means for sequentially delaying the applied pulse by a predetermined delay time, and extracting a coil current equivalent value corresponding to a coil current flowing through each coil of the plurality of three-phase motors to which the applied pulse is applied Sensor means for detecting current and one sampling method for sampling the detected current value detected by the sensor means at different timings among the plurality of three-phase motors. When, and a current extraction means for extracting the coil current equivalent value of each of the plurality of three-phase motor from the sampled detected current value by said sampling means, before Symbol plurality of 3-phase motors each of said pulse generating means Includes a pulse modulation means for generating a three-phase modulation pulse having a duty ratio corresponding to a voltage level of a pulse voltage to be applied to each coil terminal of the three-phase motor, and the pulse width of the three-phase modulation pulse. Shift amount selecting means for selecting one of two different predetermined shift amounts as the first shift amount according to the pulse width of the long modulation pulse, and the second pulse among the three-phase modulation pulses A first shift means for delaying timing by shifting a modulation pulse having a long width by the first shift amount; and a third pulse among the three-phase modulation pulses. Shifts a long modulation pulse by a predetermined second shift amount to delay the timing, and a drive voltage source for applying a drive voltage to the plurality of three-phase motors as the first shift means and the second shift. And inverter means for switching each of the coil ends of the plurality of three-phase motors by pulse driving, each of which is switched with a three-phase modulation pulse reflecting the shift result of the means.
According to a second aspect of the present invention, in the motor drive device of the first aspect, the number of the three-phase motors is N, the delay time is D, and the period of the reference carrier signal for generating the applied pulse is T. In this case, the relationship of D ≦ T / N is satisfied.
According to a third aspect of the present invention, in the motor drive device of the first or second aspect , the sensor means of each of the plurality of three-phase motors flows through either the common ground side or the common power supply side of the inverter means. A current sensor for detecting a current, wherein the sampling means samples the detected current detected by the current sensor at two different sampling timings and outputs two detected current values; As a signal for defining each sampling timing, a first sampling timing signal based on a predetermined value set in advance and a second based on any one predetermined value selected from two predetermined values corresponding to the first shift amount Sampling timing generation means for generating a sampling timing signal of It is characterized in.
According to a fourth aspect of the present invention, in the motor drive device according to the third aspect , the current extracting means detects the logical value of each modulation pulse when the two sampling timings are generated and the two sampling timings. And a plurality of phase current extraction means for extracting the two-phase coil currents of the plurality of three-phase motors based on the two detected current values.

  According to the present invention, the application pulse applied to one of the three-phase motors among the plurality of three-phase motors is applied to the other three-phase motor by a predetermined delay time. Delay sequentially. When the timing of the applied pulse applied to each of the plurality of three-phase motors is shifted by a predetermined delay time, the detected currents detected by the sensor means are shifted by substantially the same timing and input to one sampling means. The detected current values input to the sampling means are sequentially sampled at different timings among the plurality of three-phase motors, and the current extraction means extracts the coil current equivalent values of the plurality of three-phase motors from the detected current values. The Thus, the sampling means can be used in a time division manner for each of the plurality of three-phase motors. Therefore, it is possible to sample currents at different sampling timings in the plurality of three-phase motors, and it is possible to sample the coil current equivalent values of the plurality of three-phase motors with one sampling means. Accordingly, it is possible to detect a stable phase current by a single shunt current detection method in each of the plurality of three-phase motors with a cheaper configuration as compared with a configuration including current sampling means for each of the plurality of three-phase motors.

The block diagram which shows an example of a structure of the motor drive device which concerns on embodiment of this invention. The timing chart of each signal in the motor drive device. The block diagram which shows an example of a more detailed structure of a 1st motor system | strain. The block diagram which shows an example of a structure of a magnitude order determination device. Logic truth table. The block diagram which shows an example of the internal structure of a pulse shift amount determination device. The block diagram which shows an example of a structure of the PWM modulator with pulse shift switching. The graph which shows an example of the operation waveform of the PWM modulator with pulse shift switching. 5 is a timing chart showing an example of waveforms of various three-phase signals in the PWM / current extraction devices 501, 505 and 508. The block diagram which shows an example of a structure of a current sampling timing generator. The block diagram which shows an example of a structure of a sampling pulse generator. The block diagram which shows an example of a structure of an electric current extraction means. The block diagram which shows an example of a structure of the logic (logic processing part) which comprises an electric current extraction means. The truth table of the 1st logic which comprises the same logic (logic processing part). The truth value table of the other 1st logic which comprises the same logic (logic processing part). The truth value table of the 2nd logic which comprises the same logic (logic processing part).

Hereinafter, embodiments for carrying out the present invention will be described with reference to the drawings.
FIG. 1 is a block diagram illustrating an example of a configuration of a motor driving device according to an embodiment of the present invention. The motor driving apparatus in the illustrated example drives three three-phase motors of the first motor system ch1 to the third motor system ch3.

  As shown in FIG. 1, the motor drive device according to the present embodiment includes PWM / current extraction devices 501, 505, and 508 as pulse generation means and current extraction means, motor units 502, 506, and 509, and sawtooth wave generation. 503, application pulse delay means 504, 507, logical sum means 510, sampling means 511, and selector 512.

  In the following description, the terms U phase, V phase, and W phase are used as names representing the three phases. In addition, in order to distinguish which phase of which motor system the signal is, “1”, “2” or “3” as a motor system identification code or “U”, “V” or as a phase identification code “W” is added to the signal name. For example, signal names vU1, mU1, pwmU1, etc. are given “1” and “U”, and indicate the U phase signal name of the first motor system ch1.

  Input signals vU1, vV1, and vW1 are input to the PWM / current extraction device 501 of the first motor system ch1. The input signals vU1, vV1, and vW1 are signals indicating values corresponding to three-phase driving voltages applied to the three-phase motor coils (hereinafter referred to as “driving voltage equivalent values”), and are not shown. Given by. The drive voltage equivalent value of this input signal may be an analog voltage value or a digital quantity. This drive voltage equivalent value is equivalent to the drive voltage by being subjected to pulse width modulation by the PWM carrier signal saw1 as an appropriate reference carrier signal that periodically changes from the sawtooth wave generator 503. It is converted into PWM pulses pwmU1, pwmV, and pwmW1 as applied pulses (modulation pulses) having a pulse width proportional to the voltage level of the value. Since this PWM pulse is a pulse for driving a three-phase motor, it may be called a “drive pulse”.

  The motor unit 502 of the first motor system ch1 is mainly composed of inverter means 8, a current sensor 24 as sensor means, and a coil terminal 27 of the motor. The motor unit 502 receives PWM pulses pwmU1, pwmV1, and pwmW1, and switches the drive voltage source (not shown) by the inverter means 8 to apply it to the coil terminals 27U, V, and W of the three-phase motor. As a result, a current flows through the motor coil, and the motor rotates.

  The current sensor 24 detects the bus current is flowing through the motor coil of the three-phase motor, and the detected current value (hereinafter referred to as “detected current value”) is a voltage value (hereinafter referred to as the detected current value). This is referred to as “detected current equivalent value.”) Isns1 is output. In the single shunt current detection method, the bus current is can be detected by a current sensor (for example, a resistance element or a magnetic current sensor element) 24 arranged on the common ground side of the inverter unit 8. Due to the logical relationship of the three-phase PWM pulses that are switched by the inverter means 8, the detected current equivalent value isns1 is any one of the U-phase, V-phase, and W-phase phase currents at different timings. The value of one phase current or the sum of any two phase currents appears.

  The PWM / current extraction device 501 outputs a current sensor selection instruction signal sel_1 and a current sampling signal smp_1 in synchronization with the generation timing of the PWM pulse. It is preferable that the current sampling signal smp_1 is generated at least twice according to a different logical relationship between the three-phase PWM pulses when any one or two of the three-phase PWM pulses are turned on. The current sensor selection instruction signal sel_1 is a signal for instructing selection including the timing of the current sampling signal smp_1.

  The selector 512 determines the currents of the three-phase motors in response to the current sensor selection instruction signals sel_1, 2, 3 from the PWM / current extraction devices 501, 505, 508 of the first to third motor systems ch1-3, respectively. The detected current equivalent value iss1, 2, 3 from the sensor 24 is selected, and the selected detected current equivalent value isns is output.

  The logical sum means 510 calculates the logical sum of the current sampling signals smp_1, 2, and 3 output from the PWM / current extraction devices 501, 505, and 508 of the motor systems ch1,2,3, and the calculation result of the logical sum Is output as a sampling command signal (sampling timing signal) smp that defines the sampling timing for sampling the detected current equivalent values of the motor systems ch1,2,3. The current sampling signals smp_1, 2 and 3 are preferably generated at different timings.

  The sampling means 511 samples the detected current equivalent value (analog value) isns based on the sampling command signal smp and outputs it as a digital value idet. In general, an ADC (A / D converter) is used, and the detected current equivalent value (analog value) isns is converted into a detected current equivalent value (digital value) idet by the sampling command signal smp, and the next sampling command signal smp is converted. Hold up.

  The PWM / current extraction device 501 uses coil current equivalent values (digital values) iu_det1, corresponding to coil current values for two phases, from the detected current equivalent values (digital values) idet sampled and converted by the sampling means 511. Extract iv_det1. The two-phase coil current equivalent values (digital values) are extracted in such a way that the sampling command signal smp is generated twice for each three-phase motor and is different from each other at the timings specified by the two sampling command signals smp. This is realized by sampling the current equivalent value (digital value) idet by the sampling means 511.

The first motor system ch1 has been described above. The PWM / current extraction device 505 and the motor unit 506 of the second motor system ch2 are the same as the PWM / current extraction device 501 and the motor of the first motor system ch1. Since the operation is the same as that of the unit 502, detailed description is omitted. However, the PWM / current extraction device 505 receives the PWM carrier signal saw2 delayed by a predetermined delay time with respect to the PWM carrier signal saw1 of the sawtooth wave generator 503 by the applied pulse delay means 504.
Also, the PWM / current extraction device 508 and the motor unit 509 of the third motor system ch3 omit the internal configuration and some signal names, but the PWM / current extraction device 501 of the first motor system ch1. Since the operation is the same as that of the motor unit 502, detailed description thereof is omitted. However, the PWM / current extraction device 508 further includes a PWM delayed by a predetermined delay time with respect to the PWM carrier signal saw2 input to the PWM / current extraction device 505 of the second motor system ch2 by the applied pulse delay means 507. The carrier signal saw3 is input.
Hereinafter, it is possible to connect a larger number of motor systems ch in the same manner.

  FIG. 2 is a timing chart of each signal in the motor drive device of the configuration example shown in FIG. In this timing chart, signals of the first and second motor systems ch1 and ch2 are mainly shown, and signals of the third motor system ch3 are omitted as appropriate.

  In FIG. 2, the PWM carrier signal saw2 of the second motor system ch2 is generated with a delay of a predetermined delay time delay with respect to the PWM carrier signal saw1 of the first motor system ch1. Further, the PWM carrier signal saw3 of the third motor system ch3 is generated with a delay of a predetermined delay time delay with respect to the PWM carrier signal saw2 of the second motor system ch2.

  The PWM carrier signals saw1 and 2 and the U-phase voltage instructions vU1 and vU2 of the motor systems ch1 and ch2 are compared to generate U-phase PWM pulses pwmU1 and pwmU2. Although the third motor system ch3 is not shown, a U-phase PWM pulse pwmU3 is similarly generated. Although not shown, PWM pulses are similarly generated for the V phase and the W phase.

  The current sensor selection instruction signal sel_1 of the first motor system ch1 becomes active within a period of about 1/3 of the period of the PWM carrier signal (hereinafter referred to as “PWM carrier period”). The length of the period during which the current sensor selection instruction signal sel_1 is active is substantially the same as the predetermined delay time delay. During this period, the current sampling signal (sampling pulse) smp_1 is output twice. At this time, if the logical relationship of the three-phase PWM pulses including the V-phase and W-phase PWM pulses (not shown) is different from each other, the detected current equivalent value i1 is sampled at the first sampling timing, and the second sampling timing is obtained. The detected current equivalent value i2 is sampled. The detected current equivalent values (analog values) i1 and i2 are converted into detected current equivalent values (digital values) idet by the sampling means 511 and output.

  In the timing chart of FIG. 2, the current sampling signal (sampling pulse) smp_1 and the like and the reflection timing to the detected current equivalent value (digital value) idet are the same timing, but the actual sampling means 511 is Since the A / D conversion time is not 0 (zero), the detected current equivalent value (digital value) idet is usually slightly delayed. However, since the effect of the present invention can be sufficiently obtained even with a slight delay, the delay time is set to 0 here.

  Each signal of the second motor system ch2 is delayed by a predetermined delay time delay with respect to the first motor system ch1. Thereby, since the sampling timing of the detected current equivalent value does not overlap with the first motor system ch1, the same sampling means 511 can be used.

  Furthermore, since the predetermined delay time delay is set to about 1/3 of the PWM carrier cycle (PWM carrier signal cycle), the third motor system ch3 can also operate, although not shown. That is, for the third motor system ch3, the same sampling means 511 can be used to perform sampling processing of the detected current equivalent value.

  As described above, the sampling means 511 can perform the sampling processing of the first, second, and third motor systems ch1,2,3, and can cover the three motor systems ch1,2,3 with one sampling means 511. Can do.

  If the predetermined delay time delay is further reduced, more motor systems can be covered by one sampling means 511 (ADC).

Here, when the number of three-phase motors is N, the delay time delay is D, and the period (PWM carrier period) of the reference carrier signal saw for generating the applied pulse is T, the following equation (1) is satisfied. Also good.
D ≦ T / N Formula (1)

  By satisfying the relationship of the above formula (1), the current sampling signals (sampling pulses) smp of each of the N motor systems on the time axis do not overlap each other, and one period of the PWM carrier signal (reference carrier signal) saw Within (PWM carrier cycle), the detected current equivalent value for extracting the coil current equivalent value can be sampled for each of the N three-phase motors.

  FIG. 3 is a block diagram of the motor drive device that explains in more detail an example of the configuration of the PWM / current extraction device 501 and the motor unit 502 with respect to the first motor system ch1. In FIG. 3 and subsequent figures, the suffix “1” of the signal name indicating the first motor system ch1 is omitted as appropriate.

  As shown in FIG. 3, the PWM / current extraction device 501 includes a magnitude order determination unit 1, a maximum value detector 2, a pulse shift amount determiner 3 as a shift amount selection unit, and a current as a sampling timing generation unit. A sampling timing determiner 4; PWM modulators 5, 6, and 7 with pulse shift switching as pulse modulation means; a short pulse correction means 16 as pulse width correction means; a sampling pulse generator 18; 20, current extraction means 21, latch means 22 and 23, logical sum means 28, and decoder 29. The pulse shift amount determiner 3 and the PWM modulators 5, 6 and 7 with pulse shift switching constitute first and second shift means, and the latch means 19 and 20 and current extraction means 21 constitute phase current extraction means. . Further, the sampling pulse generator 18 and the latch means 22 and 23 constitute sampling means.

  The motor unit 502 includes an inverter unit 8 including a gate driving unit 9 and switch element bridges 10 to 15, and a current sensor 24 including an amplifier 25 and a resistor 26.

  In FIG. 3, input signals vU, vV, and vW are signals indicating drive voltage equivalent values corresponding to the three-phase drive voltages of the motor coil, and are given by control means (not shown). The drive voltage equivalent values of the input signals vU, vV, and vW may be analog voltage values or digital quantities. This drive voltage equivalent value is converted into a PWM pulse as a modulation pulse having a pulse width proportional to the voltage level of the drive voltage equivalent value by performing pulse width modulation with an appropriate PWM carrier signal. The equivalent value also corresponds to the pulse width of the PWM pulse.

  The short pulse correction means 16 will be described later. Here, the input signals vU, vV, and vW pass through the short pulse correction means 16 as they are and become signals mU, mV, and mW of three-phase voltage levels, respectively. .

  The sort sequence 1 determines the order of the three-phase voltage level signals (which are also equivalent to the pulse width of the PWM pulse) mU, mV, mW, respectively (the pulse width is long), Any one of the numbers “1”, “2”, and “3” is output as the magnitude order signals sortU, sortV, and sortW. Specifically, for example, the number “1” is output to the phase with the largest (long) pulse width, the number “2” is output to the second (long) pulse width, and the pulse width is third. The number “3” is output to the phase having a large (long), that is, the smallest (short) pulse width.

FIG. 4 is a block diagram illustrating an example of the configuration of the magnitude order determination unit 1. FIG. 5 is a truth table of the logic (logic processing unit) 104.
In FIG. 4, the magnitude order determination unit 1 includes magnitude comparators 101, 102, and 103 that compare two values, and a logic 104. For example, the magnitude comparator 101 outputs “1” when mU> mV, and “0” otherwise. Then, the magnitude relation between the three signals mU, mV, and mW is compared with this, and the logic 104 determines the relationship, so that sortU, sortV, and sortW are obtained.

  Further, as shown in the truth table of FIG. 5, when the output values of the magnitude comparators 101, 102, 103 are all “1” or all “0”, they are probably all equal, but for convenience mU , MV, mW. Otherwise, the three ranks are known from the magnitude relationship, and the rank number is output.

The maximum value detector 2 selects the maximum value from the voltage level signals mU, mV, mW output from the magnitude order determination unit 1 and outputs it as the longest pulse V1. The longest pulse V1 is expressed as the following equation (2).
V1 = max (mU, mV, mW) Expression (2)
The longest pulse V1 corresponds to the longest pulse width of the three-phase PWM pulses.

FIG. 6 is a block diagram showing an example of the internal configuration of the pulse shift amount determiner 3. The pulse shift amount determiner 3 outputs pulse shift amounts d1 and d2 based on the value of the longest pulse V1.
In FIG. 6, the condition determiner 111 determines whether or not the value of the longest pulse V1 is greater than a predetermined value const. When the determination result is yes (when V1> const), the first shift amount is output from the selector 112. A predetermined value d11 is output as d1, and if not, a predetermined value d12 is output as the first shift amount d1. Further, a predetermined value is output as the second shift amount d2.
The current sampling timing determiner 4 to which the longest pulse V1 is input in FIG. 3 will be described later.

  A sawtooth wave generator (Saw gen) 17 generates a sawtooth wave saw with a predetermined PWM carrier period. The PWM modulators 5, 6, and 7 with pulse shift switching use the sawtooth wave saw as a carrier, the three-phase voltage level signals mU, mV, and mW as the magnitude order signal sortU / V / W and the pulse shift amount d1, Based on d2, the pulse is shifted and PWM converted, and a PWM pulse pwmU / V / W is output.

  FIG. 7 is a block diagram showing an example of the configuration of the PWM modulator 5 with pulse shift switching. FIG. 7 shows an example of the configuration of the PWM modulator 5 with U-phase pulse shift switching, but the V-phase and W-phase have the same configuration, so the PWM modulators 6 and 7 with pulse shift switching will be described. Is omitted.

In FIG. 7, the PWM modulator 5 with pulse shift switching includes a shift amount selector 131, an adder 132, and a comparator 133. The magnitude order signal sortU input to the shift amount selector 131 is one of 1, 2, and 3 and indicates how large the U phase is (the pulse width is long). Based on the number of the U-phase magnitude signal sortU, the shift amount selector 131 sets the shift amount t1 as
(1) 0 if sortU = 1 (the longest phase)
(2) If sortU = 2 (second longest phase), a predetermined first shift amount dl
(3) If sortU = 3 (shortest phase), a predetermined second shift amount d2
Select. Note that the voltage level value obtained by shifting the zero voltage level signal having a value of zero by the shift amount t1 is the same as the value of the shift amount t1, and therefore, in the following description, t1 is appropriately referred to as a “first voltage level signal”. That's it.

  The adder 132 adds the shift amount t1 to the U-phase voltage level signal mU to generate a second voltage level signal t2.

The comparator 133 compares the sawtooth wave (hereinafter referred to as “sawtooth carrier”) saw that is a PWM carrier signal with the first voltage level signal t1 and the second voltage level signal t2 after the shift processing,
(1) If “t1 ≦ saw <t2”, pwmU = 1
(2) If “saw <t1 or saw ≧ t2”, pwmU = 0
PWM modulation is performed.
When PWM modulation is performed in this manner, the PWM pulse corresponding to mU is shifted backward on the time axis by the time corresponding to the voltage level shift amount t1 with reference to the time when the sawtooth wave carrier saw becomes 0 (shift). PWM pulses are generated.

FIG. 8 is a graph showing an example of operation waveforms of the PWM modulator 5 with pulse shift switching.
In FIG. 8, when the predetermined shift amount d1 or d2 is not given as the voltage level shift amount t1, the PWM pulse pwmU (0) = 1 when the sawtooth wave carrier saw does not exceed the level of the U-phase voltage level signal mU. It becomes. On the other hand, when a predetermined shift amount d1 or d2 is given as the voltage level shift amount t1, the voltage level signal t2 offset upward with respect to the level of the U-phase voltage level signal mU and the zero voltage level The PWM pulse pwmU = 1 from the level t1 offset upward. That is, the PWM pulse pwmU is a PWM pulse shifted backward on the time axis by a time corresponding to the first shift amount d1 or the second shift amount d2.
7 and 8 show the case where the pulse shift is realized by the operation of the voltage level before the comparison with the sawtooth wave carrier saw, the PWM pulse after the comparison with the sawtooth wave carrier saw. It may be configured to shift itself.

  FIG. 9 is a timing chart illustrating an example of waveforms of various three-phase signals in the PWM / current extraction devices 501, 505, and 508. The upper part (rows 1 to 6) in the figure shows the waveforms of the voltage level signals mU / V / W and PWM pulse pwmU / V / W for each of the three phases, and the lower part (rows 7 to 12) in the figure shows the bus current ( The waveforms of the detected current) is, the detected current equivalent value iss, the current sampling signal smp, the sampling values puvw1, puvw2, and the coil current equivalent values (digital values) iu_det, iv_det for two phases after extraction are shown.

  The signal mU / V / W is a voltage level signal in FIG. 3, but is displayed in a manner corresponding to the pulse before the pulse shift in FIG. In FIG. 9, it is assumed that the pulse signal mU is the maximum (longest), and the pulse signals mV and mW are longer in the following order. In FIG. 9, time or voltage level is used as a unit of shift amounts d1 and d2 and signals mU and mV, but both are essential only in the difference between before and after the PWM conversion process. Since there is no difference, both will be used according to the explanation context.

  The minimum PWM pulse width Th is an indication of the minimum PWM pulse width necessary for sampling the detected current, and 2 × Th is used as the length determination (const in FIG. 6) of the longest pulse V1 which is a selection condition for the shift amount d1. Used.

  In FIG. 9, when the values obtained by the following conditional expressions are selected as the three types of predetermined amounts d11, d12, d2, the time Th required for sampling the detection current can be ensured at a minimum.

d11 = Th;
d12 = 2 × Th;
d2 = 3 × Th;
if (V1> 2 × Th) d1 = d11;
else d1 = d12;

  In this way, the second longest pulse (mV) is selected by selecting either the predetermined value d11 or the predetermined value d12 as two different predetermined shift amounts as the first shift amount d1 according to the longest pulse width (mU). The first shift means that shifts backward and the second shift means that shifts the third long pulse (mW) backward using the predetermined value d2 as the second shift amount can be realized.

  When the longest pulse V1 (= mU)> 2 × Th, the signal mV is shifted backward by Th (= d11) on the time axis. At this time, only the signal mU is 1 for the first Th time (the U-phase is ON), and the U-phase current appears in the bus current. Therefore, the first detection current can be sampled at the beginning of the PWM period. It is. In the next Th time (Th <t <2 × Th period), the signals mU and mV are guaranteed to be 1, so that the U + V phase current (−W phase current) appears in the bus current, The second detection current can be sampled.

  On the other hand, when the longest pulse V1 (= mU) <2 × Th, the signal mU becomes 0 during the second Th time (Th <t <2 × Th period), so the second detection is performed with the shift amount of d11. Current sampling time is not secured. Therefore, in this case, the signal mV is shifted backward by 2 × Th (= d12) on the time axis. Then, during the third Th time (2 × Th <3 × Th period), only the signal mV becomes 1, where the V-phase current appears in the bus current, and the second detection current can be sampled. .

  Further, even when the pulse shift amount is d1 = 2 × Th (= d12), the signal mW is shifted further back (d2 = 3 × Th) on the time axis so that only the signal mV becomes 1 at the second sampling. Keep it.

  In this way, since the pulse width itself of the PWM pulse is not changed, it is not necessary to propagate the correction to other phases, and the circuit is simplified. Further, since only three kinds of predetermined values d11, d12, d2 are used for the shift amount of the PWM pulse, the circuit is simple. Further, since the sampling period of the detection current is concentrated within only 3 × Th from the reference time, if Th is shortened with respect to the width of the PWM period, the current of another motor is the same in the remaining part of the PWM period. There is an advantage that it is easy to detect by the sampling means. Therefore, even when handling different applications or a plurality of motors, one sampling means (ADC) is easy to use in a time-sharing manner and is low in cost.

  In FIG. 3, the inverter means 8 switches a DC power supply with a PWM pulse, applies a pulse voltage to the three-phase coil, and flows three-phase currents iu, iv, iw smoothed by the coil inductance. As described above, the inverter unit 8 includes the gate driving unit 9 and the switch element bridges 10 to 15. In recent years, the switch element bridges 10 to 15 are often composed of field effect transistors called FETs (Field Effect Transistors), but may be composed of bipolar transistors.

  The gate driving means 9 is a circuit for converting the three-phase PWM pulse pwmU / V / W obtained in the above configuration into a gate ON / OFF pulse of a switch element. , 11 are constituted by an inverting circuit and a level shift circuit so that either of them is turned on by a PWM pulse. For ease of understanding, when the PWM pulse is 1, the upper FET is ON, the lower FET is OFF, and when the PWM pulse is 0, the upper FET is OFF and the lower FET is ON. It is a matter.

  Further, the three-phase coil 27 of the motor is labeled with U, V, W at the coil ends. The current flowing into these coil ends is taken as a positive sign and is defined as a three-phase current iu, iv, iw.

  Although the current sensor 24 will be described later, here, the current sensor 24 will be described as a short circuit. The lower switch element bridges 11, 13, and 15 of the inverter means 8 are bundled and connected to the ground (GND), and the upper switch element bridges 10, 12, and 14 are bundled and connected to a DC power source. A bus current is flows through a common line (bus) on the ground side or the power supply side. In the single shunt current detection method, the bus current is is detected by the current sensor 24.

In the motor drive device shown in FIG. 3, the current sensor 24 is inserted in the middle of connecting the switch element bridges 11, 13, 15 on the lower side of the inverter means 8 to the ground (GND), and detects the bus current is. . The current sensor 24 may be inserted on the power supply side as described above, but the GND side has a lower voltage level, so that it is often preferable to use an inexpensive circuit element such as an amplifier.
Further, the current sensor 24 can obtain a detected value isns proportional to the bus current is as a detected current equivalent value by inserting a resistor 26 between the GNDs and amplifying the voltage between the resistors with the amplifier 25. In addition, not a resistance method but a magnetic method is also common.

  The sampling means 511 and selector 512 shown in FIG. 3 are the same as those shown in FIG.

  The latch means 22 and 23 sample the detected current equivalent value (digital value) idet output from the sampling means (ADC) 511 with latch pulses smp1 ′ and smp2 ′ corresponding to the current sampling signals (sampling timing pulses) smp1 and smp2. Then, current equivalent values i1 and i2 are obtained. The current sampling signals (sampling timing pulses) smp1 and smp2 are pulses for instructing sampling by the sampling means 511. The latch pulses smp1 'and smp2' are pulses for latching the output of the sampling means 511. The latch pulses smp1 'and smp2' are preferably delayed from the current sampling signals smp1 and smp2 by a time required for A / D conversion. In FIG. 3, the applied pulse delay means for delaying the PWM pulse is not shown.

  The current sampling signals (sampling timing pulses) smp1 and smp2 are logically summed by the logical sum means 28 to become one sampling pulse smp and trigger the sampling means 511. In the configuration shown in FIG. 1, the sampling pulse smp that triggers the sampling means 511 is logically ORed with the sampling pulses smp_2 and 3 of the other motor systems ch2 and ch3 by the OR means 510. FIG. Therefore, the logical sum means 510 and the like are not shown.

  The decoder 29 decodes the level of the carrier signal saw and includes the sampling timing pulses smp1 and smp2 and is determined in consideration of the time required for the operation of the input selector 512 of the sampling means 511 and the A / D conversion time. It operates so that the sensor selection instruction signal sel becomes active.

  FIG. 10 is a block diagram showing an example of the configuration of the current sampling timing generator 4. The current sampling timing generator 4 outputs sampling timing values s1 and s2 according to the length of the longest pulse V1. In FIG. 10, when the longest pulse V1 is larger (long) than a predetermined value (const), the condition determiner 121 outputs s2 = s21 from the selector 122, and otherwise s2 = s22. Further, the predetermined value s1 is output.

  FIG. 11 is a block diagram showing an example of the configuration of the sampling pulse generator 18. The sampling pulse generator 18 outputs sampling pulses smp1 and smp2 from the sampling timing values s1 and s2 and the sawtooth wave carrier saw at the timing of saw = s1, saw = s2. The coincidence detectors 141 and 142 constituting the sampling pulse generator 18 output smp1 when saw = s1, and smp2 when saw = s2.

  In the waveform example of FIG. 9 described above, the bus current is is expressed at several current levels during the PWM period by the logic between the PWM pulses pwmU / V / W. Further, the detected current equivalent value iss from the current sensor 24 becomes less than the bus current is due to the band limitation, and the change is delayed. By limiting the band, there is an effect of suppressing high frequency noise. Therefore, it is preferable to design the band as low as possible within the allowable delay range.

  The current sampling signals (sampling timing pulses) smp1 and smp2 are generated when the sampling timing values s1 and s2 have elapsed from the PWM reference time (the time when the sawtooth wave carrier saw = 0). At this time, the level of the detected current equivalent value iss is sampled to become the first current level i1 and the second current level i2.

  Here, the predetermined value const = 2 × Th of the current sampling timing generator 4 is set. The minimum PWM pulse width Th is an indication of the minimum PWM pulse width necessary for current sampling, and 2 × Th is used as the length determination (predetermined value const in FIG. 6) of the longest pulse V1 which is a selection condition for the shift amount d1. The same value is used here.

Moreover, it is preferable to use the values calculated using the following equations (3) to (5) as the sampling timing values s1, s21, and s22. D11 and d12 are the same as the values described above.
s1 = Th−e Equation (3)
s21 = 2 × Th−e = d11 + Th−e Formula (4)
s22 = 3 × Th−e = d12 + Th−e Formula (5)

  The value of e in the equation is set to 0 or a value close to 0 so that sampling is performed as far back as possible in the above Th time (or 2 × Th, 3 × Th). However, because of the characteristics of the sampling circuit, the current signal may have to be held for some time after the sampling pulse is generated, and therefore, some time may be secured instead of e = 0. Then, since mV pulse is shifted by d1 = Th when V1 (mU)> 2 × Th, only mU is 1 at the sampling timing value s1, and the U-phase current is sampled as the first current level i1. Is done. In the sampling timing value s2 (= s21 = 2 × Th−e), mU and mV are 1, and the U + V phase (−W phase) current is sampled as the second current level i2.

  When V1 (mU) ≦ 2 × Th, the mV pulse is shifted by the first shift amount d1 = 2 × Th. Therefore, only mU is 1 at the sampling timing value s1, and the first current level The U-phase current is sampled as i1. In the sampling timing value s2 (= s22 = 3 × Th−e), only mV is 1, and the V-phase current is sampled as the second current level i2. Since the mV pulse is shifted behind the sampling timing value s2 timing (second shift amount d2 = 3 × Th), the current sampled at the sampling timing value s2 is not affected.

  Thus, by selecting the current sampling timing from a predetermined value according to the shift amount of the PWM pulse, the timing is not dispersed and fixed sampling is performed, so that the circuit mounting is simplified. In addition, since the sampling timing is concentrated in the first half of only 3 × Th in the PWM period, even when handling another application or a plurality of motors, it is easy to use one sampling means (ADC) by time division, and the cost is low.

  In FIG. 3, the latch means 19 and 20 sample the logic level of the PWM pulse pwmU / V / W at the time when the current sampling pulses smp1 and smp2 are generated and hold them as puvw1 and puvw2.

  The current extraction unit 21 obtains coil current equivalent values (digital values) iu_det and iv_det for two phases from the sampled currents i1 and i2 and the PWM logic values puvw1 and puvw2 at that time.

FIG. 12 is a block diagram illustrating an example of the configuration of the current extraction unit 21.
The current extraction unit 21 includes inversion units 201 and 202, logic (logic processing unit) 203, selectors 204, 205, and 206, a selector 207, a selector 208, and adders 209 and 210. The inversion means 201 and 202 invert the signs of the currents i1 and i2 to obtain -i1 and -i2. The selectors 204, 205, 206 select any one of the currents i1, -i1, i2, -i2 and 0 based on the phase current selection instruction signals sel_iu, sel_iv, sel_iw, and tentatively each current iu of each phase. , Iv, iw. The logic 203 outputs each phase current selection instruction signal sel_iu, sel_iv, sel_iw by the combination logic of puvw1 and puvw2.

  FIG. 13 is a block diagram illustrating an example of the configuration of the logic (logic processing unit) 203. The logic (logic processing unit) 203 includes two first logics 221 and 222 and a second logic 223. The first logics 221 and 222 are the same logic, and from the logic value of puvw1 / 2, the currents i1 and i2 at that time are iu, iv, iw, -iu, -iv, and -iw. Determine and output as “i1as” and “i2as”.

  FIG. 14 is a truth table of the first logic 221. FIG. 15 is a truth table of the first logic 222.

  The second logic 223 outputs the phase current selection instruction signals sel_iu, sel_iv, sel_iw of each phase current based on i1as output from the first logic 221 and i2as output from the second logic 222.

  FIG. 16 is a truth table of the second logic 223. In the figure, i1 indicates that current i1 is selected, and i1m indicates that -i1 is selected. Further, i2 indicates that current i2 is selected, and i2m indicates that -i2 is selected. Further, the blank indicates that 0 is selected.

  In FIG. 12, the adders 209 and 210 calculate “− (iv + iw)” and “− (iw + iu)” from the provisional phase currents iu, iv, and iw. The selector 207 selects “− (iv + iw)” when the fixed value 0 is selected as iu, and selects iu as iu_det otherwise. Further, the selector 208 selects “− (iw + iu)” when a fixed value 0 is selected as iv, and selects iv otherwise to be iv_det.

At the phase current extraction timing in the lower stage (rows 7 to 12) in FIG. 9, the PWM logic values at the time of the current sampling signals (sampling pulses) smp1 and smp2 are held in puvw1 and puvw2. Further, in this case, i1 of mU sampling is adopted as the phase current iu_det. Since the phase current iv_det is obtained as iu = i1 and iw = −i2 at the time of the first sampling pulses smp1 and smp2, respectively, it cannot be obtained directly as the provisional iv, and is obtained by the following equation (6).
iv_det =-(iw + iu)
=-(-I2 + i1)
= I2-i1 Formula (6)
In the second sampling pulse smp2, since i2 = iv, it is used as it is.

In this manner, the two-phase coil currents iu and iv can be extracted based on the logical values puvw1 and puvw2 of the respective modulation pulses and the detected currents i1 and i2 when the sampling timing values s1 and s2 are generated. it can.
With respect to the other second and third motor systems ch2 and ch3, the two-phase coil currents iu and iv can be extracted with the same configuration.

As described above, according to this embodiment, a pulse voltage is applied to each coil end 27 (U, V, W) of the plurality of three-phase motors of the first to third motor systems ch1 to ch3 as the plurality of three-phase motors. A motor driving device for causing a three-phase current to flow through each of the plurality of three-phase motors, and for generating a pulse to be applied to the plurality of three-phase motors of the first to third motor systems ch1 to ch3. As one of the PWM / current extraction devices 501, 505, and 508 and the plurality of three-phase motors of the first to third motor systems ch1 to 3, for example, the three-phase motor of the first motor system ch1 Application pulse delay means 504 and 507 for sequentially delaying application pulses applied to the three-phase motors of the other second and third motor systems ch2 and ch3 by a predetermined delay time with respect to the applied pulses A current sensor 24 as a sensor means for detecting a current for extracting a coil current equivalent value corresponding to a coil current flowing through each coil of a plurality of three-phase motors to which a pulse is applied, and a detection detected by the current sensor 24 One sampling means 511 that samples current (bus current) at different timings among a plurality of three-phase motors, and a coil current equivalent value of each of the plurality of three-phase motors from the detected current value sampled by the sampling means 511 PWM / current extraction devices 501, 505, and 508 as current extraction means for extraction.
In the motor drive device of the present embodiment, the applied pulse delay means 504 and 507 apply the other second and third motor systems ch2 and ch3 to the applied pulse applied to the three-phase motor of the first motor system ch1. The applied pulses applied to the three-phase motor are sequentially delayed by a predetermined delay time delay. Detection corresponding to a plurality of detected current values detected by the current sensor 24 by shifting the timing of the applied pulse applied to each of the plurality of three-phase motors of the first to third motor systems ch1 to 3 by a predetermined delay time delay. The current equivalent values (analog values) isns 1 to 3) are input to the sampling means 511 with substantially the same timing. The detected current equivalent values (analog values) of the plurality of three-phase motors input to the sampling means 511 are sequentially sampled at different timings among the plurality of three-phase motors, and the detected current equivalent values (digital values) idet1 to idet1-3. Are input to the PWM / current extraction devices 501, 505 and 508. The PWM / current extraction devices 501, 505, and 508 sequentially extract the coil current equivalent values (digital values) iu_det1 to iv_det1 to iv_det1 to 3 from the detected current equivalent values (digital values) idet1 to 1-3. Thus, the sampling means 511 can be used in a time division manner for each of the plurality of three-phase motors of the first to third motor systems ch1 to ch3. Therefore, it is possible to sample the detection current equivalent values at different sampling timings in the plurality of three-phase motors of the first to third motor systems ch1 to 3, and the detection current of the plurality of three-phase motors by one sampling means 511. Equivalent values can be sampled. As a result, compared to the configuration in which the sampling unit 511 is provided for each of the plurality of three-phase motors of the first to third motor systems ch1 to 3, the one-shunt current detection method for each of the plurality of three-phase motors is stable with a cheaper configuration. Phase current can be detected.
Further, according to this embodiment, the number of three-phase motors of the first to third motor systems ch1 to 3 is N, the delay time delay is D, and the period of the reference carrier signal for generating the applied pulse (PWM) When the carrier cycle is T, the relationship D ≦ T / N is satisfied.
As a result, the pulse applied to each motor system does not overlap on the time axis, and detection for extracting coil current equivalent values for each of the N three-phase motors within the period of the reference carrier signal (PWM carrier period). The current (bus current) can be sampled.
Further, according to the present embodiment, three-phase modulation pulses having a duty ratio corresponding to the voltage level of the pulse voltage to be applied to the coil terminals 27 of the three-phase motors of the first to third motor systems ch1 to ch3 are applied. In accordance with the PWM modulators 5, 6, and 7 with pulse shift switching as the pulse modulation means to be generated and the pulse width V1 of the modulation pulse having the longest pulse width among the three-phase modulation pulses, the first shift amount d1 is Pulse shift amount determiner 3 as a shift amount selecting means for selecting one of predetermined amounts d11 and d12 as two different predetermined shift amounts, and the second longest pulse width among the three-phase modulated pulses A pulse shift amount determiner 3 as first shift means for shifting the modulation pulse by the first shift amount to delay the timing, and PWM modulators 5 and 6 with pulse shift switching. 7 and pulse shift amount determiner 3 as a second shift means for delaying the timing by shifting the pulse having the third longest pulse width among the three-phase modulation pulses by a predetermined second shift amount and pulse shift switching PWM modulators 5, 6, and 7, and a driving voltage source that applies a driving voltage to a plurality of three-phase motors with three-phase modulation pulses that reflect the shift results of the first shift means and the second shift means, respectively. And inverter means 8 for switching and pulse driving each coil end (U, V, W) of the plurality of three-phase motors.
This simplifies the circuit without having to change the pulse width itself. Also, since only three kinds of predetermined values are used for the shift amount, it is not necessary to make it variable, and the circuit is simple. Furthermore, the period during which the detected current (bus current) detected by the current sensor 24 is sampled is concentrated within a period in which only 3 × Th (three times the minimum PWM pulse width necessary for current sampling) has elapsed from the reference time. Therefore, if the minimum PWM pulse width Th required for current sampling is made shorter than the width of the PWM period, the same sampling means (ADC) can be used for another purpose in the remaining PWM period. Alternatively, even when a plurality of three-phase motors are handled, one sampling means (ADC) can be used in a time-sharing manner, resulting in low cost. Therefore, it is possible to easily detect the coil current for two phases with a simple algorithm without complicated correction of the PWM pulse width, and to generate a drive pulse suitable for time division of sampling of the detection current (bus current). be able to.
Further, according to the present embodiment, the current sensor 24 that detects the current flowing through either the common ground side GND or the common power source side of the inverter unit 8 and the detected current (bus current) detected by the current sensor 24 are Sampling pulse generator 18 and sampling means 22 and 23 as sampling means for sampling at two different sampling timings s1 and s2 and outputting two detected current equivalent values i1 and i2, and the two sampling timings are defined. As a signal, a second sampling based on any one predetermined value selected from a first sampling timing signal s1 based on a predetermined value set in advance and two predetermined values s21, s22 corresponding to the first shift amount. As sampling timing generation means for generating the timing signal s2. Current sampling timing determiner 4, comprising a.
As a result, the sampling timing is not dispersed and the sampling is fixed, and the circuit is simplified. In addition, since the sampling timing is concentrated in the first half of only 3 × Th (three times the minimum PWM pulse width required for current sampling) in the PWM period, one sampling means (ADC) is time-divided for different applications. Can be used at low cost. Therefore, an appropriate sampling timing can be generated at low cost, and the detection current (bus current) can be detected stably.
Further, according to the present embodiment, the logical values puvw1 and puvw2 of each modulation pulse when the two sampling timings s1 and s2 are generated, and the two detected current values detected by the two sampling timing signals s1 and s2. Based on i1 and i2, latch means 19 and 20 and current extraction means 21 as a plurality of phase current extraction means for extracting the two-phase coil currents iu and iv are provided. Thereby, an appropriate phase current can be detected with a simple and low-cost circuit.

DESCRIPTION OF SYMBOLS 1 Large / low rank determination device 2 Maximum value detector 3 Pulse shift amount determination device 4 Current sampling timing determination device 5, 6, 7 PWM modulator with pulse shift switching 8 Inverter device 9 Gate drive device 10-15 Switch element bridge 16 Short pulse Correction means 17 Sawtooth wave generator 18 Sampling pulse generator 19, 20 Latch means 21 Current extraction means 22, 23 Sampling means 24 Current sensor 27 Motor coil terminals 501, 505, 508 PWM / current extraction device 502, 506, 509 Motor Units 504 and 507 Applied pulse delay means 510 Logical sum means 511 Sampling means (ADC)
512 selector d1 first shift amount d2 second shift amount d11, d12 predetermined amount Th minimum PWM pulse width required for current sampling

JP 2008-99542 A

Claims (4)

A motor driving device that applies a pulse voltage to each coil end of a plurality of three-phase motors to flow a three-phase current to each of the plurality of three-phase motors,
Pulse generating means for generating applied pulses to be applied to the plurality of three-phase motors;
An applied pulse delay means for sequentially delaying an applied pulse applied to another three-phase motor by a predetermined delay time with respect to an applied pulse applied to any one of the plurality of three-phase motors;
Sensor means for detecting a current for extracting a coil current equivalent value corresponding to a coil current flowing through each coil of the plurality of three-phase motors to which the application pulse is applied;
One sampling means for sampling the detected current detected by the sensor means at different timings among the plurality of three-phase motors;
Current extraction means for extracting the coil current equivalent value of each of the plurality of three-phase motors from the detected current value sampled by the sampling means ;
Before SL plurality of 3-phase motors each of said pulse generating means,
Pulse modulation means for generating a three-phase modulation pulse having a duty ratio corresponding to a voltage level of a pulse voltage to be applied to each coil terminal of the three-phase motor;
Shift amount selecting means for selecting one of two different predetermined shift amounts as the first shift amount according to the pulse width of the modulation pulse having the longest pulse width among the three-phase modulation pulses;
First shift means for delaying the timing by shifting the modulation pulse having the second longest pulse width among the three-phase modulation pulses by the first shift amount;
Second shift means for delaying the timing by shifting a modulation pulse having the third largest pulse width among the three-phase modulation pulses by a predetermined second shift amount;
The plurality of three-phase motors are each switched by switching a driving voltage source for applying a driving voltage to the plurality of three-phase motors with a three-phase modulation pulse reflecting a shift result of the first shift means and the second shift means. And an inverter means for pulse driving each coil end.   The motor driving device according to claim 1,
  When the number of the three-phase motors is N, the delay time is D, and the period of the reference carrier signal for generating the applied pulse is T,
  D ≦ T / N
The motor drive device characterized by satisfying the relationship In the motor drive device according to claim 1 or 2 ,
The sensor means of each of the plurality of three-phase motors includes a current sensor that detects a current flowing through either the common ground side or the common power supply side of the inverter means,
The sampling means includes
Current sampling means for sampling the detected current detected by the current sensor at two different sampling timings and outputting two detected current values;
As a signal defining each of the two sampling timings, a first sampling timing signal based on a predetermined value set in advance and any one predetermined value selected from two predetermined values corresponding to the first shift amount are used. And a sampling timing generation means for generating a second sampling timing signal based thereon. In the motor drive device of Claim 3 ,
The current extraction means includes
Based on the logical value of each modulation pulse when the two sampling timings are generated and the two detected current values detected at the two sampling timings, the two-phase coil currents of the three-phase motors A motor drive device comprising a plurality of phase current extraction means for extracting the phase currents.

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