JP5807541B2 - RF power amplifier module - Google Patents

Description

  The present invention relates to a high-frequency power amplifier module, and more particularly to a technique that is effective when applied to a high-frequency power amplifier module that supports a plurality of frequency bands and detects transmission power in each frequency band.

  For example, Patent Document 1 discloses a high-frequency circuit module that detects transmission power from a power amplifier with a directional coupler (coupler) and reflects the detection result on the gain of the power amplifier to control the level of transmission power. It is shown. In Patent Document 2, a capacitor is provided between the output of the power amplifier circuit for the high frequency band and the input of the detection circuit, and a capacitor and an output are provided between the output of the power amplifier circuit for the low frequency band and the input of the detection circuit. A transmitter with a coil is shown.

JP 2008-078853 A WO08 / 015898 pamphlet

  In recent years, wireless communication terminals (mobile phones) compatible with a plurality of communication methods (multimode) and a plurality of frequency bands (multiband) have been widely distributed. Examples of communication systems include GSM (Global System for Mobile communications), EDGE (Enhanced Data Rates for GSM Evolution), UMTS (Universal Mobile Telecommunications System) or W-CDMA (Wideband Code Division Multiple Access), LTE (Long Term Evolution). ) And the like. For each communication method, a plurality of frequency bands (bands) are defined in the standard.

  In GSM, GSM low band and high band are defined. The GSM low band is, for example, GSM850 having a transmission frequency band of 824 MHz to 849 MHz and a reception frequency band of 869 MHz to 894 MHz, GSM900 having a transmission frequency band of 880 MHz to 915 MHz and a reception frequency band of 925 MHz to 960 MHz. The GSM high band includes, for example, a DCS (Digital Cellular System) 1800 having a transmission frequency band of 1710 MHz to 1785 MHz and a reception frequency band of 1805 MHz to 1880 MHz, a transmission frequency band of 1850 MHz to 1910 MHz, and a reception frequency band of 1930 MHz to 1990 MHz. PCS (Personal Communications Service) 1900 or the like. In W-CDMA and LTE, more than ten bands are defined between the 700 MHz band and the 2.6 GHz band. Such wireless communication terminals are required to be able to communicate stably with respect to miniaturization and changes in the external environment.

  For example, a high-frequency power amplifier module (power amplifier module) used in the transmission system of a wireless communication terminal can amplify even when there is an external environment change (temperature change, battery voltage fluctuation, impedance mismatch between antenna and space, etc.) Therefore, it is necessary to transmit the output power stably with a value within the communication standard. Therefore, in order to suppress variations in the output power, the power amplifier module is usually provided with a high-frequency power amplifier and a detection circuit that detects the magnitude of the output power. FIG. 12 is a block diagram showing a schematic configuration example of a high-frequency power amplifier module studied as a premise of the present invention.

  The high-frequency power amplifier module HPAMD shown in FIG. 12 includes high-frequency power amplifiers HPA1 and HPA2, directional couplers (couplers) CPL1 and CPL2, power detection circuit blocks DETBK1 and DETBK2, a bias control circuit BIASCTL, an automatic power control circuit APC, and the like. Prepare. Here, HPA1 is for the low band and HPA2 is for the high band. CPL1 and CPL2 detect the output power from HPA1 and HPA2 by electromagnetic coupling, and DETBK1 and DETBK2 generate a detection voltage corresponding to the magnitude of the detection power by CPL1 and CPL2. The APC controls the gains of HPA1 and HPA2 via BIASCTL so that the detection voltage by DETBK1 and DETBK2 matches the power instruction signal Vramp input from the outside.

  When such a power control method using the couplers CPL1 and CPL2 is used, a reflected wave due to an impedance mismatch at the antenna is not input into the power detection circuit blocks DETBK1 and DETBK2, and thus it is resistant to impedance mismatch and enables stable power control. The advantage is obtained. However, the couplers CPL1 and CPL2 are usually mounted on the module wiring board constituting the front end block FEBK ′, and when the high-frequency power amplifier module HPAMD corresponds to a plurality of (two types in the example of FIG. 12) bands, Several (two in the example of FIG. 12) couplers are required. For this reason, there is a possibility that disadvantages may arise from the viewpoint of miniaturization and cost reduction of the high frequency power amplifier module.

  On the other hand, a method is conceivable in which the output power of the high-frequency power amplifiers HPA1 and HPA2 is detected via a capacitor without using a coupler, and the detected power is detected by a power detection circuit block. However, in this case, the present inventors have found that there is a possibility that a cross-band leak may occur between the low-band transmission path and the high-band transmission path.

  Each embodiment to be described later has been made in view of the above, and one of the purposes is to realize miniaturization or cost reduction of a high-frequency power amplifier module that performs power detection. . The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

  Of the means for solving the problems disclosed in the present application, the outline of typical ones will be briefly described as follows.

  A high-frequency power amplifier module according to an embodiment of the present application includes first and second power amplifiers that amplify signals of different frequency bands, a power detection circuit, and first and second capacitors. Is coupled to the input of the power detection circuit via a first capacitor, and the output of the second power amplifier is coupled to the input of the power detection circuit via a second capacitor. At this time, the first power amplifier and the first capacitor are formed on the same semiconductor chip, and the second power amplifier and the second capacitor are formed on the same semiconductor chip.

  According to the embodiment, it is possible to reduce the size or cost of the high-frequency power amplifier module that performs power detection.

1 is a block diagram showing a configuration example of a mobile phone system to which the wireless communication system according to Embodiment 1 of the present invention is applied. 1 is a circuit block diagram showing a configuration example of a high frequency power amplifier module according to a first embodiment of the present invention. FIG. 3 is a circuit diagram showing a detailed configuration example of a power detection circuit block in the high-frequency power amplifier module of FIG. 2. FIG. 6 is a circuit block diagram showing a configuration example of a high frequency power amplifier module according to a second embodiment of the present invention. FIG. 5 is a diagram illustrating an example of a result obtained by verifying the magnitude of a crossband leak between each high-frequency power amplifier in FIG. 4 under a plurality of simulation conditions. (A)-(c) is a circuit diagram showing each simulation condition in FIG. FIG. 10 is a circuit block diagram showing a configuration example of a high frequency power amplifier module according to a third embodiment of the present invention. FIG. 10 is a circuit block diagram showing a configuration example of a high frequency power amplifier module according to a fourth embodiment of the present invention. FIG. 10 is a circuit block diagram showing a configuration example of a high frequency power amplifier module according to a fifth embodiment of the present invention. FIG. 10 is a circuit block diagram showing a configuration example of a high frequency power amplifier module according to a sixth embodiment of the present invention. FIG. 10 is a circuit block diagram showing a configuration example of a high frequency power amplifier module according to a seventh embodiment of the present invention. 1 is a block diagram illustrating a schematic configuration example of a high-frequency power amplifier module studied as a premise of the present invention.

  In the following embodiment, when it is necessary for the sake of convenience, the description will be divided into a plurality of sections or embodiments. However, unless otherwise specified, they are not irrelevant, and one is the other. Some or all of the modifications, details, supplementary explanations, and the like are related. Further, in the following embodiments, when referring to the number of elements (including the number, numerical value, quantity, range, etc.), especially when clearly indicated and when clearly limited to a specific number in principle, etc. Except, it is not limited to the specific number, and may be more or less than the specific number.

  Further, in the following embodiments, the constituent elements (including element steps and the like) are not necessarily indispensable unless otherwise specified and apparently essential in principle. Needless to say. Similarly, in the following embodiments, when referring to the shapes, positional relationships, etc. of the components, etc., the shapes are substantially the same unless otherwise specified, or otherwise apparent in principle. And the like are included. The same applies to the above numerical values and ranges.

  The circuit elements constituting each functional block of the embodiment are not particularly limited, but are formed on a semiconductor substrate such as single crystal silicon by a known integrated circuit technology such as a CMOS (complementary MOS transistor). . In the embodiment, a MOSFET (Metal Oxide Semiconductor Field Effect Transistor) (abbreviated as a MOS transistor) is used as an example of a MISFET (Metal Insulator Semiconductor Field Effect Transistor), but a non-oxide film is not excluded as a gate insulating film. Absent. Although the connection of the substrate potential of the MOS transistor is not particularly specified in the drawing, the connection method is not particularly limited as long as the MOS transistor can operate normally.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. Note that components having the same function are denoted by the same reference symbols throughout the drawings for describing the embodiment, and the repetitive description thereof will be omitted.

(Embodiment 1)
<< Overall configuration of mobile phone system (wireless communication system) >>
FIG. 1 is a block diagram showing a configuration example of a mobile phone system to which the wireless communication system according to Embodiment 1 of the present invention is applied. The mobile phone system of FIG. 1 includes a baseband unit BBU, a high frequency system unit RFSYS, an antenna ANT, a speaker SPK, a microphone MIC, and the like. BBU, for example, converts analog signals used in SPK and MIC into digital signals, performs various digital signal processing (modulation, demodulation, digital filter processing, etc.) associated with communication, and outputs various control signals associated with communication Etc. The various control signals include a band selection signal SBD that indicates a frequency band to be used and a power instruction signal Vramp that indicates a target transmission power.

  The high-frequency system unit RFSYS includes a high-frequency signal processing device RFIC, a SAW (Surface Acoustic Wave) filter SAW, and a high-frequency power amplifier module HPAMD. The RFIC is composed of one semiconductor chip including, for example, a transmission mixer circuit, a reception mixer circuit, a low noise amplifier circuit (LNA), and the like, and is mainly used for baseband signals used in the baseband unit BBU and HPAMD. Frequency conversion (up-conversion, down-conversion), etc., between high-frequency signals is performed. The HPAMD is realized by, for example, one module wiring board (typically a ceramic wiring board), and includes a high-frequency power amplifier HPA, an automatic power control circuit APC, a power detection circuit block DETBK, a low-pass filter LPF, an antenna switch ANTSW, and the like Is provided.

  Although not particularly limited, for example, the high frequency power amplifier HPA, the automatic power control circuit APC, and the power detection circuit block DETBK are realized by one semiconductor chip, and the antenna switch ANTSW is realized by another semiconductor chip. The chip is mounted on the module wiring board. The low-pass filter LPF is realized by using, for example, a wiring pattern on a module wiring board or various SMD (Surface Mount Device) parts depending on the case. The ANTSW is realized by, for example, a pHEMT (Pseudomorphic High Electron Mobility Transistor) element on a semiconductor substrate such as gallium arsenide (GaAs), or a MOS transistor on an SOI (Silicon On Insulator) substrate. There is.

  The high frequency power amplifier HPA receives the input power signal Pin from the high frequency signal processing device RFIC and performs power amplification. At this time, the output power signal Pout from the HPA is detected by various circuits to be described later, and then input to the power detection circuit block DETBK as the input detection signal CDETin. DETBK outputs a detection voltage signal Vdet having a voltage corresponding to the power level of the CDETin. Note that one HPA is representatively shown here, but actually, a plurality of systems are provided according to the communication method (GSM, W-CDMA, LTE, etc.), and the number of bands for each communication method (low band). Depending on the high band, etc.).

  For example, when the high-frequency power amplifier HPA is for GSM, the automatic power control circuit APC controls the gain of the HPA so that the detection voltage signal Vdet and the power instruction signal Vramp from the baseband unit BBU coincide. As a result, transmission power is controlled. On the other hand, when HPA is for W-CDMA or LTE, for example, APC is not used, and transmission power is controlled by the high-frequency signal processing device RFIC controlling the power level of the input power signal Pin according to Vdet.

  The low-pass filter LPF removes unnecessary harmonic components from the output power signal Pout of the high-frequency power amplifier HPA and outputs it to the antenna switch ANTSW. The ANTSW appropriately selects the connection path of the antenna ANT based on a switch switching signal (not shown). The connection path includes, for example, a transmission path for GSM, a reception path for GSM, a transmission / reception path for W-CDMA or LTE, and the like. In addition, although illustration is abbreviate | omitted, when HPA is for W-CDMA or LTE, the duplexer for dividing | segmenting a transmission signal and a received signal by a FDD (Frequency Division Duplex) system, for example is provided with ANTSW.

  When the high frequency power amplifier HPA is for GSM, for example, during transmission operation, the output power signal Pout from the HPA is transmitted from the antenna ANT as the transmission signal Tx via the low pass filter LPF and the antenna switch ANTSW. Conversely, during the reception operation, the reception signal Rx received by the ANT is transmitted to the SAW filter SAW via the ANTSW, and after a predetermined reception frequency band is selected by the SAW, it is input to the high frequency signal processing device RFIC. On the other hand, when the HPA is for W-CDMA or LTE, for example, during transmission operation, Pout from the HPA is transmitted from the ANT as Tx via the LPF, duplexer (not shown), and antenna switch ANTSW. On the contrary, at the time of receiving operation, Rx received by ANT is transmitted to SAW via ANTSW and duplexer (not shown), and after a predetermined reception frequency band is selected by SAW, it is input to RFIC.

<< Detailed configuration of high-frequency power amplifier module [1] >>
FIG. 2 is a circuit block diagram showing a configuration example of the high-frequency power amplifier module according to Embodiment 1 of the present invention. The high frequency power amplifier module HPAMD shown in FIG. 2 is configured by, for example, one module wiring board (ceramic wiring board or the like) as described in FIG. On the wiring board, two semiconductor chips (high-frequency power amplification chip HPAIC1 and antenna switch ANTSW semiconductor chip) are mounted, output matching circuits MNT1 and MNT2, low-pass filters LPF1 and LPF2, and receiving coupling Capacitors Crx1 and Crx2 and an antenna filter ANTFLT are mounted. MNT1, MNT2, LPF1, LPF2, Crx1, Crx2, ANTFLT and ANTSW constitute front end block FEBK1.

  The high frequency power amplifier chip HPAIC1 includes two high frequency power amplifiers HPA1 and HPA2, a bias control circuit BIASCTL, an automatic power control circuit APC, a power detection circuit block DETBK, and an antenna switch control circuit ANTSWCTL. Capacity C1, C2. Here, the HPA 1 is configured by a cascaded power amplifier having a three-stage configuration, and receives a low-band (LB) input power signal Pin 1 (LB) from an external terminal and performs power amplification. Similarly, the HPA 2 includes a cascaded power amplifier having a three-stage configuration, and receives a high-band (HB) input power signal Pin 2 (HB) from an external terminal and performs power amplification. One of HPA1 and HPA2 is selectively activated according to the band selection signal SBD.

  The bias control circuit BIASCTL supplies a bias to the high frequency power amplifiers HPA1 and HPA2, and controls the gain of the HPA1 and HPA2 by controlling the magnitude of the bias. For example, when the low band is selected by the band selection signal SBD, the supply of the bias to the HPA 2 is stopped, the gain is controlled for the HPA 1, and conversely, when the high band is selected by the SBD, The supply of bias to the HPA 1 is stopped, and the gain is controlled for the HPA 2.

  Capacitor C1 couples the output of high frequency power amplifier HPA1 to the input of power detection circuit block DETBK in an AC manner, and capacitor C2 couples the output of high frequency power amplifier HPA2 to the input of DETBK in an AC manner. The DETBK receives the input detection signal (CDETin) obtained via the C1 or C2, and outputs a detection voltage signal (Vdet) corresponding to the input level. The automatic power control circuit APC controls the gain of the HPA1 or HPA2 via the BIASCTL so that the voltage level of the detection voltage signal (Vdet) matches the voltage level of the power instruction signal Vramp from the external terminal. The antenna switch control circuit ANTSWCTL controls on / off of each switch (not shown) included in the antenna switch ANTSW in accordance with the band selection signal SBD. Thereby, the connection path of the antenna described in FIG. 1 is appropriately selected.

  The output matching circuit MNT1 and the low pass filter LPF1 perform impedance matching on the output signal of the high frequency power amplifier HPA1 and remove harmonic components, and the output matching circuit MNT2 and the low pass filter LPF2 include the high frequency power amplifier HPA2. Impedance matching is performed on the output signal and harmonic components are removed. The antenna switch ANTSW selects an antenna connection path according to the control of the antenna switch control circuit ANTSWCTL. In the example of FIG. 2, the connection destination of the external terminal for the antenna signal ANTOUT is the output node of HPA1, the external terminal for the reception signal Rx1 (LB) of the low band (LB), the output node of HPA2, and the high band ( HB) is selected from the external terminals for the received signal Rx2 (HB). When the external terminal (Rx1 (LB)) is selected, the signal from ANTOUT is AC-coupled via the receiving coupling capacitor Crx1, and when the external terminal (Rx2 (HB)) is selected. , The signal from ANTOUT is AC coupled via the receiving coupling capacitor Crx2. ANTFLT has a role of preventing electrostatic discharge noise flowing into the module from ANTOUT in addition to removing unnecessary signals and the like that may be generated by ANTSW.

  In FIG. 2, a high-frequency power amplifier module HPAMD for GSM is shown as an example. In this case, the input power signal Pin1 (LB) is GSM850 (transmission frequency band: 824 to 849 MHz, reception frequency band: 869 to 894 MHz) or GSM900 (transmission frequency band: 880 to 915 MHz, reception frequency band: 925 to 960 MHz). It corresponds to transmission signals such as. The input power signal Pin2 (HB) includes DCS (Digital Cellular System) 1800 (transmission frequency band: 1710 to 1785 MHz, reception frequency band: 1805 to 1880 MHz) and PCS (Personal Communications Service) 1900 (transmission frequency band: 1850 to 1910 MHz, It corresponds to a transmission signal such as a reception frequency band: 1930 to 1990 MHz). However, it is of course applicable not only to GSM but also to W-CDMA and LTE. In this case, as described in FIG. 1, the output of the power detection circuit block DETBK is output to the outside instead of the automatic power control circuit APC, and a duplexer or the like is mounted together with the antenna switch ANTSW.

  When such a configuration example is used, detection is performed by the capacitors C1 and C2 formed in the same semiconductor chip (high-frequency power amplifier chip HPAIC1) as the high-frequency power amplifiers HPA1 and HPA2 instead of the couplers CPL1 and CPL2 described in FIG. Therefore, the high-frequency power amplifier module HPAMD can be reduced in size or cost. In addition, since one power detection circuit block DETBK is provided in common for the high band and the low band, the HPAMD can be reduced in size or cost from this point.

  The high frequency power amplifiers HPA1 and HPA2 are realized by LDMOS (Laterally Diffused MOS) on a silicon substrate, and the capacitors C1 and C2 are realized by MIM (Metal Insulator Metal) capacitance on the silicon substrate. However, the present invention is not necessarily limited thereto. For example, the high-frequency power amplifiers HPA1 and HPA2 can be realized by HBT (Heterojunction Bipolar Transistor) or the like. In this case, HPA1 and C1 are formed on the same semiconductor chip, HPA2 and C2 are formed on the same or different semiconductor chip from HPA1, and other circuits (DETBK, APC, BIASCTL, ANTSWCTL) are further different semiconductor chips. Will be formed on top. In any case, the high-frequency power amplifier module HPAMD can be reduced in size or cost by realizing the high-frequency power amplifier (for example, HPA1) and the coupling capacitance (for example, C1) with the same semiconductor chip.

<< Detailed configuration of power detection circuit block >>
FIG. 3 is a circuit diagram showing a detailed configuration example of the power detection circuit block in the high-frequency power amplifier module of FIG. The power detection circuit block DETBK shown in FIG. 3 includes a plurality of amplifier circuits AMP1 to AMP4, an attenuator circuit ATT, a plurality of level detection circuits DET1 to DET5, an addition circuit ADD, a current-voltage conversion circuit IVC, and a differential amplifier. A circuit DAMP is provided. AMP1 to AMP4 are cascaded in four stages from the AMP4 side to the AMP1 side via a coupling capacitance between input and output, and the detection input signal CDETin is input to the first stage AMP4. CDETin is input to ATT.

  The level detection circuits DET1 to DET4 detect the output levels of the amplifier circuits AMP1 to AMP4, respectively, and output a current corresponding to the magnitude, and the level detection circuit DET5 detects the output level of the attenuator circuit ATT and the magnitude thereof. A current corresponding to the output is output. The adder circuit ADD adds the output currents from the DET1 to DET5, and the current-voltage conversion circuit IVC converts the added current by the ADD into a voltage. The differential amplifier circuit DAMP amplifies the voltage (Vdet_T) converted by the IVC with reference to a predetermined reference voltage (Vdet_ref), and outputs a detection voltage signal Vdet as a result.

  Each of the amplifier circuits AMP1 to AMP4 has, for example, a predetermined gain that is the same value (for example, about 10 dB, although not particularly limited), and performs an amplification operation with the gain in a range where the output does not reach a predetermined saturation output voltage. In the range where the saturation output voltage is reached, it functions as a limiter amplifier that outputs the saturation output voltage in a fixed manner. The attenuator circuit ATT is an attenuator having a predetermined gain (for example, about −several dB). Here, for example, a case where the level of the detection input signal CDETin is very small, a saturated output voltage can be obtained only from AMP1, and DET1 outputs a saturated output current as a detection current Idet1 corresponding to the saturated output voltage. The operation will be described with reference to the standard.

  From this state, when the power level of the detection input signal CDETin gradually increases, the output of the amplifier circuit AMP2 largely increases toward the saturation output voltage in a state where the amplifier circuit AMP1 outputs the saturation output voltage. . Accordingly, the output current Idet2 of the level detection circuit DET2 largely increases toward the saturation output current in a state where the output current Idet1 of the level detection circuit DET1 is the saturation output current. When the increase in the power level of CDETin reaches about 10 dB, the output of AMP2 reaches the saturation output voltage, and accordingly, Idet2 of DET2 also reaches the saturation output current. Similarly, every time the power level of CDETin increases by about 10 dB, the outputs of the amplifier circuits AMP3 and AMP4 sequentially reach the saturation output voltage, and the output currents Idet3 and Idet4 of the level detection circuits DET3 and DET4 sequentially To reach. Thereafter, when the power level of CDETin further increases, the output current Idet5 from the level detection circuit DET5 greatly increases.

  Therefore, the output current from the level detection circuits DET1 to DET5 is finally added by the adder circuit ADD, and the current (Idet_T) is converted into a voltage by the current-voltage conversion circuit IVC, whereby the log scale of the detection input signal CDETin is obtained. A voltage (Vdet_T) proportional to, and a detection voltage signal Vdet are obtained. Although not particularly limited, each of the level detection circuits DET1 to DET5 here outputs an output current by amplifying a voltage obtained by superimposing the fixed voltage Vdc on the AC output voltage of the corresponding amplifier circuit with reference to the Vdc. Idet1 to Idet5 are generated. Although not particularly limited, the current-voltage conversion circuit IVC includes two diode-connected MOS transistors, and generates a voltage (Vdet_T) by flowing a current (Idet_T) in one of them, and a reference current ( The reference voltage (Vdet_ref) is generated by passing Iref).

  Here, the detection input signal CDETin of FIG. 3 is only the attenuated carrier traveling wave when the couplers CPL1 and CPL2 as shown in FIG. 12 are used, but the coupling by the capacitors C1 and C2 as shown in FIG. In some cases, a voltage waveform including harmonics and reflected waves is input. In this case, the input voltage level differs between when the coupler is used and when the capacitive coupling is used, and there is a risk that the power detection accuracy may be lower than when the coupler is used. However, for example, if the capacitance values (C1, C2) in FIG. 2 are adjusted or the gain of the differential amplifier circuit DAMP in FIG. 3 is adjusted, this decrease in detection accuracy can be sufficiently suppressed.

  As described above, by using the high-frequency power amplifier module according to the first embodiment, it is typically possible to reduce the size or cost of the high-frequency power amplifier module.

(Embodiment 2)
<< Detailed configuration of high-frequency power amplifier module [2] >>
FIG. 4 is a circuit block diagram showing a configuration example of the high frequency power amplifier module according to the second embodiment of the present invention. The high frequency power amplifier module HPAMD shown in FIG. 4 is different from the configuration example of FIG. 2 described above in that the high frequency power amplifier chip HPAIC1 in FIG. 2 is replaced with the high frequency power amplifier chip HPAIC2 in FIG. 4 differs from HPAIC1 in FIG. 2 in that a capacitor C1 and a coil L1 are connected in series between the output of the high-frequency power amplifier HPA1 and the input of the power detection circuit block DETBK, and the output of the high-frequency power amplifier HPA2 and the output of DETBK The difference is that the capacitor C2 and the coil L2 are connected in series with the input.

  As described above, the output signal of the high-frequency power amplifier HPA2 for high band has a fundamental frequency approximately twice that of the output signal of the high-frequency power amplifier HPA1 for low band. Therefore, in the configuration example of FIG. 2, the second-order harmonic distortion component (2HD) accompanying the output signal of HPA1 flows into the output path on the HPA2 side via the capacitors C1 and C2, and further, the 2HD and the passband are The antenna switch ANTSW is reached via the overlapping low-pass filter LPF2. Here, if the isolation characteristics of the ANTSW are low, the 2HD may be transmitted via the antenna. This phenomenon is called cross-band leak or the like. Therefore, in FIG. 4, only the low-band fundamental frequency component is passed by the LC series resonance circuit composed of the capacitor C1 and the coil L1, and only the high-band fundamental frequency component is passed by the LC series resonance circuit composed of the capacitor C2 and the coil L2. It has a configuration. For example, the coils L1 and L2 are realized by so-called on-chip inductors using a metal wiring layer on a semiconductor substrate.

  Using such a configuration example, only the fundamental frequency component of the output signal of the high frequency power amplifier HPA1 is input to the power detection circuit block DETBK via the capacitor C1 and the coil L1, and the second harmonic distortion component (2HD ) To the input of DETBK is sufficiently suppressed. Therefore, the above-mentioned cross band leak problem is improved. Further, in the configuration example of FIG. 2, there is a possibility that the high accuracy of the output power control may be hindered by the level fluctuation of the second harmonic distortion component (2HD) accompanying the load fluctuation. However, in the configuration example of FIG. 4, since only the fundamental frequency component at the output of the high-frequency power amplifier HPA1 is input to the DETBK, and only the fundamental frequency component at the output of the high-frequency power amplifier HPA2 is input to the DETBK. Compared with the configuration example, it is possible to improve the accuracy of the output power control.

<< Verification results of detailed configuration [2] of high-frequency power amplifier module >>
FIG. 5 is a diagram showing an example of the result of verifying the magnitude of the cross-band leakage between the high-frequency power amplifiers in FIG. 4 under a plurality of simulation conditions, and FIGS. 6A to 6C are diagrams. 5 is a circuit diagram illustrating simulation conditions in FIG. 6 (a) to 6 (c), the output impedances of the high-frequency power amplifiers HPA1 and HPA2 in FIG. 4 are 50Ω, the input impedance of the power detection circuit block DETBK is 500Ω, and the output of HPA1 is “Port1”. The output of HPA2 is “Port2”, and the input of DETBK is “Port3”.

  In FIG. 6A (referred to as “Case 1”), an LC series resonance circuit having a resonance frequency of approximately 900 MHz is provided between “Port 1” and “Port 3”. It has a capacity of 5 pF. In FIG. 6B (referred to as “Case2”), an LC series resonance circuit having a resonance frequency of about 900 MHz is provided between “Port1” and “Port3”, and a resonance of about 1800 MHz is provided between “Port2” and “Port3”. An LC series resonant circuit with frequency is provided. FIG. 6C (referred to as “Case 3”) is obtained by changing the constant of the LC series resonance circuit between “Port 2” and “Port 3” in FIG. 6B without changing the resonance frequency. . FIG. 5 shows the result of verifying the pass characteristic (that is, the magnitude of the crossband leak) from “Port 1” to “Port 2” using FIGS. 6 (a) to 6 (c).

  For example, in Patent Document 2 described above, a circuit configuration similar to that of FIG. 6A is shown in order to improve the voltage level in “Port 3”. However, in such a configuration example, as shown in “Case 1” in FIG. 5, a large crossband leak may occur. Therefore, when a coil (5.21 nH in this case) is further inserted between “Port 2” and “Port 3” (high band side) as shown in FIG. 6B, the so-called Q factor between “Port 2” and “Port 3” ( Since Q∝√ (L / C)) is improved, the band can be narrowed. As a result, as shown in “Case 2” in FIG. 5, for example, in the vicinity of 1800 MHz, the magnitude of the crossband leak can be reduced by about 1.7 dB compared to “Case 1”. Furthermore, as shown in FIG. 6C, when the coil value between “Port 2” and “Port 3” is doubled (here, 10.4 nH) and the capacitance value is halved, the Q factor is further improved. As a result, as shown in “Case 3” in FIG. 5, for example, in the vicinity of 1800 MHz, the magnitude of the cross-band leak can be reduced by about 0.6 dB compared to “Case 2”. .

  As described above, by using the high-frequency power amplifier module according to the second embodiment, it is typically possible to reduce the size or cost of the high-frequency power amplifier module. Further, cross-band leakage can be reduced and output power control can be highly accurate. Note that the connection order of the capacitors and the coils in the LC series resonance circuit of FIG. 4 can be changed as appropriate. In addition, although a high-frequency power amplifier module for GSM is taken as an example here, it is of course applicable to W-CDMA and LTE as well. In W-CDMA and LTE, for example, a band in the vicinity of 700 MHz to 900 MHz and a band in the vicinity of 1700 MHz to 2100 MHz are defined, and the above-described relationship between the low band and the high band is established.

(Embodiment 3)
<< Detailed configuration of high-frequency power amplifier module [3] >>
FIG. 7 is a circuit block diagram showing a configuration example of the high frequency power amplifier module according to the third embodiment of the present invention. The high frequency power amplifier module HPAMD shown in FIG. 7 is different from the configuration example of FIG. 4 described above in that the high frequency power amplifier chip HPAIC2 in FIG. 4 is replaced with the high frequency power amplifier chip HPAIC3 in FIG. 7 and the front end block FEBK1 in FIG. The difference is that each is replaced with the front end block FEBK2 of FIG. 7 includes capacitors C1 and C2 in HPAIC2 in FIG. 4, and FEBK2 in FIG. 7 includes coils L1 and L2 in HPAIC2 in FIG. However, here, in order to reduce the number of external terminals of the high-frequency power amplifier chip, the connection order of the capacitors and the coils in each LC series resonance circuit is reversed from that in FIG. That is, in the case of the connection order of FIG. 7, for example, an external terminal of the high-frequency power amplifier HPA1 is originally necessary, and therefore, an external terminal corresponding to the connection portion between L1 and C1 may be provided. In this case, it is necessary to provide external terminals corresponding to both ends of L1.

  When such a configuration example is used, since the coils L1 and L2 are realized by external parts, there is a demerit in terms of downsizing and cost reduction of the high-frequency power amplifier module, but a high-performance coil can be used. The Q factor described in the second embodiment can be further improved, and the crossband leak can be further reduced.

(Embodiment 4)
<< Detailed configuration of high-frequency power amplifier module [4] >>
FIG. 8 is a circuit block diagram showing a configuration example of the high frequency power amplifier module according to the fourth embodiment of the present invention. The high frequency power amplifier module HPAMD shown in FIG. 8 is different from the configuration example of FIG. 2 described above in that the high frequency power amplifier chip HPAIC1 in FIG. 2 is replaced with the high frequency power amplifier chip HPAIC4 in FIG. 8 and the front end block FEBK1 in FIG. The difference is that each is replaced with the front end block FEBK3 of FIG. The HPAIC4 in FIG. 8 further includes a capacitor Ct in addition to the capacitors C1 and C2 in the HPAIC1 in FIG. FEBK3 in FIG. 8 further includes a coil Lt in addition to FEBK1 in FIG. Ct and Lt are connected in series between the output of the high-frequency power amplifier HPA1 and the ground power supply voltage GND, and constitute a harmonic trap circuit TPBK1.

  The harmonic trap circuit TPBK1 is an LC series resonance circuit, and the resonance frequency thereof is set to the frequency of the second-order harmonic distortion component (2HD) in the output signal of the high-frequency power amplifier HPA1. If such a configuration example is used, most of the second-order harmonic distortion component (2HD) from the HPA 1 flows to the TPBK 1 side having a low impedance, so that the above-described cross-band leak can be reduced. Further, since only one coil Lt may be provided as an external component, the high-frequency power amplifier module may be reduced in size and cost as compared with the configuration example of FIG. Note that the coil Lt may be formed in the high frequency power amplifier chip HPAIC4 depending on circumstances.

(Embodiment 5)
<< Detailed configuration of high-frequency power amplifier module [5] >>
FIG. 9 is a circuit block diagram showing a configuration example of the high frequency power amplifier module according to the fifth embodiment of the present invention. The high frequency power amplifier module HPAMD shown in FIG. 9 is different from the configuration example of FIG. 8 described above in that the high frequency power amplifier chip HPAIC4 of FIG. 8 is replaced with the high frequency power amplifier chip HPAIC5 of FIG. The HPAIC 5 in FIG. 9 has a configuration in which the capacitor C1 in the HPAIC 4 in FIG. 8 is realized by the series connection of the capacitor C1a and the capacitor C1b, and the configuration in which the capacitor Ct in the HPAIC 4 is realized by the series connection of the C1a and the capacitor Ct1. Prepare. One end of the coil Lt in the FEBK3 in FIG. 9 is connected to one end of the capacitor Ct1 in accordance with the change in the capacitance described above. C1a, Ct1, and Lt constitute a harmonic trap circuit TPBK2 as in the case of FIG.

  As shown in FIG. 9, by realizing the capacitors C1 and Ct in FIG. 8 with series-connected capacitors, for example, even when the built-in capacitance of the chip is insufficient, the voltage is divided by the series capacitance. Accordingly, it is possible to ensure a withstand voltage.

(Embodiment 6)
<< Detailed Configuration of High Frequency Power Amplifier Module [6] >>
FIG. 10 is a circuit block diagram showing a configuration example of the high frequency power amplifier module according to the sixth embodiment of the present invention. The high frequency power amplifier module HPAMD shown in FIG. 10 has a configuration in which the above-described configuration example of FIG. 4 is combined with the above-described harmonic trap circuit TPBK1 of FIG. The high frequency power amplifier chip HPAIC6 in FIG. 10 includes the capacitor Ct described in FIG. 8 in addition to the LC series resonance circuit including the capacitor C1 and the coil L1 described in FIG. 4 and the LC series resonance circuit including the capacitor C2 and the coil L2. Prepare. The front end block FEBK3 in FIG. 10 includes the coil Lt described in FIG. Ct and Lt constitute a harmonic trap circuit TPBK1 as in the case of FIG.

  When such a configuration example is used, in addition to the various effects described in the second embodiment, it is possible to further reduce crossband leakage. That is, as described above, in addition to the LC series resonance circuit having the capacitor C1 and the coil L1 and the LC series resonance circuit having the capacitor C2 and the coil L2, the cross-band leakage can be reduced, and the harmonic trap circuit TPBK1 further Cross-band leakage can be reduced.

(Embodiment 7)
<< Detailed configuration of high-frequency power amplifier module [7] >>
FIG. 11 is a circuit block diagram showing a configuration example of the high frequency power amplifier module according to the seventh embodiment of the present invention. The high frequency power amplifier module HPAMD shown in FIG. 11 is different from the configuration example of FIG. 2 described above in that the front end block FEBK1 in FIG. 2 is replaced with the front end block FEBK4 in FIG. FEBK4 in FIG. 11 shows a detailed configuration example of a part of the antenna switch ANTSW in FEBK1 in FIG. ANTSW1 in FIG. 11 includes a transistor switch Qt1 that connects the output of the high-frequency power amplifier HPA1 to the external terminal for the antenna signal ANTOUT, a transistor switch Qt2 that connects the output of the high-frequency power amplifier HPA2 to the external terminal for ANTOUT, It includes a transistor switch Qs2 that connects the terminal on the HPA2 side to the ground power supply voltage GND. Qt1, Qt2, and Qs2 are, for example, pHEMT elements or MOS transistors on an SOI substrate.

  As described above, the problem of cross-band leakage is not a serious problem if the isolation characteristics of the antenna switch ANTSW are sufficiently high. Therefore, the ANTSW1 of FIG. 11 includes a shunt transistor switch Qs2 in addition to the through transistor switches Qt1 and Qt2. Qt1 and Qs2 are commonly controlled to be turned on / off via an antenna switch control circuit ANTSWCTL. When the high-frequency power amplifier HPA1 operates, Qt1 and Qs2 are controlled to be on and Qt2 is controlled to be off. Therefore, even if the second-order harmonic distortion component (2HD) due to HPA1 is circulated to the high-frequency power amplifier HPA2 side and then transmitted through the low-pass filter LPF2, and in addition, the isolation characteristic of Qt2 is not sufficient, The 2HD is suppressed via Qs2.

  As mentioned above, the invention made by the present inventor has been specifically described based on the embodiments. However, the present invention is not limited to the above-described embodiments, and various modifications can be made without departing from the scope of the invention.

  Here, a cellular phone system has been described as an example of a wireless communication system. However, the present invention can be similarly applied to, for example, a wireless local area network (LAN) compatible with 2.4 GHz band and 5.2 GHz band.

ADD adder circuit AMP amplifier circuit ANT antenna ANTFLT antenna filter ANTOUT antenna signal ANTSW antenna switch ANTSWCTL antenna switch control circuit APC automatic power control circuit ATT attenuator circuit BBU baseband unit BIASCTL bias control circuit C capacity CDETin direction detector CPL Coupler)
DAMP differential amplifier circuit DET level detection circuit DETBK power detection circuit block FEBK, FEBK 'front end block HPA high frequency power amplifier HPAIC high frequency power amplifier chip HPAM high frequency power amplifier module IVC current voltage conversion circuit L coil LPF low pass filter MIC microphone MNT matching Circuit Pin Input power signal Pout Output power signal Q Transistor switch RFIC High-frequency signal processing device RFSYS High-frequency system unit Rx Reception signal SAW SAW filter SBD Band selection signal SPK Speaker TPBK Harmonic trap circuit Tx Transmission signal Vdet Detection voltage signal Vramp Power indication signal

Claims (3)

A module wiring board on which one or more semiconductor chips are mounted;
On the one or more semiconductor chips,
A first power amplifier for amplifying a first signal having a first frequency band;
A second power amplifier for amplifying a second signal having a second frequency band higher than the first frequency band;
A power detection circuit for detecting the magnitude of the input level at the first node;
A first capacitor coupled in series between an output node of the first power amplifier and the first node;
A second capacitor coupled in series between the output node of the second power amplifier and the first node is formed ;
The first power amplifier and the first capacitor are formed on the same semiconductor chip,
The second power amplifier and the second capacitor are formed on the same semiconductor chip,
A first coil connected in series with the first capacitor is further provided between the output node of the first power amplifier and the first node.
A second coil connected in series with the second capacitor is further provided between the output node of the second power amplifier and the first node.
The first capacitor and the resonance frequency of the first coil are set to the first frequency band,
The second capacitor and the resonant frequency of the second coil is a radio frequency power amplifier module that will be set in the second frequency band. The high frequency power amplifier module according to claim 1 ,
A high-frequency power amplifier module further comprising an LC series resonance circuit having a resonance frequency in a frequency band twice the first frequency band between an output node of the first power amplifier and a power supply voltage. A module wiring board on which one or more semiconductor chips are mounted;
On the one or more semiconductor chips,
A first power amplifier for amplifying a first signal having a first frequency band;
A second power amplifier for amplifying a second signal having a second frequency band higher than the first frequency band;
A power detection circuit for detecting the magnitude of the input level at the first node;
A first capacitor coupled in series between an output node of the first power amplifier and the first node;
A second capacitor coupled in series between the output node of the second power amplifier and the first node is formed;
A high-frequency power amplifier module further comprising an LC series resonance circuit having a resonance frequency in a frequency band twice the first frequency band between an output node of the first power amplifier and a power supply voltage.

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