JP5783017B2 - Oscillator frequency error correction apparatus, frequency error correction method, frequency error correction program, and frequency error correction system - Google Patents

Description

  The present invention relates to an oscillator frequency error correction apparatus, a frequency error correction method, a frequency error correction program, and a frequency error correction system.

For example, the radio base station apparatus performs radio frequency synchronization using a reference clock generated by itself. The frequency accuracy of the reference clock is required to be high accuracy according to the 3GPP (3rd Generation Partnership Project) standard. For example, the relative value of the absolute frequency error with respect to the possible frequency is required to be within ± 0.25 ppm.
Conventionally, as a method for improving the frequency accuracy of the reference clock, for example, a higher-accuracy oscillator is used, timing information acquired from GPS (Global Positioning System), or a time synchronization protocol called PTP (Precision Time Protocol) is used. There is a method of correcting the frequency error of the oscillator.

However, more accurate oscillators are expensive, and GPS cannot be used where GPS radio waves do not reach. Further, when using PTP, the carrier needs to have a dedicated PTP server. Yes, the cost of capital investment increases.
For this reason, a method of correcting the frequency error of the oscillator using NTP (Network Time Protocol) has been proposed (see Patent Document 1 below).

JP 2011-30080 JP

When correcting the frequency error of the oscillator using NTP, a device that corrects the frequency error receives, for example, an NTP packet from an NTP server connected via a network, and uses time information included in the NTP packet. To correct the frequency error.
However, the NTP packet transmitted through the network may include a delay jitter (error) of about several ms to several hundred ms depending on the load condition of the network.

Therefore, if the time information included in the NTP packet is used as it is and the frequency error of the oscillator is corrected, the frequency error may not be corrected with high accuracy due to the delay jitter.
Accordingly, an object of the present invention is to correct the frequency error of the oscillator with high accuracy.
In addition, the present invention is not limited to the above-described object, and other effects of the present invention can be achieved by the functions and effects derived from the respective configurations shown in the embodiments for carrying out the invention which will be described later. It can be positioned as one of

  (1) As a first proposal, for example, in a frequency error correction device for an oscillator that corrects a frequency error that occurs in an oscillator designed to oscillate at a desired oscillation frequency, a counter unit that counts the number of clocks of the oscillator; The frequency of the oscillator using the average value of the frequency error of the oscillator calculated over a plurality of times based on the time information received via the network, the count result in the counter unit, and the desired oscillation frequency It is possible to use an oscillator frequency error correction device including a processing unit for correcting an error.

  (2) As a second proposal, for example, in a frequency error correction device that corrects a frequency error generated in an oscillator designed to oscillate at a desired oscillation frequency, time information received via a network and the oscillator The frequency error of the oscillator is calculated over a plurality of times based on the count result of the number of clocks and the desired oscillation frequency, and the average value of the frequency error of the oscillator calculated over the plurality of times is used. An oscillator frequency error correction method for correcting the oscillator frequency error can be used.

  (3) Further, as a third proposal, for example, a frequency error correction program for causing a computer to execute a function of correcting a frequency error generated in an oscillator designed to oscillate at a desired oscillation frequency, Calculating the frequency error of the oscillator over a plurality of times based on the time information received via the count result of the clock number of the oscillator and the desired oscillation frequency, and calculated over the plurality of times. A frequency error correction program for causing the computer to execute the step of correcting the frequency error of the oscillator using the average value of the frequency error of the oscillator can be used.

  (4) As a fourth proposal, for example, in a frequency error correction system for an oscillator that corrects a frequency error that occurs in an oscillator designed to oscillate at a desired oscillation frequency, a counter unit that counts the number of clocks of the oscillator And using the average value of the frequency error of the oscillator calculated over a plurality of times based on the time information received via the network, the count result in the counter unit, and the desired oscillation frequency It is possible to use an oscillator frequency error correction system including a processing unit that corrects the frequency error.

  It becomes possible to correct the frequency error in the oscillator with high accuracy.

It is a figure which shows an example of a structure of the frequency error correction apparatus which concerns on one Embodiment of this invention. It is a figure which shows an example of the relationship between the count result of the counter part shown in FIG. 1, and the time information received from the NTP server. It is a figure which shows an example of the error (initial error) contained in the NTP packet received for the first time. It is a figure which shows an example of the method of correct | amending the initial error shown in FIG. It is a figure explaining an example of the relationship between the frequency error of an oscillator, and each average phase fluctuation amount calculated in two periods. It is a figure which shows an example of the frequency error correction method which concerns on one Embodiment. It is a figure which shows an example of the hardware constitutions of the frequency error correction apparatus which concerns on one Embodiment. It is a figure which shows an example of a structure of the radio base station apparatus provided with the frequency error correction apparatus which concerns on one Embodiment.

Embodiments of the present invention will be described below with reference to the drawings. However, the embodiment described below is merely an example, and there is no intention to exclude various modifications and technical applications that are not explicitly described in the embodiment described below. That is, it goes without saying that the following embodiments can be implemented with various modifications without departing from the spirit of the present invention.
[1] One Embodiment (1.1) Configuration Example of Frequency Error Correction Device FIG. 1 is a diagram illustrating an example of a configuration of a frequency error correction device according to an embodiment.

The frequency error correction apparatus 10 illustrated in FIG. 1 exemplarily includes a clock signal generation unit 11, a counter unit 12, an NTP processing unit 13, and a control unit 14.
The clock signal generation unit 11 generates a clock signal as a reference clock. The frequency of the clock signal is corrected by, for example, a control signal supplied from the control unit 14 described later.

For this reason, the clock signal generation unit 11 includes, for example, an oscillator capable of voltage-controlling the oscillation frequency. The oscillator provided by the clock signal generation unit 11 is designed to oscillate at a desired oscillation frequency (for example, f ₀ ), but can actually oscillate at an oscillation frequency (for example, f) different from the desired oscillation frequency. Hereinafter, the desired oscillation frequency may be simply referred to as a design frequency.

The counter unit 12 counts the number of clocks of the clock signal generation unit 11. That is, the counter unit 12 functions as an example of a counter unit that counts the number of clocks of the oscillator. The count result is output to an error detection unit 141 of the control unit 14 to be described later. The NTP processing unit 13 receives the NTP packet transmitted from the NTP server 20 via the network 30, and from the received NTP packet. Extract time information. Therefore, the NTP processing unit 13 includes an NTP packet termination unit 131 and a time information extraction unit 132.

  The NTP packet termination unit 131 receives the NTP packet transmitted from the NTP server 20 via the network 30 and performs a predetermined reception process. Further, the NTP packet termination unit 131 may have a function of transmitting an NTP packet transmission request (NTP Req) to the NTP server 20. Accordingly, the NTP packet termination unit 131 can receive NTP packets from the NTP server 20 regularly or irregularly.

The time information extraction unit 132 extracts time information from the NTP packet received by the NTP packet 131 and outputs the time information to the control unit 14.
Based on the time information output from the time information extraction unit 132, the count result output from the counter unit 12, and the design frequency (f ₀ ) of the oscillator included in the clock signal generation unit 11, the control unit 14 The frequency error of the oscillator included in the signal generation unit 11 is detected, and the frequency error is corrected. For this reason, the control unit 14 includes an error detection unit 141 and a correction control unit 142.

The error detection unit 141 is based on the time information output from the time information extraction unit 132, the count result output from the counter unit 12, and the design frequency of the oscillator included in the clock signal generation unit 11. 11 detects the frequency error of the oscillator of 11. A specific example of the frequency error detection method will be described later.
The correction control unit 142 calculates a correction value for correcting the frequency error based on the frequency error detected by the error detection unit 141, and outputs a control signal based on the correction value to the clock signal generation unit 11. . The oscillator of the clock signal generation unit 11 is voltage-controlled based on, for example, a control signal output from the correction control unit 142.

That is, the NTP processing unit 13 and the control unit 14 are calculated a plurality of times based on time information received via the network, a count result in the counter unit 12, and a desired oscillation frequency (f ₀ ). It functions as an example of a processing unit that corrects the frequency error of the oscillator using the average value of the frequency error of the oscillator.
(1.2) Frequency Error Detection Method Here, the frequency error detection method in the present embodiment will be described with reference to FIG.

FIG. 2 is a diagram illustrating an example of a relationship between the count result of the counter unit 12 illustrated in FIG. 1 and time information received from the NTP server 20.
First, the error detection unit 141 of the control unit 14, based on the time information extracted from the NTP packet received first, set the start time (see in FIG. 2, T _1). Further, the error detection unit 141 clears the count value in the counter unit 12.

Next, the error detection unit 141 acquires time information extracted from the NTP packet from the time information extraction unit 132, and acquires a count value at a time corresponding to the time information from the counter unit 12.
Then, the error detection unit 141 uses each time information, each count value, and the design frequency f ₀ (design period τ ₀ (= 1 / f ₀ )) of the oscillator included in the clock signal generation unit 11 of the oscillator. Find the frequency error.

Specifically, for example, each time information (in FIG. 2, T _x (x = 1, 2,..., N, where n is an integer of 3 or more)) is calculated using the following formula (1). Each period t _x (x = 2, 3,..., N) and the count value in the counter unit 12 in that period (in FIG. 2, C _x (x = 2, 3,..., N )) And the time c _x (x = 2, 3,..., N) calculated using the following equation (2).

That is, the difference between t _x and c _x (also referred to as phase error α _x (x = 2, 3,..., N), phase fluctuation amount) that occurs in each period t _x is expressed by equation (3). Given.

The phase error α _x obtained from the above equation (3) includes a frequency error component that is an error between the design frequency f ₀ of the oscillator and the actual oscillation frequency f, and an error component due to delay jitter included in the NTP packet. included.
Here, the delay jitter included in the NTP packet has a property of converging to 0 by averaging. Therefore, in this embodiment, in order to converge the error component due to delay jitter in the phase error alpha _x obtained by formula (3) to 0, averaging the alpha _x obtained by formula (3). A _{value obtained} by averaging α _x is also referred to as an average phase fluctuation amount β.

The average phase fluctuation amount β in the period from T _{1 to} T _n is expressed by the following formula (4).

Note that the average phase fluctuation amount β is ½ of the phase fluctuation amount generated from the starting time T ₁ to the time T _n when the times T _x are equally spaced.
The frequency error of the oscillator can be calculated with high accuracy by the average phase fluctuation amount β calculated using the above equation (4).
Specifically, a frequency error (unit: ppm) is obtained by multiplying the amount of phase fluctuation per unit time by 1 million times. That is, a value obtained by doubling the average phase variation β is divided by a measurement interval (T _n −T ₁ ), and a value multiplied by 1 million is a frequency error (unit: ppm).

When the frequency error of the oscillator is calculated based on the average movement fluctuation amount β, a correction value corresponding to the calculated frequency error is output to the clock signal generation unit 11 to correct the frequency error of the oscillator with high accuracy. Can do.
That is, according to the above-described configuration, it is possible to correct the transmission error of the oscillator with high accuracy using the time information received from the NTP server.

However, in the method described above, since each phase error is calculated based on the starting point (T ₁ ) set based on the time information of the NTP packet received for the first time, the NTP packet received for the first time as shown in FIG. Includes an error due to delay jitter (initial error), each phase error includes an initial error, and an average phase fluctuation amount β, which is an average value of each phase error, also includes an initial error.

Therefore, the frequency error in the oscillator is obtained with higher accuracy by correcting the initial error included in the average phase fluctuation amount β by using the following method.
FIG. 4 is a diagram for explaining an example of a method for correcting the initial error shown in FIG.
As shown in FIG. 4, average phase fluctuation amounts are calculated in two periods (T _n −T ₁ ) and (T _n ′ −T ₁ ) having the same starting point T ₁ and different lengths. In other words, to calculate the average phase variation amount β during the period _(T n -T _1), calculates the 'average phase variation amount β in _{(-T 1} period T n)'.

Then, by obtaining the difference between the average phase fluctuation amount β ′ and the average phase fluctuation amount β, the initial error included in each average phase fluctuation amount can be removed.
FIG. 5 is a diagram for explaining an example of the relationship between the frequency error of the oscillator and each average phase fluctuation amount calculated in the above two periods. In the example shown in FIG. 5, for simplicity, the two periods, but is set to a period until the period and time 2T _n until time T _n, can also be those time arbitrarily set .

When there is no frequency error of the oscillator, the value of each average phase fluctuation amount calculated in the above two periods coincides with the initial error.
On the other hand, when there is a frequency error in the oscillator, the component of the initial error included in each average phase fluctuation amount is canceled by taking the difference between the average phase fluctuation amounts.
Further, the above average phase fluctuation amount β is ½ of the phase fluctuation amount generated from the starting time T ₁ to the time T _n when the times T _x are equally spaced.

Similarly, the average phase fluctuation amount β ′ calculated in the period from the starting time T ₁ to the time T _n ′ is ½ of the phase fluctuation amount generated in the period from the starting time to the time T _n ′.
Accordingly, as is clear from the relationship shown in FIG. 5, the difference between the average phase variation amount (β'-β) is the phase variation due to the frequency error of the oscillator that occurred between the time T _n to the time 2T _n 1/2 of the amount.

  From this, the frequency error χ of the oscillator is expressed by the following equation (5).

When the frequency error of the oscillator is calculated based on the above χ, a correction value corresponding to the calculated frequency error is output to the clock signal generation unit 11 so that the frequency error of the oscillator can be corrected with higher accuracy. it can.
(1.3) Frequency Error Correction Method FIG. 6 is a diagram illustrating an example of a frequency error correction method. Here, attention is paid to the operations of the NTP server 20, the control unit 14, and the counter unit 12.

The time information of the NTP packet received from the NTP server 20 includes information about the time when the NTP server 20 receives the NTP packet transmission request and information about the time when the NTP server 20 transmits the NTP packet. It is.
Therefore, in the present embodiment, the time when the frequency error correction apparatus 10 receives the NTP packet is obtained by correcting the information included in the time information using a counter.

For this reason, in the example shown in FIG. 6, the counter unit 12 includes a counter 2 for correcting time information in addition to the counter 1 for correcting the frequency error of the oscillator.
The control unit 14 transmits a count start instruction for the counter 2 to the counter unit 12 and transmits an NTP packet transmission request (NTP Req) to the NTP server 20 via the NTP processing unit 13 (step S1). , S2). The counter unit 12 starts counting of the counter 2 when receiving the count start instruction transmitted in step S1.

When receiving the NTP Req, the NTP server 20 transmits an NTP packet to the frequency error correction apparatus 10 (step S3). The NTP packet transmitted from the NTP server 20 includes time information.
In the example shown in this embodiment, the time information includes transmission time information related to the transmission time of the NTP packet in the NTP server 20 and reception time information related to the reception time of the NTP Req in the NTP server 20. That is, the NTP packet transmitted in step S3 includes an NTP packet transmission time A ₁ and an NTP Req reception time B ₁ .

When the control unit 14 receives the NTP packet via the NTP processing unit 13 and extracts time information from the received NTP packet, the control unit 14 transmits a start instruction for the counter 1 and a stop instruction for the counter 2 to the counter unit 12. (Step S4).
Upon receiving the counter 1 start instruction and the counter 2 stop instruction transmitted in step S 4, the counter unit 12 stops the counter 2 count, clears the count number, and starts the counter 1 count. Incidentally, the count value before clearing the counters 2 and D _1.

Then, the control unit 14 reads the value of _{D 1} of the counter 12 (read) (step S5).
Control unit 14, based on the _{D 1,} in step S3 sent from the NTP server 20 corrects the time information received via the NTP processing unit 13. That is, the control unit 14 calculates time T ₁ using the following equation (6).

Time T ₁ obtained from the NTP packets received this first time, the oscillator compensation are stored in a memory (not shown) to complete.
Subsequently, the control unit 14 transmits a count start instruction of the counter 2 to the counter unit 12 and transmits a second NTP packet transmission request (NTP Req) to the NTP server 20 (step S6, S6). S7). When the counter unit 12 receives the count start instruction transmitted in step S6, the counter unit 12 starts counting of the counter 2.

When receiving the NTP Req, the NTP server 20 transmits a second NTP packet to the frequency error correction apparatus 10 (step S8). The NTP packet transmitted in step S8 includes an NTP packet transmission time A ₂ and an NTP Req reception time B ₂ .
When the control unit 14 receives the NTP packet via the NTP processing unit 13 and extracts time information from the received NTP packet, the control unit 14 instructs the counter unit 12 to hold the count value of the counter 1 and to stop the counter 2. Transmit (step S9).

When the counter unit 12 receives the count value holding instruction of the counter 1 and the stop instruction of the counter 2 transmitted in step S9, the counter unit 12 stops the count of the counter 2, and the count value of the counter 1 is stored in a memory (not shown) as necessary. Hold. The count value of counter 2 is D ₂ and the count value of counter 1 is C ₁ .
Then, the control unit 14 reads the value of _{C 1} and _{D 2} of the counter 12 (read) (step S10, S11).

Control unit 14, based on the _{D 2,} is transmitted from the NTP server 20 in step S8, it corrects the time information received via the NTP processing unit 13. That is, the control unit 14 calculates the time _{T 2,} by using the following equation (7).

Further, the control unit 14 calculates the phase error α ₂ using the following equation (8).

Although illustration is omitted, the control unit 14 acquires time information (A _x , B _x ) from the x (3 ≦ x ≦ n−1) -th NTP packet by the same procedure as described above, and the counter unit 12 Count values (C _x−1 , D _x ) are obtained from the above, and T _x and α _x are calculated using the following equations (9) and (10).

In addition, in order to finally perform averaging, the calculated phase error α _x is added to each phase error calculated so far.
In FIG. 6, the control unit 14 transmits a count start instruction for the counter 2 to the counter unit 12 and transmits an n-th NTP packet transmission request (NTP Req) to the NTP server 20 (step S <b> 12). , S13). In FIG. 6, step S11 and step S12 are not intended to be executed continuously, and a process (not shown) is included between steps S11 and S12. The counter unit 12 starts counting of the counter 2 when receiving the count start instruction transmitted in step S12.

When receiving the NTP Req, the NTP server 20 transmits the nth NTP packet to the frequency error correction apparatus 10 (step S14). The NTP packet transmitted in step S14 includes an NTP packet transmission time _An and an NTP Req reception time _Bn .
When the control unit 14 receives the NTP packet via the NTP processing unit 13 and extracts time information from the received NTP packet, the control unit 14 instructs the counter unit 12 to hold the count value of the counter 1 and to stop the counter 2. Transmit (step S15).

When the counter unit 12 receives the count value holding instruction of the counter 1 and the stop instruction of the counter 2 transmitted in step S15, the counter unit 12 stops the count of the counter 2, and the count value of the counter 1 is stored in a memory (not shown) as necessary. Hold. Note that the count value of the counter 2 is D _n , and the count value of the counter 1 is C _n−1 .
Then, the control unit 14 reads the value of _{C n-1} and _{D n} of the counter 12 (read) (step S16, S17).

Control unit 14, based on the _{D n,} are transmitted from the NTP server 20 in step S14, corrects the time information received via the NTP processing unit 13. That is, the control unit 14 calculates the time T _n using the following equation (11).

Further, the control unit 14 calculates the phase error α _n using the following equation (12).

  Furthermore, the control unit 14 calculates the average phase fluctuation amount β using the following equation (13).

The control unit 14 outputs a control signal generated based on the average phase fluctuation amount β thus calculated to the clock signal generation unit 11 to correct the frequency error of the oscillator.
When the initial error included in the average phase fluctuation amount β is removed, the average phase fluctuation amount β ′ is continuously obtained with the same averaging number.
And the frequency error of an oscillator is calculated | required using the following formula | equation (14).

The control unit 14 can also correct the frequency error of the oscillator by outputting a control signal generated based on the calculated frequency error to the clock signal generation unit 11.
According to the method described above, the frequency error of the oscillator can be corrected with high accuracy.
(1.4) Hardware Configuration of Frequency Error Correction Device FIG. 7 is a diagram illustrating an example of a hardware configuration of the frequency error correction device according to an embodiment.

The frequency error correction apparatus 10 shown in FIG. 7 includes a PLL (Phase Locked Loop) 110, a PLD (Programmable Logic Device) 120, and an SOC (System On a Chip) 130, for example.
The PLL 110 generates a clock signal serving as a reference clock within the apparatus, and is realized using an oscillator capable of controlling the oscillation frequency. That is, the PLL 110 functions as the clock signal generation unit 11 in FIG.

The PLL 110 includes, for example, a DAC (Digital Analog Converter) and a VCTCXO (Voltage Controlled Tempered Crystal Oscillator).
In this case, the DAC generates a control voltage for controlling the frequency of the clock signal output from the VCTCXO based on a control signal supplied from the SOC 130 described later, and the VCTCXO has a frequency corresponding to the control voltage supplied from the DAC. Oscillates.

The PLD 120 is designed to count the frequency of the clock signal output from the PLL 110. That is, the PLD 120 functions as the counter unit 12 in FIG. The PLD 120 can also be configured integrally with 130 described later.
The SOC 130 incorporates functions as a processor that performs various controls and operations, and implements various functions by executing an OS and programs stored in a memory (not shown).

When realizing the functions as the NTP processing unit 13 and the control unit 14, the program stored in the internal storage device is executed by the microprocessor of the computer. At this time, the computer may read and execute the program recorded on the recording medium.
In the present embodiment, the computer is a concept including hardware and an operating system, and means hardware that operates under the control of the operating system. Further, when an operating system is unnecessary and hardware is operated by an application program alone, the hardware itself corresponds to a computer. The hardware includes at least a microprocessor such as a CPU (Central Processing Unit) and means for reading a computer program recorded on a recording medium. In this embodiment, the SOC 130 functions as a computer. It has.

[2] Application Example of Frequency Error Correction Device The frequency error correction device 10 described above can be applied to any transmission device and reception device.
Therefore, as an application example of the frequency error correction apparatus 10 described above, a radio base station apparatus to which the frequency error correction apparatus 10 is applied will be described with reference to FIG.

FIG. 8 is a diagram illustrating a radio base station apparatus 40 to which the frequency error correction apparatus 10 is applied.
The radio base station apparatus 40 illustrated in FIG. 8 illustratively includes a frequency error correction apparatus 10, a wired interface (IF) 41, a radio transmission processing unit 42, a radio reception processing unit 43, and a transmission antenna 44. The receiving antenna 45, the CPU 46, the logic circuit 47, and the memory 48 are provided.

The wired interface 41 controls communication between the radio base station device 40 and an external network or a host device.
The radio transmission processing unit 42 performs predetermined signal processing such as encoding processing, modulation processing, and frequency conversion on the signal transmitted to the mobile station, and outputs the result to the antenna 44.
The radio reception processing unit 43 performs predetermined signal processing such as frequency conversion, demodulation processing, and decoding processing on the radio signal transmitted from the mobile station received by the antenna 45.

The CPU 46 controls the wired IF 41, the wireless transmission processing unit 42, and the wireless reception processing unit 43 by cooperating with the logic circuit 47 and the memory 48 interconnected by a bus.
The frequency error correction apparatus 10 is connected to, for example, a wireless transmission processing unit 42 and a wireless reception processing unit 43 in addition to an NTP server (not shown), and generates a clock signal necessary for each processing with high frequency accuracy.

According to the configuration described above, by applying the frequency error correction apparatus 10 to the radio base station apparatus 40, the radio base station apparatus 40 can perform radio frequency synchronization using a clock signal with high frequency accuracy. The reliability of the radio base station apparatus 40 is improved.
Note that the present invention is not limited to the above-described radio base station apparatus, and can be applied to any transmission apparatus and reception apparatus.

[3] Others Note that the components and functions of the frequency error correction apparatus 10 described above may be selected as necessary, or may be used in appropriate combination. In other words, the above-described configurations and functions may be selected or used in appropriate combination so that the functions of the present invention can be exhibited.
In the above-described embodiment, the example of correcting the frequency error of the oscillator using NTP has been described. However, the present invention is not limited to this, and time information is acquired via a network. If so, even if another protocol different from NTP is used, it can be similarly implemented.

  Further, in the above-described embodiment, the example in which the clock signal generation unit 11, the counter unit 12, the NTP processing unit 13, and the control unit 14 are all configured in one device has been described. Even if any of the counter unit 12, the NTP processing unit 13, and the control unit 14 is configured in different devices, the same effects as those of the above-described embodiment can be obtained as long as communication is possible between the devices. Can be obtained.

Regarding the above embodiment, the following additional notes are disclosed.
[4] Appendix (Appendix 1)
In an oscillator frequency error correction device for correcting a frequency error generated in an oscillator designed to oscillate at a desired oscillation frequency,
A counter for counting the number of clocks of the oscillator;
The frequency of the oscillator using the average value of the frequency error of the oscillator calculated over a plurality of times based on the time information received via the network, the count result in the counter unit, and the desired oscillation frequency A processing unit for correcting errors;
A frequency error correction apparatus for an oscillator.

(Appendix 2)
The processor is
Extracting the time information included in an NTP packet transmitted from an NTP (Network Time Protocol) server;
The frequency error correction device for an oscillator according to appendix 1, wherein:

(Appendix 3)
The processor is
Based on the difference between the information on the plurality of periods calculated from the time information and the information on the plurality of times obtained by dividing the count results of the counter unit in the plurality of periods by the desired oscillation frequency, respectively. Calculate the frequency error of each of the oscillators,
Correcting the frequency error of the oscillator using an arithmetic mean of each frequency error;
The frequency error correction apparatus for an oscillator according to appendix 1 or 2, characterized by the above.

(Appendix 4)
The processor is
Average frequency error of the oscillator calculated over a plurality of times based on the time information, the count result of the counter unit, and the desired oscillation frequency in two periods having the same starting point and different lengths Calculate each value,
Correct the frequency error of the oscillator using each calculated average value,
The frequency error correction device for an oscillator according to any one of appendices 1 to 3, wherein:

(Appendix 5)
In a frequency error correction apparatus for correcting a frequency error generated in an oscillator designed to oscillate at a desired oscillation frequency,
Calculate the frequency error of the oscillator over multiple times based on the time information received via the network, the count result of the clock number of the oscillator and the desired oscillation frequency,
Correcting the frequency error of the oscillator using an average value of the frequency error of the oscillator calculated over the plurality of times;
A frequency error correction method for an oscillator.

(Appendix 6)
A frequency error correction program for causing a computer to execute a function of correcting a frequency error generated in an oscillator designed to oscillate at a desired oscillation frequency,
Calculating a frequency error of the oscillator a plurality of times based on time information received via a network, a count result of the number of clocks of the oscillator, and the desired oscillation frequency;
Correcting the frequency error of the oscillator using the average value of the frequency error of the oscillator calculated over the plurality of times, and causing the computer to execute the step.
A frequency error correction program characterized by that.

(Appendix 7)
In an oscillator frequency error correction system for correcting a frequency error occurring in an oscillator designed to oscillate at a desired oscillation frequency,
A counter for counting the number of clocks of the oscillator;
The frequency of the oscillator using the average value of the frequency error of the oscillator calculated over a plurality of times based on the time information received via the network, the count result in the counter unit, and the desired oscillation frequency A processing unit for correcting errors;
A frequency error correction system for an oscillator.

(Appendix 8)
Having the frequency error correction device for an oscillator according to any one of appendices 1 to 4,
A radio base station apparatus characterized by the above.

DESCRIPTION OF SYMBOLS 10 Frequency error correction apparatus 11 Clock signal generation part 12 Counter part 13 NTP process part 131 NTP packet termination | terminus part 132 Time information extraction part 14 Control part 141 Error detection part 142 Correction control part 20 NTP server 30 Network 110 PLL
120 PLD
130 SOC
40 Wireless base station equipment 41 Wired IF
42 wireless transmission processing unit 43 wireless reception processing unit 44, 45 antenna 46 CPU
47 logic circuit 48 memory

Claims (6)

In an oscillator frequency error correction device for correcting a frequency error generated in an oscillator designed to oscillate at a desired oscillation frequency,
A counter for counting the number of clocks of the oscillator;
In two periods having the same starting point and different lengths, the calculation is performed a plurality of times based on time information received via a network, a count result in the counter unit, and the desired oscillation frequency. An average value of the frequency error of the oscillator is calculated respectively, and a processing unit that corrects the frequency error of the oscillator using each calculated average value is provided.
A frequency error correction apparatus for an oscillator. The processor is
Extracting the time information included in an NTP packet transmitted from an NTP (Network Time Protocol) server;
The frequency error correction device for an oscillator according to claim 1, wherein The processor is
Based on the difference between the information on the plurality of periods calculated from the time information and the information on the plurality of times obtained by dividing the count results of the counter unit in the plurality of periods by the desired oscillation frequency, respectively. Calculate the frequency error of each of the oscillators,
Correcting the frequency error of the oscillator using an arithmetic mean of each frequency error;
The frequency error correction device for an oscillator according to claim 1, wherein the frequency error correction device is an oscillator . In a frequency error correction apparatus for correcting a frequency error generated in an oscillator designed to oscillate at a desired oscillation frequency,
Based on the time information received via the network, the count result of the clock number of the oscillator, and the desired oscillation frequency in two periods having the same starting point and different lengths, the oscillator average value of the frequency error were calculated, correcting the frequency error of the oscillator using the average value calculated,
A frequency error correction method for an oscillator. A frequency error correction program for causing a computer to execute a function of correcting a frequency error generated in an oscillator designed to oscillate at a desired oscillation frequency,
Based on the time information received via the network, the count result of the clock number of the oscillator, and the desired oscillation frequency in two periods having the same starting point and different lengths, the oscillator Calculating the average value of the frequency error, and correcting the frequency error of the oscillator using each of the calculated average values .
A frequency error correction program characterized by that. In an oscillator frequency error correction system for correcting a frequency error occurring in an oscillator designed to oscillate at a desired oscillation frequency,
A counter for counting the number of clocks of the oscillator;
In two periods of different lengths have the same origin, before Symbol oscillator plural times based on the count result and the desired oscillation frequency of the time information received through the network and by the counter unit Each of the average value of the frequency error is calculated, and a processing unit that corrects the frequency error of the oscillator using each calculated average value is provided.
A frequency error correction system for an oscillator.

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