JP5757276B2 - Non-stop arithmetic processing device, non-stop arithmetic processing system, non-stop arithmetic processing method, and non-stop arithmetic processing program - Google Patents

Description

  The present invention relates to a non-stop arithmetic processing device, a non-stop arithmetic processing system, a non-stop arithmetic processing method, and a non-stop arithmetic processing program for repairing arithmetic processing results and causing arithmetic processing to be continuously executed when a failure occurs.

  In an advanced information society, the impact of a system down on society becomes so great that demand for non-stop operation of the system is increasing. In order to operate the system without stopping, it is necessary to restore the arithmetic processing result when a failure occurs and to continue the processing promptly.

As a technique related to continuous execution of processing when such a failure occurs, Patent Document 1
In a multi-node parallel processing system, a copy of data processed at one node is distributed and stored at another node. If a failure occurs at one of the above nodes, another copy of the data is distributed and stored. A system that allows nodes to perform backup processing is publicly available.

  Further, in Patent Document 2, in a system that performs parallel processing with a plurality of computers, based on distributed data placement hint information acquired from a user, data and a copy thereof are distributed to each computer. There is a publicly available system in which backup processing by another computer when it occurs is leveled between computers.

JP 2010-182141 A JP 2012-73975 A

  The systems disclosed in Patent Document 1 and Patent Document 2 do not mention continuous execution of processing when multiple failures occur. Particularly in a highly parallel system, since the number of computers, processors, etc. constituting the system increases, the probability that multiple failures will occur increases. Therefore, it is a problem to continue the processing even when multiple failures occur.

  An object of the present invention is to provide a non-stop arithmetic processing device, a non-stop arithmetic processing system, a non-stop arithmetic processing method, and a non-stop arithmetic processing program that have solved the above-described problems.

The non-stop arithmetic processing device according to an embodiment of the present invention belongs to any group, stores the input data and performs arithmetic processing on the input data, and the arithmetic execution unit inputs divided replicated data copied by dividing the input data, belonging to the same said group with the computation execution means, and distributes to the arithmetic execution unit other than the operation executing means, corresponding to the identification information of the execution unit Storage means to be added and stored, diagnostic means for diagnosing the arithmetic execution means to detect a fault, and multiple faults in which the fault detected by the diagnostic means has occurred in a plurality of the arithmetic execution means belonging to the same group If not, with respect to the operation execution unit that stores the divided replicated data associated with the identification information of the execution unit, using the divided replica data And instruction means for instructing the execution of the serial processing, the divided replicated data collectively as a backup execution result the execution result of the arithmetic processing using the execution result of the failure has output said detected operation execution means, And output means for outputting in place of the backup execution result.

Non-stop processing method of an embodiment of the present invention, belong to one of the groups, non-stop operation in a system comprising a plurality of operation execution means for performing arithmetic processing on the input data to store the input data A processing method , wherein the storage means divides and duplicates the input data input by the calculation execution means, and the divided copy data belongs to the same group as the calculation execution means, and the other than the calculation execution means was partitioned execution unit, failure is stored in association with identification information of the execution unit, the diagnosis unit detects the fault to diagnose the operation execution means, indicating means, said diagnosis means detects the divided replica data but associated with the identification information of the plurality of cases the non-multiple failures occurring in the operation execution means, said execution means belonging to the same said group To the operation executing means for storing the divided replicated data instructing to execute the arithmetic processing using the output means, summary of the results of running the calculation process using the divided replicated data as backup execution result Then, the execution result output by the calculation execution means in which the failure is detected is replaced with the backup execution result and output.

A non-stop operation processing program according to an embodiment of the present invention controls an entire system that includes a plurality of operation execution means that belong to any group, store input data, and perform operation processing on the input data. a program means for runs, with the program, the division replicated data copied by dividing the input data which the operation execution unit is input, belonging to the same said group with the execution unit, the execution A storage process that is distributed to the calculation execution means other than the means and stored in association with the identification information of the calculation execution means; a diagnosis process that diagnoses the calculation execution means and detects a failure; and the diagnosis process detects when disorder is not a multiple failures occurring in a plurality of said operation execution means belonging to the same said group, the identification information of the execution unit To the operation executing means for storing the divided replicated data correlated, the instruction processing for instructing the execution of the calculation process using the divided replica data, the execution of the calculation process using the divided replica data The result is collected as a backup execution result, and the computer is caused to execute an output process for outputting the execution result output from the calculation execution means in which the failure is detected by replacing the execution result with the backup execution result.

  The present invention makes it possible to restore the arithmetic processing result and continue the arithmetic processing even when multiple failures occur in the system.

It is a block diagram which shows the structure of the non-stop arithmetic processing system of 1st Embodiment of this invention. It is a flowchart which shows the storing operation | movement of the registration collation data in 1st Embodiment of this invention. It is a flowchart which shows the collation execution operation in 1st Embodiment of this invention. It is a storage example of the registration collation data to each core in 1st Embodiment of this invention. It is a block diagram which shows the structure of the non-stop arithmetic processing system of 2nd Embodiment of this invention.

  A first embodiment of the present invention will be described in detail with reference to the drawings.

  FIG. 1 is a block diagram showing the configuration of the non-stop arithmetic processing system of this embodiment.

  The non-stop arithmetic processing system 3 of this embodiment includes a non-stop arithmetic processing device 1 and a host device 2. The non-stop operation processing device 1 executes a collation operation for collating certain search data with a large number of registered collation data for biometric information data such as fingerprints, palm prints, irises and faces.

  The host device 2 first outputs a plurality of registration verification data to the non-stop arithmetic processing device 1, and then sequentially outputs search data one by one. Then, the host device 2 instructs the non-stop arithmetic processing device 1 to collate each search data with the registered collation data.

  The non-stop arithmetic processing device 1 includes an overall control unit 10 and n verification processors 20-1 to 20-n. The verification processors 20-1 to 20-n are assigned 1 to n as verification processor numbers, respectively.

  The verification processor 20-1 is a multi-core processor and includes eight cores 201-1 to 208-1. The cores 201-1 to 208-1 are minimum constituent units that independently perform a collation operation between registered collation data and search data, and store an arithmetic circuit that performs collation computation, registration collation data, and search data, respectively. Contains memory to do. The cores 201-1 to 208-1 are assigned core numbers 1 to 8, respectively.

  The configuration of the matching processors 20-2 to 20-n is the same as that of the matching processor 20-1. Since the non-stop arithmetic processing device 1 includes n verification processors having 8 cores, the non-stop arithmetic processing device 1 includes a total of 8n cores. Therefore, the non-stop arithmetic processing device 1 processes a maximum of 8n collation operations in parallel. The cores 201-1 to 208-n transmit the collation result to the output unit 14.

  The overall control unit 10 controls parallel execution of collation operations in the non-stop arithmetic processing device 1 and includes a storage unit 11, a diagnosis unit 12, an instruction unit 13, and an output unit 14.

  The storage unit 11 equally distributes the plurality of registration verification data received from the higher-level device 2 to the 8n cores 201-1 to 208-n. For example, when there are 8n pieces of registered collation data, the distribution unit 11 distributes one piece of registration collation data to each of the cores 201-1 to 208-n.

  The storage unit 11 further generates divided copy data obtained by copying each registered collation data and dividing it into m pieces (m = n−1), and each of the divided copy data and the core to which the registered collation data is input. Transmit to m cores having the same core number and different matching processors.

FIG. 4 shows an example of storing registration verification data in each core in this embodiment. The core 201-1 in the verification processor 20-1 stores registration verification data # 111 to # 11m. The registration verification data # 111 to # 11m is a single registration verification data as a whole. The storage unit 11 copies the registered collation data # 111 to # 11m and divides the data into m pieces, and uses the registered collation data copy # 111-C, which is copy data of the registration collation data # 111, as the identification information of the core 201-1. Is added to the core 201-2 which is the core of the core number 1 in the verification processor 20-2 and stored. Similarly, the storage unit 11 adds the information of “core 1-1” to the registered collation data copy # 11m-C, which is copy data of the registration collation data # 11m, and stores the core number 1 in the collation processor 20-n. The data is transmitted to and stored in the core 201-n that is the core.

  The storage unit 11 similarly performs copy data transmission and storage processing for all the registered collation data distributed and stored in each core. In the present embodiment, for convenience, m = n−1. However, the value of m is not limited to n−1. For example, when the value of m is any integer smaller than n-1, the storage unit 11 uses the copy data of the registered collation data stored by a certain core as a collation to which the core and the core number are equal and belong. The processor transmits the data to a part of the different cores for storage.

  The storage unit 11 transmits and stores one piece of search data received from the host device 2 to all of the cores 201-1 to 208-n.

  The diagnostic unit 12 transmits the same diagnostic program to the cores 201-1 to 208-n each time detecting the end of the collation operation with the registered collation data related to one search data in the cores 201-1 to 208-n. Then, the cores 201-1 to 208-n are executed. When the diagnosis unit 12 receives the execution results of the diagnosis program from the cores 201-1 to 208-n, the diagnosis unit 12 compares the execution results output by the respective cores.

  When the execution results of the diagnostic programs are the same for all of the cores 201-1 to 208-n, the diagnosis unit 12 diagnoses that there is no failure in the cores 201-1 to 208-n. In the case where only a small number of cores in the cores 201-1 to 208-n have different execution results from other cores, the diagnosis unit 12 diagnoses that a failure has occurred in the partial few cores. That is, the diagnosis unit 12 diagnoses the failure of the cores 201-1 to 208-n by majority logic. The diagnosis unit 12 transmits the diagnosis result including the identification information of the core in which the failure has occurred to the instruction unit 13 and the output unit 14.

  Upon receiving the diagnosis result from the diagnosis unit 12, the instruction unit 13 uses the identification information of the faulty core for the core having the same core number as the faulty core and having a matching processor different from the faulty core. An instruction is given to re-execute the collation operation using the copy data of the corresponding registered collation data. For example, when a failure occurs in the core 201-1, the instruction unit 13 causes the core 201-2 to the core 201-2 to 201-n that is the core having the core number 1 in the matching processors 20-2 to 20-n. -1 is used to instruct re-execution of the collation operation with the search data, using copy data of the registered collation data associated with “core 1-1” that is identification information of −1. At this time, the core 201-2 re-executes the collation operation using the registered collation data copy # 111-C, and the core 201-n re-executes the collation operation using the registration collation data copy # 11m-C. .

The output unit 14 receives the diagnosis result from the diagnosis unit 12, and backs up the result of the normal cores in the cores 201-1 to 208-n re-executed the collation operation of the failed core according to the instruction from the instruction unit 13. To summarize as a result. The output unit 14 replaces the collation result received from the faulty cores of the cores 201-1 to 208-n with the backup collation result. The output unit 14 collects the collation results of all the cores and transmits the collation results with the registered collation data of the search data to the host device 2. Next, referring to the flowcharts of FIG. 2 and FIG. The operation of the embodiment will be described in detail.

  FIG. 2 is a flowchart showing a registration collation data storing operation in the non-stop arithmetic processing device 1.

  The storage unit 11 receives the registration verification data from the host device 2, divides the registration verification data equally into nx 8 pieces, and distributes it to the cores 1 to 8 in the verification processors 1 to n (S101). The cores 1 to 8 in the verification processors 1 to n store the distributed registration verification data in the memory in its own core (S102). Loop processing is executed with i = 1 to n (S103). Loop processing is executed with j = 1 to 8 (S104).

  The storage unit 11 divides the copy of the registered collation data distributed to the core j in the collation processor i into n−1 copies, and the divided copies of the registered collation data are collation processors 1 to n excluding the data collation processor i. Are distributed to the core j (S105). The core j in the verification processor i stores a copy of the distributed registration verification data in a memory in its own core (S106). If j <8, 1 is added to j and the process returns to S104. If j = 8, the process proceeds to S108 (S107). If i <n, 1 is added to i and the process returns to S103. If i = n, the entire process ends (S108).

  FIG. 3 is a flowchart showing the collation execution operation of the search data with the registered collation data in the non-stop arithmetic processing device 1.

  The storage unit 11 receives search data from the host device 2 and transmits it to all of the cores 1 to 8 in the verification processors 1 to n (S201). The cores 1 to 8 in the matching processors 1 to n store the received search data in the memory in the own core, collate with the registered matching data already stored in the own core, and output the matching result to the output unit 14. (S202).

  The diagnosis unit 12 inputs the same diagnosis program to the cores 1 to 8 in the matching processors 1 to n, diagnoses all the cores by majority logic from the outputs of all the cores, and indicates the diagnosis result to the instruction unit 13 To the output unit 14 (S203).

  If there is a faulty core as a result of diagnosis (Yes in S204), the process proceeds to S205. If no faulty core exists as a result of the diagnosis (No in S204), the process proceeds to S211. If there are a plurality of failed cores as a result of the diagnosis (Yes in S205), the process proceeds to S206. If only one failed core is determined as a result of the diagnosis (No in S205), the process proceeds to S207. If a plurality of cores having the same core number are faulty as a result of the diagnosis (Yes in S206), the instruction unit 13 determines the occurrence of multiple failures that cannot be repaired based on the diagnosis result received from the diagnostic unit 12. This is reported to the device 2 and the collation operation of the non-stop arithmetic processing device 1 is stopped (S210), and the entire processing is completed. When the core numbers of the plurality of cores in which the failure has occurred are different in the diagnosis result (No in S206), the process proceeds to S207.

  Based on the diagnosis result received from the diagnosis unit 12, the instruction unit 13 uses the copy data of the registration verification data associated with the identification information of the failed core for the normal core having the same core number as the failed core. Then, an instruction is given to perform re-collation processing (S207). The normal core having the same core number as the failed core executes the re-collation process instructed by the instruction unit 13 and transmits the re-collation result to the output unit 14 (S208).

  Based on the diagnosis result received from the diagnosis unit 12, the output unit 14 replaces the collation result from the failed core with a backup collation result obtained by collecting the re-collation results received from the normal core having the same core number as the fault core ( S209). The output unit 14 collects the collation results from all the cores, transmits the collation results to the higher-level device 2 (S211), and the process returns to S201.

  In the present embodiment, as a first effect, there is an effect that the collation calculation processing result can be repaired and the collation calculation processing can be continuously executed even when multiple failures occur in the system. The reason is that the storage unit 11 stores a copy of registration verification data stored in a certain core in a core having the same core number as the core in a verification processor different from the verification processor in which the core is mounted. When a failure occurs in the core, the instruction unit 13 restores the verification operation processing result by causing the core storing the copy of the registered verification data to re-execute the verification operation performed by the failed core. Because it does.

  In this embodiment, in a plurality of multi-core processors, a group is formed by cores having the same core number, and the arithmetic processing result is repaired in the same group. Therefore, multiple failures occur in cores belonging to different groups. However, the system can be operated without stopping. In the example of the present embodiment, each of the matching processors 20-1 to 20-n includes eight cores, and thus has fault tolerance against a maximum of eight faults.

  In the present embodiment, the system can be operated without stopping even when a serious failure occurs such that any one of the verification processors 20-1 to 20-n goes down. This is because the individual cores mounted on each verification processor all belong to different groups, so that the above-described arithmetic processing result can be restored.

  Further, in order to cope with multiple failures, a method in which a copy of registration verification data stored in a certain core is stored in all cores other than the core requires a large capacity memory. The present embodiment also has an effect of reducing the memory capacity necessary for dealing with multiple failures by grouping cores and storing a copy of registration verification data only in cores in the same group.

  Furthermore, the second embodiment has an effect that a failure can be detected promptly and collation calculation processing can be continuously executed even if the failure is difficult to detect immediately. The reason is that the diagnosis unit 12 diagnoses the cores 201-1 to 208-n by majority logic every time the collation process for one search data in the cores 201-1 to 208-n is completed.

  For example, there are systems that have improved fault tolerance against failures that can be detected immediately, such as data parity errors. However, if a failure such as data corruption that does not cause a parity error occurs, and it takes time to detect the failure, the failure must be handled after the failure is detected. In the present embodiment, the diagnosis unit 12 inputs the same diagnosis program to the cores 201-1 to 208-n and diagnoses by majority logic, so that a failure can be quickly detected even if the failure is usually difficult to detect immediately. It becomes possible to detect.

  In this embodiment, the majority logic is used as the diagnosis method of the cores 201-1 to 208-n, but there are cases where the diagnosis is performed by a method other than the majority logic. For example, there is a method of preparing an expected value for the execution result of the diagnostic program and comparing the execution result of the diagnostic program with the expected value for each core.

In the present embodiment, the diagnostic unit 12 executes the diagnostic process every time the collation process for one search data in the cores 201-1 to 208-n is completed. In some cases, opening up a little more gives priority to the speed of the verification process.
<Second Embodiment>
Next, a second embodiment of the present invention will be described in detail with reference to the drawings.

  FIG. 5 is a block diagram showing a configuration of a non-stop arithmetic processing system according to the second embodiment of the present invention. The non-stop arithmetic processing system 3 of this embodiment includes a non-stop arithmetic processing device 1.

  The non-stop arithmetic processing device 1 includes arithmetic execution units 301-1 to 304-k, a storage unit 11, a diagnosis unit 12, an instruction unit 13, and an output unit 14.

  The operation execution units 301-1 to 304-k are divided into four groups 30-1 to 30-4. The operation execution units 301-1 to 301-k belong to the group 30-1, and the operation execution unit 304 −1 to 301-k belong to the group 30-4. That is, each of the groups 30-1 to 30-4 includes k operation execution units.

  The arithmetic execution units 301-1 to 304-k perform parallel processing on arithmetic operations instructed by the host device. The content of the calculation may be a collation operation as in the first embodiment or a general array operation. The computation execution units 301-1 to 304-k are structural units that perform computation, and each may be a core as in the first embodiment, or may be a processor, a server, or the like.

  The storage unit 11 copies the replicated input data input by each of the operation execution units 301-1 to 304-k to an operation execution unit other than the operation execution unit belonging to the same group as the operation execution unit. And stored in association with the identification information of the calculation execution unit.

  The diagnosis unit 12 diagnoses the operation execution units 301-1 to 304-k and detects a failure. As a diagnosis method, the majority logic as in the first embodiment may be used, or the execution result of the diagnosis program may be compared with an expected value.

  The instruction unit 13 stores the duplicate data associated with the identification information of the calculation execution unit when the diagnosis unit 12 detects a failure of any of the calculation execution units 301-1 to 304-k. The operation execution unit in the same group as the execution unit is instructed to execute the operation process using the replicated data.

  The output unit 14 replaces the execution result output by the operation execution unit in which a failure has been detected with the execution result of the operation process using the above-described replicated data, and outputs the result.

  As in the first embodiment, the present embodiment has an effect that the arithmetic processing result can be restored and the arithmetic processing can be continuously executed even when a multiple failure occurs in the system. The reason is that the storage unit 11 stores a copy of input data stored in a certain calculation execution unit in a calculation execution unit belonging to the same group as the calculation execution unit, and a failure has occurred in the calculation execution unit. In this case, the instruction unit 13 restores the operation processing result by causing the operation execution unit that stores the copy of the input data described above to re-execute the operation executed by the operation execution unit in which the failure has occurred.

  In the present embodiment, since the arithmetic processing result is repaired in the same group, it is possible to perform non-stop operation even when multiple faults occur in arithmetic execution units belonging to different groups. In the example of the present embodiment, the non-stop arithmetic processing device 1 includes four groups 30-1 to 30-4, and thus has fault tolerance against a maximum of four faults.

  While the present invention has been described with reference to the embodiments, the present invention is not limited to the above embodiments. Various changes that can be understood by those skilled in the art can be made to the configuration and details of the present invention within the scope of the present invention.

DESCRIPTION OF SYMBOLS 1 Non-stop arithmetic processing apparatus 2 Host apparatus 3 Non-stop arithmetic processing system 10 Overall control part 11 Storage part 12 Diagnosis part 13 Instruction part 14 Output part 20-1 thru | or 20-n Collation processor 201-1 thru | or 208-n Core 30- 1 to 30-4 groups 301-1 to 304-k operation execution unit

Claims (7)

An arithmetic execution means belonging to any group, storing input data and performing arithmetic processing on the input data;
Dividing and replicating the duplicated input data input by the calculation execution means is distributed to the calculation execution means other than the calculation execution means belonging to the same group as the calculation execution means, and the calculation Storage means for storing in association with identification information of the execution means;
Diagnosing means for diagnosing the arithmetic execution means and detecting a failure;
When the failure detected by the diagnosis unit is not a multiple failure that occurred in a plurality of the calculation execution units belonging to the same group, the divided duplicate data associated with the identification information of the calculation execution unit is stored. Instruction means for instructing execution of the arithmetic processing using the divided replica data to the arithmetic execution means;
An output unit that summarizes the execution results of the arithmetic processing using the divided replica data as a backup execution result, replaces the execution result output by the arithmetic execution unit in which the failure is detected with the backup execution result, and outputs the backup execution result; ,
A non-stop arithmetic processing apparatus. The non-stop operation processing device according to claim 1, wherein the diagnosis unit sequentially diagnoses the calculation execution unit every time the calculation execution unit finishes execution of the calculation processing on one piece of input data. The diagnostic means causes all the arithmetic execution means to input the same diagnostic program, the execution results of the diagnostic programs for a large number of the arithmetic execution means match, and the diagnostic program for a small number of the arithmetic execution means 3. The non-stop operation processing device according to claim 1, wherein when the execution result is different from the execution result of the diagnostic program for the large number of the operation execution means, a failure of the small number of the operation execution means is detected. In a system including a plurality of multi-core processors including the same number of core processors and defining a core number in hardware for the core processors,
The execution unit may include one of the core processors in the multi-core processor, when the core number of including the core processor are equal to any one of claims 1 to 3 belonging to the same said group Non-stop operation processing device described. A non-stop processing unit according to any one of claims 1 to 4, wherein the input data and outputs to the non-stop processing unit, Mu comprises an upper device for instructing the execution of the arithmetic processing Stop arithmetic processing system. A non-stop operation processing method in a system comprising a plurality of operation execution means belonging to any group, storing input data and performing operation processing on the input data,
The storage means distributes the divided duplicated data obtained by dividing the input data input by the calculation execution means to the calculation execution means other than the calculation execution means belonging to the same group as the calculation execution means. And stored in association with the identification information of the calculation execution means,
A diagnosis unit diagnoses the calculation execution unit to detect a failure;
When the instruction means detects that the failure detected by the diagnosis means is not a multiple failure occurring in a plurality of the operation execution means belonging to the same group, the divided duplicate data associated with the identification information of the operation execution means is Instructing the operation execution means to store the execution of the operation processing using the divided replication data,
The output means summarizes the execution results of the arithmetic processing using the divided duplicate data as backup execution results, and outputs the execution results output by the arithmetic execution means in which the failure has been detected replaced with the backup execution results. Yes Non-stop calculation processing method. A program that belongs to any group and that is executed by a unit that controls the entire system including a plurality of calculation execution units that store input data and perform calculation processing on the input data.
Dividing and replicating the duplicated input data input by the calculation execution means is distributed to the calculation execution means other than the calculation execution means belonging to the same group as the calculation execution means, and the calculation A storage process for storing the information associated with the identification information of the execution means;
A diagnostic process for diagnosing the arithmetic execution means and detecting a failure;
If the failure detected by the diagnostic process is not a multiple failure that occurred in a plurality of the operation execution means belonging to the same group, the operation stores the divided duplicate data associated with the identification information of the operation execution means Instruction processing for instructing execution means to execute the arithmetic processing using the divided duplicate data;
An output process for collecting the execution results of the arithmetic processing using the divided replica data as backup execution results, replacing the execution results output by the arithmetic execution means in which the failure is detected with the backup execution results, and outputting the backup execution results; ,
Non-stop operation processing program for causing a computer to execute.

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