JP5743516B2 - Video display device and video display method - Google Patents

Description

  The present invention relates to a video display device and a video display method.

  In digital broadcasting, a moving picture experts group (MPEG2) system is adopted as a video data encoding system. In the encoding of the MPEG2 system, video data is divided into three types of data of I picture, P picture, and B picture, and these data are grouped in units of GOP (Group Of Picture).

  In this MPEG2 system, an I picture contains all information by itself, and can be decoded alone. However, since a P picture and a B picture are only difference information, they are decoded if there is no predicted picture. Can not do it.

  Accordingly, when channel selection is performed by digital broadcasting, decoding of video data starts after the appearance of an I picture included in the video data of the channel after channel selection. The I picture is arranged at the head of the GOP. Since the GOP is composed of 15 frames, it is necessary to wait for the appearance of the I picture for about 0.5 seconds at the maximum after channel selection. For this reason, the I picture appearance waiting period is a video non-display period.

  Also, the encoded video data is packetized as a PES (Packetized Elementary Stream) packet. A PES packet header is added to the head of the PES packet, and time information and control information for synchronous reproduction such as DTS (Decoding Time Stamp) and PTS (Presentation Time Stamp) are described in the PES packet header.

  In the PES packetized video data playback and display process, the PES packet header is analyzed to obtain the DTS and PTS, and the MPEG decoding (at the timing when the STC (System Time Clock: system time reference value) and the DTS coincide with each other. Decoding) is performed, and display is performed at the timing when STC and PTS match.

  In the playback and display process described above, the maximum delay of video synchronization due to a time stamp is about 0.5 seconds, so this period is a video non-display period.

  Therefore, the video display device described in Patent Document 1 starts channel selection processing in synchronization with the appearance timing of the I picture of the video data of the channel to be selected when channel selection is performed by digital broadcasting. Thus, the video non-display period is shortened.

Japanese Patent Laying-Open No. 2005-184457 (first page, FIG. 3)

  The video display device described in Patent Document 1 displays the video of the channel before selection until the I picture of the video data of the selected channel appears after the channel selection operation is performed. Has been. In other words, the video display device described in Patent Document 1 cannot shorten the time from when the channel selection operation is performed until the video of the selected channel is displayed.

  In view of the above, an object of the present invention is to shorten the time from when a channel selection operation is performed until the video of the selected channel is displayed.

An image display device according to an aspect of the present invention includes:
A tuner unit that receives a broadcast signal and generates a stream by demodulating the broadcast signal;
A demultiplexer for extracting packets from the stream;
A system time counter for measuring the system time reference value;
A reproduction unit that reproduces a video signal from video data included in the packet in synchronization with the system time reference value;
A frame buffer unit that stores the video signal and outputs the video signal in synchronization with the system time reference value;
A program time base reference value for clocking the synchronization time is acquired from the packet, the program time base reference value is set in the system time clock unit, and the system time clock unit is configured to correspond to the synchronization time. A control unit for measuring the time reference value;
A storage unit that stores decode start time information indicating a decode start count-up value for advancing the time , and
The control unit acquires a program time base reference value included in the packet when a channel is selected , adds the decode start count-up value to the acquired program time base reference value, and Generating a first value for clocking a first time that is ahead of the time, setting the generated first value in the system time clock unit, and setting the first time in the system time clock unit to the first time The system time reference value indicating the time of time is measured, and when the video signal is output from the frame buffer unit, the value of the normal time corresponding to the synchronization time is calculated, and the value of the normal time is calculated. It is set in the system time counter, and the system time counter is caused to measure a system time reference value corresponding to the synchronization time.

  According to one aspect of the present invention, it is possible to shorten the time from when the channel selection operation is performed until the video of the selection destination channel is displayed.

1 is a block diagram schematically showing a configuration of a video display device according to Embodiment 1. FIG. FIG. 6 is a schematic diagram showing a decoding start time table in the first embodiment. It is a flowchart which shows the reproduction | regeneration display process at the time of the conventional channel switching. 3 is a flowchart showing playback display processing at the time of channel switching in the first embodiment. (A) And (B) is a schematic diagram which shows the time chart of STC based on the reproduction | regeneration display process in Embodiment 1. FIG. (A)-(D) are the schematic diagrams which show the display timing of the picture based on the reproduction | regeneration display process in Embodiment 1. FIG. 6 is a block diagram schematically showing a configuration of a video display device according to Embodiment 2. FIG. 10 is a schematic diagram showing a display start time table in Embodiment 2. FIG. 10 is a flowchart showing playback display processing at the time of channel switching in the second embodiment. (A)-(C) are the schematic diagrams which show the time chart of STC based on the reproduction | regeneration display process at the time of the channel switching in Embodiment 2. FIG. (A)-(D) are the schematic diagrams which show the display timing of the picture based on the reproduction | regeneration display process at the time of the channel switching in Embodiment 2. FIG. 6 is a block diagram schematically showing a configuration of a video display apparatus according to Embodiment 3. FIG. 10 is a flowchart showing decoding start time information update processing in the third embodiment. FIG. 10 is a block diagram schematically showing a configuration of a video display device according to a fourth embodiment. 10 is a flowchart showing display start time information update processing in the fourth embodiment. FIG. 10 is a block diagram schematically showing a configuration of a video display device according to a fifth embodiment.

Embodiment 1 FIG.
FIG. 1 is a block diagram schematically showing a configuration of a video display apparatus 100 according to the first embodiment. The video display device 100 includes an input terminal 101, a tuner unit 102, a demultiplexer unit 103, a system timekeeping unit 104, a playback unit 105, a frame buffer unit 109, an output terminal 110, a storage unit 111, And a control unit 114.

The input terminal 101 receives an input of a broadcast signal transmitted from a broadcast station from an antenna not shown.
The tuner unit 102 demodulates a broadcast signal obtained from the input terminal 101 to generate a TS (Transport Stream). The tuner unit 102 gives the generated TS to the demultiplexer unit 103.
The demultiplexer unit 103 separates necessary packets from the TS. For example, the demultiplexer unit 103 gives the video data packet separated from the TS to the reproduction unit 105 and gives the program information separated from the TS to the control unit 114.

  The system time counter 104 indicates a synchronization time using a PCR (Program Clock Reference: Program Time Reference Reference Value) included in the TS or an SCR (System Clock Reference: System Time Reference Reference Value) included in the PES. Count the STC. Further, the system time counter 104 counts an STC indicating a time advanced from the synchronization time in response to an instruction from the controller 114.

  The reproduction unit 105 reproduces a video signal from the video data packet given from the demultiplexer unit 103. For example, the playback unit 105 includes a PES processing unit 106, a decode buffer unit 107, and a decode unit 108.

When the PES packet header is stored in the video data packet given from the demultiplexer unit 103, the PES processing unit 106 analyzes the PES packet header and acquires DTS and PTS. The PES processing unit 106 gives the acquired DTS and PTS to the control unit 114. Further, the PES processing unit 106 temporarily stores the video data stored in the video data packet given from the demultiplexer unit 103 in the decode buffer unit 107.
The decode buffer unit 107 stores the video data given from the PES processing unit 106. Then, the decode buffer unit 107 gives the stored video data to the decode unit 108 in response to an instruction from the control unit 114.
The decoding unit 108 MPEG-decodes (decodes) the MPEG-encoded video data stored in the decoding buffer unit 107 to generate a video signal. The decoding unit 108 temporarily stores the generated video signal in the frame buffer unit 109.

  The frame buffer unit 109 stores the video signal given from the decoding unit 108. The frame buffer unit 109 supplies the stored video signal to the output terminal 110 in accordance with an instruction from the control unit 114.

  The output terminal 110 outputs the video signal supplied from the frame buffer unit 109 to a display device (not shown).

  The storage unit 111 includes, for example, a flash ROM 112 that is a nonvolatile memory and a RAM 113 that is a volatile memory. The flash ROM 112 stores decode start time information DSTD.

  The decode start time information DSTD is information indicating a decode start count-up value for advancing the time counted by the system time counter 104 for each channel. For example, the decode start time information DSTD is information in a table format such as the decode start time table DSTT shown in FIG.

The decode start time table DSTT has a service ID column DSTT1 and a decode start count-up value column DSTT2.
The service ID column DSTT1 stores a service ID that is identification information for identifying a channel.
The decode start count-up value column DSTT2 stores a decode start count-up value to be added to the PCR of the channel identified by the service ID column DSTT1. Note that a predetermined value may be stored as the decode start count-up value. For example, the decode start count-up value is the time from when the video data is stored in the decode buffer unit 107 until the normal STC (STC indicating the synchronization time) to which the decode start count-up value is not added matches the DTS. A value corresponding to a period shorter than the decoding wait period may be set.

  Although not shown, the flash ROM 112 stores an application program for performing processing in the control unit 114. Then, the control unit 114 reads the decoding start time information DSTD and the application program stored in the flash ROM 112 into the RAM 110 and performs processing.

  The control unit 114 controls processing in the video display device 100. The control unit 114 includes a reproduction control unit 115, a decode start time conversion unit 116, and a regular time setting unit 117.

  The reproduction control unit 115 controls the tuner unit 102, the demultiplexer unit 103, the system timekeeping unit 104, the reproduction unit 105, and the frame buffer unit 109 to control the process of reproducing video from the broadcast signal transmitted from the broadcast station. To do. For example, when the PCR is extracted by the demultiplexer unit 103, the reproduction control unit 115 sets the extracted PCR in the system timekeeping unit 104 and controls the video signal generation process and the display process. The video signal generation process and the display process will be described with reference to FIG. When an input unit such as a remote controller (not shown) receives a channel selection, the playback control unit 115 receives information that can identify the selected channel from the input unit, and performs necessary processing.

  The decode start time conversion unit 116 indicates the first time when the STC timed by the system time clock unit 104 is ahead of the synchronization time at the timing when the PCR is extracted by the demultiplexer unit 103 at the time of channel selection. Then, processing for changing the STC timed by the system timekeeping unit 104 is performed. For example, the decode start time conversion unit 116 refers to the decode start time table DSTT at the timing when the PCR is extracted by the demultiplexer unit 103 at the time of channel selection, and the decode start count up corresponding to the service ID of the selected channel A value is acquired, and a value (first value) obtained by adding the acquired decode start count-up value to the extracted PCR is set in the system time counter 104.

  When the channel is selected, the regular time setting unit 117 outputs the STC whose first time is indicated by the decoding start time conversion unit 116 at the timing when the video signal of the selection destination channel is output to the output terminal 110. As shown, the STC timed by the system timekeeping unit 104 is returned. For example, the regular time setting unit 117 acquires the current STC from the system time clock unit 104 at the timing when the video signal of the selected channel is output to the output terminal 110 when the channel is selected, and the previous system time clock unit. A time count-up value indicating an elapsed time from the STC set to 104 (a value obtained by adding a decode start count-up value to PCR) is calculated. Then, the normal time setting unit 117 calculates the normal time value by adding the calculated time count-up value to the PCR extracted by the demultiplexer unit 103, and the calculated normal time value is the system time clock unit. Set to 104.

Next, a description will be given of the reproduction display process performed by the video display device 100 when a channel is selected, particularly when the channel is switched.
First, a conventional reproduction display process at the time of channel switching without using the decoding start time conversion unit 116 and the regular time setting unit 117 will be described with reference to FIG. FIG. 3 is a flowchart showing a conventional reproduction display process at the time of channel switching.

  First, when channel switching occurs, the playback control unit 115 controls the tuner unit 102 to receive a broadcast signal of a channel to be switched to. The broadcast signal of the switching destination channel is demodulated by the tuner unit 102, and the TS generated from the broadcast signal is given to the demultiplexer unit 103. Then, the demultiplexer unit 103 extracts the PCR packet together with the video data packet and the audio data packet, and the reproduction control unit 115 acquires the PCR (S10). The PCR value acquired in step S10 is set to “TA0”.

  Next, when the reproduction control unit 115 sets the acquired PCR (TA0) in the system timekeeping unit 104, the system timekeeping unit 104 starts counting the STC (S11).

  Next, when the video data packet is input to the reproduction unit 105 (Yes in step S12), the PES processing unit 106 determines whether a PES header is stored in the video data packet (S13). If the PES header is stored (Yes in Step S13), the PES processing unit 106 proceeds to the process of Step S14. If the PES header is not stored (No in Step S13), the PES processing unit 106 proceeds to Step S14. The process proceeds to S15.

  In step S14, the reproduction control unit 115 analyzes the PES packet header of the video data packet and acquires DTS, PTS, and other control information. The value of DTS acquired in step S14 is set to “TB0”, and the value of PTS is set to “TC0”.

  In step S <b> 15, the PES processing unit 106 temporarily stores the video data stored in the video data packet in the decode buffer unit 107.

  Next, the playback control unit 115 determines whether there is a picture that can be decoded in the video data stored in the decoding buffer unit 107 based on the information obtained by analyzing the PES packet header (S16). . If there is a picture that can be decoded (Yes in step S16), the reproduction control unit 115 proceeds to the process of step S17. If there is no picture that can be decoded (No in step S16), the reproduction control unit 115 The process returns to S12. For example, when an I picture is stored in the decode buffer unit 107, the playback control unit 115 determines that there is a decodable picture because it can be decoded by itself. On the other hand, when the P picture and the B picture are stored in the decode buffer unit 107, the playback control unit 115 cannot decode by itself, and therefore, based on whether other pictures necessary for decoding are stored. It is determined whether there is a picture that can be decoded. Then, when other pictures necessary for decoding are stored, the playback control unit 115 determines that there is a picture that can be decoded, and when other pictures necessary for decoding are not stored. Determines that there is no decodable picture.

  In step S <b> 17, the playback control unit 115 acquires the current STC from the system timekeeping unit 104. The value of the STC acquired in step S17 is “TD0”.

  Next, the reproduction control unit 115 determines whether the STC (TD0) acquired in step S17 matches the DTS (TB0) acquired in step S14 (S18). Then, the reproduction control unit 115 proceeds to the process of step S19 if they match (Yes in step S18), and returns to the process of step S17 if they do not match (No in step S18).

  In step S19, the reproduction control unit 115 causes the decoding buffer unit 107 to output the video data to be decoded to the decoding unit 108, and causes the decoding unit 108 to decode the video data.

  Then, the decoding unit 108 temporarily stores the video signal generated by decoding the video data in the frame buffer unit 109 (S20).

  When the video signal is stored in the frame buffer unit 109, the playback control unit 115 acquires the current STC from the system timekeeping unit 104 (S21). The value of STC acquired in step S21 is “TE0”.

  Next, the reproduction control unit 115 determines whether or not the STC (TE0) acquired in step S21 matches the PTS (TC0) acquired in step S14 (S22). The reproduction control unit 115 proceeds to the process of step S23 if they match (Yes in step S22), and returns to the process of step S21 if they do not match (No in step S22).

  In step S <b> 23, the reproduction control unit 115 outputs the video signal from the frame buffer unit 109 to the output terminal 110 and displays the video on a display device (not shown) connected to the output terminal 110.

  In the following, the processing from step S12 to step S20 in FIG. 3 is referred to as video signal generation processing, and the processing from step S21 to step S23 is referred to as display processing. Then, by repeating these video signal generation processing and display processing, video is continuously displayed.

  Next, reproduction display processing at the time of channel switching in the first embodiment using the decoding start time conversion unit 116 and the regular time setting unit 117 will be described with reference to FIG. FIG. 4 is a flowchart showing the reproduction display process at the time of channel switching in the first embodiment.

  First, when channel switching occurs, the playback control unit 115 controls the tuner unit 102 to receive a broadcast signal of a channel to be switched to. The broadcast signal of the switching destination channel is demodulated by the tuner unit 102, and the TS generated from the broadcast signal is given to the demultiplexer unit 103. Then, the demultiplexer unit 103 extracts the PCR packet together with the video data packet and the audio data packet, and the reproduction control unit 115 acquires the PCR (S30). The PCR value acquired in step S30 is set to “TA1”. In addition, the reproduction control unit 115 gives the acquired PCR (TA1) to the decoding start time conversion unit 116.

  When acquiring the PCR (TA1), the decode start time conversion unit 116 refers to the decode start time table DSTT stored in the storage unit 111 and determines the decode start count-up value corresponding to the service ID of the switching destination channel. Obtain (S31). Here, for example, it is assumed that the decode start count-up value “X1” corresponding to “0x101” stored in the service ID column DSTT1 illustrated in FIG. 2 is acquired.

  Next, the decode start time conversion unit 116 adds the first value obtained by adding the decode start count-up value (X1) acquired in step S31 to the PCR (TA1) acquired in step S30. (S32). Here, the first value is “TB1”. Based on the set first value (TB1), the system time counter 104 starts STC time measurement.

  Next, the reproduction control unit 115 controls the video signal generation process and the display process (S33). The video signal generation processing in step S33 is the same processing as the video signal generation processing shown in steps S12 to S20 in FIG. 3, and the display processing in step S33 is the same as the display processing shown in steps S21 to S23 in FIG. It is the same processing.

  Next, when the video signal generation process and the display process are controlled in step S33, the regular time setting unit 117 determines whether or not a video corresponding to the first picture in the switching destination channel is displayed (S34). . For example, when the video signal corresponding to the first picture in the switching destination channel is output from the frame buffer unit 109, the regular time setting unit 117 displays the video corresponding to the first picture in the switching destination channel. Judge that it was done. Then, when such a video is displayed (Yes in S34), the regular time setting unit 117 proceeds to the process of step S35.

  In step S <b> 35, the regular time setting unit 117 acquires the current STC as the current time value from the system timekeeping unit 104. The value of the STC acquired here is “TC1”.

  Then, the regular time setting unit 117 calculates a time count-up value (TD1) indicating the elapsed time from the value (TB1) set in the system timekeeping unit 104 in step S32 to the current time value (S36). For example, the time count-up value (TD1) is calculated by subtracting the first value (TB1) set in step S32 from the STC (TC1) acquired in step S35.

Next, the normal time setting unit 117 calculates the value of the normal time by adding the time count-up value (TD1) calculated in step S37 to the PCR (TA1) acquired in step S30 (S37). ). The value of the regular time calculated here is “TE1”.
Then, the regular time setting unit 117 sets the value of the regular time (TE1) calculated in step S37 in the system timekeeping unit 104 (S38).

  After the above steps S30 to S38 are performed, the playback control unit 115 switches by repeating the video signal generation process (steps S12 to S20) and the display process (steps S21 to S23) shown in FIG. The video of the previous channel can be displayed continuously.

  FIG. 5 is a schematic diagram showing an STC time chart based on the reproduction display processing at the time of channel switching in the first embodiment. FIG. 5A shows an STC time chart indicating the synchronization time when the decode start count-up value is not added, and FIG. 5B shows the first time when the decode start count-up value is added. The time chart of STC is shown.

In the STC time chart showing the synchronization time shown in FIG. 5A, when the PCR is acquired in step S30 in FIG. 4, the time measurement of STC is started from “TA1”. In the STC time chart showing the first time shown in FIG. 4, when the PCR is acquired in step S30 of FIG. 4, the first value obtained by adding the decode start time count-up value “X1” to “TA1”. The timing of STC is started from “TB1”.
Further, as shown in FIG. 5B, in the reproduction display processing at the time of channel switching in the first embodiment, after the video signal corresponding to the first picture after the channel switching is output, in step S35 of FIG. When the current STC “TC1” is acquired, a time count-up value “TD1” from “TB1” to “TC1” is calculated, and this “TD1” is added to “TA1” acquired in step S30 of FIG. The value “TE1” of the regular time obtained by adding is Then, as shown in FIG. 5A, in the playback display process at the time of channel switching in the first embodiment, the system timekeeping unit 104 measures the synchronization time by measuring the time from the regular time value “TE1”. Return to the indicated STC.

Therefore, the time from when the PCR is acquired until the video signal corresponding to the first picture is output is shown in FIG. 5A in the reproduction display process at the time of the conventional channel switching shown in FIG. The time from “TA1” to “TC1” is shown, and in the playback display processing at the time of channel switching in the first embodiment shown in FIG. 4, “TB1” to “TC1” shown in FIG. This time becomes “TD1”. That is, in the reproduction display processing at the time of channel switching in the first embodiment, it is possible to shorten the time until display is performed for the time “X1” added as the decode start count-up value.
Furthermore, in the playback display process at the time of channel switching in the first embodiment, after outputting the video signal corresponding to the first picture, the STC is returned to the regular time value “TE1”, and the synchronization time is counted. The stable operation of the system can be ensured.

  Next, the display timing of a picture based on the reproduction display processing at the time of channel switching in the first embodiment will be described with reference to FIG. FIG. 6 is a schematic diagram showing the display timing of a picture based on the playback display process at the time of channel switching in the first embodiment. In FIG. 6, “I” indicates an I picture, “B” indicates a B picture, and “P” indicates a P picture. The numbers added to “I”, “B”, and “P” indicate the display order of the pictures.

  6A shows the picture order of the original picture, FIG. 6B shows the picture order in the transmission / reception stream input to the video display apparatus 100, and FIG. 6C is shown in FIG. FIG. 6D shows the picture display timing based on the reproduction display process at the time of channel switching in the first embodiment shown in FIG. 4. Indicates.

Here, it is assumed that the video display apparatus 100 cannot receive “I0” and “P0” indicated by broken lines in FIG. 6B, and has received a transmission / reception stream after “B0”. In such a case, since the video display apparatus 100 cannot decode “B0”, “B1”, “B2”, and “B3”, “I1” is the first picture that can be decoded.
Then, in the reproduction display process at the time of the conventional channel switching shown in FIG. 3, the picture “I1” is stored in the decode buffer unit 107 at time “T0”, and at time “T2” when STC and PTS match, “I1” is displayed. On the other hand, in the reproduction display process at the time of channel switching in the first embodiment shown in FIG. 4, the time “T1” that is earlier than the time “T2” by the decode start count-up value “X1” added to the PCR is The picture “I1” is displayed.

As described above, when the video display apparatus 100 according to Embodiment 1 performs the channel selection process, the video display apparatus 100 starts counting the STC with the first value obtained by adding the decode start count-up value to the acquired PCR. The picture decoding start time and display start time can be advanced. Therefore, the video display device 100 according to Embodiment 1 can shorten the time from when the user selects a channel to when the channel selected channel is displayed.
Furthermore, after displaying the first picture of the switching destination channel, video display apparatus 100 according to Embodiment 1 calculates a normal time value when the picture is displayed, and returns the STC to the normal time value. Since the synchronization time is measured, the stable operation of the system can be ensured.

  In the first embodiment, in step S37 in FIG. 4, the value of the regular time is calculated by adding the time count-up value (TD1) to the PCR (TA1) acquired in step S30. The normal time value may be calculated by subtracting the decode start count-up value (X1) acquired in step S31 from the STC (TC1) acquired in step S35.

  In the first embodiment, the decoding start count-up value corresponding to the channel to be selected is acquired from the decoding start time information table (step S31 in FIG. 4), and the decoding start count-up value acquired in the PCR is added. Thus, the first value is calculated (step S32 in FIG. 4). For example, the decoding start time conversion unit 116 may uniformly add a predetermined value to the PCR. In such a case, a value to be uniformly added to the PCR is stored in the storage unit 111.

Embodiment 2. FIG.
FIG. 7 is a block diagram schematically showing the configuration of the video display apparatus 200 according to the second embodiment. The video display device 200 includes an input terminal 101, a tuner unit 102, a demultiplexer unit 103, a system timekeeping unit 104, a playback unit 105, a frame buffer unit 109, an output terminal 110, a storage unit 211, And a control unit 214. The video display apparatus 200 according to the second embodiment is different from the video display apparatus 100 according to the first embodiment in the storage unit 211 and the control unit 214.

  The flash ROM 212 of the storage unit 211 stores the decoding start time information DSTD as in the first embodiment. Further, unlike the first embodiment, the flash ROM 212 further stores display start time information PSTD.

  The display start time information PSTD is information indicating a display start count-up value for advancing the time measured by the system time counter 104 for each channel. For example, the display start time information PSTD is information in a table format such as the display start time table PSTT shown in FIG.

The display start time table PSTT has a service ID column PSTT1 and a display start count-up value column PSTT2.
The service ID column PSTT1 stores a service ID that is identification information for identifying a channel.
The display start count-up value column PSTT2 stores a display start count-up value to be added to the STC of the channel identified by the service ID column PSTT1. Note that a predetermined value may be stored as the display start count-up value. For example, the display start count-up value is shorter than the output waiting period from when the video signal is stored in the frame buffer unit 109 until the STC indicating the synchronization time to which the display start count-up value is not added matches the PTS. A value corresponding to the period may be set. Further, the control unit 114 reads the display start time table PSTT stored in the flash ROM 212 into the RAM 110 and performs processing.

  The control unit 214 controls processing in the video display device 200. The control unit 214 includes a reproduction control unit 115, a decode start time conversion unit 116, a regular time setting unit 217, and a display start time conversion unit 218. The control unit 214 in the second embodiment is different from the control unit 114 in the first embodiment in that the processing in the regular time setting unit 217 and the display start time conversion unit 218 are further provided.

  When the channel is selected, the display start time conversion unit 218 outputs the STC timed by the system time counter 104 at the timing when the video signal of the selected channel is output from the playback unit 105 to the frame buffer unit 109. A process of changing the STC timed by the system timekeeping unit 104 is performed so as to indicate a second time that is advanced from the first time advanced by the conversion unit 116. For example, the display start time conversion unit 218 obtains the current STC from the system time counter 104 at the timing when the video signal of the selected channel is output from the playback unit 105 to the frame buffer unit 109 when the channel is selected. The display start time table PSTT is referred to, a display start count-up value corresponding to the service ID of the selection destination is acquired, and a value obtained by adding the acquired display start count-up value to the acquired STC (second value) ) Is set in the system time counter 104.

  The regular time setting unit 217 indicates the second time by the decoding start time conversion unit 116 and the display start time conversion unit 218 at the timing when the video signal of the selection destination channel is output to the output terminal 110 when the channel is selected. The system time counter 104 performs processing for returning the STC timed so that the set STC indicates the synchronization time. For example, the regular time setting unit 217 receives the current STC from the system time counter 104 at the timing when the video signal of the selected channel is output from the playback unit 105 to the frame buffer unit 109 when the channel is selected. A first time count-up value obtained as a time value and indicating an elapsed time from the STC (a value obtained by adding a decode start count-up value to PCR) set in the previous system time counter 104 to a first current time value Is calculated. Also, the regular time setting unit 217 outputs the current STC from the system time counting unit 104 to the second current time at the timing when the video signal of the selected channel is output from the frame buffer unit 109 to the output terminal 110 when the channel is selected. A second time count-up value obtained as a time value and indicating the elapsed time from the STC (the value obtained by adding the display start count-up value to STC) set in the previous system time counter 104 to the second current time value Is calculated. Further, the normal time setting unit 217 calculates the value of the normal time by adding the calculated first time count-up value and second time count-up value to the PCR extracted by the demultiplexer unit 103. The regular time value is set in the system time counter 104.

  Next, playback display processing at the time of channel switching in the second embodiment will be described with reference to FIG. FIG. 9 is a flowchart showing a reproduction display process at the time of channel switching in the second embodiment.

  First, when channel switching occurs, the playback control unit 115 controls the tuner unit 102 to receive a broadcast signal of a channel to be switched to. The broadcast signal of the switching destination channel is demodulated by the tuner unit 102, and the TS generated from the broadcast signal is given to the demultiplexer unit 103. Then, the demultiplexer unit 103 extracts the PCR packet together with the video data packet and the audio data packet, and the reproduction control unit 115 acquires the PCR (S40). The PCR value acquired in step S40 is “TA2”. In addition, the reproduction control unit 115 gives the acquired PCR (TA2) to the decoding start time conversion unit 116.

  When acquiring the PCR (TA2), the decode start time conversion unit 116 refers to the decode start time table DSTT stored in the storage unit 211, and calculates the decode start count-up value corresponding to the service ID of the switching destination channel. Obtain (S41). Here, for example, it is assumed that the decode start count-up value “X2” corresponding to “0x200” stored in the service ID column DSTT1 illustrated in FIG. 2 is acquired.

  Next, the decode start time conversion unit 116 adds the first value obtained by adding the decode start count-up value (X2) acquired in step S41 to the PCR (TA2) acquired in step S40. (S42). Note that the first value in step S42 is “TB2”. Based on the set first value (TB2), the system time counter 104 starts STC time measurement.

  Next, the reproduction control unit 115 controls the video signal generation process (S43). The video signal generation process in step S43 is the same process as the video signal generation process shown in steps S12 to S20 in FIG.

  Next, when the video signal generation process is controlled in step S43, the regular time setting unit 217 determines whether the video data corresponding to the first picture in the switching destination channel has been decoded (S44). For example, when the video signal corresponding to the first picture in the switching destination channel is output from the decoding unit 108, the regular time setting unit 217 decodes the video data corresponding to the first picture in the switching destination channel. Judge that it was done. Then, when such video data is decoded (Yes in S44), the regular time setting unit 217 proceeds to the process of step S45.

  In step S45, the regular time setting unit 217 obtains the current STC as the first current time value from the system time counter 104. The value of the STC acquired here is “TC2”.

  Then, the regular time setting unit 217 first count up value (TD2) indicating the elapsed time from the first value (TB2) set in the system time counter 104 in step S42 to the first current time value. Is calculated (S46). For example, the first time count-up value (TD2) is calculated by subtracting the first value (TB2) set in step S42 from the STC (TC2) acquired in step S45.

  Next, the display start time conversion unit 218 refers to the display start time table PSTT stored in the storage unit 211 and acquires a display start count-up value corresponding to the service ID of the switching destination (S47). Here, for example, the display start count-up value “Y2” corresponding to “0x200” stored in the service ID column PSTT1 shown in FIG. 8 is acquired.

  Next, the display start time conversion unit 218 adds the second value obtained by adding the display start count-up value (Y2) acquired in step S47 to the STC (TC2) acquired in step S45. (S48). Note that the second value here is “TE2”. Based on the set second value (TE2), the system time counter 104 starts STC time measurement.

  Next, the reproduction control unit 115 controls display processing (S49). The display process in step S49 is the same process as the display process shown in steps S21 to S23 in FIG.

  Next, when the display process is controlled in step S49, the regular time setting unit 217 determines whether or not an image corresponding to the first picture in the switching destination channel is displayed (S50). For example, when the video signal corresponding to the first picture in the switching destination channel is output from the frame buffer unit 109, the regular time setting unit 217 displays the video corresponding to the first picture in the switching destination channel. Judge that it was done. Then, when such a video is displayed (Yes in S50), the regular time setting unit 217 proceeds to the process of step S51.

  In step S51, the regular time setting unit 217 acquires the current STC from the system time counter 104 as the second current time value. The value of the STC acquired here is “TF2”.

  Then, the regular time setting unit 217 calculates the second time count-up value (TG2) indicating the elapsed time from the value (TE2) set in the system timekeeping unit 104 in step S48 to the second current time value. (S52). For example, the second time count-up value (TG2) is calculated by subtracting the second value (TE2) set in step S48 from the STC (TF2) acquired in step S51.

Next, the regular time setting unit 217 adds the first time count-up value (TD2) calculated in step S46 and the second time count-up value calculated in step S52 to the PCR (TA2) acquired in step S40. The value of regular time is calculated by adding (TG2) (S53). The value of the regular time calculated here is “TH2”.
Then, the normal time setting unit 117 sets the value (TH2) of the normal time calculated in step S53 in the system time counter 104 (S54).

After the above steps S40 to S54 are performed, the reproduction control unit 115 performs switching by repeating the video signal generation process (steps S12 to S20) and the display process (steps S21 to S23) shown in FIG. The video of the previous channel can be displayed.
FIG. 10 is a schematic diagram showing an STC time chart based on the reproduction display process at the time of channel switching in the second embodiment. FIG. 10A shows an STC time chart indicating the synchronization time in which the decode start count-up value and the display start count-up value are not added, and FIG. 10B shows that the decode start count-up value is added. An STC time chart showing the first time is shown, and FIG. 10C shows an STC time chart showing the second time when the decode start count-up value and the display start count-up value are added.

In the STC time chart showing the synchronization time shown in FIG. 10A, when the PCR is acquired in step S40 in FIG. 9, the time measurement of STC is started from “TA2”. In the STC time chart showing the first time shown in FIG. 9, when the PCR is acquired in step S40 of FIG. 9, the first value obtained by adding the decode start time count-up value “X2” to “TA2”. The timing of STC is started from “TB2”.
Then, as shown in FIG. 10B, in the playback display processing at the time of channel switching in the second embodiment, after the video data corresponding to the first picture after switching is decoded, the current data is displayed in step S45 of FIG. When the STC “TC2” is acquired, the first time count-up value “TD2” from “TB2” to “TC2” is calculated.
In the STC time chart showing the second time shown in FIG. 10C, when the current STC is acquired in step S45 of FIG. 9, the display start time count-up value “Y2” is displayed in “TC2”. STC timing is started from the second value “TE2” to which “is added”.
Further, as shown in FIG. 10C, in the reproduction display process at the time of channel switching in the second embodiment, after the video signal corresponding to the first picture after the channel switching is output, in step S51 of FIG. When the current STC “TF2” is acquired, the second time count-up value “TG2” from “TE2” to “TF2” is calculated, and “TA2” acquired in step S40 of FIG. A normal time value “TE1” obtained by adding the 1-time count-up value “TD2” and the second-time count-up value “TG2” is calculated. Then, as shown in FIG. 10C, in the playback display process at the time of channel switching in the second embodiment, the system timekeeping unit 104 starts timekeeping from the calculated normal time value “TE1”. Return to the STC indicating the synchronization time.

Therefore, the time from when the PCR is acquired until the video signal corresponding to the first picture is output is shown in FIG. 5A in the reproduction display process at the time of the conventional channel switching shown in FIG. It is the time from “TA2” to “TF2”, and in the playback display process at the time of channel switching in the second embodiment shown in FIG. 9, “TB2” to “TC2” shown in FIG. The time “TD2” is added to the time “TG2” from “TE2” to “TF2” shown in FIG. 10C. That is, in the reproduction display processing at the time of channel switching in the second embodiment, it is possible to shorten the time until display is performed by the time obtained by adding the decode start count-up value “X2” and the display start count-up value “Y2”.
Furthermore, in the playback display processing at the time of channel switching in the second embodiment, after outputting the video signal corresponding to the first picture, the STC is returned to the regular time value “TH2”, and the synchronization time is counted. Therefore, stable operation of the system can be ensured.

  Next, the display timing of a picture based on the reproduction display process at the time of channel switching in the second embodiment will be described with reference to FIG. FIG. 11 is a schematic diagram showing the display timing of a picture based on the playback display process at the time of channel switching in the second embodiment. In FIG. 11, “I” indicates an I picture, “B” indicates a B picture, and “P” indicates a P picture. The numbers added to “I”, “B”, and “P” indicate the display order of the pictures.

  11A shows the picture order of the original picture, FIG. 11B shows the picture order in the transmission / reception stream input to the video display apparatus 200, and FIG. 11C is shown in FIG. FIG. 11D shows the picture display timing based on the playback display process at the time of channel switching in the second embodiment shown in FIG. 9. Indicates.

Here, it is assumed that the video display apparatus 200 cannot receive “I0” and “P0” indicated by the broken lines in FIG. 11B and has received a transmission / reception stream after “B0”. In such a case, since the video display apparatus 200 cannot decode “B0”, “B1”, “B2”, and “B3”, “I1” is the first picture that can be decoded.
Then, in the reproduction display process at the time of the conventional channel switching shown in FIG. 9, the picture “I1” is stored in the decode buffer unit 107 at time “T0”, and at time “T3” when STC and PTS match, “I1” is displayed. On the other hand, in the reproduction display processing at the time of channel switching in the second embodiment shown in FIG. 9, only the time obtained by adding the decode start count-up value “X1” and the display start count-up value “Y1” from the time “T3”. The picture “I1” is displayed at the earlier time “T1”.

  As described above, when performing the channel selection process, video display apparatus 200 according to Embodiment 2 starts counting the STC with a value obtained by adding the decode start count-up value and the display start count-up value to the acquired PCR. Therefore, the decoding start time and display start time of the picture can be advanced, and the time from when the channel selection operation is performed by the user until the video of the selected channel is displayed can be shortened. Furthermore, after displaying the video corresponding to the first picture, the video display device 200 according to Embodiment 2 calculates the value of the normal time, and returns the STC to the value of the normal time, thereby stabilizing the system operation. Can be secured.

  In the second embodiment, in step S53 of FIG. 9, the first time count-up value (TD2) and the second time count-up value (TG2) are added to the PCR (TA2) acquired in step S40. For example, the value of the regular time is calculated from the STC (TF2) acquired in step S51, the decode start count-up value (X2) acquired in step S41, and the display start count acquired in step S47. The normal time value may be calculated by subtracting the up value (Y2).

  In the second embodiment, the display start count-up value corresponding to the channel to be selected is acquired from the display start time information table (step S47 in FIG. 9), and the display start count-up value acquired is added to the STC. Thus, the second value is calculated (step S48 in FIG. 9). For example, the display start time conversion unit 218 may uniformly add a predetermined value to the STC. In such a case, a value to be uniformly added to the STC is stored in the storage unit 211.

Embodiment 3 FIG.
FIG. 12 is a block diagram schematically showing the configuration of the video display apparatus 300 according to the third embodiment. The video display device 300 includes an input terminal 101, a tuner unit 102, a demultiplexer unit 103, a system timekeeping unit 104, a playback unit 105, a frame buffer unit 109, an output terminal 110, a storage unit 111, And a control unit 314. Video display apparatus 300 according to Embodiment 3 is different from video display apparatus 100 according to Embodiment 1 in control unit 314.

  The control unit 314 controls processing in the video display device 300. The control unit 314 includes a reproduction control unit 315, a decode start time conversion unit 116, a regular time setting unit 117, and a decode start time update unit 319. The control unit 314 in the third embodiment is different from the control unit 114 in the first embodiment in that a processing in the reproduction control unit 315 and a decoding start time update unit 319 are further provided.

The reproduction control unit 315 performs processing similar to that of the first embodiment, and also performs processing for updating the decoding start time information DSTD stored in the storage unit 111 together with the decoding start time updating unit 319. This process will be described with reference to FIG.
The decoding start time updating unit 319 performs processing for updating the decoding start time information DSTD stored in the storage unit 111 together with the reproduction control unit 315.

  Decoding start time information update processing in the third embodiment will be described with reference to FIG. FIG. 13 is a flowchart showing decoding start time information update processing in the third embodiment.

  First, when channel switching occurs, the playback control unit 315 controls the tuner unit 102 to receive the broadcast signal of the switching destination channel. The broadcast signal of the switching destination channel is demodulated by the tuner unit 102, and the TS generated from the broadcast signal is given to the demultiplexer unit 103. Then, the demultiplexer unit 103 extracts the PCR packet together with the video data packet and the audio data packet, and the reproduction control unit 315 acquires the PCR (S60). The PCR value acquired in step S60 is set to “TA3”.

  Next, when the reproduction control unit 315 sets the acquired PCR (TA3) in the system timekeeping unit 104, the system timekeeping unit 104 starts counting the STC (S61).

  Next, when a video data packet is input to the reproduction unit 105 (Yes in step S62), the PES processing unit 106 determines whether or not a PES header is stored in the video data packet (S63). If the PES header is stored (Yes in step S63), the PES processing unit 106 proceeds to the process of step S64. If the PES header is not stored (No in step S63), the PES processing unit 106 proceeds to step S64. The process proceeds to S65.

  In step S64, the reproduction control unit 315 analyzes the PES packet header of the video data packet and acquires DTS, PTS, and other control information. The value of DTS acquired in step S64 is “TB3”, and the value of PTS is “TC3”.

  In step S65, the PES processing unit 106 temporarily stores the video data stored in the video data packet in the decode buffer unit 107.

  Next, the playback control unit 315 determines whether or not a picture that can be decoded exists in the video data stored in the decoding buffer unit 107 based on information obtained by analyzing the PES packet header (S66). . If there is a picture that can be decoded (Yes in step S66), the reproduction control unit 315 proceeds to the process of step S67. If there is no picture that can be decoded (No in step S66), the reproduction control unit 315 proceeds to step S67. The process returns to S62.

  In step S67, the reproduction control unit 315 acquires the current STC as the first current time value for update from the system time counter 104. The value of STC acquired in step S67 is “TD3”.

  Next, the playback control unit 315 determines whether or not the STC (TD3) acquired in step S67 matches the DTS (TB3) acquired in step S64 (S68). Then, the reproduction control unit 315 proceeds to the process of step S69 if they match (Yes in step S68), and returns to the process of step S67 if they do not match (No in step S68).

  In step S69, the decode start time update unit 319 increments the first update time count indicating the elapsed time from the PCR (TA3) set in the system time counter 104 in step S61 to the first update current time value. A value (TE3) is calculated. For example, the first update time count-up value (TE3) is calculated by subtracting the PCR (TA3) set in step S61 from the STC (TD3) acquired in step S67.

  Next, the decode start time updating unit 319 determines the decode start count-up value (TF3) based on the first update time count-up value (TE3) calculated in step S69 (S70). For example, the decode start count-up value (TF3) is a value obtained by subtracting a predetermined “α” value from the first update time count-up value (TE3). The “α” value may be determined in advance so as to be smaller than the first update time count-up value (TE3).

  Next, the decode start time updating unit 319 specifies a record in which the service ID corresponding to the switching destination channel is stored in the service ID column DSTT1 in the decode start time table DSTT stored in the storage unit 111, The decoding start count-up value (TF3) determined in step S70 is stored in the decoding start count-up value column DSTT2 of the identified record (S71). The decode start time updating unit 319 starts decoding when the service ID corresponding to the switching destination channel is not stored in the service ID column DSTT1 in the decode start time table DSTT stored in the storage unit 111. A new record is created in the time table DSTT, and the service ID corresponding to the switching destination channel and the decode start count-up value (TF3) determined in step S70 are stored in the created record.

  The decoding start time information update process shown in FIG. 13 may be executed at the time of channel scan operations such as initial scan and rescan, for example.

  Further, the decode start count-up value of the decode start time table DSTT in the first and second embodiments may be determined in advance by executing the above-described decode start time information update process for each service ID. . By doing in this way, the decoding start time update unit 319 can generate the decoding start time table DSTT in the first embodiment and the second embodiment.

  As described above, the video display apparatus 300 according to Embodiment 3 can optimize the decode start count-up value registered in the decode start time table DSTT in accordance with the latest broadcast signal. Even when the TS state changes, it is possible to shorten the time from the user's channel selection operation to the display of the channel selection destination video.

Embodiment 4 FIG.
FIG. 14 is a block diagram schematically showing the configuration of the video display apparatus 400 according to the fourth embodiment. The video display device 400 includes an input terminal 101, a tuner unit 102, a demultiplexer unit 103, a system timekeeping unit 104, a playback unit 105, a frame buffer unit 109, an output terminal 110, a storage unit 211, And a control unit 414. The video display device 400 according to the fourth embodiment is different from the video display device 200 according to the second embodiment in a control unit 414.

  The control unit 414 controls processing in the video display device 400. The control unit 414 includes a reproduction control unit 415, a decode start time conversion unit 116, a regular time setting unit 217, a decode start time update unit 419, and a display start time update unit 420. The control unit 414 in the fourth embodiment is the control in the second embodiment in that processing in the reproduction control unit 415 and a decode start time update unit 419 and a display start time update unit 420 are further provided. This is different from the part 214.

The reproduction control unit 415 performs processing similar to that of the second embodiment, and performs processing for updating the decoding start time information DSTD stored in the storage unit 211 together with the decoding start time updating unit 419. Further, the update control unit 416 performs a process of updating the display start time information PSTD stored in the storage unit 211 together with the display start time update unit 420. These processes will be described with reference to FIG.
Similarly to the decoding start time updating unit 319 in the third embodiment, the decoding start time updating unit 419 performs a process of updating the decoding start time information DSTD stored in the storage unit 211 together with the reproduction control unit 415.
The display start time update unit 420 performs a process of updating the display start time information PSTD stored in the storage unit 211 together with the reproduction control unit 415.

  Next, the display start time information update process in the fourth embodiment will be described with reference to FIG. FIG. 15 is a flowchart showing display start time information update processing in the fourth embodiment.

  First, when channel switching occurs, the playback control unit 415 controls the tuner unit 102 to receive the broadcast signal of the switching destination channel. The broadcast signal of the switching destination channel is demodulated by the tuner unit 102, and the TS generated from the broadcast signal is given to the demultiplexer unit 103. Then, the demultiplexer unit 103 extracts the PCR packet together with the video data packet and the audio data packet, and the reproduction control unit 415 acquires the PCR (S80). The PCR value acquired in step S80 is “TA4”.

  Next, when the reproduction control unit 415 sets the acquired PCR (TA4) in the system timekeeping unit 104, the system timekeeping unit 104 starts counting the STC (S81).

  Next, when the video data packet is input to the reproduction unit 105 (Yes in step S82), the PES processing unit 106 determines whether or not a PES header is stored in the video data packet (S83). If the PES header is stored (Yes in Step S83), the PES processing unit 106 proceeds to the process of Step S84. If the PES header is not stored (No in Step S83), the PES processing unit 106 proceeds to Step S84. The process proceeds to S85.

  In step S84, the playback control unit 415 analyzes the PES packet header of the video data packet and acquires DTS, PTS, and other control information. The value of DTS acquired in step S84 is “TB4”, and the value of PTS is “TC4”.

  In step S85, the PES processing unit 106 temporarily stores the video data stored in the video data packet in the decode buffer unit 107.

  Next, the reproduction control unit 415 determines whether or not a picture that can be decoded exists in the video data stored in the decode buffer unit 107 based on information obtained by analyzing the PES packet header (S86). . If there is a picture that can be decoded (Yes in step S86), the reproduction control unit 415 proceeds to the process of step S87. If there is no picture that can be decoded (No in step S86), the reproduction control unit 415 proceeds to step S87. The process returns to S82.

  In step S87, the playback control unit 415 obtains the current STC from the system time counter 104 as the first current time value for update. The value of STC acquired in step S87 is “TD4”.

  Next, the playback control unit 415 determines whether or not the STC (TD4) acquired in step S87 matches the DTS (TB4) acquired in step S84 (S88). Then, the reproduction control unit 415 proceeds to the process of step S89 when they match (Yes in step S88), and returns to the process of step S87 when they do not match (No in step S88).

  In step S89, the decode start time update unit 419 increments the first update time count indicating the elapsed time from the PCR (TA4) set in the system time counter 104 in step S81 to the first update current time value. A value (TE4) is calculated. For example, the first update time count-up value (TE4) is calculated by subtracting the PCR (TA4) set in step S81 from the STC (TD4) acquired in step S87.

  Next, the decode start time updating unit 419 determines the decode start count-up value (TF4) based on the first update time count-up value (TE4) calculated in step S89 (S90). For example, the decode start count-up value (TF4) is a value obtained by subtracting a predetermined “α” value from the update time count-up value (TE4).

  Next, the decode start time update unit 419 identifies the record in which the service ID corresponding to the switching destination channel is stored in the service ID column DSTT1 in the decode start time table DSTT stored in the storage unit 211, The decoding start count-up value (TF4) determined in step S90 is stored in the decoding start count-up value column DSTT2 of the identified record (S91). The decode start time updating unit 419 starts decoding when the service ID corresponding to the switching destination channel is not stored in the service ID column DSTT1 in the decode start time table DSTT stored in the storage unit 211. A new record is created in the time table DSTT, and the service ID corresponding to the switching destination channel and the decode start count-up value (TF4) determined in step S90 are stored in the created record.

  Next, the playback control unit 415 causes the decoding buffer unit 107 to output the video data to be decoded to the decoding unit 108, and causes the decoding unit 108 to decode the video data (S92).

  Then, the decoding unit 108 temporarily stores the video signal generated by decoding the video data in the frame buffer unit 109 (S93).

  When the video signal is stored in the frame buffer unit 109, the playback control unit 415 acquires the current STC from the system timekeeping unit 104 as the second current time value for update (S94). The value of STC acquired in step S94 is “TG4”.

  Next, the playback control unit 415 determines whether or not the STC (TG4) acquired in step S94 matches the PTS (TC4) acquired in step S84 (S95). The reproduction control unit 415 proceeds to the process of step S96 when they match (Yes in step S95), and returns to the process of step S94 when they do not match (No in step S95).

  In step S96, the display start time update unit 420 counts up the second update time indicating the elapsed time from the PCR (TA4) set in the system time counter 104 in step S81 to the second current time value for update. A value (TH4) is calculated. For example, the second update time count-up value (TH4) is calculated by subtracting the PCR (TA4) set in step S81 from the STC (TG4) acquired in step S94.

  Next, the display start time updating unit 420 determines the display start count-up value (TJ4) based on the second update time count-up value (TH4) calculated in step S97 (S97). For example, the display start count-up value (TJ4) is a value obtained by subtracting a predetermined “β” value from the second update time count-up value (TH4). The “β” value may be determined in advance so as to be smaller than the second update time count-up value (TH4).

  Next, the display start time update unit 420 specifies a record in which the service ID corresponding to the channel to be switched is stored in the service ID column PSTT1 in the display start time table PSTT stored in the storage unit 211, The display start count-up value (TJ4) determined in step S97 is stored in the display start count-up value field PSTT2 of the specified record (S98). The display start time updating unit 420 starts the display when the service ID corresponding to the switching destination channel is not stored in the service ID column PSTT1 in the display start time table PSTT stored in the storage unit 211. A new record is created in the time table PSTT, and the service ID corresponding to the switching destination channel and the display start count-up value (TJ4) determined in step S97 are stored in the created record.

  The display start time information update process described above may be executed during a channel scan operation such as an initial scan or a rescan.

  In addition, the display start count-up value of the display start time table PSTT in Embodiment 2 may be determined in advance by executing the display start time information update process described above for each service ID. By doing so, the display start time updating unit 420 can generate the display start time table PSTT in the second embodiment.

  As described above, the video display device 400 according to the fourth embodiment can optimize the display start count-up value registered in the display start time table PSTT in accordance with the latest broadcast signal. Even when the TS state changes, it is possible to shorten the time from the user's channel selection operation to the display of the channel selection destination video.

Embodiment 5 FIG.
FIG. 16 is a block diagram schematically showing a configuration of a video display apparatus 500 according to the fifth embodiment. The video display device 500 includes an input terminal 101, a tuner unit 102, a demultiplexer unit 103, a system timekeeping unit 104, a playback unit 105, a frame buffer unit 109, an output terminal 110, a storage unit 211, A control unit 514 and an input unit 530 are provided. The video display device 500 according to the fifth embodiment is different from the video display device 400 according to the fourth embodiment in that the processing in the control unit 514 and the input unit 530 are further provided.

  The input unit 530 receives an operation input from the user. For example, the input unit 530 may accept an operation input via a GUI (Graphical User Interface) displayed on a screen of a display device (not shown).

  The control unit 514 controls processing in the video display device 500. The control unit 514 includes a reproduction control unit 415, a decode start time conversion unit 116, a regular time setting unit 217, a decode start time update unit 419, a display start time update unit 420, and a high-speed display mode selection unit 521. Prepare. The control unit 514 in the fifth embodiment is different from the control unit 414 in the fourth embodiment in that a high-speed display mode selection unit 521 is further provided.

For example, when the user selects “high-speed display mode 1”, “high-speed display mode 2” or “high-speed display mode 3” using the input unit 530, the high-speed display mode selection unit 521 switches to the selected mode. At the same time, the decode start count-up value of the decode start time table DSTT and the display start count-up value of the display start time table PSTT are adjusted. For example, when “high-speed display mode 1” is selected, the high-speed display mode selection unit 521 does not adjust these count-up values (leave the default values) and “high-speed display mode 2” is selected. Subtracts these count-up values from the default values by a uniform “γ” value, and when “high-speed display mode 3” is selected, subtracts these count-up values from the default values by a uniform “σ” value. . Here, the “γ” value and the “σ” value may be determined in advance so as to be smaller than the decode start count-up value and the display start count-up value.
Note that the decode start time conversion unit 116, the regular time setting unit 217, and the display start time conversion unit 218 perform respective processes using the count-up values adjusted by the high-speed display mode selection unit 521.

  As described above, according to the video display apparatus 500 according to the fifth embodiment, it is possible to provide the display timing of the picture according to the user's preference, so that the user's satisfaction can be improved.

  100: 200, 300, 400, 500: Video display device, 101: Input terminal, 102: Tuner unit, 103: Demultiplexer unit, 104: System timekeeping unit, 105: Playback unit, 106: PES processing unit, 107: Decode buffer unit 108: Decode unit 109: Frame buffer unit 110: Output terminal 1111, 211: Storage unit 112: Flash ROM 113: RAM 114, 214, 314, 414, 514: Control unit 115 315, 415: reproduction control unit 116: decoding start time conversion unit 117, 217: regular time setting unit 218: display start time conversion unit 319, 419: decoding start time update unit 420: display start time update Part, 521: high-speed display mode selection part, 530: input part.

Claims (20)

A tuner unit that receives a broadcast signal and generates a stream by demodulating the broadcast signal;
A demultiplexer for extracting packets from the stream;
A system time counter for measuring the system time reference value;
A reproduction unit that reproduces a video signal from video data included in the packet in synchronization with the system time reference value;
A frame buffer unit that stores the video signal and outputs the video signal in synchronization with the system time reference value;
A program time base reference value for clocking the synchronization time is acquired from the packet, the program time base reference value is set in the system time clock unit, and the system time clock unit is configured to correspond to the synchronization time. A control unit for measuring the time reference value;
A storage unit that stores decode start time information indicating a decode start count-up value for advancing the time , and
The control unit acquires a program time base reference value included in the packet when a channel is selected , adds the decode start count-up value to the acquired program time base reference value, and Generating a first value for clocking a first time that is ahead of the time, setting the generated first value in the system time clock unit, and setting the first time in the system time clock unit to the first time The system time reference value indicating the time of time is measured, and when the video signal is output from the frame buffer unit, the value of the normal time corresponding to the synchronization time is calculated, and the value of the normal time is calculated. A video display device characterized in that the system time counter is set, and the system time counter is made to measure a system time reference value corresponding to the synchronization time. When the video signal is output from the frame buffer unit, the control unit acquires a system time reference value measured by the system time counting unit as a current time value, and from the acquired current time value, the time count-up value calculated by subtracting the first value, by adding to the obtained program clock reference, to claim 1, characterized in that to calculate the value of the normal time The video display device described. The control unit sets a second value in the system time counting unit for causing the second time to be advanced from the first time when the reproducing unit reproduces the video signal, The video display apparatus according to claim 1, wherein the system time counter is configured to measure a system time reference value indicating the second time. A storage unit for storing display start time information indicating a display start count-up value for advancing the time;
The control unit generates the second value by adding the display start count-up value to the system time reference value measured by the system time counting unit when the reproduction unit reproduces the video signal. The video display device according to claim 3 , wherein: The controller is
When a channel is selected, a program time base reference value included in the packet is acquired,
When the reproducing unit reproduces the video signal, the system time reference value measured by the system time measuring unit is acquired as a first current time value, and the first value is calculated from the first current time value. To calculate the first time count-up value,
When the video signal is output from the frame buffer unit, a system time reference value measured by the system time counter is acquired as a second current time value, and the second current time value is used to obtain the second time value. The second time count-up value is calculated by subtracting the value of
The obtained program clock reference, by adding the first time count-up value and the second time count-up value, according to claim 3 or 4, characterized in that to calculate the value of the normal time The video display device described in 1. The controller is
When a channel is selected, a program time base reference value included in the packet is acquired,
When the reproducing unit reproduces the video signal, the system time reference value measured by the system time measuring unit is acquired as a first current time value for update,
Subtracting the acquired program time base reference value from the first update current time value to calculate a first update time count-up value;
Determining a decoding start count-up value for updating which increases as the first updating time count-up value increases;
Video display according to the decoding start count-up value, to claim 1 or 2, characterized in that updating the decoding start count-up value for the update. The video display device according to claim 6 , wherein the control unit updates the decode start count-up value during a channel scan process. The controller is
When a channel is selected, a program time base reference value included in the packet is acquired,
When the video signal is output from the frame buffer unit, the system time reference value clocked by the system time clock unit is acquired as a second current time value for update,
A second update time count-up value is calculated by subtracting the acquired program time base reference value from the second update current time value;
Determining a display start count-up value for updating that increases as the second update time count-up value increases;
The video display device according to claim 4 , wherein the display start count-up value is updated with the update display start count-up value. The video display device according to claim 8 , wherein the control unit updates the display start count-up value during a channel scan process. An input unit for receiving an input of a high-speed display mode to be selected from a plurality of predetermined high-speed display modes;
Wherein, in response to the high-speed display mode said selected video display according to any one of claims 1, 2, 6 and 7, characterized in that to change the decoding start count-up value apparatus. An input unit for receiving an input of a high-speed display mode to be selected from a plurality of predetermined high-speed display modes;
Wherein, in response to the high-speed display mode said selected video display according to any one of claims 4, 8 and 9, characterized in that to change the display start count-up value. A tuner unit that receives a broadcast signal and generates a stream by demodulating the broadcast signal;
A demultiplexer for extracting packets from the stream;
A system time counter for measuring the system time reference value;
A reproduction unit that reproduces a video signal from video data included in the packet in synchronization with the system time reference value;
A frame buffer unit that stores the video signal and outputs the video signal in synchronization with the system time reference value;
A program time base reference value for clocking the synchronization time is acquired from the packet, the program time base reference value is set in the system time clock unit, and the system time clock unit is configured to correspond to the synchronization time. A control unit for measuring the time reference value;
A video display method performed by a video display device comprising: a storage unit that stores decode start time information indicating a decode start count-up value for advancing time ,
When the channel is selected, the control unit acquires a program time base reference value included in the packet, adds the decode start count-up value to the acquired program time base reference value, and Generating a first value for clocking a first time that is ahead of the time, setting the generated first value in the system time clock unit, and setting the first time in the system time clock unit to the first time Decoding start time conversion process for measuring the system time reference value indicating the time of
When the video signal is output from the frame buffer unit, the control unit calculates a normal time value corresponding to the synchronization time, sets the normal time value in the system time counter, and A video display method, comprising: a normal time recovery process for causing a system time counter to measure a system time reference value corresponding to the synchronization time. In the normal time recovery process, when the video signal is output from the frame buffer unit, the control unit acquires, as the current time value, a system time reference value measured by the system time counter. Calculating the value of the normal time by adding the time count-up value calculated by subtracting the first value from the obtained current time value to the acquired program time base reference value. The video display method according to claim 12 , characterized in that: The control unit sets a second value in the system timekeeping unit for timing a second time that is advanced from the first time when the reproduction unit reproduces the video signal, The video display method according to claim 12 , further comprising a display start time conversion step of causing the system time counter to measure a system time reference value indicating the second time. The video display device further includes a storage unit that stores display start time information indicating a display start count-up value for advancing the time,
In the display start time conversion process, the control unit adds the display start count-up value to the system time reference value measured by the system time counter when the reproducing unit reproduces the video signal. The video display method according to claim 14 , wherein the second value is generated. When the control unit acquires a program time base reference value included in the packet when a channel is selected;
When the reproduction unit reproduces the video signal, the control unit obtains a system time reference value measured by the system time counting unit as a first current time value, and from the first current time value, Calculating a first time count-up value by subtracting the first value;
When the video signal is output from the frame buffer unit, the control unit acquires a system time reference value clocked by the system time clock unit as a second current time value, and the second current time Calculating a second time count-up value obtained by subtracting the second value from the value;
In the normal time recovery process, the control unit adds the first time count-up value and the second time count-up value to the acquired program time base reference value, thereby obtaining the value of the normal time. display method of claim 14 or 15, characterized in that calculating. When the control unit acquires a program time base reference value included in the packet when a channel is selected;
A step of acquiring, as the first current time value for updating, a system time reference value measured by the system time counting unit when the reproducing unit reproduces the video signal;
The controller calculates a first update time count-up value by subtracting the acquired program time base reference value from the first update current time value;
The controller determines a decoding start count-up value for updating that increases as the first updating time count-up value increases;
The control section, the decoding start count-up value, said a process of updating the decoding start count-up value for the update, to claim 12 or 13, further comprising a decoding start time information updating process with a The video display method described. When the control unit acquires a program time base reference value included in the packet when a channel is selected;
The control unit, when the video signal is output from the frame buffer unit, obtaining a system time reference value clocked by the system time clock unit as a second update current time value;
The controller calculates a second update time count-up value by subtracting the acquired program time base reference value from the second update current time value;
The control unit determining a display start count-up value for updating which increases as the second update time count-up value increases;
The display unit according to claim 15 , further comprising: a display start time information update step, wherein the control unit includes a step of updating the display start count-up value with the display start count-up value for update. Video display method. The video display device further includes an input unit that receives an input of a high-speed display mode to be selected from a plurality of predetermined high-speed display modes,
The control unit according to any one of claims 12 , 13 and 17 , further comprising a step of changing the decode start count-up value in accordance with the selected high-speed display mode. Video display method. The video display device further includes an input unit that receives an input of a high-speed display mode to be selected from a plurality of predetermined high-speed display modes,
The video display method according to claim 15 or 18 , further comprising a step in which the control unit changes the display start count-up value in accordance with the selected high-speed display mode.

Images