JP5738811B2 - Inter-object communication device in multi-processing system - Google Patents

Description

The present invention relates to an inter-object communication apparatus in a multiprocessing system, and more particularly to an inter-object communication apparatus suitable for use in an asymmetric multiprocessing system.

  Multi-core processors and multi-processors are used in order to overcome the limitations on performance improvement of a single-core processor alone due to an increase in leakage current and power consumption.

  In an embedded system, an asymmetric multiprocessing (AMP) system is used to improve cost performance and reduce power consumption. In the AMP system, a function is defined for each processor core according to the system, and a unique program is executed in each processor core.

  At this time, the processor cores in the multi-core processor communicate with each other via a multi-core communication API (MCAPI (registered trademark): Multicore Communications Application Program Interface), an OS (operating system) (sometimes not via the OS), and middleware. The processors communicate with each other via a PCIexpress (PCIe) device driver that connects them and the OS.

JP 2009-258937 A

  For this reason, in communication between user nodes (objects in an application) between processor cores, a different communication method must be selected according to the hardware configuration, which is complicated in programming.

  Further, in the improvement of the hardware or software of the multiprocessing system, if the arrangement of communication destination nodes is different, the software configuration of communication between user nodes needs to be changed accordingly.

In view of such problems, an object of the present invention is to provide an inter-object communication apparatus capable of performing inter-object communication without changing the software configuration even if the communication destination nodes are arranged differently in a multiprocessing system. It is to provide.

In any of the first to fourth aspects of the inter-object communication device in the multiprocessing system according to the present invention, a parent node having a user node as a child node as an application layer object in a memory space coupled to each of a plurality of processor cores The node object is set as the first node in the middleware layer for each same memory space, and the parent node object whose child node is the first node is set as the second node in the memory space of any of the first nodes. In the middleware layer, each node of the tree including the user node, the first node, and the second node is set with an address that can distinguish the parent-child relationship by value, and the destination address and the source address are used as headers. The packet that contains it is routed between the parent and child nodes of the tree It is packet routing means are provided.

  There are the following methods (A) to (C) for arranging the name resolution table.

  (A) Only each user node has a name resolution table.

  (B) Only the root node has a name resolution table.

  (C) Each node other than the user node is provided with a name resolution table regarding the node and the descendant nodes.

The first to third aspects of the inter-object communication device in the multiprocessing system according to the present invention correspond to the above (A) to (C), respectively.

In the first aspect, the packet routing means of each user node of the tree includes a name resolution table that associates the name of each user node with its address, performs name resolution processing before routing processing, and performs the name resolution In processing,
When a name is used in place of the destination address or source address of the header, if the name exists on the name resolution table, the name is converted into an address and the header name is replaced with the address. If not, an exception error is generated in the operating system.

In the second aspect, the packet routing means other than the root node of the tree does not have a name resolution table, and if the name is used instead of the transmission destination address or the transmission source address of the header, the packet routing means Forward to the node's parent node,
The packet routing means of the route node includes a name resolution table that associates the name and address of each user node, and performs name resolution processing before routing processing. In the name resolution processing,
When a name is used in place of the destination address or source address of the header, if the name exists on the name resolution table, the name is converted into an address and the header name is replaced with the address. If not, an exception error is generated in the operating system.

In a third aspect, the packet routing means of a node other than the user node of the tree includes a name resolution table that associates the names and addresses of the own node and all of its descendant nodes,
The packet routing means of each user node forwards the packet to the parent node of its own node when a name is used instead of the transmission destination address or the transmission source address of the header,
The packet routing means other than the user node of the tree performs name resolution processing before routing processing, and in the name resolution processing,
When a name is used in place of the destination address or source address of the header, if the name exists on the name resolution table, the name is converted into an address and the header name is replaced with the address. If the name does not exist in the name resolution table and the parent node of the own node exists, the packet is forwarded to the parent node, and the name does not exist in the name resolution table and the parent node If does not exist, raise an exception error in the operating system.

  The fourth aspect of the present invention may be any of the above (A) to (C).

In this fourth aspect, the packet routing means of each node of the tree performs name resolution processing before routing processing, and in the name resolution processing,
When a name is used in place of the destination address or source address of the header, if the name exists on the name resolution table, the name is converted into an address and the header name is replaced with the address. When the name does not exist on the name resolution table or the name resolution table does not exist on the own node,
If the parent node of the own node exists, the packet is transferred to the parent node, and if the parent node does not exist, an exception error is generated in the operating system.

  In any of the first to fourth aspects, referring to the name resolution table, the source and destination names in the packet header are converted into addresses, so that the software configuration can be changed even if the arrangement of the communication destination nodes is different. There is an effect that communication between objects can be performed without changing.

  According to the structure of the said 1st aspect, there exists an effect that name resolution can be performed in the transmission source node which is one of the user nodes.

  According to the configuration of the second aspect, only the root node needs to have the name resolution table, and the memory capacity required for the entire system can be reduced.

  According to the configuration of the third aspect, it is possible to reduce the memory capacity required for the entire system than in the case of the first aspect, and it is not necessary to transfer the packet to the root node for name resolution. There is an effect that high-speed communication is possible compared to the case of the second mode.

  According to the configuration of the fourth aspect, there is an effect that it is not necessary to change the configuration of the packet routing means even if the arrangement of the name resolution table is changed.

  In any of the above aspects, the nodes other than the user node of the tree are arranged in the middleware layer that can conceal the part depending on the communication method below the OS layer, and each node of the tree has a parent and child by value. An address that can distinguish the relationship is set, and the concealment is realized by routing a packet including the destination address and the source address in the header between the parent and child nodes of the tree. There is an effect that programming can be performed by a communication method that does not depend.

  Other objects, characteristic configurations and effects of the present invention will become apparent from the following description read in connection with the appended claims and the drawings.

BRIEF DESCRIPTION OF THE DRAWINGS It is a schematic block diagram which shows the multiprocessing system of Example 1 with which the communication apparatus between objects in a multiprocessing system of this invention is applied. It is a schematic hierarchical structure figure from an application layer to a hardware layer. It is a tree diagram of a node which is a communication object between user nodes concerning Example 1 of an inter-object communication device in a multiprocessing system of the present invention. It is a format schematic diagram of the transmission object packet in communication between user nodes. It is a schematic flowchart which shows the packetization process of data. (A) is a figure which shows the name resolution table of the leaf node or root node of FIG. 3, (B)-(D) is a figure which shows the routing table of the nodes N10, N20, and N30 of FIG. 3, respectively. It is a schematic flowchart which shows the routing process which arbitrary nodes other than a leaf node transfer the packet in the forwarding buffer to the next node. (A) and (B) are diagrams showing the routing tables of the nodes N10 and N00 of FIG. 3, respectively. It is a schematic flowchart which shows a name resolution table preparation procedure. It is a communication object node tree figure which concerns on Example 2 of the communication apparatus between objects in a multiprocessing system of this invention. It is a schematic block diagram which shows the multiprocessing system with which Example 3 of the communication apparatus between objects in a multiprocessing system of this invention is applied. FIG. 12 is a communication object node tree diagram corresponding to FIG. 11. It is a communication object node tree figure of Example 4 of this invention. It is a schematic flowchart which shows the routing process which arbitrary nodes other than a leaf node transfer the packet in the forwarding buffer to the next node. (A)-(C) is a routing table schematic block diagram of node N110 of FIG. 13, N100, and N000, respectively. It is a schematic explanatory drawing of the transfer packet memory | storage part. It is a schematic explanatory drawing of the transfer packet memory | storage part. It is a functional block diagram of packet transmission / reception regarding nodes N10 and N00 arranged in the same memory space.

FIG. 1 is a schematic diagram illustrating a multiprocessing system according to a first embodiment to which an inter-object communication device in a multiprocessing system according to the present invention is applied.

  In this system, the multi-core processor 01 and the single-core processor 02 are coupled by PCIe. The multi-core processor 01 includes a processor core 10 and a processor core 20, and they are connected by an internal bus (not shown). The processor core 30 of the single core processor 02 is coupled to the internal bus of the multicore processor 01 by PCIe.

  FIG. 2 shows a schematic hierarchical structure from the application layer to the hardware layer.

  In the OS layer and below, communication between the processor cores 10 and 20 is performed by the above-described MCAPI as in the prior art, and between the processor core 10 and the processor core 30 and between the processor core 20 and the processor core 30. The communication is performed by PCIe.

In the first embodiment, by providing an inter-object communication device, which will be described later, in communication between user nodes (nodes that are objects in the user application), without selecting the communication method of MCAPI and PCIe, that is, the communication partner Unified communication can be performed without considering the position on the hardware.

  In FIG. 3, user nodes N <b> 11 and N <b> 12 that are leaf nodes are both objects in the application layer arranged in a memory space coupled to (accessible by) the processor core 10. These objects may belong to different applications or may belong to the same application. This also applies to the following.

  Similarly, user nodes N21 and N22, which are leaf nodes, are objects in the application layer arranged in a memory space coupled to the processor core 20, respectively. The user nodes N31 and N32 that are leaf nodes are objects in the application layer arranged in the memory space coupled to the processor core 30.

  There are 6 × 5/2 = 15 communication paths between these six objects, and the number of communication paths increases as the number of communication objects increases. In addition, when direct communication is performed between objects in application layers having different memory spaces, it is not easy to generalize the configuration.

  Therefore, arbitrary inter-leaf communication is performed by combining inter-node communication having a tree structure as shown in FIG. That is, communication is performed between user nodes in the application layer by sequentially transferring buckets between parent and child nodes connected at the edge. The nodes connected at the edge know each other's existence, indicating that data can be transmitted between these nodes.

  Nodes N10, N20, and N30 are communication objects in the middleware layer that are arranged in the memory space coupled to the processor cores 10, 20, and 30 of FIG. The root node N00 is a virtual node, and is a memory space coupled to any one of the processor cores 10, 20, and 30 (preferably a processor core that is assumed to have the largest amount of inter-processor communication among them). It is a communication object in the middleware layer arranged inside.

  Objects in the application layer that are placed in the same memory space can be directly communicated with each other easily. However, objects in the same memory space can be placed in different memory spaces due to future system changes. Regardless of whether or not they are arranged, communication using the tree structure of FIG. 3 may be performed uniformly.

  Since leaf nodes (transfer source and transfer destination nodes) are connected only to their parent nodes, the transfer destination is always the parent node. A node other than the leaf node (intermediate node) refers to the routing table and determines one of the nodes adjacent to each other via an edge to be transferred next from its own node address and transfer destination address. At this time, if the node address is determined so that the parent / child relationship of the node, the leaf node, and the root node can be determined from the address value, the amount of information in the routing table can be reduced. Since the number of table references can be reduced, the processing can be speeded up.

  If the address of the node Nij in FIG. 3 is [i, j], ij is determined so as to satisfy the above condition. That is, the node Nij is a leaf node having a depth of 2 when i ≠ 0 and j ≠ 0, the parent node is j = 0, and the further parent node is the root node N00 where i = 0. It is. The root node has no parent node. Other than the root node, since there is one parent node (one edge climbing up), the parent node is not selected.

  The node address [i, j] is, for example, 8 bits when i and j are each represented by 4 bits, and can represent a maximum of 256 nodes.

  Next, an example of data transmission between leaf nodes will be described. In the following, it is assumed that the own node address is [i, j] and the transfer destination address is [i2, j2].

  For example, when data is transmitted from the node N11 to the node N12, since there is no child node in the leaf node N11, the data is transmitted from the node N11 to the parent node N10 where j = 0. Since the node N10 is coupled to the transfer destination node N12 that is the child node, the node N10 transfers this data to the node N12.

  Next, when transmitting data from the node N11 to N32, since there is no child node in the node N11, data is transmitted from the node N11 to the parent node N10 where j = 0. Since i ≠ i2 and there is no transfer destination node N32 in the child node of the node N10, the data is transferred to the root node N00 which is the parent node where i = 0. Data is transferred from the root node N00 to the node N30 in which j2 of the transfer destination node N32 is set to 0. Next, the data is transferred to the child node N32 where j = 2.

  In general, the packet of the destination node node Ni2j2 is routed by the following rule in the own node Nij.

  (1) If i = i2 and j = j2, it is received as data addressed to the own node.

  (2) When the own node is a root node (i = 0, j = 0), if a child node address CA = [i2, 0] exists in the routing table, data is transferred to this child node. When the own node is a node having a depth of 1 (i ≠ 0, j = 0), if the destination child node address CA = [i2, j2] exists in the routing table, data is transferred to this child node. .

  (3) In other cases, if the parent node exists, that is, if the own node is not the root node, to the address PA of the parent node, that is, if the own node is a leaf node (i ≠ 0, j ≠ 0) For example, if PA = [i, 0], if the node is a node having a depth of 1 (i ≠ 0, j = 0), the data is transferred to the root node of the parent node address PA = [0, 0]. .

  When data is transferred in parallel from a plurality of leaf nodes to one transfer destination, it is necessary to distinguish them at the transfer destination. Therefore, the header of the transmission target data includes not only the transmission destination node address but also the transmission source node address. Also, assuming that DSmax is the minimum value of the maximum data size that can be transmitted at each node for each reason due to hardware or software reasons, the data size including the header is required when transmitting data with a size exceeding DSmax. Packetization processing is performed in which data is divided so that DSmax does not exceed DSmax and a header is added to each of the data. In this case, a packet sequence number similar to the IP protocol (next packet sequence number = current packet sequence number + number of bytes of payload of the current packet) is added to the header so that the connection between packets can be determined. .

  FIG. 4 shows the format of a packet used in this system. A packet is defined by adding a destination and source node address and a packet sequence number as a header to a payload.

  Packetization and depacketization are performed only at the leaf node of the application layer.

  FIG. 5 is a schematic flowchart showing data packetization processing. In the following, the step identification codes in the figure are shown in parentheses.

  (S0) If DS = (data size of transfer target data) + (header data size) is DS> DSmax, the process proceeds to step S1, and if not, the process proceeds to step S2.

  (S1) The data is divided so that each divided data satisfies DS ≦ DSmax.

  (S2) A header as shown in FIG. 4 is added to each of the data that is not divided or not, and packetized.

  (S3) These packets are stored in the transfer buffer.

  In FIG. 3, when the position of the leaf node in the tree is changed with the improvement of software or hardware, the address of the communication destination must be changed accordingly. In order to solve this problem, as shown below each leaf node, a name corresponding to the node address is used instead of the address.

  FIG. 6A shows a name resolution table 40A for converting the name of each leaf node into an address. There are the following methods (A) to (C) for arranging the name resolution table.

  (A) The name resolution table 40A is provided only to each leaf node (at least one is provided in the same memory space, and this is referred to by the leaf node).

  In the forwarding node, if a name is used instead of an address in the packet header, the name in the header is changed to an address (name resolution) with reference to the name resolution table 40A. According to this method, the name can be resolved at the packet transmission source node, but the memory usage of the entire system increases in proportion to the number of leaf nodes.

  (B) Only the root node has the name resolution table 40A.

  In this case, the name must be resolved by transferring the packet to the root node.

  (C) Each node other than the leaf node is provided with a name resolution table regarding the node and descendant nodes.

  More specifically, N00 in FIG. 3 has the name resolution table 40A in FIG. 6A, and the name resolution in FIG. 6B to FIG. Tables 40B to 40D are provided. At each node having a name resolution table, if the name is not resolved, name resolution is attempted. If it is resolvable, it is resolved. If it is not resolved, the packet is forwarded to the parent node.

  FIG. 7 is a schematic flowchart showing a routing process in which an arbitrary node transfers a packet in its transfer buffer to the next node. Each node (object) in FIG. 3 has a program for this processing. The arrangement of the name resolution table may be any of the above (A) to (C).

  Each node includes a transfer queue, and this process is started in response to an event that occurs when the transfer queue changes from an empty state to a state where one element is added.

  Every time a head element is taken out from this transfer queue, the processing from step S10 is performed.

  (S10) The transfer destination address DA and the own node address SA or their names are acquired from the packet header.

  (S11) If the acquired address is the address of the transfer source and transfer destination, the process proceeds to step S14, and if the name is included, the process proceeds to step S12.

  (S12) If there is something in the name resolution table of the own node that matches the acquired one, it is converted into an address and the contents of the header are rewritten. If the node does not have a name resolution table, it is considered that there is no match.

  (S13) If the transfer destination name has been resolved, the process proceeds to step S15; otherwise, the process proceeds to step S14.

  (S14) If the local node is the root node, the process proceeds to step S1C; otherwise, the process proceeds to step S1B.

  (S15) If the transfer destination address DA is equal to the own node address SA (if i = i2, j = j2), the process proceeds to step S16; otherwise, the process proceeds to step S17.

  (S16) This packet is stored in the reception buffer addressed to its own node, and the process proceeds to step S1D.

  (S17) Logically from the value of the transfer destination address DA, the transfer destination address DA is a descendant node address of the own node address SA (i = 0, 0 <i2, or i = i2, j = 0, 0 <j2) It is determined whether or not. If the determination is affirmative, the process proceeds to step S18, and if not, the process proceeds to step S1A.

  (S18) The address CA (CA = [i2,0] or CA = [i2, j2]) of the child node of the own node including the descendant node in step S17 exists as a child node address on the routing table of the own node. If so, the process proceeds to step S19; otherwise, the process proceeds to step S1C.

  (S19) The packet is transferred to the address CA of the child node determined to exist in step S18, and the process proceeds to step S1D.

  (S1A) If a parent node exists, that is, if the own node address SA is not the root node, the process proceeds to step S1B, and if not, the process proceeds to step S1C.

  (S1B) The packet is transferred to the parent node address PA (PA = [i, 0] if i ≠ 0, j ≠ 0, PA = [0,0] if i ≠ 0, j = 0). The process proceeds to step S1D.

  (S1C) The occurrence of an exception error is notified to the OS, and this packet is discarded. If the application does not process this error, the application stops. If the error is ignored in this process, the process returns to step S10.

  (S1D) If there is a head element in the transfer queue, the process returns to step S10; otherwise, the process of FIG. 7 is terminated.

  In step S19 or step S1B, the communication interface method is selected with reference to the routing table, and the transfer destination address is converted and transferred accordingly. That is, by performing this process in the middleware layer, only the address [i, j] needs to be used in the application layer.

  8A and 8B show the routing tables of the nodes N10 and N00 in FIG. 3, respectively. In each table, NULL indicates that no value exists. The child node interface (I / F) method and the parent node interface method indicate interface methods from the own node to the child node and from the own node to the parent node, respectively. Packet transfer (movement of packet or reference thereof), when the value is 1, packet transfer by MCAPI between processor cores in the same processor, and when the value is 2, packet transfer by PCIe between different processors . When there are a plurality of child nodes, each child node interface method is described by separating it with a delimiter /. The interface attribute of the child node and the parent node is an attribute value necessary for communication by the above method. When this value is NULL, it indicates that the packet is transferred by a predetermined method. Further, when the value of the parent node / child node interface method is NULL, it indicates that the parent node / child node does not exist.

  In FIG. 8B, when the interface method is 1 or 2, the interface attribute is described as X1 or Y1, respectively. These X1 and Y1 are reference values, and attributes are described in the data blocks (structures) referenced by them.

  The routing table is created, for example, by causing the program to interactively set the processor and converting it into an XML file.

  FIG. 9 is a schematic flowchart showing a procedure for automatically creating a name resolution table and automatically distributing it to other than leaf nodes. This process is executed in the initialization process of the multiprocessing system.

  (S20) The address of each node is determined. For example, in FIG. 3, the addresses of the nodes N10, N20, and N30 corresponding to each processor core are determined in the order of processor core detection, and the address of the root node that is the parent node is set to [0.0]. The root node is placed in the memory space of the first detected processor core, or the user selects a processor core and is placed in the memory space of the processor core. The leaf node declared in each application is set as a child node of the parent node N10, N20 or N30 in the same memory space, and its address is determined in the same manner as in FIG.

  (S21) Each leaf node associates the name of the leaf node declared in the application with the address determined in step S20.

  (S22) Each leaf node transmits a packet in which the destination address is the root node address [0, 0], the source address is the local node address, and the payload includes the name of the local node.

  (S23) The root node receives the packet transmitted in step S22, and creates name resolution tables 40A to 40D as shown in FIGS.

  (S24) The root node stores the name resolution table 40A for its own node, and distributes the name resolution tables 40B to 40D to the nodes N10, N20, and N30, respectively. Each of the nodes N10, N20, and N30 stores the received name resolution table for its own node.

  According to the first embodiment, a tree of communication object nodes is configured in the entire multiprocessing system, and other than leaf nodes in the application layer are arranged in the middleware layer, and packet communication is performed by tracing the nodes on the tree. In multi-processing systems having various configurations, it is possible to perform communication between user nodes with a relatively simple configuration and without being aware of hardware such as a communication method and a communication path.

  Packets can be sent using the name instead of the address between leaf nodes, so even if the position of the leaf node in the tree is changed due to software or hardware improvements, communication is performed accordingly. There is an effect that it is not necessary to change the previous address.

  In the flowchart of FIG. 7, the above (A) to (C)

FIG. 10 shows a communication object node tree according to Embodiment 2 of the inter-object communication device in the multiprocessing system of the present invention.

  In this tree, an interface node for simplifying a communication procedure with a leaf node in the application layer is inserted between nodes of depths 2 and 3 in FIG. In general, when the depth of the node tree is n, the number of digits of the address (the number of numbers delimited by “,” in []) is n, and in this case, n = 3. Similar to the first embodiment, the address of the node Nijk is [i, j, k].

  The node root nodes N000, N100, N200, and N300 having depths 0 and 1 are different from the root nodes N00, N10, N20, and N30 in FIG.

  In general, the own node Nijk routes the packet of the transmission destination node node Ni2j2k2 according to the following rules.

  (1a) If i = i2, j = j2, and k = k2, the data is received as data addressed to the own node.

  (2a) When the local node is a root node (i = 0, j = 0, j = 0), if a child node address CA = [i2, 0, 0] exists in the routing table, data is transmitted to this child node. Forward. When the own node is a node having a depth of 1 (i ≠ 0, j = 0, j = 0), if a child node address CA = [i2, j2, 0] exists in the routing table, data is transmitted to this child node. Forward. When the own node is a node of depth 2 (i ≠ 0, j ≠ 0, j = 0), if a child node address CA = [i2, j2, k2] exists in the routing table, data is transmitted to this child node. Forward.

  (3a) In other cases, if a parent node exists, that is, if the own node is not a root node, the address PA of the parent node, that is, the own node is a leaf node (i ≠ 0, j ≠ 0, k ≠ 0) to the parent node address PA = [i, j, 0], and if the self node is a node having a depth of 2 (i ≠ 0, j ≠ 0, k = 0), the parent node address PA = [i , 0, 0], if the node is a node having a depth of 1 (i ≠ 0, j = 0, k = 0), the data is sent to the root node of the parent node address PA = [0, 0, 0]. Forward.

  The routing process of FIG. 7 can be easily understood in consideration of the rules (1a) to (1c) described above, and the description thereof is omitted.

  Packetization and depacketization are performed at the interface node. This interface node also performs the routing process of FIG.

  The other points are the same as in the first embodiment.

FIG. 11 is a schematic diagram showing a multiprocessing system to which the third embodiment of the inter-object communication device in the multiprocessing system of the present invention is applied.

  This system includes four multi-core processors 100, 200, 300 and 400. The multi-core processor 100 is coupled between the processor cores 110, 120, 130, and 140 via an internal bus, the multi-core processor 200 is coupled between the processor cores 210, 220, 230, and 240 via an internal bus, and the multi-core processor 300 is The processor cores 310, 320, 330, and 340 are coupled by an internal bus, and the multi-core processor 400 is coupled by the internal bus between the processor cores 410, 420, 430, and 440. The multi-core processors 100, 200, 300, and 400 are connected by PCIe.

  Similarly to the above, communication between the processor cores in each processor is performed using MCAPI, and communication between different processors is performed using PCIe.

  FIG. 12 shows a communication object node tree corresponding to FIG.

  The address of the node Nijk is [i, j, k]. Among all the nodes Nijk, those whose ijk matches the code of the element in FIG. 11 are nodes corresponding to that element. Further, for example, nodes such as the node N110 and the processor core 110 whose ijk matches the code of the processor core in FIG. 11 are arranged in the memory space coupled to the processor core ijk as in the first embodiment. Communication object in the middleware layer.

  In this tree, a node having a depth of 1 is arranged as a virtual node corresponding to a processor, and this node is a root node of a subtree for each processor. The node of depth 1 reduces the number of edges at the root node N000, avoids congestion of packets at the root node N000, and performs parallel processing of routing by each processor. That is, this depth 1 node is an interface node for this purpose.

  Each virtual node is a communication object in the middleware layer that is arranged in the same memory space as any one of its child nodes. For example, the nodes N000 and N100 are communication objects in the middleware layer arranged in the same memory space as the node N110.

  A leaf node having a depth of 3 is a user node as in the case of FIG.

  Other points are the same as in the first embodiment.

In AMP, in order to improve cost performance and reduce power consumption, a multiprocessing system having various configurations is used, and the configuration changes as the system is improved. However, as can be easily understood from the first to third embodiments, the inter-object communication device in the multiprocessing system of the present invention is a unified method regardless of the system configuration, and depends on the hardware configuration and the type of OS. First, communication can be performed between user nodes.

  FIG. 13 shows a communication object node tree according to the fourth embodiment of the present invention.

  The hardware configuration is the same as in FIG. In this tree, in a node having a depth of 2, nodes corresponding to any two processor cores in the same processor are connected by an edge so that communication can be performed directly between them. It is different from the tree.

  FIG. 14 is a schematic flowchart showing a routing process in which an arbitrary node transfers a packet in its transfer buffer to the next node. Each node in FIG. 14 has a program for this processing independently.

  Each node includes a transfer queue, and this process is started in response to an event that occurs when the transfer queue changes from an empty state to a state where one element is added.

  Every time a head element is taken out from this transfer queue, the processing from step S10 is performed.

  The processing of FIG. 14 differs from that of FIG. 7 in that step S30 is added between step S15 and step S17 corresponding to packet transfer to the sibling node, and further, step S31 and step S32 related thereto. It is a point that is added. Next, this difference will be described.

  If a negative determination is made in step S15, the process proceeds to step S30.

  (S30) Logically, based on the value of the transfer destination address DA, the transfer destination address DA is determined to be the address BA of the own node address SA and a descendant node of the sibling node (the ancestor node of the transfer destination node is the own node address SA and the sibling node). If so, the process proceeds to step S31; otherwise, the process proceeds to step S17. More specifically, whether or not the transfer destination address DA is a descendant node of the node address SA and a sibling node is determined as follows. That is, when the node is a node having a depth of 1 (i ≠ 0, j = 0, j = 0), if the sibling node address BA = [i2, 0, 0] exists in the routing table, this sibling node Transfer data to When the own node is a node of depth 2 (i ≠ 0, j ≠ 0, j = 0), if a sibling node address BA = [i2, j2, 0] exists in the routing table, data is transmitted to this sibling node. Forward.

  (S31) If sibling node address BA is included in the routing table of the own node, the process proceeds to step S32; otherwise, the process proceeds to step S17.

  (S32) The transfer method is determined by referring to the routing table of the own node, the transfer destination address is converted to the address of the method, the packet is transferred to the sibling node address BA, and the process proceeds to step S1C.

  FIGS. 15A to 15C respectively show routing tables of the node N110, the node N100, and the route node N000 of FIG. The configuration of this table is obtained by adding the address of the sibling node coupled to the node, the interface method of communication to the node, and the interface attribute for the sibling node to the routing table of FIG.

  Other points are the same as in the third embodiment.

  In the fifth embodiment, by arranging the virtual node in the memory space in which each of the plurality of child nodes of the virtual node is arranged in the tree of FIG. 12, from any node to the root node in the same memory space. I try to climb. That is, the virtual node N000 is placed in each of the memory spaces coupled to each processor core, and each virtual node having a depth of 1 is placed in the same memory space as the memory space in which each child node of the node is placed. By arranging each of them, when climbing from an arbitrary node to the root node, these nodes exist in the same memory space (the transfer buffer also exists in the same memory space as this node). Each virtual node has its own routing table because the transfer method differs depending on its position even if the addresses are the same.

  Downstream from the root node, when transferring a packet to its child node (virtual node), it transfers the packet to the child node in the memory space where the destination node is located among multiple child nodes with the same address Thereafter, the node traces only the node in the memory space and goes down while transferring the packet to the destination node.

  As a result, the rate of packet transfer processing within the same memory space increases, so that the transfer processing can be speeded up.

  The other points are the same as those in the third embodiment.

  According to the fifth embodiment, packets are transferred almost in the same manner as in FIG. 13 with a simpler and unified configuration without connecting the processor cores in the same processor as sibling nodes as shown in FIG. Is possible.

  The first, second, and fourth embodiments can be configured in the same manner as the present embodiment.

  For packet transfer within the same memory space, by placing the packet in the shared memory, only the packet reference can be moved from the node transfer queue to the next node receive queue without actually transferring the packet. That's fine.

  For example, as shown in FIG. 16, a transmission buffer 11S for the application 11 is allocated in this shared memory. Further, each node in the same memory space, for example, the node N11 in FIG. 3 includes the transfer queue N11-14 in FIG. 16, and the root node N10 in FIG. 3 includes the transfer queue N10-14 in FIG.

  The element in each queue holds the head address and the number of bytes of one packet in the transmission buffer 11S as a reference. When the leading element EA of the transfer queue N11-14 is taken out and the packet A in the transmission buffer 11S corresponding to this is transferred to the node N10, this element EA is not transferred to the node N10 in practice, but the element EA In step S1A, as shown in FIG. 17, it is added (moved) to the end of the transfer queue N10-14. As a result, the packet is logically transferred from the node N11 to the node N10.

  FIG. 18 is a functional block diagram of packet transmission / reception regarding the nodes N11, N10 and N00 arranged in the same memory space 10M. Memory space 10M is coupled to processor core 10 of FIG. In FIG. 18, the nodes corresponding to each other are denoted by the same reference numerals, and hereinafter, the element pq of the node Nij is expressed as Nij−pq.

  The node N11 is an object in the application 11, and the packetizing unit 13 packetizes the data stored in the transmission buffer 11S according to the flowchart of FIG. 5, and the reference EA of the packet is transferred to the transfer queue as described above. Add to the end of N11-14.

  When one element is added from the empty transfer queue N11-14, the packet transmission / reception control unit N11-15 responds to the occurrence of the event through the processing of FIG. In step S1A, the packet transmission / reception control unit N11-15 extracts the head element of the transfer queue N11-14 and adds it to the end of the transfer queue N10-14. Similarly, when the transfer queue N10-14 changes from an empty state to a state where one element is added, in response to the occurrence of the event, the packet transmission / reception control unit N10-15 performs the processing of FIG. The head element of the transfer queue N10-14 is taken out and added to the end of the transfer queue N00-14 in step S1A.

  When the transfer queue N00-14 changes from an empty state to a state where one element is added, in response to the occurrence of the event, the packet transmission / reception control unit N00-15 performs the transfer queue N00 via the process of FIG. The head element of −14 is extracted, and in step S18, the routing table 16 is referred to. If the value of the forwarding interface method is 1 or 2, the address is converted based on the attribute value of the corresponding interface method, and the communication unit 19 The packet is transferred to another processor core via The communication unit 19 includes the OS layer, the driver layer, and the hardware layer shown in FIG.

  On the other hand, the OS receives the packet addressed to the node N00 from the node N20 or N30 in FIG. 3 through the driver, stores it in the reception buffer 11R0, and notifies the packet transmission / reception control unit N00-15 to that effect. In response to this, the packet transmission / reception control unit N00-15 adds the stored packet reference to the end of the transfer queue N10-14 in step S18 via the processing of FIG. Similarly, in response to the occurrence of the event, the packet transmission / reception control unit N10-15 takes out the head element of the transfer queue N10-14 via the process of FIG. 7, and in step S18, transfers it to the transfer queue N11- 14 is added at the end. In response to the occurrence of the above event, the packet transmission / reception control unit N11-15 takes out the head element of the transfer queue N11-14 through the process of FIG. 7, and performs packet rearrangement / depacketization in step S15 of FIG. The packet is stored in the reception buffer 11R via the unit 18. At this time, the packet rearrangement / depacketization unit 18 reads a plurality of received packets in the reception buffer 11R0 designated by the packet reference, divides the packets into transmission source addresses, and further rearranges the packets in the order of the packet sequence numbers. The header of each packet is deleted, the payloads are connected, and the series of data is stored in the reception buffer 11R.

  Other points are the same as those of the first embodiment.

  In the above, preferred embodiments of the present invention have been described. However, the present invention includes various modifications, and other configurations that realize the functions of the respective components described in the above embodiments are used. However, other configurations that would be conceived by those skilled in the art from these configurations or functions are also included in the present invention.

  For example, the transmission buffer 11S of FIG. 16 may be a shared memory between a plurality of processor cores. In this case, the packet reference is also performed for communication between user nodes operating in each of the plurality of processor cores. Only need to be transferred.

  Packetization and depacketization may be performed only by nodes in the middleware layer that are directly coupled to leaf nodes in the application layer. In other words, the transmission side leaf node specifies the transmission destination and transmission source addresses, transmits the data to the node of height 1, and the reception side leaf node receives the data with the header removed and the payload combined. May be. In this case, the user node does not need to be aware of the packet.

  In FIG. 7, steps S14 and S15 may be provided only for the leaf node, and steps S19 and S1A may not be provided for the root node. This also applies to FIG. 14. In FIG. 14, the configuration may be such that steps S30, S31, and S32 are provided only for nodes having a depth at which the sibling nodes are connected by edges.

  In each of the above-described embodiments, the case where MCAPI is used as communication between processor cores in a multi-core processor has been described. A configuration in which one of a plurality of communication methods is selectively used may be used.

  Moreover, you may apply the said Example 5 similarly to the said Examples 2-4.

  Furthermore, the present invention may be applied not only to an asymmetric type but also to a symmetric type multiprocessing system.

01, 100, 200, 300, 400 Multi-core processor 02 Single-core processor 10, 20, 30, 110, 120, 130, 140, 210, 220, 230, 240, 310, 320, 330, 340, 410, 420, 430 440 processor core 11, 12 application 11R reception buffer 11S transmission buffer 13 packetization unit 14, 17 transfer queue 15 packet transmission / reception control unit 16 routing table 18 packet rearrangement / depacketization unit 19 communication unit 40A to 40D name resolution table N00, N000 root node N10-N12, N20-N22, N30-N32, N100, N110-N112, N200, N210, N211, N220, N221, N300, N310, N311, N 312, N400, N410, N411, N420, N421, N430, N431, N440, N441, Nij, Ni1j1, Ni2j2, Nijk, Ni1j1k1, Ni2j2k2 Node DA Destination address SA Local node address CA Child node address PA Parent node address BA Brother Node address

Claims (10)

An object of a parent node having a user node as a child node as an application layer object in a memory space coupled to each of a plurality of processor cores as a first node is arranged in the middleware layer for each same memory space. An object of a parent node having one node as a child node as a second node is arranged in the middleware layer in the memory space of any of the first nodes, and each of the tree including the user node, the first node, and the second node Multi-processing, in which a node is set with an address capable of distinguishing a parent-child relationship by value, and has a packet routing means for routing a packet including a destination address and a source address in a header between parent-child nodes of the tree in object communication apparatus in a system I,
The packet routing means of each user node of the tree includes a name resolution table that associates the name of each user node with its address, performs name resolution processing before routing processing, and in the name resolution processing,
When a name is used in place of the destination address or source address of the header, if the name exists on the name resolution table, the name is converted into an address and the header name is replaced with the address. And if it does not exist, raise an exception error in the operating system,
An inter-object communication device in a multiprocessing system. An object of a parent node having a user node as a child node as an application layer object in a memory space coupled to each of a plurality of processor cores as a first node is arranged in the middleware layer for each same memory space. An object of a parent node having one node as a child node as a second node is arranged in the middleware layer in the memory space of any of the first nodes, and each of the tree including the user node, the first node, and the second node Multi-processing, in which a node is set with an address capable of distinguishing a parent-child relationship by value, and has a packet routing means for routing a packet including a destination address and a source address in a header between parent-child nodes of the tree in object communication apparatus in a system I,
The packet routing means other than the root node of the tree does not have a name resolution table, and when a name is used instead of the transmission destination address or the transmission source address of the header, the packet is sent to the parent node of the own node. Forward,
The packet routing means of the route node includes the name resolution table that associates the name and address of each user node, and performs name resolution processing before routing processing. In the name resolution processing,
When a name is used in place of the destination address or source address of the header, if the name exists on the name resolution table, the name is converted into an address and the header name is replaced with the address. And if it does not exist, raise an exception error in the operating system,
An inter-object communication device in a multiprocessing system. An object of a parent node having a user node as a child node as an application layer object in a memory space coupled to each of a plurality of processor cores as a first node is arranged in the middleware layer for each same memory space. An object of a parent node having one node as a child node as a second node is arranged in the middleware layer in the memory space of any of the first nodes, and each of the tree including the user node, the first node, and the second node Multi-processing, in which a node is set with an address capable of distinguishing a parent-child relationship by value, and has a packet routing means for routing a packet including a destination address and a source address in a header between parent-child nodes of the tree in object communication apparatus in a system I,
The packet routing means of a node other than the user node of the tree includes a name resolution table that associates the names and addresses of its own node and all of its descendant nodes,
The packet routing means of each user node forwards the packet to the parent node of its own node when a name is used instead of the transmission destination address or the transmission source address of the header,
The packet routing means other than the user node of the tree performs name resolution processing before routing processing, and in the name resolution processing,
When a name is used in place of the destination address or source address of the header, if the name exists on the name resolution table, the name is converted into an address and the header name is replaced with the address. If the name does not exist in the name resolution table and the parent node of the own node exists, the packet is forwarded to the parent node, and the name does not exist in the name resolution table and the parent node If it doesn't exist, raise an exception error in the operating system,
An inter-object communication device in a multiprocessing system. An object of a parent node having a user node as a child node as an application layer object in a memory space coupled to each of a plurality of processor cores as a first node is arranged in the middleware layer for each same memory space. An object of a parent node having one node as a child node as a second node is arranged in the middleware layer in the memory space of any of the first nodes, and each of the tree including the user node, the first node, and the second node Multi-processing, in which a node is set with an address capable of distinguishing a parent-child relationship by value, and has a packet routing means for routing a packet including a destination address and a source address in a header between parent-child nodes of the tree in object communication apparatus in a system I,
The packet routing means of each node of the tree performs name resolution processing before routing processing, and in the name resolution processing,
If the name is used in place of the destination address or source address of the header, if present on the name name resolution table, converts the name to address replace the name of the header the address When the name does not exist on the name resolution table or the name resolution table does not exist on the own node,
If the parent node of the own node exists, the packet is forwarded to the parent node, and if the parent node does not exist, an exception error is generated in the operating system.
An inter-object communication device in a multiprocessing system. The packet routing means of each node of the tree includes:
If the destination address of the header matches the own node address, the packet is stored as a packet addressed to the own node. If the destination address of the header indicates the child node side of the own node, the packet is transferred to the child node. In other cases, the packet is forwarded to the parent node of the own node.
The inter-object communication device in the multiprocessing system according to claim 1, wherein the inter-object communication device is a multi-processing system according to claim 1. The second node is a root node;
The inter-object communication device in the multiprocessing system according to claim 5. The second node is arranged for each processor,
The tree further includes a parent node object having each second node as a child node as a root node, and the root node is arranged in a middleware layer in the memory space of any second node.
The inter-object communication device in the multiprocessing system according to claim 5. Each node of the tree includes a routing table, in which a self-node address and addresses of all child nodes of the self-node are registered, and a memory different from the memory space in which the self-node is arranged For packet transfer to the next node, which is a node in the space, a packet transmission method to the next node and an attribute for transferring the packet to the next node in the packet transmission method are registered.
Each routing means routes the packet by referring to the routing table of the free-node,
The inter-object communication device in the multiprocessing system according to any one of claims 5 to 7. A root node of the tree is disposed in a memory space coupled to each of the plurality of processor cores;
When the routing means of each node other than the root node of the tree transfers the packet to the parent node, the packet is transferred to the root node in the same memory space as the own node.
The inter-object communication device in the multiprocessing system according to any one of claims 5 to 8. When the routing means of each node of the tree transfers the packet to a node in the same memory space as its own node, only the reference of the packet is transferred to the node.
The inter-object communication device in a multiprocessing system according to any one of claims 5 to 9.

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