JP5735830B2 - Baseband processing apparatus and signal processing method thereof - Google Patents

Description

  The present invention relates to a baseband processing apparatus with a software radio function, which is preferably used for multi-standardization and multi-channeling, and a signal processing method therefor.

Conventional, DTV (Dig ital television) · STB (Set-Top Box) broadcast demodulator has been realized by the circuit configuration according to hardware. However, since W / W (worldwide) broadcasting systems employ different systems depending on the region, they had to be equipped with different hardware. This is called multi-standardization.

Further, DTV · STB broadcasting receives a plurality of broadcast channels simultaneously, because of increasing demand corresponding to watch and record a plurality of programs, a number of the circuit arrangement according to the hardware had to be mounted in parallel . This is called multi-channeling.

  As described above, since wireless communication systems have been diversified recently and many wireless communication devices having different frequencies and modulation methods are mixed, wireless communication devices corresponding to a plurality of wireless communication systems are very practical. is there. Actually, multi-mode terminals corresponding to a plurality of wireless communication systems have been developed.

  By the way, as described above, since practical use of wireless communication, many functions of wireless communication devices have been realized by hardware. However, in order to realize such a function in the hardware, the same number of electronic circuits as that of the wireless communication method are required, and there may be a problem in terms of downsizing and cost.

  On the other hand, if various wireless communication methods can be realized by software instead of conventional hardware, it is possible to easily add new functions or change functions without complicated work. There is. In order to realize multi-standardization, software wireless technology has been proposed in which a part of the functions of a wireless communication device that has been conventionally realized by hardware is replaced with software.

As a function of software defined radio,
Multi-band, multi-mode, and multi-protocol radio with programmable frequency conversion function with programmable decoding function that can handle various coding systems with programmable demodulation function that can support various modulation systems, and IF bandwidth Can be flexibly changed (any characteristic filter can be realized at runtime if possible)
It is considered that it has a program download function and can easily change the wireless function.

  In recent years, a circuit using a DSP (Digital Signal Processor) for realizing software defined radio has been proposed. The DSP can change the algorithm of the broadcasting system, the data processing method, etc. by replacing the memory of the program.

  In addition, by using a DSP, it is possible to perform processing of a plurality of channels with common hardware only by increasing the processing clock for realizing multi-channel and increasing the memory capacity.

  Furthermore, from short-range wireless communication such as Bluetooth and Zigbee, IEEE 802.11a / b / g / n wireless LAN, HSDPA (High Speed Downlink Packet Access), WCDMA (Wideband Code Division Multiple Access), LTE (Long Term Evolution: Long・ Term Evolution), DTV (Digital Television) and CS-PCM audio broadcasting, satellite digital audio broadcasting, CS digital audio broadcasting, BS digital audio broadcasting (BS digital radio), terrestrial digital audio broadcasting (terrestrial digital radio) It is not impossible to deal with a single chip including digital broadcasting including digital radio and the like, and long-distance wireless communication such as GPS (Global Positioning System).

  Note that, for example, there are uses that use a plurality of wireless standards at the same time, such as using e-mail while watching terrestrial television, so there is a possibility that a plurality of chips will be mounted in actual mounting.

  Related technologies relating to conventional software defined radios include the following. First, Patent Literature 1 discloses a wireless communication device that aims to provide a wireless communication device that performs resource management of a signal processing device accurately and efficiently.

  The wireless communication device described in Patent Literature 1 includes a wireless transmission / reception device configured to perform transmission / reception of a wireless signal in a wireless communication device applicable to a plurality of wireless communication systems, and a resource whose function is defined. The resource manages at least one modem function and protocol function, and the signal processing device configured to perform signal processing necessary for transmission and reception by the resource, and other modem functions corresponding to the wireless communication system and And a controller for supplying a signal processing device to redefine the protocol function to the resource.

  Further, Patent Document 2 discloses a library that has a library management function in a wireless device that realizes a wireless function by software. The library management function analyzes an application program and detects a shortage of programs and commands stored in the library. A wireless device that implements a wireless function by software by investigating and reading inadequate programs and commands from an application program is disclosed.

  Furthermore, in Patent Document 3, in addition to simultaneously improving processing capability, reducing costs, and reducing the size of hardware, it is also possible to suppress extreme increases in power consumption and device heat generation. An intended software defined radio is disclosed.

  Further, Patent Document 4 includes a modulation / demodulation unit defined by software that performs modulation / demodulation operations corresponding to the setting contents of the control program, and a transmission circuit and a reception circuit that perform transmission / reception using the modulation / demodulation signal by the modulation / demodulation unit. There is disclosed a communication device that includes a transmission / reception unit and a setting control unit that selects setting contents of a control program, and performs communication using a modulation / demodulation method corresponding to the setting contents of the control program.

  Patent Document 5 discloses a software defined radio for the purpose of power saving effective for functional blocks implemented by software and hardware. The radio unit includes a radio unit for transmitting and receiving radio signals, a converter unit for converting an analog signal into a digital signal and a digital signal into an analog signal, and digital signal processing capable of realizing various modulation / demodulation methods by changing software. Depending on the specific modulation / demodulation method, the application processing unit providing various services, the input / output unit serving as an interface, the power supply unit supplying power to each unit, the software operating in the digital signal processing unit and the application processing unit And a control unit for performing control to be changed.

JP 2002-335186 A JP 2001-160765 A JP 2005-208961 A JP 2001-257616 A JP 2007-295241 A

  However, the circuit configuration by software as described in Patent Documents 1 to 5 is a general-purpose circuit compared to the circuit configuration by hardware. In other words, since the memory in the circuit configuration by hardware can be designed as a dedicated circuit, the memory capacity is not wasted, but if the circuit configuration by software is used, the memory includes redundancy, resulting in poor use efficiency of the memory. In particular, there is a problem that the circuit scale is not reduced so much. The memory includes redundancy, resulting in an increase in power consumption and cost as described below. In general, when the multi-standard and multi-channel are used, the software configuration has a smaller circuit scale, and when one standard and one channel are realized, the software configuration has a larger circuit scale.

  In addition, with the software configuration, the increase in the processing amount is solved by increasing the processing clock speed, so that the power consumption increases. Therefore, compared to the conventional hardware configuration, the cost of the circuit area on the LSI of the product increases, and the power consumption performance deteriorates, which conflicts with the eco-friendly product that should reduce the consumption of resources and energy. Has occurred.

  Furthermore, from another point of view, there is a problem that the circuit configuration by the DSP takes time to set up the system as compared with the circuit configuration by hardware, such as requiring time for loading a program. For example, since setup takes time, problems such as failure to receive emergency broadcasts occur.

  The baseband processing device with software function according to the present invention is a baseband processing device with software function capable of demodulating received data of two or more different standards or different channels, A first demodulator for demodulating received data; and a second demodulator for demodulating second received data for multi-standard or multi-channel, wherein the first demodulator The first received data is demodulated by hardware processing, and the second demodulator performs the second received data demodulation processing by a software function.

  The signal processing method of the baseband processing apparatus with software function according to the present invention is a signal processing method of the baseband processing apparatus with software function capable of demodulating received data of two or more different standards or different channels, The demodulation processing of the first reception data for the standard and reference channels is performed by hardware processing, and the demodulation processing of the second reception data for multi-standard or multi-channel is performed by a software function.

  In the present invention, the demodulation processing of the first reception data for the standard and the reference channel is performed by hardware processing, and the demodulation processing of the second reception data for multi-standard or multi-channel is performed by a software function. When receiving the first received data, the effects of reducing the power consumption and the setup time of the hardware are obtained. When receiving the second received data, the multi-standard and multi-channel of the software are provided. It is possible to achieve an effect such as being capable of being received.

  According to the present invention, it is possible to provide a baseband processing device with a software function that can receive two or more different broadcast waves and can reduce power consumption, and a signal processing method thereof.

It is a block diagram which shows the ISDB-T receiver for terrestrial digital broadcasting. It is a block diagram which shows the receiver with a software radio | wireless function concerning Embodiment 1 of this invention. It is a block diagram which shows the receiver with a software radio | wireless function concerning Embodiment 2 of this invention. It is a block diagram which shows the receiver with a software radio | wireless function concerning Embodiment 3 of this invention. It is a block diagram which shows the receiver with a software radio | wireless function concerning Embodiment 4 of this invention.

  Hereinafter, specific embodiments to which the present invention is applied will be described in detail with reference to the drawings. In this embodiment, the present invention is applied to a receiving apparatus having a software radio function. In this specification, all devices will be described as receiving devices for convenience. However, as will be described later, the receiving device with software radio function according to the present invention includes a receiving device having a transmitting function, that is, a transmitting / receiving device. Shall be included.

First, the overall system configuration will be described. FIG. 1 is a block diagram showing an ISDB (Integrated Services Digital Broadcasting) -T (Terrestrial) receiver for digital terrestrial broadcasting. As shown in FIG. 1, an ISDB-T receiver 1 includes an antenna 2, an RF (Radio Frequency) tuner 3, an analog-to-digital converter (ADC) 4, an OFD M (Orthogonal Frequency Division Multiplexing). : Orthogonal frequency division multiplexing) demodulator 5, TS Demux (Transport Stream De-multiplex) 6, audio demodulator 8, and data demodulator 9.

  In this ISDB-T receiver 1, a digital broadcast wave transmitted from a BS is received by an antenna 2 arranged outdoors. The antenna 2 generally includes a frequency converter, and outputs a received / frequency converted signal to the RF tuner 3.

The RF tuner 3, the physical channel is selected, and outputs a baseband signal and amplifies the signal. Then, to convert the analog signal into a digital baseband signal by ADC 4, and outputs a transport stream signal by demodulating the baseband signal by the O FD M demodulator 5.

TSDemux6 the transport stream output from the O FD M demodulator 5, a video stream of MPEG2 (Moving Picture Experts Group2), audio streams, and PSI / SI in (Program Specific Information / Service Information) data stream, such as Are separated and output to the video decoder 7, the audio decoder 8 and the data decoder 9, respectively, and these data are decoded, respectively, video data, audio data, program name, program start time, program duration, program content information, and Decoded into character data including program genre information and the like and output.

  Further, a display system device (not shown) is disposed in the subsequent stage. The display system device receives video data and performs D / A conversion, for example, converts it to an NTSC composite signal, or receives audio data and performs D / A conversion, for example, a right (R) sound analog signal and left (L) An analog signal of sound is generated and output from a display or speaker arranged at a later stage.

Here, the O FD M demodulation unit 5 includes, for example, a synchronization processing unit 51, a detection processing unit 52, and an error correction processing unit 53. The synchronization processing unit 51 performs quadrature demodulation of the digitally converted signal. The detection processing unit 52 performs synchronous detection processing by estimating transmission path characteristics from SP (Scattered Pilot) information included in the received signal. The error correction processing unit 53 decodes a control signal TMCC (Transmission and Multiplexing Configuration Control) indicating a transmission parameter used in each layer, and based on the decoding result and the detection result in the detection processing unit 52, Viterbi decoding, Error correction processing such as Reed-Solomon decoding is performed and a TS stream is output.

The above configuration shows the configuration of a general digital broadcast receiver. Here, the software radio function receiving apparatus according to the present embodiment corresponds to a receiving apparatus including O FD M demodulator 5 or at least O FD M demodulator 5 of Fig. Hereinafter, embodiments of such a receiving apparatus with a software radio function will be described.

Embodiment 1 of the present invention.
FIG. 2 is a block diagram of the receiving device with software defined radio function according to the first embodiment of the present invention. As shown in FIG. 2, the receiving apparatus 101 with software radio function according to the present embodiment includes a DSP configuration demodulator 11 and a dedicated memory 12, a hardware configuration demodulator 21 and a dedicated memory 22, an execution controller 31, a clock A power supply controller 32, a memory controller 33, and a shared memory 34 are included.

  This receiving apparatus 101 with software radio function is a receiving apparatus capable of demodulating received data of two or more different standards or different channels. The hardware configuration demodulator 11 receives the reference standard or the first received data for the reference channel from the stream input SI1, performs a demodulation process thereof, and outputs a TS stream from the stream output SO2. Standard and reference channel demodulator. A DSP (Digital Signal Processor) configuration demodulator 21 receives multi-standard or multi-channel second received data from the stream input SI2, performs demodulation processing thereof, and outputs a TS stream from the stream output SO2. A multi-standard or multi-channel demodulator. The hardware configuration demodulator 11 performs demodulation processing of the first received data by hardware processing, and the DSP configuration demodulator 21 performs demodulation processing of received data by a software function.

  Here, in the present specification, the reference standard and the reference channel refer to, for example, a standard or channel that is most frequently received by the receiving apparatus 101, or a standard or channel that is most frequently used by the user. Therefore, this standard may differ depending on the region, country, etc. where the receiving apparatus 101 is used. In addition, when the user purchases, it may be possible to select which standard is the reference standard, that is, the standard to be processed by the hardware configuration demodulator 11. On the other hand, the multi-standard or multi-channel indicates a standard or channel that is received less frequently than the reference standard or the reference channel in the receiving apparatus 101, or a standard or channel that is optionally received. For example, if the reference channel is the standard with the highest usage rate in the country where the user lives, the multi-standard or multi-channel is the standard or channel used in the country where the user is traveling or traveling. Shall be shown. In this way, by using the hardware configuration demodulator 11 more frequently and using the DSP configuration demodulator 21 as an option, the receiving apparatus 101 with software radio function according to the present embodiment can be obtained as described later. , It combines the advantages of hardware and the advantages of software.

Each of the hardware configuration demodulator 11 and the DSP configuration demodulator 21 has a dedicated memory 12 and a dedicated memory 22 composed of a ROM (Read Only Memory), a RAM (Random Access Memory), and the like. By having a dedicated memory in the vicinity of each demodulator, high speed operation is possible. The software radio function receiving apparatus 101 that has a shared memory accessible 34 from the hardware configuration demodulator 11 and DSP configuration demodulator 21.

The shared memory 34 can be composed of, for example, a DRAM (Dynamic Random Access Memory) or the like. The shared memory 34 can be provided outside the chip except for the shared memory 34 as one chip. By sharing the memory with the shared memory 34, for example, by the hardware configuration demodulator 11 when the DSP constituting the demodulator 21 does not use the shared memory 34 to use the shared memory 34, while maintaining the power performance benefits The performance can be improved. On the contrary, when the hardware configuration demodulator 11 does not use the shared memory 34, the DSP configuration demodulator 21 uses the shared memory 34, so that new functions can be added or changed.

  An execution controller 31 composed of a CPU (Central Processing Unit) or the like controls the execution of the hardware configuration demodulator 11 and the DSP configuration demodulator 21. The execution controller 31 controls the operation of the clock / power supply controller 32 such as setting the frequency of the clock generated by the clock / power supply controller 32 and setting the size of the power supply. Furthermore, the execution controller 31 controls the memory controller 33 to control reading and writing of the hardware configuration demodulator 11 and the DSP configuration demodulator 21 to the shared memory 34.

  The clock / power controller 32 generates a clock and power to be supplied to each circuit based on the control of the execution controller 31, and controls the operating conditions of each circuit. In this case, the clock / power supply controller 32 designates the optimum clock frequency and power supply size in the reception state at that time. Power consumption can be minimized by optimizing the clock and power supply. Here, the hardware configuration demodulator 11 and the DSP configuration demodulator 21 can be operated simultaneously or individually. In this case, the power to the demodulator that does not operate by the clock / power supply controller 32 and its peripheral circuits can be turned off, or the clock can be shut off, and wasteful power consumption can be reduced.

  The memory controller 33 controls data processing of the hardware configuration demodulator 11 and the DSP configuration demodulator 21 and access to the shared memory 34 for programs. When only one demodulator operates, the shared memory 34 can be freely used by the one demodulator.

  The receiving apparatus 101 with software defined radio function includes a bus controller (not shown) that can be used by the hardware configuration demodulator 11 and the DSP configuration demodulator 21.

  In the receiving device 101 with the software radio function configured as described above, the flexibility of the circuit configuration by the DSP, the circuit scale merit and the power performance merit of the circuit configuration by the hardware can be achieved.

  In this embodiment, the hardware configuration demodulator 11 can optimize the power consumption performance by performing the function with the highest operating rate, that is, the demodulation processing of the reception data of the reference standard and the reference channel. it can. For example, many users most often use one channel for viewing or recording, and for this purpose, a receiving device for one channel may be prepared with a hardware circuit configuration.

  Here, when two hardware configuration demodulator 11 are provided, there is a merit in terms of power consumption and circuit scale compared to the case where two DSP configuration demodulator 21 is provided, but there are two different standards or two different channels. Can only receive, contrary to multi-standard and multi-channel. On the other hand, when two DSP configuration demods 21 are provided, it is possible to demodulate received data corresponding to a plurality of standards and channels by loading different programs. As a result, the circuit scale and power consumption increase.

  Thus, in a system that requires a demodulator with two or more channels, such as the receiving apparatus 101 with software defined radio function according to the present embodiment, one is a DSP configuration demodulator 21 and the other is a hardware configuration demodulator 11. This makes it possible to achieve both the flexibility of the DSP, the circuit scale advantage of the hardware, and the power performance advantage. In other words, the execution controller 31 that controls each of them controls the clock and power supply of the clock and power supply controller 32, and controls the shared memory 34 via the memory controller 33, so that it is possible to perform system control with high power efficiency while being a flexible system. It can be carried out.

  As described above, since the hardware configuration demodulator 11 can be configured as a demodulator of a specific standard and channel, the circuit scale can be minimized. Further, the hardware configuration demodulator 11 has lower power consumption than the DSP configuration demodulator 21. For this reason, by providing the hardware configuration demodulator 11 as a standard-dedicated demodulator with the highest usage rate, the receiving device has the effect of having a hardware configuration.

  Furthermore, in order to output a stream, the DSP configuration demodulator 21 needs to load a program and set different parameters depending on the reception method, resolution, region, etc., but the hardware configuration demodulator 11 sets the parameters. Since the operation is possible only by doing, the load time of the program is short, and the setup time can be shortened in a system such as an emergency broadcast reception system.

  On the other hand, the receiving apparatus 101 with software defined radio function according to the present embodiment includes a DSP configuration demodulator 21. The DSP configuration demodulator 21 can demodulate different standards and channel data simply by replacing the program. For example, when a user who normally uses the hardware configuration demodulator 11 goes on a business trip abroad, for example, when it is necessary to demodulate received data of a different standard, a program corresponding to the standard is stored in the dedicated memory 22 or the shared memory. By loading from 34, it is possible to perform demodulation processing of received data using the DSP configuration demodulator 21.

Embodiment 2 of the present invention.
Next, a second embodiment of the present invention will be described. FIG. 3 is a block diagram showing a receiving device with software defined radio function according to the second exemplary embodiment of the present invention. As shown in FIG. 3, in the receiving apparatus 102 with software defined radio function according to the present embodiment, each demodulator is divided into a preceding block and a succeeding block, and between the preceding block and the succeeding block, The bus switch 39 switches the interface of each stream.

  That is, the receiving apparatus 102 with software defined radio function according to the present embodiment includes a hardware configuration demodulator pre-stage 13, a hardware configuration demodulator post-stage 15, a DSP configuration demodulator pre-stage 23, a DSP configuration demodulator post-stage 25, a dedicated memory 14 16, 24, 26, execution controller 35, dedicated memory 26, memory controller 37, shared memory 38, and bus switch 39.

  The received data is input from the stream input SI1 to the upstream stage 13 of the hardware configuration demodulator, processed in the previous stage, and output to the downstream stage 15 of the hardware configuration demodulator via the bus switch 39. The hardware configuration demodulator post-stage 15 performs post-process and outputs a TS stream from the stream output SO1. Similarly, the received data is input from the stream input SI2 to the DSP configuration demodulator pre-stage 23, and the pre-processing is performed, and the data is output to the DSP configuration demodulator post-stage 25 via the bus switch 39. The DSP configuration demodulator post-stage 25 performs post-stage processing and outputs a TS stream from the stream output SO2.

Here, for example, hardware configuration demodulator front 13, DSP configuration demodulator front 23, the synchronization process and the detection process in the O FD M demodulator 5 above the circuit implementing the (hereinafter referred to as synchronous detection processing.) Hard The hardware configuration demodulator post-stage 15 and the DSP configuration demodulator post-stage 25 can perform error correction processing in the above-described OFMD M demodulator 5. The preceding stage and the subsequent stage are not limited to this, and the demodulation process may be divided in any way.

  Here, when dividing into the synchronous detection process and the error correction process in the former stage and the latter stage respectively, there are merits described below. That is, even if the received data in digital broadcasting are different standards, the algorithms used for error correction are often the same, and error correction processing can be commonly used in many standards. Therefore, by implementing error correction processing (at least a part thereof) frequently used by the hardware configuration demodulator post-stage 15, for example, data that has been subjected to synchronous detection processing by software processing in the DSP configuration demodulator pre-stage 23 is converted to a bus switch. 39 is input to the hardware configuration demodulator post-stage 15 and the hardware configuration demodulator post-stage 15 can correct the error by hardware processing. By using the hardware configuration demodulator post-stage 15, effects such as shortening of processing time and reduction of power consumption can be obtained.

  The execution controller 35 executes each demodulator, memory access in the memory controller 37, data switching by the bus switch 39, a clock frequency and power supply optimization instruction to the clock / power supply controller 36, and the like.

  In the present embodiment, each demodulator has a dedicated memory and can access the shared memory 38 via the memory controller. Note that the dedicated memory and the shared memory 38 are not necessarily essential, and only one of them may be used. However, memory resources can be utilized more effectively by providing both. For example, a parameter value or the like necessary for starting the operation may be stored in a dedicated memory, and a program that requires the DSP configuration demodulator pre-stage 23 and the DSP configuration demodulator post-stage 25 itself may be stored in the shared memory 38. .

  The clock / power supply controller 36 supplies power to or interrupts each demodulator and the memory controller 37, thereby minimizing power used in each block and improving power efficiency. .

  In the receiving apparatus with software defined radio function 102 according to the present embodiment, the DSP configuration and the hardware configuration are each divided into a front-stage function block and a subsequent-stage function block, so that more flexible and power-efficient system control is executed. be able to.

Embodiment 3 of the present invention.
Next, a third embodiment of the present invention will be described. FIG. 4 is a block diagram showing a receiving device with software defined radio function according to the third embodiment of the present invention. 4 has a DSP configuration modulator 27 instead of the DSP configuration demodulator 21 of the reception device with software radio function 101 shown in FIG. That is, the DSP configuration modulator 27 in the present embodiment makes use of the flexibility of the DSP configuration modulator 27 to function as a transmission device as well as a reception device. Thus, in the software defined radio function, the demodulator can be changed to a modulator, and the modem function can be realized by pairing with the hardware configuration demodulator.

  In the receiving device 103 with the software radio function according to the present embodiment, the circuit by software functions as a modulator (transmitting device), and the circuit by hardware functions as a demodulator (receiving device), so that the modem device Can be used as Even in this case, since the receiving apparatus generally has a higher operation rate, the power consumption performance can be optimized. Although the DSP configuration demodulator has been described in the present embodiment, the DSP may have a modulator function as in the first embodiment, as well as the demodulator.

Embodiment 4 of the present invention.
Next, a fourth embodiment of the present invention will be described. FIG. 5 is a block diagram showing a receiving apparatus with a software defined radio function according to the fourth embodiment of the present invention. A receiving device 104 with a software radio function according to the present embodiment shown in FIG. 5 includes an LSI chip 10 having a hardware configuration demodulator 11 and an LSI chip 20 having a DSP configuration demodulator 21. The LSI chip 10 and the LSI chip 20 have an interface 30 that functions as an execution control interface for exchanging interrupt control signals and the like and a data interface for exchanging data to the memory and the like. Yes.

  In the receiving apparatus 104 with the software radio function in the present embodiment, the execution controller 18 of the LSI chip 10 serves as a master to control the execution controller 28 of the LSI chip 20 via the execution control interface, thereby controlling the LSI chip 20 as a companion chip. To act as. The execution controller 18 exchanges interrupt control signals and the like via the execution control interface.

  The LSI chip 10 includes a memory controller 33, and the hardware configuration demodulator 11 and the DSP configuration demodulator 21 are configured to be able to access an external shared memory 40 managed by the memory controller 33 of the LSI chip 10. . The shared memory 40 may be provided in the LSI chip 10 or the LSI chip 20. The DSP configuration demodulator 21 can exchange address signals, read / write signals, and the like in addition to data to be written to the shared memory 40 or data to be read from the shared memory 40 via the memory interface.

  The LSI chip 10 and the LSI chip 20 may be mounted on the same pellet (chip), or each may constitute a mounting package. The shared memory 40 may be a separate chip, but may be mounted in the LSI chip 10 or the LSI chip 20 as described above.

  The receiving device 104 with the software radio function configured as described above has the same effects as those of the first embodiment and the like, and further, the LSI chip 10 corresponding to various standards and channels is manufactured. In addition, by preparing an LSI chip 20 that realizes multi-channel and multi-standard, and combining the LSI chip 10 of the standard or reference channel according to the country or region to be sold with the desired LSI chip 20, the country In addition, it is possible to manufacture the receiving device 104 with the software radio function which is different for each region very easily.

  It should be noted that the present invention is not limited to the above-described embodiments, and various modifications can be made without departing from the scope of the present invention.

  For example, the computer program used by the DSP configuration demodulator 21, the DSP configuration demodulator upstream 23, the DSP configuration demodulator downstream 25, etc. uses various types of non-transitory computer readable media. Stored and supplied to a computer. Non-transitory computer readable media include various types of tangible storage media. Examples of non-transitory computer-readable media include magnetic recording media (for example, flexible disks, magnetic tapes, hard disk drives), magneto-optical recording media (for example, magneto-optical disks), CD-ROMs (Read Only Memory), CD-Rs, CD-R / W and semiconductor memory (for example, mask ROM, PROM (Programmable ROM), EPROM (Erasable PROM), flash ROM, RAM (random access memory)) are included. The program may also be supplied to the computer by various types of transitory computer readable media. Examples of transitory computer readable media include electrical signals, optical signals, and electromagnetic waves. The temporary computer-readable medium can supply the program to the computer via a wired communication path such as an electric wire and an optical fiber, or a wireless communication path.

1 ISDB-T receiver 2 Antenna 3 RF tuner 4 ADC
5 O FD M demodulator 6 TSDemux
DESCRIPTION OF SYMBOLS 7 Video decoder 8 Audio decoder 9 Data decoder 101 Receiving apparatus with software radio | wireless function 102 Receiving apparatus with software radio | wireless function 103 Receiving apparatus with software radio | wireless function 104 Receiving apparatus with software radio | wireless function 10 LSI chip 11 Hardware structure demodulator 12 Dedicated memory 13 Hardware configuration demodulator front stage 14 Dedicated memory 15 Hardware configuration demodulator rear stage 16 Dedicated memory 18 Execution controller 19 Clock / power supply controller 20 LSI chip 21 DSP configuration demodulator 22 Dedicated memory 23 DSP configuration demodulator front stage 24 Dedicated memory 25 DSP configuration After demodulator 26 Dedicated memory 27 DSP configuration modulator 28 Execution controller 29 Clock Source Controller 30 Interface 31 Execution Controller 32 Clock / Power Supply Controller 33 Memory Controller 34 Shared Memory 35 Execution Controller 36 Clock / Power Supply Controller 37 Memory Controller 38 Shared Memory 39 Bus Switch 40 Shared Memory 51 Synchronization Processing Unit 52 Detection Processing Unit 53 Error Correction Processing Part

Claims (11)

A base baseband processor capable demodulation processing of the digital broadcast reception data of two or more different standards or different channels,
A first demodulator for demodulating the first digital broadcast reception data for the first standard or the first channel;
A second demodulator for performing demodulation processing of second digital broadcast reception data for a second channel different from the first standard or second channel different from the first channel ,
The first demodulator performs demodulation processing of the first digital broadcast reception data by hardware processing,
The second demodulator performs demodulation processing of the second digital broadcast receiving data by loading a program from memory, base baseband processor. In regions or countries the baseband processing device is used, the first digital broadcast receiving data, said second high receiving Shinshiki degree from the digital broadcast receiving data, base baseband processing apparatus according to claim 1. It said first and second demodulators in accordance with the content of the demodulation process, composed of two or more circuits, base baseband processing device according to claim 1 or 2, wherein. The first demodulator includes a first front-stage demodulator and a first rear-stage demodulator,
The second demodulator includes a second front-stage demodulator and a second rear-stage demodulator,
The first front-stage demodulator is connected to the first and second rear-stage demodulator by a bus switch,
The second pre-demodulator, the bus switch by being connected to the first and second second-stage demodulator, base baseband processor according to claim 2. The baseband processing device is a device that performs demodulation processing and error correction processing,
The first and second front demodulators perform demodulation processing,
The baseband processing device according to claim 4, wherein the first and second post-stage demodulators perform error correction processing . The second demodulator is also operable as a motor Jureta for transmitting data, base baseband processing device according to any one of claims 1 to 5. Wherein the first demodulator is mounted on the first chip, the second demodulator is mounted on a second chip which is different from the first chip, in any one of claims 1 to 6 Baie baseband processing device as claimed. The first chip includes a first execution controller that controls execution of the first demodulator,
The second chip is equipped with a second execution controller that controls execution of the second demodulator,
It said first execution controller becomes the master, controls the second execution controller, base baseband processing device according to claim 7. Said first and second demodulators having a shared memory available to each other, base baseband processing device according to any one of claims 1 to 8. An execution controller for controlling the operation of the first and second demodulators;
The and first and second demodulators to supply clock supply unit for supplying power and clock, base baseband processing device according to any one of claims 1 to 9. It said first and second demodulators, each having a dedicated memory used exclusively, base baseband processing device according to any one of claims 1 to 10.

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