JP5702245B2 - Printed wiring boards, board laminates, planar coils, and planar transformers - Google Patents

Printed wiring boards, board laminates, planar coils, and planar transformers Download PDF

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JP5702245B2
JP5702245B2 JP2011162052A JP2011162052A JP5702245B2 JP 5702245 B2 JP5702245 B2 JP 5702245B2 JP 2011162052 A JP2011162052 A JP 2011162052A JP 2011162052 A JP2011162052 A JP 2011162052A JP 5702245 B2 JP5702245 B2 JP 5702245B2
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printed wiring
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雅啓 北川
雅啓 北川
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Minebea Co Ltd
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本発明は、プリント配線基板、基板積層体、平面コイルおよび平面トランスに関する。   The present invention relates to a printed wiring board, a substrate laminate, a planar coil, and a planar transformer.

電子機器等の小型化に応えるべく、例えば絶縁基板の両面に導体パターンをそれぞれループ状に形成したプリント配線基板を用いて平面コイル(誘導素子)を構築する技術が知られている(例えば特許文献1を参照)。また上記と同様な構成のプリント配線基板を複数枚積層して平面コイルや平面トランス等の誘導素子を構築する技術が知られている(例えば特許文献2を参照)。   In order to respond to the miniaturization of electronic devices and the like, for example, a technique for constructing a planar coil (inductive element) using a printed wiring board in which conductor patterns are formed in a loop shape on both sides of an insulating substrate is known (for example, Patent Documents). 1). Further, a technique is known in which a plurality of printed wiring boards having the same configuration as described above are stacked to construct an inductive element such as a planar coil or a planar transformer (for example, see Patent Document 2).

特開2008−294085号公報JP 2008-294085 A 特開2009−259922号公報JP 2009-259922 A

しかしながら上記特許文献1,2に紹介される従来の技術においては、仕様の異なる誘導素子を実現するに際して、例えばコイル部をなす導体パターンや基板間接続部の形状・位置等が異なる、複数種類のプリント配線基板を準備する必要がある。この為、複数種類のコイル部を含むプリント配線基板の設計工数や、複数種類のプリント配線基板を用いることによって製造コストが増大するという課題があった。   However, in the conventional techniques introduced in Patent Documents 1 and 2, when realizing inductive elements having different specifications, for example, a plurality of types of conductor patterns forming a coil part, shapes and positions of inter-substrate connection parts, and the like are different. It is necessary to prepare a printed wiring board. For this reason, there existed a subject that a manufacturing cost increased by using the design man-hour of the printed wiring board containing multiple types of coil parts, and multiple types of printed wiring boards.

本発明はこのような事情を考慮してなされたもので、その目的は、単独で、若しくは所定枚数積層して用いられて仕様の異なる誘導素子を簡易に実現する上での基盤となるプリント配線基板を提供することにある。
即ち、本発明は同一仕様のプリント配線基板を1枚または複数枚積層して用いることで、平面コイルや平面トランスなどの誘導素子の設計自由度を高めるとともに、コイル部を含むプリント配線基板の設計工数や製造コストの低減と製造品質の向上とを実現できるプリント配線基板とそれを積層した基板積層体、並びに上記プリント配線基板または基板積層体を備えた平面コイルおよび平面トランスを提供することを目的としている。
The present invention has been made in consideration of such circumstances, and the object thereof is a printed wiring that is used as a base for easily realizing inductive elements having different specifications by being used alone or by laminating a predetermined number of sheets. It is to provide a substrate.
That is, the present invention uses one or a plurality of printed wiring boards having the same specifications, thereby increasing the degree of freedom in designing induction elements such as planar coils and planar transformers, and designing printed wiring boards including coil portions. An object of the present invention is to provide a printed wiring board capable of realizing a reduction in man-hours and manufacturing costs and an improvement in manufacturing quality, a board laminated body on which the printed wiring board is laminated, and a planar coil and a planar transformer including the printed wiring board or the board laminated body. It is said.

上述した目的を達成するべく本発明に係るプリント配線基板は、絶縁基板の両面をなす第1表面および第2表面にそれぞれ導体部を備え、且つ複数枚積層して形成される基板積層体の構成要素をなすものであって、前記第1表面の予め定めた第1領域を囲むループを形成して該第1表面に設けた第1導体部と、前記第1領域に重ねて前記第2表面に定めた第2領域を囲むループを形成して該第2表面に設けた第2導体部と、前記第1導体部から離反して前記第1表面に設けた第3導体部、および前記第2導体部から離反して前記第2表面に設けた第4導体部と、前記絶縁基板の両面間に跨って設けられて前記第1導体部と前記第4導体部、および前記第2導体部と前記第3導体部をそれぞれ接続した第1および第2面間接続部と、前記第1領域を通る基準線を中心として区分される前記第1表面の一側の領域において前記第1導体部および前記第3導体部にそれぞれ連なって設けられて前記第1導体部と前記第3導体部との選択接続に供される第1および第2選択接続部とを具備し、前記基準線を中心として区分される前記第1基板の他側の領域において前記第1および第2選択接続部の形成領域と線対称となる領域を導体部の非形成領域としたことを特徴としている。   In order to achieve the above-described object, the printed wiring board according to the present invention has a configuration of a substrate laminate that includes conductor portions on each of the first surface and the second surface that form both surfaces of the insulating substrate, and is formed by laminating a plurality of sheets. A first conductor portion formed on the first surface by forming a loop surrounding a predetermined first region of the first surface; and the second surface overlapping the first region. A second conductor portion formed on the second surface by forming a loop surrounding the second region defined in the above, a third conductor portion provided on the first surface away from the first conductor portion, and the first A fourth conductor portion provided on the second surface away from the two conductor portions; a first conductor portion and the fourth conductor portion provided between both surfaces of the insulating substrate; and the second conductor portion. And first and second inter-surface connection portions respectively connecting the third conductor portions, and the first region The first conductor portion and the third conductor portion, respectively, connected to the first conductor portion and the third conductor portion in a region on one side of the first surface that is divided with a reference line passing through Forming the first and second selective connection portions in a region on the other side of the first substrate that is divided around the reference line. A region that is symmetrical with the region is a non-formation region of the conductor portion.

好ましくは前記第1および第2領域は、前記絶縁基板に穿たれたホールの開口領域として規定される。また前記基準線を中心として前記第1および第2選択接続部の形成領域と線対称となる導体部の非形成領域についても、前記絶縁基板に穿いたホールの開口領域としておくことが望ましい。   Preferably, the first and second regions are defined as opening regions of holes formed in the insulating substrate. In addition, it is desirable that a non-formation region of the conductor portion that is line-symmetric with the formation region of the first and second selective connection portions with the reference line as a center is also an opening region of a hole formed in the insulating substrate.

また本発明に係るプリント配線基板は、更に前記第2導体部に連なって前記第2表面に設けられて別のプリント配線基板における前記第2導体部との接続に用いられる第1基板間接続部と、前記第4導体部に連なって前記第2表面に設けられて別のプリント配線基板における第1導体部との接続に用いられる第2基板間接続部とを備えることを特徴としている。   Further, the printed wiring board according to the present invention is further provided on the second surface connected to the second conductor portion and used for connection with the second conductor portion in another printed wiring board. And a second inter-substrate connection portion provided on the second surface and connected to the first conductor portion in another printed wiring board, connected to the fourth conductor portion.

更に本発明に係る基板積層体は、同一仕様の上述した複数枚のプリント配線基板を積層したものであって、前記複数枚のプリント配線基板は、前記第1表面どうしを、または前記第2表面どうしを当接させ、且つ前記第1領域および第2領域を相互に重ね合わせて積層し、前記第1および第2基板間接続部を介して基板間接続したことを特徴としている。   Furthermore, the substrate laminate according to the present invention is a laminate of the above-mentioned plurality of printed wiring boards having the same specifications, and the plurality of printed wiring boards are arranged such that the first surfaces are connected to each other or the second surface. Further, the first region and the second region are stacked on top of each other and are connected to each other through the first and second inter-substrate connecting portions.

そして本発明に係る平面コイルは、前述したプリント配線基板、若しくは基板積層体を備えたことを特徴とし、また本発明に係る平面トランスは、前述した複数の基板積層体を備え、該複数の基板積層体がそれぞれ備える平面コイルを互いに電磁結合させて積層したことを特徴としている。この平面コイルの電磁結合は、例えば複数の基板積層体間に跨って、前記第1領域および第2領域を形成したホールに挿通させたコア体を介して行われる。   The planar coil according to the present invention includes the printed wiring board or the substrate laminate described above, and the planar transformer according to the present invention includes the plurality of substrate laminates described above, and the plurality of substrates. The planar coils included in each of the laminates are laminated by electromagnetic coupling to each other. The electromagnetic coupling of the planar coil is performed, for example, via a core body that is inserted between holes formed in the first region and the second region across a plurality of substrate laminates.

上記構成のプリント配線基板によれば、基本的には前記第1および第2選択接続部間を接続するだけで第1表面および第2表面にそれぞれループを形成した第1導体部と第2導体部を簡易に直列接続することができる。更に前記基準線を中心として前記第1および第2選択接続部の形成領域と線対称となる領域が導体部の非形成領域となっているので、同一仕様の複数枚のプリント配線基板の第1表面どうしを、或いは第2表面どうしを当接させて積層した際、当接する各プリント配線基板の選択接続部どうしが干渉し合うことがない。従って前記第1および第2基板間接続部を介して複数枚のプリント配線基板間を接続するだけで、各プリント配線基板がそれぞれ備える第1導体部と第2導体部を順に直列接続することができる。   According to the printed wiring board having the above-described configuration, basically, the first conductor portion and the second conductor, in which loops are formed on the first surface and the second surface, respectively, simply by connecting the first and second selective connection portions. The units can be easily connected in series. Furthermore, since the region that is line-symmetric with the formation region of the first and second selective connection portions with respect to the reference line is a non-formation region of the conductor portion, the first of the plurality of printed wiring boards having the same specification When the surfaces or the second surfaces are brought into contact with each other and stacked, the selective connection portions of the printed wiring boards in contact with each other do not interfere with each other. Therefore, the first conductor portion and the second conductor portion included in each printed wiring board can be connected in series in order only by connecting a plurality of printed wiring boards via the first and second board connecting portions. it can.

従って同一仕様の本発明に係る複数枚のプリント配線基板を、その第1表面どうしを、或いは第2表面どうしを当接させて積層し、これらのプリント配線基板間を順に接続するだけで各プリント配線基板の第1導体部および第2導体部を直列に接続した平面コイル等の誘導素子を容易に実現することができ、平面コイルや平面トランスなどの誘導素子の設計自由度を高めるとともに、コイル部を含むプリント配線基板設計の工数を低減することができる。また統一された同一仕様のプリント配線基板を用いるだけなので、プリント配線基板の調達や管理などを含む総合的な製造コストの低減と製造品質の向上とを実現することが可能となる。   Accordingly, a plurality of printed wiring boards of the same specification according to the present invention are laminated by bringing the first surfaces or the second surfaces into contact with each other, and each printed wiring board is connected in order. An inductive element such as a planar coil in which the first conductor portion and the second conductor portion of the wiring board are connected in series can be easily realized, and the degree of freedom in designing an inductive element such as a planar coil and a planar transformer is increased. The number of man-hours for designing a printed wiring board including a portion can be reduced. In addition, since only unified printed wiring boards having the same specifications are used, it is possible to realize overall reduction of manufacturing costs and improvement of manufacturing quality including procurement and management of printed wiring boards.

本発明の一実施形態に係るプリント配線基板の概略構成を示す図で、(a)は斜視図、(b)は第1表面(A面)の構成図、(c)は第2表面(B面)の構成図。BRIEF DESCRIPTION OF THE DRAWINGS It is a figure which shows schematic structure of the printed wiring board based on one Embodiment of this invention, (a) is a perspective view, (b) is a block diagram of 1st surface (A surface), (c) is 2nd surface (B FIG. 図1に示すプリント配線基板を用いた1ターンおよび2ターンの平面コイルを形成する導体間接続例を示す図。The figure which shows the example of connection between conductors which forms the flat coil of 1 turn and 2 turns using the printed wiring board shown in FIG. 図1に示すプリント配線基板を2枚積層した基板積層体における3ターンおよび4ターンの平面コイルを形成する導体間接続例を示す図。The figure which shows the example of connection between conductors which forms the 3-turn and 4-turn planar coil in the board | substrate laminated body which laminated | stacked two printed wiring boards shown in FIG. 積層した2枚のプリント配線基板間の接続構造例を示す図。The figure which shows the example of a connection structure between the two printed wiring boards laminated | stacked. 図1に示すプリント配線基板を3枚積層した基板積層体における5ターンおよび6ターンの平面コイルを形成する導体間接続例を示す図。The figure which shows the example of connection between conductors which forms the 5-turn and 6-turn planar coil in the board | substrate laminated body which laminated | stacked three printed wiring boards shown in FIG. 3枚のプリント配線基板の積層構造例を示す図。The figure which shows the laminated structure example of three printed wiring boards. 本発明の別の実施形態に係るプリント配線基板の概略構成を示す図で、(a)は第1表面(A面)の構成を示す図、(b)は第2表面(B面)の構成を示す図。It is a figure which shows schematic structure of the printed wiring board which concerns on another embodiment of this invention, (a) is a figure which shows the structure of 1st surface (A surface), (b) is the structure of 2nd surface (B surface). FIG.

以下、図面を参照して本発明の実施形態を説明する。
図1は本発明の一実施形態に係るプリント配線基板の概略構成を示す図であり、(a)はプリント配線基板Pの概略的な外観斜視図、(b)はプリント配線基板Pにおける第1表面(表面側;A面)の構成を、そして(c)は該プリント配線基板Pにおける第2表面(裏面側;B面)の構成を示している。このプリント配線基板Pは、単独で用いられて、或いは複数枚積層して構成される基板積層体Sの構成要素となるもので、所定厚みの絶縁基板1の両面をなす第1表面(A面)1aおよび第2表面(B面)1bのそれぞれに印刷配線により形成した導体部2を有する。
Hereinafter, embodiments of the present invention will be described with reference to the drawings.
FIG. 1 is a diagram showing a schematic configuration of a printed wiring board according to an embodiment of the present invention, where (a) is a schematic external perspective view of the printed wiring board P, and (b) is a first view of the printed wiring board P. The configuration of the front surface (front surface side: A surface) and (c) shows the configuration of the second front surface (back surface side; B surface) of the printed wiring board P. This printed wiring board P is used as a component of a substrate laminate S formed by being used alone or by laminating a plurality of sheets, and a first surface (A surface) forming both surfaces of an insulating substrate 1 having a predetermined thickness. ) 1a and the second surface (B surface) 1b each have a conductor portion 2 formed by printed wiring.

図1に示すように、プリント配線基板Pの基体をなす絶縁基板1は、全体的には基準線Xを中心として略対称な凸型の形状を有し、その凸部には前記基準線Xを中心とする矩形状のホール(開口部)3が穿たれている。このホール3により、平面コイルの形成領域を規定する為の矩形状の第1領域3aが第1表面1aに設定され、同時に第2表面1bには上記第1領域3aと重なる矩形状の第2領域3bが設定されている。   As shown in FIG. 1, the insulating substrate 1 that forms the base of the printed wiring board P has a generally symmetrical convex shape around the reference line X, and the reference line X is formed on the convex portion. A rectangular hole (opening) 3 centered at the center is formed. By this hole 3, a rectangular first region 3a for defining a formation region of the planar coil is set on the first surface 1a, and at the same time, a rectangular second region overlapping the first region 3a is formed on the second surface 1b. Area 3b is set.

このような絶縁基板1の第1表面(A面)1aおよび第2表面(B面)1bにそれぞれ印刷配線により形成される導体部2は、基本的には第1領域3a(ホール3)を囲むループを形成して該第1表面1aに設けた第1導体部11と、前記第2領域3b(ホール3)を囲むループを形成して該第2表面1bに設けた第2導体部12、更に前記第1導体部11から離反して前記第1表面1aに設けた第3導体部13、および前記第2導体部12から離反して前記第2表面1bに設けた第4導体部14とからなる。
尚、ここではホール3の周囲にそれぞれ1ターンの導体ループを形成した例について説明するが、後述するように複数ターンの導体ループを形成した第1導体部11および第2導体部12を設けることも勿論可能である。
The conductor portion 2 formed by printed wiring on the first surface (A surface) 1a and the second surface (B surface) 1b of the insulating substrate 1 basically has the first region 3a (hole 3). A first conductor portion 11 provided on the first surface 1a by forming a surrounding loop and a second conductor portion 12 provided on the second surface 1b by forming a loop surrounding the second region 3b (hole 3). Further, a third conductor portion 13 provided on the first surface 1a away from the first conductor portion 11, and a fourth conductor portion 14 provided on the second surface 1b away from the second conductor portion 12 are provided. It consists of.
Here, an example in which a one-turn conductor loop is formed around the hole 3 will be described. However, as will be described later, a first conductor portion 11 and a second conductor portion 12 each having a plurality of turns of a conductor loop are provided. Of course it is possible.

具体的には前記第1導体部11は、図1(b)に示すように第1表面1aにおいて前記凸型の絶縁基板1の底辺部一端側から凸部に掛けて延在し、前記第1領域3aの周囲を略一周(1ターン)した後、前記絶縁基板1の底辺部他端側に延びる導体パターンからなる。また第2導体部12は、図1(c)に示すように第2表面1bにおいて前記第2領域3bの近傍から該第2領域3bの周囲を略一周(1ターン)した後、前記絶縁基板1の底辺側に掛けて延びる導体パターンからなる。   Specifically, as shown in FIG. 1B, the first conductor portion 11 extends on the first surface 1a from one end of the bottom of the convex insulating substrate 1 to the convex portion, and After one round (1 turn) around the area 3a, the insulating substrate 1 consists of a conductor pattern extending to the other end of the bottom side. Further, as shown in FIG. 1 (c), the second conductor portion 12 is formed on the second substrate 1b by making a round (one turn) around the second region 3b from the vicinity of the second region 3b. It consists of a conductor pattern extending over the bottom side of 1.

このような第1および第2導体部11,12に加えて、前記第1表面1aには図1(b)に示すように第1領域3aの近傍から前記絶縁基板1の底辺部中央に掛けて前記第1導体部11と略平行に第3導体部13が設けられており、また第2表面1bには図1(c)に示すように前記絶縁基板1の略中央部に位置し、前述した基準線Xを跨いで前記第3導体部13と交差するように第4導体部14が設けられている。   In addition to the first and second conductor portions 11 and 12, the first surface 1a is hung from the vicinity of the first region 3a to the center of the bottom portion of the insulating substrate 1 as shown in FIG. The third conductor portion 13 is provided substantially in parallel with the first conductor portion 11, and the second surface 1b is located at the substantially central portion of the insulating substrate 1 as shown in FIG. A fourth conductor portion 14 is provided so as to cross the third conductor portion 13 across the reference line X described above.

ちなみに前記第1導体部11と前記第4導体部14とは、凸型形状をなす前記絶縁基板1の底辺側において該絶縁基板1の両面間を挿通して設けられた貫通ビアからなる第1面間接続部15を介して接続されている。また同様に前記第2導体部12と前記第3導体部13とは、該第3導体部13の端部が位置付けられた前記ホール3の近傍において前記絶縁基板1の両面間を挿通して設けられた貫通ビアからなる第2面間接続部16を介して接続されている。   Incidentally, the first conductor portion 11 and the fourth conductor portion 14 are first vias which are formed by penetrating vias provided between both surfaces of the insulating substrate 1 on the bottom side of the insulating substrate 1 having a convex shape. They are connected via the inter-surface connection part 15. Similarly, the second conductor portion 12 and the third conductor portion 13 are provided by being inserted between both surfaces of the insulating substrate 1 in the vicinity of the hole 3 where the end portion of the third conductor portion 13 is positioned. The connection is made through the second inter-surface connection portion 16 made of the formed through via.

また前記絶縁基板1の第1表面1a側において、前記第1導体部11と前記第3導体部13とが互いに近接して並行に配設された部位には、前記第1導体部11および前記第3導体部13にそれぞれ連なる第1および第2選択接続部(パッド)17,18が近接させて設けられている。これらの選択接続部17,18は、前記第1導体部11と第3導体部13との選択的な接続に供されるもので、その接続は、例えば外付けの接続部品である0Ωのチップ抵抗を前記選択接続部17,18間に跨って装着することにより実現される。接続部品は0Ωのチップ抵抗に限らず、例えば選択接続部どうしを直接半田付けなどで電気的に接続する方法であっても良い。   Further, on the first surface 1 a side of the insulating substrate 1, the first conductor portion 11 and the third conductor portion 13 are arranged close to each other in parallel with each other at the first conductor portion 11 and the third conductor portion 13. First and second selective connection portions (pads) 17 and 18 respectively connected to the third conductor portion 13 are provided close to each other. These selective connection portions 17 and 18 are used for selective connection between the first conductor portion 11 and the third conductor portion 13, and the connection is, for example, a 0Ω chip which is an external connection component. This is realized by mounting a resistor across the selective connection portions 17 and 18. The connection component is not limited to a chip resistance of 0Ω, and for example, a method of electrically connecting selected connection portions by direct soldering or the like may be used.

特に上記選択接続部17,18は、前記基準線Xにて区分される第1表面1aの一方の領域、具体的には図1(b)において前記基準線Xの右側の領域に設けられている。そして前記基準線Xにて区分される第1表面1aの他方の領域、具体的には図1(b)において基準線Xの左側領域における前記選択接続部17,18の形成領域とは線対称となる領域には、導体の非形成領域としてのホール4が設けられている。   In particular, the selective connection portions 17 and 18 are provided in one region of the first surface 1a divided by the reference line X, specifically, in the region on the right side of the reference line X in FIG. Yes. The other region of the first surface 1a divided by the reference line X, specifically, the region where the selective connection portions 17 and 18 are formed in the left region of the reference line X in FIG. In the region, a hole 4 is provided as a conductor non-formation region.

このホール4は、後述するように2枚のプリント配線基板を、その第1表面1aどうしを当接させて重ね合わせたとき、つまり一方のプリント配線基板を裏返しに重ね合わせたとき、別のプリント配線基板における前記選択接続部17,18を当該プリント配線基板の第2表面1b側に露出させる役割を担う。またこのホール4は、2枚のプリント配線基板を重ね合わせたとき、別のプリント配線基板の選択接続部17,18に装着される前述した接続部品の逃げ領域(非干渉領域)としても機能する。   As will be described later, this hole 4 is formed when two printed wiring boards are overlapped with their first surfaces 1a in contact with each other, that is, when one printed wiring board is overlapped and turned over. It plays the role which exposes the said selective connection parts 17 and 18 in a wiring board to the 2nd surface 1b side of the said printed wiring board. The hole 4 also functions as a relief area (non-interference area) for the above-described connection component mounted on the selective connection portions 17 and 18 of another printed wiring board when the two printed wiring boards are overlapped. .

一方、上述した構成のプリント配線基板Pの第2表面1bには、更に前記第2導体部12に連なって、別のプリント配線基板Pにおける前記第2導体部12との接続に用いられる第1基板間接続部(パッド)19が設けられる。またプリント配線基板Pの第2表面1bには、前記第4導体部14に連なって別のプリント配線基板Pにおける第1導体部11との接続に用いられる第2基板間接続部(パッド)20が設けられる。   On the other hand, the second surface 1b of the printed wiring board P having the above-described configuration is further connected to the second conductor portion 12 and connected to the second conductor portion 12 in another printed wiring board P. A board-to-board connection part (pad) 19 is provided. Further, on the second surface 1b of the printed wiring board P, a second inter-substrate connection part (pad) 20 used for connection to the first conductor part 11 in another printed wiring board P connected to the fourth conductor part 14 is provided. Is provided.

特にこの第2基板間接続部20は、前記第4導体部14の一端部に設けられており、更にこの第2基板間接続部20の側部には導体の非形成領域としてのホール5が設けられている。このホール5は、2枚のプリント配線基板を、その第1表面1aどうしを当接させて重ね合わせたときに、別のプリント配線基板における前記第1導体部11の一部を当該プリント配線基板の第2表面1b側に露出させる役割を担う。   In particular, the second inter-substrate connection portion 20 is provided at one end of the fourth conductor portion 14, and a hole 5 as a conductor non-formation region is formed on the side portion of the second inter-substrate connection portion 20. Is provided. When the two printed wiring boards are overlapped with the first surfaces 1a being in contact with each other, the holes 5 are formed so that a part of the first conductor portion 11 in another printed wiring board is part of the printed wiring board. It plays a role of exposing to the second surface 1b side.

そして前記基準線Xを中心として前記ホール5とは線対称となる領域であって、前記第1導体部11の上述した如くホール5を介して露出される一部の領域は、該第1導体部11と別のプリント配線基板Pにおける第4導体部の前述した第2基板間接続部20との接続に供される第3基板間接続部(パッド)21として設定されている。この第3基板間接続部21は、前記第2基板間接続部20と対をなす接続領域である。   An area that is axisymmetric with respect to the hole 5 with respect to the reference line X, and a part of the first conductor portion 11 exposed through the hole 5 as described above is the first conductor. It is set as a third inter-substrate connection portion (pad) 21 used for connection of the fourth conductor portion of the printed wiring board P different from the portion 11 to the above-described second inter-substrate connection portion 20. The third inter-substrate connection portion 21 is a connection region that makes a pair with the second inter-substrate connection portion 20.

また前記第2導体部12の前述した第1基板間接続部19の側部には、導体の非形成領域としての切り欠き(ホール)6が設けられている。この切り欠き6は、2枚のプリント配線基板Pを、その第2表面1bどうしを当接させて重ね合わせたときに、別のプリント配線基板Pにおける前記第2導体部12の一部を当該プリント配線基板Pの第2表面1b側に露出させる役割を担う。そして前記基準線Xを中心として前記切り欠き6と線対称となる領域であって、前記第2導体部12の上述した如く切り欠き6を介して露出される領域は、2枚のプリント配線基板Pにおける第2導体部12どうしの接続に供される第4基板間接続部(パッド)22として設定されている。この第4基板間接続部22は、前記第1基板間接続部19と対をなす接続領域である。   Further, a notch (hole) 6 as a conductor non-formation region is provided on the side of the first inter-substrate connecting portion 19 of the second conductor portion 12 described above. When the two printed wiring boards P are overlapped with the second surfaces 1b coming into contact with each other, the notch 6 is used to place a part of the second conductor portion 12 in another printed wiring board P in the notch 6 It plays a role of exposing to the second surface 1b side of the printed wiring board P. An area that is line-symmetric with the notch 6 around the reference line X and that is exposed through the notch 6 of the second conductor portion 12 as described above is two printed wiring boards. It is set as a fourth inter-substrate connection part (pad) 22 provided for connection between the second conductor parts 12 in P. The fourth inter-substrate connection portion 22 is a connection region that makes a pair with the first inter-substrate connection portion 19.

尚、前述した凸型の絶縁基板1の底辺部にそれぞれ位置付けられた前記第1導体部11の両端部、および前記第3導体部13の他端部は、外部配線接続部(パッド)23,24,25として設定されている。そして前記プリント配線基板Pの第1表面1aおよび第2表面1bは、前述した基板間接続部19,20,21,22および前記外部配線接続部23,24,25を除いて後述するソルダーレジスト26にて被覆され、外部に対して絶縁されている。   Note that both end portions of the first conductor portion 11 and the other end portion of the third conductor portion 13 positioned at the bottom side of the convex insulating substrate 1 described above are external wiring connection portions (pads) 23, 24 and 25 are set. The first surface 1a and the second surface 1b of the printed wiring board P are formed on a solder resist 26, which will be described later, except for the inter-board connecting portions 19, 20, 21, and 22 and the external wiring connecting portions 23, 24, and 25 described above. And insulated from the outside.

次に上記構成のプリント配線基板Pを用いて実現される平面コイル(プレーナコイル)について説明する。
図2は1枚のプリント配線基板Pを用いて1ターンおよび2ターンの平面コイルを実現する例を示している。尚、図2においては、プリント配線基板Pの両面にそれぞれ形成した導体部を、その一面側から透視した状態で示している。
Next, a planar coil (planar coil) realized by using the printed wiring board P having the above configuration will be described.
FIG. 2 shows an example in which a one-turn and two-turn planar coil is realized by using one printed wiring board P. In FIG. 2, the conductor portions formed on both surfaces of the printed wiring board P are shown as seen through from one surface side.

1ターンの平面コイルを実現する場合、前述した選択接続部17,18間を離反させた状態のまま、図2に示すように第1外部配線接続部23から第1導体部11を経て第2外部配線接続部24に至る、図中太実線Aで示す導体路を形成する。すると第1導体部11は、ホール3の周囲を略1周しているだけなので、ここに1ターンの平面コイルが実現される。   In the case of realizing a one-turn planar coil, the second connection through the first conductor portion 11 from the first external wiring connection portion 23 as shown in FIG. A conductor path indicated by a thick solid line A in the figure reaching the external wiring connection portion 24 is formed. Then, since the 1st conductor part 11 only makes the circumference | surroundings of the circumference | surroundings of the hole 3, the planar coil of 1 turn is implement | achieved here.

これに対して2ターンの平面コイルを実現する場合、前述した選択接続部17,18間に接続部品である0Ωのチップ抵抗27を装着し、第1導体部11と第3導体部13を接続する。そして図2に示すように第1外部配線接続部23から第1導体部11を経て選択接続部17に至り、更にチップ抵抗27を介して選択接続部18から第3導体部13に至る導体路を形成する。この第3導体部13の端部は前記第2面間接続部16を介して第2表面1b側の第2導体部12に接続されているので、該第2導体部12を経てその端部の基板間接続部19に至る、図中太実線Aおよび太破線Bで示す導体路が形成される。すると第1導体部11はホール3の周囲を略1周しており、第2導体部12は前記第1導体部11に重なってホール3の周囲を略1周しているので、ここに2ターンの平面コイルが実現される。   On the other hand, in order to realize a two-turn planar coil, a 0Ω chip resistor 27 as a connecting component is mounted between the selective connection portions 17 and 18 described above, and the first conductor portion 11 and the third conductor portion 13 are connected. To do. Then, as shown in FIG. 2, a conductor path from the first external wiring connecting portion 23 to the selective connecting portion 17 through the first conductor portion 11 and further from the selective connecting portion 18 to the third conductor portion 13 through the chip resistor 27. Form. Since the end portion of the third conductor portion 13 is connected to the second conductor portion 12 on the second surface 1b side via the second inter-surface connection portion 16, the end portion thereof passes through the second conductor portion 12. A conductor path indicated by a thick solid line A and a thick broken line B in the figure is formed to reach the inter-board connecting portion 19. Then, the first conductor portion 11 makes a round around the hole 3, and the second conductor portion 12 overlaps the first conductor portion 11 and makes a round around the hole 3. A planar coil of turns is realized.

一方、3ターンおよび4ターンの平面コイルを実現する場合には、上述した2ターンの平面コイルを構築したプリント配線基板P1に加えて、該プリント配線基板P1と同一仕様の別(2枚目)のプリント配線基板P2を前記プリント配線基板P1に積層して実現する。そして1枚目のプリント配線基板P1については、前述した図2に示すように2ターンの平面コイルを形成する接続を行う。   On the other hand, when realizing a three-turn and four-turn planar coil, in addition to the printed wiring board P1 constructed with the two-turn planar coil described above, another one having the same specifications as the printed wiring board P1 (second sheet) This printed wiring board P2 is laminated on the printed wiring board P1. The first printed wiring board P1 is connected to form a two-turn planar coil as shown in FIG.

また2枚目のプリント配線基板P2ついては1枚目のプリント配線基板P1に対して裏返しにし、第2表面1bどうしを当接させて積層する。つまり図3に示すように上記1枚目のプリント配線基板P1の第2表面1bに2枚目のプリント配線基板P2の第2表面1bを重ね合わせる。この際、2枚のプリント配線基板P1,P2における前述したホール3を同軸に位置合わせし、これらの各プリント配線基板P1,P2にそれぞれ設けられた第1導体部11および第2導体部12が前記ホール3の周囲において互いに重なり合うように配置する。   Further, the second printed wiring board P2 is turned over with respect to the first printed wiring board P1, and the second surfaces 1b are brought into contact with each other and laminated. That is, as shown in FIG. 3, the second surface 1b of the second printed wiring board P2 is superimposed on the second surface 1b of the first printed wiring board P1. At this time, the holes 3 described above in the two printed wiring boards P1 and P2 are coaxially aligned, and the first conductor portion 11 and the second conductor portion 12 respectively provided in each of the printed wiring boards P1 and P2 are provided. The holes 3 are arranged so as to overlap each other around the hole 3.

尚、この図3においても各プリント配線基板P1,P2の両面にそれぞれ設けられた導体部については、1枚目のプリント配線基板P1の第1表面1a側から見た透視パターンとして示してある。そして1枚目のプリント配線基板P1における第1基板間接続部19を、2枚目のプリント配線基板P2における第4基板間接続部22に接続し、これによって両プリント配線基板P1,P2における第2導体部12どうしを接続する。   In FIG. 3 as well, the conductor portions provided on both surfaces of each printed wiring board P1, P2 are shown as perspective patterns viewed from the first surface 1a side of the first printed wiring board P1. Then, the first inter-board connection part 19 in the first printed wiring board P1 is connected to the fourth inter-board connection part 22 in the second printed wiring board P2, thereby the first inter-board connection parts 22 in both printed wiring boards P1 and P2. Two conductor portions 12 are connected to each other.

すると2枚目のプリント配線基板P2における第2導体部12は、前述した第2面間接続部16を介して該2枚目のプリント配線基板P2における第1導体部11に接続されているので、図3に太実線Cで示すように第2導体部12から第1面間接続部16を経て該2枚目のプリント配線基板P2における第3導体部13に接続され、これによって第3導体部13の端部に設けられた第3外部接続領域25に至る導体路が形成される。このとき2枚目のプリント配線基板P2における第2導体部12も前記ホール3の周囲を略1周しているので、前述した1枚目のプリント配線基板P1と合わせて3ターンの平面コイルを実現した基板積層体Sが構築される。   Then, the second conductor portion 12 in the second printed wiring board P2 is connected to the first conductor portion 11 in the second printed wiring board P2 through the second inter-surface connection portion 16 described above. 3, the second conductor portion 12 is connected to the third conductor portion 13 of the second printed wiring board P2 through the first inter-surface connection portion 16 as indicated by a thick solid line C, whereby the third conductor A conductor path reaching the third external connection region 25 provided at the end of the portion 13 is formed. At this time, since the second conductor portion 12 of the second printed wiring board P2 also makes one round around the hole 3, a three-turn planar coil is combined with the first printed wiring board P1 described above. The realized substrate laminate S is constructed.

尚、2枚のプリント配線基板P1,P2の積層と、2枚のプリント配線基板P1,P2間の接続については、図4(a)にその断面構造を模式的に示すように半田や異方性導電フィルム等の導電接続部材31を用いて2枚のプリント配線基板P1,P2の導体部間を電気的に接続すれば良い。この際、各プリント配線基板P1,P2の両面にそれぞれ配設された導体部間を相互に接続する貫通ビア28を適宜設けておけば、図4(b)に示すように他のプリント配線基板Pの導体部との接続領域を拡大することができ、その接続信頼性を高めることが可能となる。   As for the lamination of the two printed wiring boards P1 and P2 and the connection between the two printed wiring boards P1 and P2, as shown schematically in FIG. What is necessary is just to electrically connect between the conductor parts of two printed wiring boards P1 and P2 using the conductive connection members 31 such as conductive films. At this time, if through vias 28 for connecting the conductor portions respectively provided on both surfaces of each printed wiring board P1, P2 are appropriately provided, another printed wiring board as shown in FIG. The connection region with the P conductor portion can be expanded, and the connection reliability can be increased.

また4ターンの平面コイルを実現する場合には、2枚目のプリント配線基板P2における前記選択接続部17,18間に接続部品である0Ωのチップ抵抗27を装着し、2枚目のプリント配線基板P2における第1導体部11と第3導体部13を接続する。すると2枚目のプリント配線基板P2における第3導体部13により、図中太破線Dに示すような導体路が追加され、従って1枚目のプリント配線基板P1における第1および第2導体部11,12がなす2ターンの平面コイルに、2枚目のプリント配線基板P2における第2および第1導体部12,11がなす2ターンの平面コイルが直列に接続される。そして1枚目のプリント配線基板P1の第1外部配線接続部23から前記ホール3の周囲を囲んで2枚目のプリント配線基板P2の第1外部配線接続部23に至る導体部11,12により、計4ターンの平面コイルが実現される。   When a four-turn planar coil is realized, a 0Ω chip resistor 27 as a connection component is mounted between the selective connection portions 17 and 18 in the second printed wiring board P2, and the second printed wiring board is mounted. The 1st conductor part 11 and the 3rd conductor part 13 in the board | substrate P2 are connected. Then, a conductor path as shown by a thick broken line D in the figure is added by the third conductor portion 13 in the second printed wiring board P2, and accordingly, the first and second conductor portions 11 in the first printed wiring board P1. , 12 is connected in series to the two-turn planar coil formed by the second and first conductor portions 12 and 11 of the second printed wiring board P2. Then, conductor portions 11 and 12 that surround the hole 3 from the first external wiring connection portion 23 of the first printed wiring board P1 to the first external wiring connection portion 23 of the second printed wiring board P2. A total of four turns of a planar coil is realized.

また5ターンおよび6ターンの平面コイルを実現する場合には、前述した4ターンの平面コイルを構築した2枚のプリント配線基板P1,P2の基板積層体Sに加えて、更に上記各プリント配線基板P1,P2と同一仕様の3枚目のプリント配線基板P3を積層する。この3枚目のプリント配線基板P3ついては1枚目のプリント配線基板P1に積層した2枚目のプリント配線基板P2に対して裏返しにして積層する。この際、3枚のプリント配線基板P1,P2,P3における各ホール3を互いに同軸に位置合わせし、これらのプリント配線基板P1,P2,P3にそれぞれ設けられた第1導体部11および第2導体部12が前記ホール3の周囲において互いに重なり合うように配置することは言うまでもない。   Further, in the case of realizing a 5-turn and 6-turn planar coil, in addition to the above-described substrate laminate S of the two printed wiring boards P1 and P2 constructed of the 4-turn planar coil, each printed wiring board described above is further provided. A third printed wiring board P3 having the same specifications as P1 and P2 is laminated. The third printed wiring board P3 is laminated upside down with respect to the second printed wiring board P2 laminated on the first printed wiring board P1. At this time, the holes 3 in the three printed wiring boards P1, P2, and P3 are coaxially aligned with each other, and the first conductor portion 11 and the second conductor provided on the printed wiring boards P1, P2, and P3, respectively. Needless to say, the portions 12 are arranged so as to overlap each other around the hole 3.

具体的には1枚目および2枚目のプリント配線基板P1,P2については、前述した図3に示すように4ターンの平面コイルを形成する接続を行い、図5に示すように上記2枚目のプリント配線基板P2の第1表面1aに3枚目のプリント配線基板P3の第1表面1bを当接させてこれらを重ね合わせる。尚、この図5においても前述した図2および図3と同様に各プリント配線基板P1,P2,P3の両面にそれぞれ設けた導体部については、1枚目のプリント配線基板P1の第1表面1a側から見た透視パターンとして示してある。そして2枚目のプリント配線基板P2における第3基板間接続部22を、3枚目のプリント配線基板P3における第2基板間接続部20に接続し、これによって2枚目のプリント配線基板P2における第1導体部11と3枚目のプリント配線基板P3における第4導体部14とを接続する。   Specifically, the first and second printed wiring boards P1 and P2 are connected to form a four-turn planar coil as shown in FIG. 3 and the two boards as shown in FIG. The first surface 1b of the third printed wiring board P3 is brought into contact with the first surface 1a of the printed wiring board P2 of the eye, and these are superposed. In FIG. 5, as in FIGS. 2 and 3, the conductor portions provided on both surfaces of each printed wiring board P1, P2, P3 are the first surface 1a of the first printed wiring board P1. It is shown as a perspective pattern seen from the side. Then, the third inter-substrate connection part 22 in the second printed wiring board P2 is connected to the second inter-substrate connection part 20 in the third printed wiring board P3, and thereby the second printed wiring board P2 The first conductor portion 11 is connected to the fourth conductor portion 14 in the third printed wiring board P3.

すると第4導体部14は、前述したように第1面間接続部15を介して第1導体部11に接続されているので、図5に太実線Dで示すように3枚目のプリント配線基板P3における第1導体部11によって前記ホール3の周囲に5ターン目のループが形成される。
そしてこの3枚目のプリント配線基板P3についても、その選択接続部17,18間に接続部品である0Ωのチップ抵抗27を装着すれば、これによって該3枚目のプリント配線基板P3における第1導体部11に前述した第2面間接続部16を介して第2導体部12が接続されるので、図5に太破線Eで示すように3枚目のプリント配線基板P3の第2導体部12によって前記ホール3の周囲に6ターン目のループが形成される。
Then, since the fourth conductor portion 14 is connected to the first conductor portion 11 via the first inter-surface connection portion 15 as described above, the third printed wiring as shown by the thick solid line D in FIG. A loop of the fifth turn is formed around the hole 3 by the first conductor portion 11 in the substrate P3.
Then, with respect to the third printed wiring board P3, if a 0Ω chip resistor 27, which is a connecting component, is mounted between the selective connection portions 17 and 18, the first printed wiring board P3 in the third printed wiring board P3 is thereby mounted. Since the second conductor portion 12 is connected to the conductor portion 11 via the second inter-surface connection portion 16 described above, the second conductor portion of the third printed wiring board P3 as shown by a thick broken line E in FIG. 12, a loop of the sixth turn is formed around the hole 3.

ちなみに上述した如くして3枚のプリント配線基板P1,P2,P3を積層して基板積層体Sを構成するに際しては、例えば図6に示すようなE字形のクランプ部材29を用いて各プリント配線基板P1,P2,P3のホール3を設けた凸部側をクランプする。この際、クランプ部材29の中央突部を前記各プリント配線基板P1,P2,P3のホール3にそれぞれ挿通させることで各プリント配線基板P1,P2,P3を位置合わせする。この際、インダクタンス値を増加させたり洩れ磁束を低減させたりするために、該クランプ部材29として前記平面コイルのコア体となる部材を用いることが好ましい。このようなクランプ部材(コア体)29を用いれば、複数の平面コイルを磁気結合させて平面トランスを実現する場合にも好都合である。   Incidentally, when the printed circuit board laminate S is formed by laminating the three printed wiring boards P1, P2, and P3 as described above, for example, each printed wiring is used by using an E-shaped clamp member 29 as shown in FIG. The convex part side provided with the hole 3 of the substrates P1, P2, P3 is clamped. At this time, the printed wiring boards P1, P2, and P3 are aligned by inserting the central protrusion of the clamp member 29 into the holes 3 of the printed wiring boards P1, P2, and P3, respectively. At this time, in order to increase the inductance value or reduce the leakage magnetic flux, it is preferable to use a member that becomes the core body of the planar coil as the clamp member 29. If such a clamp member (core body) 29 is used, it is also convenient when a planar transformer is realized by magnetically coupling a plurality of planar coils.

上述した構成のプリント配線基板Pによれば、同一仕様の複数枚のプリント配線基板Pを交互に裏返し、その第1表面1aどうしを、或いは第2表面1bどうしを当接させて順次重ね合わせて基板積層体Sを構築し、前記選択接続部17,18間に適宜接続部品である0Ωのチップ抵抗27を装着すると共に、これらのプリント配線基板Pにおける第1導体部11間を、また第2導体部12間を順に接続していくことで、簡易に所望とするターン数の平面コイルを実現することができる。   According to the printed wiring board P having the above-described configuration, a plurality of printed wiring boards P having the same specification are alternately turned over, and the first surfaces 1a or the second surfaces 1b are brought into contact with each other and sequentially overlapped. A substrate laminate S is constructed, and a 0Ω chip resistor 27, which is a connection component, is appropriately attached between the selective connection portions 17 and 18, and between the first conductor portions 11 in these printed wiring boards P and second By connecting the conductor portions 12 in order, a planar coil having a desired number of turns can be easily realized.

しかも前述した第3導体部13と第4導体部14とを利用し、隣り合って積層されるプリント配線基板Pの導体部間を接続するだけなので、前述した特許文献1,2等に紹介される従来技術と異なって、プリント配線基板毎にコイル部をなす導体パターンや、その接続部の位置等を変える必要がない。換言すれば形状や大きさ、更には導体パターン等を統一した同一仕様のプリント配線基板Pを1枚または複数枚積層して用いることで、所望とするターン数の平面コイルや平面トランス等の誘導素子を自由に設計することができ、その設計自由度が高い。また同一仕様のプリント配線基板Pを統一的に用いるだけなので、基となるプリント配線基板Pの設計工数の低減ができるとともに、平面コイルや平面トランス等の誘導素子を構成する上での製造コストを低減でき、製造品質の向上を図ることも可能となる。   Moreover, since the third conductor portion 13 and the fourth conductor portion 14 described above are used and only the conductor portions of the printed wiring board P stacked adjacent to each other are connected, they are introduced in the aforementioned Patent Documents 1 and 2 and the like. Unlike the prior art, there is no need to change the conductor pattern forming the coil portion, the position of the connecting portion, or the like for each printed wiring board. In other words, by using one or more stacked printed wiring boards P of the same specification with the same shape, size, conductor pattern, etc., it is possible to induce a planar coil or a planar transformer with a desired number of turns. Elements can be designed freely, and the degree of design freedom is high. Moreover, since the printed wiring board P having the same specification is used only in a unified manner, the design man-hours of the printed wiring board P as a base can be reduced, and the manufacturing cost for constructing inductive elements such as a planar coil and a planar transformer can be reduced. It can be reduced, and the manufacturing quality can be improved.

尚、本発明は上述した実施形態に限定されるものではない。例えば、プリント配線基板Pの形状や第1表面および第2表面に印刷配線により形成される導体部などの構成要素の形状やその配置などは、実施形態以外にも選択可能である。   The present invention is not limited to the embodiment described above. For example, the shape of the printed wiring board P, the shape of the components such as the conductor portions formed by the printed wiring on the first surface and the second surface, the arrangement thereof, and the like can be selected in addition to the embodiment.

また、ホール3を囲んでその周囲に設ける第1導体部11および第2導体部12については、予めその周回数(ターン数)を任意に設定しておけば良い。図7はホール3の周囲にそれぞれ2ターンの導体部11,12を設けた例を示しており、3ターン以上の導体部11,12を設けることも勿論可能である。また第1および第2導体部11,12間を接続するための第3および第4導体部13,14の導体パターンや面間接続部の位置等については、前記第1および第2導体部11,12が同じ向きの周回パターンをなすように定めることは勿論のことである。   In addition, for the first conductor portion 11 and the second conductor portion 12 provided around the hole 3, the number of turns (the number of turns) may be arbitrarily set in advance. FIG. 7 shows an example in which the conductor portions 11 and 12 having two turns are provided around the hole 3, and it is of course possible to provide the conductor portions 11 and 12 having three or more turns. Further, the first and second conductor portions 11 will be described with respect to the conductor patterns of the third and fourth conductor portions 13 and 14 for connecting the first and second conductor portions 11 and 12, positions of inter-surface connection portions, and the like. , 12 are of course determined to have a circular pattern in the same direction.

さらに、第1および第2表面1a,1bにおける第1領域3aと第2領域3bとをそれぞれ規定する上で、必ずしも絶縁基板1にホール3を設ける必要がないことも勿論のことであり、要は第1および第2導体部11,12による導体ループ(平面コイル)の形成位置を規定する領域を設定すれば十分である。その他、本発明はその要旨を逸脱しない範囲で種々変形して実施可能である。   Furthermore, in order to define the first region 3a and the second region 3b on the first and second surfaces 1a and 1b, it is needless to say that the hole 3 is not necessarily provided in the insulating substrate 1. It is sufficient to set a region that defines the formation position of the conductor loop (planar coil) by the first and second conductor portions 11 and 12. In addition, the present invention can be variously modified and implemented without departing from the scope of the invention.

P,P1,P2,P3:プリント配線基板、S:基板積層体、1:絶縁基板、2:導体部、3(3a,3b):ホール(第1および第2領域)、4,5:ホール(導体の非形成領域)、6:切り欠き(導体の非形成領域)、11:第1導体部、12:第2導体部、13:第3導体部、14:第4導体部、15,16,28:面間接続部(貫通ビア)、17:第1選択接続部(パッド)、18:第2選択接続部(パッド)、19:第1基板間接続部(パッド)、20:第2基板間接続部(パッド)、21:第3基板間接続部(パッド)、22:第4基板間接続部(パッド)、23,24,25:外部配線接続部(パッド)、26:ソルダーレジスト、27:チップ抵抗、29:クランプ部材、31:導電接続部材。
P, P1, P2, P3: printed wiring board, S: substrate laminate, 1: insulating substrate, 2: conductor portion, 3 (3a, 3b): hole (first and second regions), 4, 5: hole (Conductor non-formation region), 6: notch (conductor non-formation region), 11: first conductor portion, 12: second conductor portion, 13: third conductor portion, 14: fourth conductor portion, 15, 16, 28: Inter-surface connection portion (through via), 17: First selection connection portion (pad), 18: Second selection connection portion (pad), 19: First inter-substrate connection portion (pad), 20: First 2 inter-substrate connection (pad), 21: third inter-substrate connection (pad), 22: fourth inter-substrate connection (pad), 23, 24, 25: external wiring connection (pad), 26: solder Resist, 27: chip resistance, 29: clamp member, 31: conductive connection member.

Claims (5)

絶縁基板の両面をなす第1表面および第2表面にそれぞれ導体部を備え、且つ複数枚積層して形成される基板積層体の構成要素をなすプリント配線基板であって、
前記第1表面の予め定めた第1領域を囲むループを形成して該第1表面に設けた第1導体部と、
前記第1領域に重ねて前記第2表面に定めた第2領域を囲むループを形成して該第2表面に設けた第2導体部と、
前記第1導体部から離反して前記第1表面に設けた第3導体部、および前記第2導体部から離反して前記第2表面に設けた第4導体部と、
前記絶縁基板の両面間に跨って設けられて前記第1導体部と前記第4導体部、および前記第2導体部と前記第3導体部をそれぞれ接続した第1および第2面間接続部と、
前記第1領域を通る基準線を中心として区分される前記第1表面の一側の領域において前記第1導体部および前記第3導体部にそれぞれ連なって設けられて前記第1導体部と前記第3導体部との選択接続に供される第1および第2選択接続部とを具備し、
前記基準線を中心として区分される前記第1基板の他側の領域において前記第1および第2選択接続部の形成領域と線対称となる領域を導体部の非形成領域としたことを特徴とするプリント配線基板。
A printed wiring board comprising a conductor portion on each of a first surface and a second surface forming both surfaces of an insulating substrate, and constituting a component of a substrate laminate formed by laminating a plurality of sheets,
A first conductor portion formed on the first surface by forming a loop surrounding a predetermined first region of the first surface;
A second conductor portion provided on the second surface by forming a loop surrounding the second region defined on the second surface so as to overlap the first region;
A third conductor provided on the first surface away from the first conductor, and a fourth conductor provided on the second surface away from the second conductor;
First and second inter-surface connection portions provided across both surfaces of the insulating substrate and connecting the first conductor portion and the fourth conductor portion, and the second conductor portion and the third conductor portion, respectively. ,
The first conductor portion and the first conductor portion are connected to the first conductor portion and the third conductor portion, respectively, in a region on one side of the first surface that is divided with a reference line passing through the first region as a center. Comprising first and second selective connection portions provided for selective connection with three conductor portions;
A region that is symmetrical with the formation region of the first and second selective connection portions in the region on the other side of the first substrate that is divided with the reference line as a center is defined as a non-formation region of the conductor portion. Printed wiring board.
請求項1に記載のプリント配線基板であって、
更に前記第2導体部に連なって前記第2表面に設けられて別のプリント配線基板における前記第2導体部との接続に用いられる第1基板間接続部と、
前記第4導体部に連なって前記第2表面に設けられて別のプリント配線基板における第1導体部との接続に用いられる第2基板間接続部と
を備えることを特徴とするプリント配線基板。
The printed wiring board according to claim 1,
Furthermore, a first inter-board connection part provided on the second surface connected to the second conductor part and used for connection with the second conductor part in another printed wiring board;
A printed wiring board, comprising: a second inter-substrate connection portion provided on the second surface and connected to the first conductor portion in another printed wiring substrate, connected to the fourth conductor portion.
請求項1または2に記載の同一仕様の複数枚のプリント配線基板を積層した基板積層体であって、
前記複数枚のプリント配線基板は、前記第1表面どうしを、または前記第2表面どうしを当接させ、且つ前記第1領域および第2領域を相互に重ね合わせて積層し、前記第1および第2基板間接続部を介して基板間接続したことを特徴とする基板積層体。
A substrate laminate in which a plurality of printed wiring boards having the same specifications according to claim 1 or 2 are laminated,
The plurality of printed wiring boards are stacked such that the first surfaces or the second surfaces are brought into contact with each other, and the first region and the second region are overlapped with each other. A substrate laminate, wherein the substrates are connected via a connection portion between two substrates.
請求項1または2に記載のプリント配線基板、若しくは請求項3に記載の基板積層体を備えた平面コイル。   The planar coil provided with the printed wiring board of Claim 1 or 2, or the board | substrate laminated body of Claim 3. 請求項3に記載の複数の基板積層体を備え、該複数の基板積層体がそれぞれ備える平面コイルを互いに電磁結合させて積層したことを特徴とする平面トランス。   A planar transformer comprising the plurality of substrate laminates according to claim 3, wherein the planar coils respectively provided in the plurality of substrate laminates are electromagnetically coupled to each other.
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