JP5696668B2 - Receiver and image rejection ratio measuring method - Google Patents

Description

  The present invention relates to a receiver and an image removal ratio measurement method, and more particularly, to a receiver and an image removal ratio measurement method using a measurement result obtained by measuring an image removal ratio.

  In general, in a low IF (Low Intermediate Frequency) type radio signal system, in principle, a received signal includes not only a desired actual signal but also an image of frequency components having a sign different from that of the actual signal. The signal is included as an unwanted component. Therefore, a complex filter having a function of passing a desired real signal and attenuating an image signal is generally used as a receiver of a radio signal system. In the complex filter, it is desirable that the gain of the frequency band of the real signal is higher than the gain of the frequency band of the image signal, and the ratio of the gain of the real signal and the image signal is determined as an image rejection ratio (IRR: It is called Image Rejection Ratio. That is, the complex filter is required to maintain a high image removal ratio.

  FIG. 19 is a configuration diagram showing a general device configuration of a receiver in a low-IF type wireless communication system as a related technique according to the present invention. In the receiver shown in FIG. 19, a low noise amplifier (LNA) 1 amplifies a modulated high frequency received signal received by an antenna. The quadrature mixer 25 includes an I mixer 251 and a Q mixer 252, and includes two local signals LO_I and LO_Q from a local oscillator (LO) 26 whose phases are shifted from each other by 90 degrees, and the low noise amplifier 1. Multiplication with the amplified high frequency received signal is performed. Accordingly, quadrature demodulation is performed while down-converting the high-frequency received signal to an intermediate frequency (IF), and two quadrature demodulated signals IF_I and IF_Q that are 90 degrees out of phase are generated.

  The complex filter 27 receives the two quadrature demodulated signals IF_I and IF_Q output from the quadrature mixer 25, removes the image signal, and outputs only the I-side output signal to the next stage variable gain amplifier (VGA: Variable Gain Amplifier). ) Output to 2. The variable gain amplifier 2 amplifies the signal input from the complex filter 27 to an appropriate amplitude and outputs the amplified signal to an encoder (ADC: Analog-to-Digital Converter) 3 at the next stage. The encoder 3 converts the input analog signal into a digital signal and outputs it to the digital signal processing unit 4, and thereafter, various signal processing is performed in the digital domain.

  In particular, in a wireless communication system with a relatively low data rate that does not perform quadrature modulation, as in the receiver shown in FIG. 19, the I side 271 and the Q side 272 output from each of the complex filter 27, Signal processing is performed using only the output signal on the I side among the output signals on the Q side, and the variable gain amplifier and the encoder that handle the output signal on the Q side are omitted, thereby reducing power consumption. Is adopted.

  Here, in order to ensure a sufficient image rejection ratio in the complex filter 27, it is necessary that the amplitudes of the two orthogonal demodulated signals IF_I and IF_Q input are equal to each other and the phase difference is 90 degrees. However, it is realistic to keep the relationship between the two quadrature demodulated signals IF_I and IF_Q in an ideal state due to a mismatch of elements and wirings in the local oscillator 26, the quadrature mixer 25, and the complex filter 27. Impossible.

  As shown in the characteristic diagram of FIG. 20, this influence appears prominently in the image frequency band, and even if there is a slight mismatch in the relationship between the two orthogonal demodulated signals IF_I and IF_Q, that is, an I / Q mismatch, the image rejection ratio ( IRR) is greatly degraded. FIG. 20 is a characteristic diagram showing frequency characteristics in the general complex filter 27 shown in FIG. 19, and FIG. 20A shows a case where the two quadrature demodulated signals IF_I and IF_Q are in an ideal relationship. FIG. 20B shows the frequency characteristic of the output signal output from the output signal 27, and FIG. 20B shows the frequency of the output signal output from the complex filter 27 when there is an I / Q mismatch in the relationship between the two orthogonal demodulated signals IF_I and IF_Q. The characteristics are shown.

As shown in FIG. _20B , the image rejection ratio (IRR), which is the ratio of the gain Q _fIF of the actual signal at the actual signal frequency f _IF and the gain Q _−fIF of the image signal at the image signal frequency, is two orthogonal. Even a slight I / Q mismatch in the relationship between the demodulated signals IF_I and IF_Q causes a significant deterioration.

  In the configuration of the receiver as shown in FIG. 19, the actual signal frequency component and the image signal frequency component are the frequency of each of the outputs of the I filter 271, the variable gain amplifier 2, and the encoder 3 in the complex filter 27. Since they appear as overlapping signals on the axis and cannot be distinguished, if the image rejection ratio deteriorates, the reception characteristics of the receiver, such as a decrease in the bit error rate, are deteriorated.

  On the other hand, as related art for reducing the I / Q mismatch and increasing the image rejection ratio, Japanese Patent Application Laid-Open No. 2006-157866 “complex filter circuit and reception circuit” disclosed in Japanese Patent Application Laid-Open No. 2006-157866 shown in FIG. 22, Japanese Patent Application Laid-Open No. 2007-104522 “Receiver” in Japanese Patent Application Laid-Open No. 2007-104522 shown in FIG. 22 and Japanese Patent Application Publication No. 2007-052717 “Image Suppression Receiver” in Japanese Patent Application Laid-Open No. 2007-05522 shown in FIG. FIG. 21 is a block diagram showing a device configuration of the receiver described in Patent Document 1 as a related technique according to the present invention, and FIG. 22 shows a receiver described in Patent Document 2 as a related technique according to the present invention. FIG. 23 is a block diagram showing a device configuration of the receiver described in Patent Document 3 as a related technique according to the present invention.

  As shown in FIG. 21, the receiver described in Patent Document 1 includes a low noise amplifier 31, a quadrature mixer 32, variable gain amplifiers 33a and 33b, a complex filter 34, an amplitude detector 35, a filter controller 36, and a simulated image. The signal generation unit 37 and the signal switching unit 38 are included.

  In the receiver of FIG. 21, a simulated image signal generating unit 37 generates an IF band simulated image signal, a signal switching unit 38 switches a signal path, and the generated simulated image signal is input to the complex filter 34. As a result, the amplitude (power) of the simulated image signal output from the complex filter 34 is detected by the amplitude detector 35. The filter control unit 36 controls the element value control unit 342 of the complex filter 34 so that the amplitude of the simulated image signal detected by the amplitude detection unit 35 is minimized. As a result, the parameters (element values) of the I filter 341a and the Q filter 341b in the complex filter 34 are adjusted, and the I / Q mismatch is compensated.

  Further, as shown in FIG. 22, the receiver described in Patent Document 2 includes an orthogonal mixer 41, a switch 41a, variable gain amplifiers 42a and 42b, encoders 43a and 43b, a filter mismatch calibration circuit 44, and an image removal circuit. 45, a calibration control circuit 46, a calibration signal source 47, a filter mismatch detection circuit 48, and a tap count calculation circuit 49.

In the receiver of FIG. 22, before receiving a signal from the antenna, the calibration control circuit 46 controls the RF band frequencies (f ₁ , f ₂ , f ₃ ,...) From the calibration signal source 47. The signal is input to the quadrature mixer 41 via the switch 41a, the encoded I and Q components are monitored by the encoder 43a and 43b by the filter mismatch detection circuit 48, and the intermediate IF band after demodulation is detected. By calibrating the tap value from the tap count calculation circuit 49 and inputting it to the filter mismatch calibration circuit 44 so that the mismatch between the amplitude and phase of the I component and Q component in the frequency signal (orthogonal demodulated signal) is zero. The image rejection ratio is increased.

  Further, as shown in FIG. 23, the receiver described in Patent Document 3 includes a low noise amplifier 51, multipliers 52a and 52b, a phase locked oscillator 53, low pass filters 54a and 54b, a path switching circuit 55, a phase adjustment. The circuit 56 includes image suppression circuits 57a and 57b, encoders 58a and 58b, and a digital signal processing circuit 59.

  The receiver shown in FIG. 23 includes two image suppression circuits 57a and 57b. In one image suppression circuit 57a, the I signal and the Q signal are switched so that the input signal of the desired wave is recognized as an image signal. In the other image suppression circuit 57b, the I signal and the Q signal are input as they are without being exchanged, recognized as a desired wave, passed without loss, and the image suppression circuit 57a, The phase adjustment circuit 56 adjusts the phase or amplitude of the I signal and the Q signal so that the difference in the signal intensity output from each of the 57b is maximized, thereby improving the image rejection ratio.

JP 2006-157866 A (page 9-13, FIG. 1) JP 2007-104522 A (page 8-12, FIG. 1) International Publication No. 2007/052717 (page 9-11, FIG. 1)

  However, in the case of the method disclosed in Patent Document 1, since the amplitude detection is required for the Q side output of the complex filter 34 in order to calculate the image removal ratio, the power consumption and the chip area are increased. End up. Further, in principle, it cannot cope with the I / Q mismatch generated in the orthogonal mixer 32. It is difficult to obtain a sufficiently high image rejection ratio unless a mechanism that compensates for an I / Q mismatch that occurs in the quadrature mixer 32 is used.

  In the case of the method disclosed in Patent Document 2, although it is possible to perform calibration including I / Q mismatch in the quadrature mixer 41, a high-frequency simulation signal is generated like the calibration signal source 47. A high-frequency signal source is necessary for this purpose. This means that the chip area of the receiver is increased, and further the cost of the receiver is increased. In the method disclosed in Patent Document 2, since the variable gain amplifier 42b and the encoder 43b are required after the output on the Q side of the orthogonal mixer 41, the power consumption and the chip area are increased accordingly. End up.

  In the case of the method disclosed in Patent Document 3, it is possible to perform calibration including an I / Q mismatch in the orthogonal mixer including the multipliers 52a and 52b. Since the operation of the image suppression circuit 57b on the side not passing through 55 and the subsequent encoder 58b can be stopped, the power consumption can be reduced. However, in the receiver configuration described in Patent Document 3, when there is not only a desired signal but also an image signal at the time of adjustment, an image suppression circuit on the input side that interchanges and inputs the I signal and the Q signal Since the image signal is output without being suppressed from 57a, the image removal ratio cannot be adjusted. Furthermore, in addition to being unable to cope with a mismatch between the image suppression circuits 57a and 57b due to element variation or the like, the image suppression circuit 57b whose operation is stopped after the adjustment is completed and its subsequent code The chip area is increased by the amount of the converter 58b.

(Object of the present invention)
The present invention has been made in view of such circumstances, and in a low-IF receiver, even if an image signal is present in addition to a desired signal, an extra high-frequency signal source or encoder is provided. It is possible to measure the image rejection ratio without causing an increase in power consumption and chip area due to, for example, and further using the measurement result of the image rejection ratio to calibrate an I / Q mismatch including an orthogonal mixer. It is an object of the present invention to provide a receiver having a high image rejection ratio and an image rejection ratio measuring method by enabling it to be performed.

  In order to solve the above-described problems, the receiver according to the present invention employs the following characteristic configuration.

  (1) A quadrature mixer that outputs first and second quadrature demodulated signals having a quadrature relationship from the received high-frequency signal, and a desired one of the first and second quadrature demodulated signals output from the quadrature mixer A receiver including at least a complex filter that passes a real signal and suppresses an image signal corresponding to the desired real signal, wherein the first and second quadrature demodulated signals output from the quadrature mixer are A receiver including a signal path switching unit that switches a signal path to be input to a complex filter.

  According to the receiver and the image removal ratio measuring method of the present invention, the following effects can be obtained.

  In the present invention, even when an image signal is present in addition to a desired signal, an increase in power consumption or chip area due to a high-frequency signal source for generating a simulated image signal, an encoder for a Q signal, or the like. The image rejection ratio can be measured without causing an increase, and the I / Q mismatch including the quadrature mixer can be calibrated based on the measurement result of the image rejection ratio. It is possible to realize a low-IF type receiver.

It is a block diagram which shows the apparatus structure of 1st Embodiment of the receiver which concerns on this invention. FIG. 2 is a configuration diagram illustrating an example of a switch configuration of a signal path switching unit in the receiver of FIG. 1. It is a block diagram which shows an example of the apparatus structure of the complex filter in the receiver of FIG. It is explanatory drawing explaining the connection state of the signal path | route switch part in the operation mode 1 of the receiver of FIG. It is a characteristic view which shows the frequency characteristic of the complex filter in the operation mode 1 of the receiver of FIG. It is explanatory drawing for demonstrating the signal strength detected by the signal strength detection part in the operation mode 1 of the receiver of FIG. It is explanatory drawing explaining the connection state of the signal path | route switch part in the operation mode 2 of the receiver of FIG. It is a characteristic view which shows the frequency characteristic of the complex filter in the operation mode 2 of the receiver of FIG. It is explanatory drawing for demonstrating the signal strength detected in a signal strength detection part in the operation mode 2 of the receiver of FIG. It is explanatory drawing explaining the connection state of the signal path | route switch part in the operation mode 3 of the receiver of FIG. It is a characteristic view which shows the frequency characteristic of the complex filter in the operation mode 3 of the receiver of FIG. It is explanatory drawing for demonstrating the signal strength detected in a signal strength detection part in the operation mode 3 of the receiver of FIG. It is a block diagram which shows the apparatus structure of 2nd Embodiment of the receiver which concerns on this invention. It is a block diagram which shows the apparatus structure of 3rd Embodiment of the receiver which concerns on this invention. It is explanatory drawing explaining the connection state of the signal path | route switch part in the operation mode 4 of the receiver of FIG. 1 as 4th Embodiment. It is a characteristic view which shows the frequency characteristic of the complex filter in the operation mode 4 of the receiver of FIG. It is explanatory drawing for demonstrating the signal strength detected by the signal strength detection part in the operation mode 4 of the receiver of FIG. It is a block diagram which shows the apparatus structure of 5th Embodiment of the receiver which concerns on this invention. It is a block diagram which shows the general apparatus structure of the receiver in a low IF type | mold radio | wireless communications system as a related technique which concerns on this invention. FIG. 20 is a characteristic diagram showing frequency characteristics in the general complex filter shown in FIG. 19. It is a block diagram which shows the apparatus structure of the receiver of the said patent document 1 as related technology which concerns on this invention. It is a block diagram which shows the apparatus structure of the receiver of the said patent document 2 as the related technique which concerns on this invention. It is a block diagram which shows the apparatus structure of the receiver of the said patent document 3 as related technology which concerns on this invention.

  Hereinafter, preferred embodiments of a receiver and an image rejection ratio measuring method according to the present invention will be described with reference to the accompanying drawings.

(Features of the present invention)
Prior to the description of the embodiments of the present invention, an outline of the features of the present invention will be described first. The present invention relates to a low IF (Low Intermediate Frequency) type receiver having a relatively low data rate of a received signal and an image rejection ratio measuring method. The low IF type receiver according to the present invention includes: , An orthogonal mixer, a signal path switching unit, a complex filter, a signal intensity detection unit, an arithmetic processing unit, and an element value control unit. That is, the signal path switching unit that can switch the signal path between the orthogonal mixer and the complex filter as needed is arranged.

  That is, in the calibration mode for calibrating the I / Q mismatch of the low-IF receiver according to the present invention, the signal path switching unit is configured to transmit the I and Q signals in the IF frequency band generated by the quadrature mixer. The signal input path to the I filter and Q filter of the complex filter is sequentially switched. At this time, every time the signal input path is switched by the signal path switching unit, the signal strength detection unit detects the signal strength of the output signal from the I filter of the complex filter. Further, an image removal ratio (IRR) of the receiver is calculated by performing arithmetic processing in the arithmetic processing unit using each signal intensity detected every time the signal input path is switched. Thereafter, the element of the constituent elements constituting either the complex filter, the quadrature mixer, or the phase adjustment unit of the local oscillator is controlled by the element value control unit so that the calculated image rejection ratio (IRR) is maximized. By controlling the value, the characteristic adjustment of the complex filter or the quadrature mixer or the local oscillator that outputs the local signal is performed. By repeating this operation, the I / Q mismatch is calibrated so as to maximize the image rejection ratio (IRR), thereby improving the image rejection ratio of the entire receiver.

  Next, embodiments of the present invention will be described in detail with reference to the drawings. Note that, in all the drawings in each embodiment described below, the same constituent elements are denoted by the same reference numerals, and description of the constituent elements is appropriately omitted.

(First embodiment)
First, the apparatus configuration of the first embodiment of the receiver according to the present invention will be described with reference to FIG. FIG. 1 is a configuration diagram showing a device configuration of a first embodiment of a receiver according to the present invention, and shows a device configuration of a low-IF type receiver.

  The low IF receiver shown in FIG. 1 includes a low noise amplifier (LNA) 1, a variable gain amplifier (VGA) 2, and an encoder (ADC: Analog) in addition to the receiving unit 101. -To-Digital Converter) 3 and a digital signal processing unit 4. Here, the reception unit 101 includes an orthogonal mixer 11, a local oscillator (LO) 12, a signal path switching unit 13, a complex filter 14, a signal strength detection unit 15, an arithmetic processing unit 16, and an element. And a value control unit 17.

  In the receiving unit 101, the orthogonal mixer 11 includes an I mixer 111 and a Q mixer 112, and two local signals LO_I and LO_Q that are generated by the local oscillator 12 with a phase difference of 90 degrees from each other are generated by the local oscillator 12. To generate an orthogonal demodulated signal IF_I signal and an orthogonal demodulated signal IF_Q signal that are 90 degrees out of phase with each other.

  The signal path switching unit 13 is controlled by a signal path control signal from the arithmetic processing unit 16. FIG. 2 is a configuration diagram illustrating an example of a switch configuration of the signal path switching unit 13 in the receiver of FIG. In the signal path switching unit 13 shown in FIG. 2, the switch 131 converts the quadrature demodulated signal IF_I signal output from the I mixer 111 of the quadrature mixer 11 according to the signal path control signal from the arithmetic processing unit 16 to the complex filter 14. Whether to connect to an input terminal for input to the I filter 141 is selected. The switch 132 is connected to an input terminal for inputting the quadrature demodulated signal IF_Q signal output from the Q mixer 112 of the quadrature mixer 11 to the I filter 141 of the complex filter 14 in accordance with the signal path control signal from the arithmetic processing unit 16. Select whether or not to do.

  In addition, the switch 133 is an input terminal for inputting the quadrature demodulated signal IF_I signal output from the I mixer 111 of the quadrature mixer 11 to the Q filter 142 of the complex filter 14 in accordance with the signal path control signal from the arithmetic processing unit 16. Select whether to connect to. The switch 134 is connected to an input terminal for inputting the quadrature demodulated signal IF_Q output from the Q mixer 112 of the quadrature mixer 11 to the Q filter 142 of the complex filter 14 in accordance with the signal path control signal from the arithmetic processing unit 16. Select whether or not to do.

  In the receiving unit 101, the complex filter 14 is configured by an I filter 141 and a Q filter 142, which allows a desired real signal to pass therethrough and has an image removal ratio (IRR) set in advance as an image signal removal ratio. The signal is attenuated, and the output signal of the I filter 141 is output to the variable gain amplifier 2 located at the subsequent stage of the reception unit 101 and also output to the signal strength detection unit 15 in the reception unit 101. FIG. 3 is a block diagram showing an example of the device configuration of the complex filter 14 in the receiver of FIG. In the complex filter 14 shown in FIG. 3, the I filter 141 includes voltage-current converters 143a and 144a and a capacitor 145a, and the Q filter 142 similarly includes voltage-current converters 143b and 144b and a capacitor 145b. Consists of

  At this time, the pass bandwidth of the complex filter 14 shown in FIG. 3 is determined by the ratio between the voltage-current conversion gains of the voltage-current converter 143a and the voltage-current converter 143b and the capacitances of the capacitors 145a and 145b. The center frequency of the complex filter 14 is determined by the ratio between the voltage-current conversion gain of the voltage-current converter 144a and the voltage-current converter 144b and the capacitance of the capacitors 145a and 145b.

  Note that the configuration of the complex filter 14 is not limited to the case of FIG. 3, and for example, an I filter 141 and a Q filter 142 as shown in FIG. 3 may be connected in multiple stages. Moreover, you may comprise I filter and Q filter using a resistive element and a capacitor | condenser. Furthermore, the I filter and the Q filter may be configured using an operational amplifier, a resistance element, and a capacitor. However, in any case, in the complex filter 14 according to the present invention, each of the I filter 141 and the Q filter 142 includes a capacitor (a capacitor 145a and a capacitor 145b in the present embodiment shown in FIG. 3), and the I filter 141 and the Q filter 142 are provided with a voltage-current converter or a pair of resistance elements (the voltage-current converter 144a and the voltage-current converter 144b in the present embodiment shown in FIG. 3) that connect each other. It shall be.

  In the reception unit 101, the signal strength detection unit 15 detects the signal strength of the output signal on the output side of the I filter 141 in the complex filter 14, and the detected signal strength information is sent to the arithmetic processing unit 16.

  The arithmetic processing unit 16 controls the switching of the signal path between the quadrature mixer 11 and the complex filter 14 in the signal path switching unit 13 by outputting the signal path control signal, and each time the signal path is switched, the signal intensity detection unit 15 calculates the image rejection ratio (IRR) in the receiving unit 101 of the low-IF receiver from each signal intensity information detected by 15, and outputs the calculation result to the element value control unit 17.

  The element value control unit 17 generates an element value control signal using the calculation result of the image removal ratio (IRR) obtained by the calculation processing unit 16 so that the image removal ratio (IRR) is maximized, By transmitting to the complex filter 14, the element values of the components (voltage-current converters 143a, 143b and voltage-current converters 144a, 144b) of the complex filter 14 are controlled.

(Description of operation of receiver in first embodiment)
Next, the operation of the receiving unit 101 of the low IF receiver shown in FIG. 1 will be described in more detail.

  In the low IF receiver shown in FIG. 1, a high frequency signal RF input including a desired signal and an image signal is amplified by a low noise amplifier (LNA) 1 and then input to a receiving unit 101, and an orthogonal mixer 11. , The frequency of the intermediate frequency (IF) band is frequency-converted into two quadrature demodulated signals IF_I and quadrature demodulated signals IF_Q that are shifted by 90 degrees from each other, and output to the signal path switching unit 13.

  In the signal path switching unit 13, first, as shown in FIG. 4, the switch 132 and the switch 133 are turned off, the switch 131 and the switch 134 are connected, and the output of the I mixer 111 in the quadrature mixer 11. The signal path is selected so that the quadrature demodulated signal IF_I and the quadrature demodulated signal IF_Q that is the output of the Q mixer 112 are input to the I filter 141 and the Q filter 142 in the complex filter 14 respectively (hereinafter referred to as operation mode 1). ). FIG. 4 is an explanatory diagram illustrating a connection state of the signal path switching unit 13 in the operation mode 1 of the receiver of FIG.

  In the case of the operation mode 1 as described above, assuming that the signal strengths of the desired signal and the image signal at the output of the quadrature mixer 11 are P_SIG and P_IM, respectively, the output of the complex filter 14 is as shown in FIG. Is output as signal strength P_SIG as it is, while the image signal is attenuated by the image rejection ratio (IRR) of the complex filter 14 and output as signal strength P_IMa. FIG. 5 is a characteristic diagram showing the frequency characteristics of the complex filter 14 in the operation mode 1 of the receiver of FIG. 1 and shows the signal strength of the output signal output from the complex filter 14.

  That is, in the output signal output from the I filter 141 of the complex filter 14, as shown in FIG. 6, the signal intensity P_SIG of the desired signal and the signal intensity P_IMa of the suppressed image signal are added as the same frequency signal. The combined signal strength P1 is output, and in the operation mode 1, the signal strength P1 detected by the signal strength detection unit 15 is expressed by the following equation (1). FIG. 6 is an explanatory diagram for explaining the signal strength detected by the signal strength detection unit 15 in the operation mode 1 of the receiver of FIG.

P1 = P_SIG + P_IMa
= P_SIG + P_IM / IRR (1)

  Next, in the signal path switching unit 13, as shown in FIG. 7, the switch 131 and the switch 134 are turned off and the switch 132 and the switch 133 are connected as opposed to the operation mode 1 of FIG. 4. The quadrature demodulated signal IF_I that is the output of the I mixer 111 in the quadrature mixer 11 is input to the Q filter 142 in the complex filter 14, and the quadrature demodulated signal IF_Q that is the output of the Q mixer 112 in the quadrature mixer 11 is input to the complex filter 14. The signal path is selected so as to be input to the I filter 141 (hereinafter referred to as operation mode 2). 7 is an explanatory diagram for explaining the connection state of the signal path switching unit 13 in the operation mode 2 of the receiver of FIG.

  In the case of the operation mode 2 as described above, assuming that the signal strengths of the desired signal and the image signal at the output of the quadrature mixer 11 are P_SIG and P_IM, respectively, the frequency characteristics of the complex filter 14 are as shown in FIG. 5 is a characteristic obtained by inverting the frequency characteristic in the case of the operation mode 1 shown in FIG. 5 to a positive / negative symmetrical position with respect to DC ('0' for direct current), and the output of the complex filter 14 is an image signal as it is. Whereas the intensity P_IM is output, the desired signal is attenuated by the image rejection ratio (IRR) of the complex filter 14 and output as the signal intensity P_SIGa. FIG. 8 is a characteristic diagram showing the frequency characteristics of the complex filter 14 in the operation mode 2 of the receiver of FIG. 1, and shows the signal strength of the output signal output from the complex filter 14.

  That is, in the output signal output from the I filter 141 of the complex filter 14, as shown in FIG. 9, the suppressed signal strength P_SIGa of the desired signal and the signal strength P_IM of the image signal are added as the same frequency signal. The combined signal strength P2 is output, and in the operation mode 2, the signal strength P2 detected by the signal strength detection unit 15 is expressed by the following equation (2). FIG. 9 is an explanatory diagram for explaining the signal strength detected by the signal strength detection unit 15 in the operation mode 2 of the receiver of FIG.

P2 = P_SIGa + P_IM
= P_SIG / IRR + P_IM Expression (2)

  Further, next, in the signal path switching unit 13, as shown in FIG. 10, all of the switches 131, 132, 133, and 134 are connected, and the quadrature demodulation that is the output of the I mixer 111 in the quadrature mixer 11. The signal path is selected such that both the signal IF_I and the quadrature demodulated signal IF_Q that is the output of the Q mixer 112 are input to both the I filter 141 and the Q filter 142 in the complex filter 14 (hereinafter referred to as operation mode 3). ). FIG. 10 is an explanatory diagram for explaining a connection state of the signal path switching unit 13 in the operation mode 3 of the receiver of FIG.

  In the case of the operation mode 3 as described above, assuming that the signal strengths of the desired signal and the image signal at the output of the quadrature mixer 11 are P_SIG and P_IM, respectively, the frequency characteristics of the complex filter 14 for the desired signal and the image signal are as shown in FIG. As shown in FIG. 5, the frequency characteristic on the positive side in the case of the operation mode 1 shown in FIG. 5 is inverted to the position on the negative side symmetric with respect to DC ('0' for direct current). As the output of the filter 14, neither the desired signal nor the image signal is output as it is as the signal strengths P_SIG and P_IM without being attenuated. FIG. 11 is a characteristic diagram showing the frequency characteristics of the complex filter 14 in the operation mode 3 of the receiver of FIG. 1, and shows the signal strength of the output signal output from the complex filter 14.

  That is, in the output signal output from the I filter 141 of the complex filter 14, as shown in FIG. 12, the signal intensity P_SIG of the desired signal and the signal intensity P_IM of the image signal are added together as the same frequency signal. The signal intensity P3 is output as the intensity P3, and the signal intensity P3 detected by the signal intensity detection unit 15 in the operation mode 3 is expressed by the following equation (3). FIG. 12 is an explanatory diagram for explaining the signal strength detected by the signal strength detection unit 15 in the operation mode 3 of the receiver of FIG.

  P3 = P_SIG + P_IM Expression (3)

  As described above, each time the signal input to the complex filter 14 is switched by the signal path switching unit 13 for the three operation modes from the operation mode 1 to the operation mode 3 of the receiver of FIG. Then, by detecting the signal strengths P1, P2, and P3 of the output signal output from the complex filter 14, the arithmetic processing unit 16 calculates the image removal ratio (IRR) as in the following equation (4). be able to.

  1 / IRR = (P1 + P2-P3) / P3 Formula (4)

  The image removal ratio (IRR) calculated by the arithmetic processing unit 16 is output to the element value control unit 17, and the element value control unit 17 controls the element value so that the image removal ratio (IRR) is maximized. By generating a signal and transmitting it to the complex filter 14, the element values of the constituent elements constituting the complex filter 14 are controlled.

  Further, by repeatedly switching the signal path in the signal path switching unit 13, that is, by repeating the switching operation from the operation mode 1 to the operation mode 3 of the receiver, the equation (4) calculated in the arithmetic processing unit 16 The element value of the complex filter 14 is adjusted so that the value on the left-hand side becomes smaller, that is, the image rejection ratio (IRR) becomes larger.

  When the adjustment of the element value of the complex filter 14 is completed, the signal path switching unit 13 turns off the switch 132 and the switch 133 in the state of the operation mode 1 illustrated in FIG. 4, that is, the signal path switching unit 13, By setting the switch 131 and the switch 134 to the connected state, the quadrature demodulated signal IF_I that is the output of the I mixer 111 in the quadrature mixer 11 and the quadrature demodulated signal IF_Q that is the output of the Q mixer 112 are respectively converted into the I filter in the complex filter 14. 141 and the Q filter 142 are selected so as to select a signal path in the signal path switching unit 13 and perform a normal signal reception operation.

  At this time, since the adjustment of the element values as described above has been completed, the complex filter 14 is in a state in which the I / Q mismatch in the orthogonal mixer 11 and the complex filter 14 is compensated, and as a result, high image removal is achieved. It can operate as a low IF receiver with a ratio (IRR).

  The adjustment for compensating for the I / Q mismatch as described above is performed only once when the receiver is started, for example, and the correction data obtained at that time is stored in a memory provided in the arithmetic processing unit 16. The second and subsequent adjustments can be omitted by using the correction data stored in the memory for the second and subsequent times.

  Further, the element value of the complex filter 14 is adjusted at the time of shipment, and the correction data as a result thereof is stored in a non-volatile memory such as a flash memory, and the correction data stored in the non-volatile memory is used during normal reception. Thus, adjustment during operation can be omitted.

  Further, as the chip selection at the time of shipment, the adjustment of the element value of the complex filter 14 is not performed, and only the image rejection ratio (IRR) is measured. It is also possible to exclude only chips whose image rejection ratio (IRR) has been significantly degraded.

  As described above, at the stage of adjusting the element value of the complex filter 14 at the time of shipment and at the stage of chip selection such as the orthogonal mixer 11 and the complex filter 14 at the time of shipment, only a desired signal not including an image signal is obtained from the low IF receiver. It is possible to input to the receiving unit 101. Therefore, when only a desired signal not including an image signal is input, the signal intensity P1 and the signal intensity P2 detected in the operation mode 1 and the operation mode 2 are respectively expressed by the following equations (5) and (5). It is expressed as (6).

  P1 = P_SIG Formula (5)

  P2 = P_SIG / IRR (6)

  At this time, the image removal ratio (IRR) calculated by the arithmetic processing unit 16 using the signal intensity P1 and the signal intensity P2 represented by the expressions (5) and (6) is expressed by the following expression (7). It is expressed as follows.

  1 / IRR = P2 / P1 Formula (7)

  That is, when only a desired signal not including an image signal is input, the operation mode 3 is omitted, and only the signal intensity P1 and the signal intensity P2 detected in the operation mode 1 and the operation mode 2 are used. The image removal ratio (IRR) can be calculated by the arithmetic processing unit 16.

  As described above, according to the configuration of the first embodiment, even when an image signal is present in addition to a desired signal, a high-frequency signal source for generating a simulated image signal and a code for a Q signal are used. The image rejection ratio can be measured without increasing the power consumption and chip area due to the installation of the converter, etc. Based on the measurement result of the image rejection ratio, the I / Q mismatch including the quadrature mixer can be calibrated. By doing so, a low IF receiver having a high image rejection ratio can be obtained.

(Second Embodiment)
Next, the apparatus configuration of the second embodiment of the receiver according to the present invention will be described with reference to FIG. FIG. 13 is a configuration diagram showing a device configuration of a second embodiment of a receiver according to the present invention, and shows a device configuration of a low-IF type receiver.

  The low IF receiver shown in FIG. 13 has a low noise amplifier (LNA) 1, a variable gain amplifier (VGA) 2, and a receiver 102, as in FIG. An encoder (ADC: Analog-to-Digital Converter) 3 and a digital signal processing unit 4 are provided at least. Here, the receiving unit 102 includes a quadrature mixer 18, a local oscillator (LO) 12, a signal path switching unit 13, a complex filter 14, a signal strength detection unit 15, an arithmetic processing unit 16, and an element. And a value controller 19 at least.

  That is, in the receiving unit 102 of the receiver shown in FIG. 13, an orthogonal mixer 18 is used instead of the orthogonal mixer 11 in the receiving unit 101 of the receiver shown as the first embodiment in FIG. 17 is provided with an element value control unit 19, and the element value control signal output from the element value control unit 19 adjusts the element value of the orthogonal mixer 18 instead of the complex filter 14.

  In the receiving unit 102, the orthogonal mixer 18 includes an I mixer 181 and a Q mixer 182, and two local signals LO_I and LO_Q that are generated by the local oscillator 12 with a phase difference of 90 degrees from each other are generated by the local oscillator 12. To convert the frequency to an IF (intermediate frequency) band to generate an orthogonal demodulated signal IF_I signal and an orthogonal demodulated signal IF_Q signal whose phases of the IF band are shifted from each other by 90 degrees.

  Further, the element value control unit 19 generates an element value control signal so that the image rejection ratio (IRR) is maximized using the calculation result of the image rejection ratio (IRR) obtained by the arithmetic processing unit 16. Then, by transmitting to the orthogonal mixer 18, the element values of the components (I mixer 181 and Q mixer 182) of the orthogonal mixer 18 are controlled.

  In the receiver shown in FIG. 13 as the second embodiment, the same reference numerals as those used in the constituent elements of the receiver shown in FIG. The receiver has the same function as that shown in FIG.

(Description of operation of receiver in the second embodiment)
Next, the operation of the receiving unit 102 of the low IF receiver shown in FIG. 13 will be described in more detail.

  In the low-IF receiver shown in FIG. 13 as well, as in the case of the low-IF receiver shown in FIG. 1, the high-frequency signal RF input including the desired signal and the image signal is converted into a low noise amplifier (LNA). ) After being amplified by 1, the signal is input to the receiving unit 102, and is frequency-converted by the quadrature mixer 18 into two quadrature demodulation signals IF_I and quadrature demodulation signals IF_Q whose phases of the intermediate frequency (IF) band are shifted from each other by 90 degrees. To the signal path switching unit 13.

  The signal path switching unit 13 is controlled by the signal path control signal from the arithmetic processing unit 16 and switches the input signal to the complex filter 14 from the operation mode 1 to the operation mode 3 as in the case of the first embodiment. When the operation mode is switched, the signal strength of the output signal output from the complex filter 14 is changed to the signal strength P1, P2, P3 for each of the operation modes 1, 2, 3 in the signal strength detection unit 15. Detected.

  Based on the signal intensities P1, P2, and P3 of the operation modes 1, 2, and 3 detected by the signal intensity detection unit 15, the arithmetic processing unit 16 uses the equation (4) described above in the first embodiment. Calculate the image rejection ratio (IRR).

  The image removal ratio (IRR) calculated by the arithmetic processing unit 16 is output to the element value control unit 19, and the element value control unit 19 controls the element value so that the image removal ratio (IRR) is maximized. By generating a signal and transmitting it to the quadrature mixer 18, the element values of the constituent elements constituting the quadrature mixer 18 are controlled.

  Further, as in the case of the first embodiment, the calculation is performed by repeating the switching of the signal path in the signal path switching unit 13, that is, by repeating the switching operation from the operation mode 1 to the operation mode 3 of the receiver. The element value of the orthogonal mixer 18 is adjusted so that the value on the left side of the expression (4) calculated in the processing unit 16 is small, that is, the image rejection ratio (IRR) is large.

  When the adjustment of the element values of the quadrature mixer 18 is completed, the signal path switching unit 13 is in the state of the operation mode 1 shown in FIG. 4 as the first embodiment, that is, the signal, as in the first embodiment. The switch 132 and the switch 133 in the path switching unit 13 are turned off, and the switch 131 and the switch 134 are set in a connected state, so that the quadrature demodulated signal IF_I and the Q mixer 112 output from the I mixer 111 in the quadrature mixer 11 A signal path in the signal path switching unit 13 is selected so that the orthogonal demodulated signal IF_Q as an output is input to the I filter 141 and the Q filter 142 in the complex filter 14, respectively, and a normal signal receiving operation is performed.

  At this time, since the adjustment of the element values as described above has been completed, the quadrature mixer 18 is in a state in which the I / Q mismatch in the quadrature mixer 18 and the complex filter 14 is compensated. As a result, high image removal is achieved. It can operate as a low IF receiver with a ratio (IRR).

  The adjustment for compensating for the I / Q mismatch as described above is performed only once when the receiver is started, for example, and the correction data obtained at that time is stored in a memory provided in the arithmetic processing unit 16. The second and subsequent adjustments can be omitted by using the correction data stored in the memory for the second and subsequent times.

  Further, the element value of the quadrature mixer 18 is adjusted at the time of shipment, and the resulting correction data is stored in a non-volatile memory such as a flash memory. During normal reception, the correction data stored in the non-volatile memory is used. Thus, adjustment during operation can be omitted.

  Further, as a chip selection at the time of shipment, adjustment of the element value of the quadrature mixer 18 is not performed, and only the measurement of the image rejection ratio (IRR) is performed. Due to manufacturing variations of the elements such as the quadrature mixer 18 and the complex filter 14, It is also possible to exclude only chips whose image rejection ratio (IRR) has been significantly degraded.

  As described above, in the adjustment step of the element value of the quadrature mixer 18 at the time of shipment and the chip selection step of the quadrature mixer 18 and the complex filter 14 at the time of shipment, as in the case of the first embodiment, a desired signal that does not include an image signal. It is possible to input only the signal to the receiving unit 102 of the low IF receiver. Therefore, when only a desired signal that does not include an image signal is input, the operation mode 3 is omitted and the signal intensity P1 and the signal detected in the operation mode 1 and the operation mode 2 are omitted as in the first embodiment. The image removal ratio (IRR) can be calculated by the arithmetic processing unit 16 using only the intensity P2.

  As described above, the configuration of the second embodiment is the same as that of the first embodiment, and a simulated image is also obtained when an image signal is present in addition to a desired signal. The image removal ratio can be measured without increasing the power consumption or the chip area due to the installation of a high-frequency signal source for signal generation or an encoder for the Q signal. Based on the measurement result of the image removal ratio By calibrating the I / Q mismatch including the quadrature mixer, a low IF receiver having a high image rejection ratio can be obtained.

(Third embodiment)
Next, the apparatus configuration of the third embodiment of the receiver according to the present invention will be described with reference to FIG. FIG. 14 is a configuration diagram showing a device configuration of a third embodiment of the receiver according to the present invention, and shows a device configuration of a low-IF type receiver.

  The low IF receiver shown in FIG. 14 has a low noise amplifier (LNA) 1, a variable gain amplifier (VGA: Variable Gain Amplifier) 2, in addition to the receiving unit 103, as in FIG. An encoder (ADC: Analog-to-Digital Converter) 3 and a digital signal processing unit 4 are provided at least. Here, the reception unit 103 includes an orthogonal mixer 11, a local oscillator (LO) 12, a signal path switching unit 13, a complex filter 14, a signal strength detection unit 15, an arithmetic processing unit 16, and a phase. The adjustment unit 20 and the element value control unit 21 are included at least.

  That is, the receiver 103 of the receiver shown in FIG. 14 further includes a phase adjustment unit 20 on the output side of the local oscillator 12 in the receiver 101 of the receiver shown as the first embodiment in FIG. By providing the element value control unit 21 instead of the element value control unit 17, the component value constituting the phase adjustment unit 20 instead of the complex filter 14 is determined by the element value control signal output from the element value control unit 21. The configuration is such that the element value is adjusted, and thus the phases of the local signal LO_I and the local signal LO_Q input to the quadrature mixer 11 are adjusted.

  In the receiver shown in FIG. 14 as the third embodiment, the same reference numerals as those used in the constituent elements of the receiver shown in FIG. The receiver has the same function as that shown in FIG.

(Description of operation of receiver in the third embodiment)
Next, the operation of the receiving unit 103 of the low IF receiver shown in FIG. 14 will be described in more detail.

  In the low-IF receiver shown in FIG. 14 as well, as in the case of the low-IF receiver shown in FIG. 1, the high-frequency signal RF input including the desired signal and the image signal is converted into a low noise amplifier (LNA). ) After being amplified by 1, the signal is input to the receiving unit 103, and the orthogonal mixer 11 performs frequency conversion into two orthogonal demodulated signals IF_I and quadrature demodulated signals IF_Q whose phases of the intermediate frequency (IF) band are shifted from each other by 90 degrees. To the signal path switching unit 13.

  The signal path switching unit 13 is controlled by the signal path control signal from the arithmetic processing unit 16 and switches the input signal to the complex filter 14 from the operation mode 1 to the operation mode 3 as in the case of the first embodiment. When the operation mode is switched, the signal strength of the output signal output from the complex filter 14 is changed to the signal strength P1, P2, P3 for each of the operation modes 1, 2, 3 in the signal strength detection unit 15. Detected.

  Based on the signal intensities P1, P2, and P3 of the operation modes 1, 2, and 3 detected by the signal intensity detection unit 15, the arithmetic processing unit 16 uses the equation (4) described above in the first embodiment. Calculate the image rejection ratio (IRR).

  The image removal ratio (IRR) calculated by the arithmetic processing unit 16 is output to the element value control unit 21, and the element value control unit 21 controls the element value so that the image removal ratio (IRR) is maximized. By generating a signal and transmitting it to the phase adjustment unit 20, the element values of the constituent elements constituting the phase adjustment unit 20 are controlled. Thereby, the phases of the local signal LO_I and the local signal LO_Q input to the quadrature mixer 11 are adjusted.

  Further, as in the case of the first embodiment, the calculation is performed by repeating the switching of the signal path in the signal path switching unit 13, that is, by repeating the switching operation from the operation mode 1 to the operation mode 3 of the receiver. The element value of the phase adjustment unit 20 is adjusted so that the value on the left side of the expression (4) calculated in the processing unit 16 is small, that is, the image rejection ratio (IRR) is large.

  When the adjustment of the element value of the phase adjustment unit 20 is completed, the signal path switching unit 13 is in the state of the operation mode 1 shown in FIG. 4 as the first embodiment, as in the first embodiment, that is, The switch 132 and the switch 133 in the signal path switching unit 13 are turned off, and the switch 131 and the switch 134 are set in a connected state, so that the quadrature demodulated signal IF_I and the Q mixer 112 that are the outputs of the I mixer 111 in the quadrature mixer 11 The signal path switching unit 13 selects a signal path so as to input the quadrature demodulated signal IF_Q, which is the output of, to the I filter 141 and the Q filter 142 in the complex filter 14, respectively, and performs a normal signal receiving operation.

  At this time, since the adjustment of the element values as described above is completed, the phase adjustment unit 20 is in a state in which the phase shift of the local signals LO_I and LO_Q and the I / Q mismatch in the quadrature mixer 11 and the complex filter 14 are compensated. As a result, it can operate as a low IF receiver having a high image rejection ratio (IRR).

  The adjustment for compensating for the I / Q mismatch as described above is performed only once when the receiver is started, for example, and the correction data obtained at that time is stored in a memory provided in the arithmetic processing unit 16. The second and subsequent adjustments can be omitted by using the correction data stored in the memory for the second and subsequent times.

  Further, the element value of the phase adjustment unit 20 is adjusted at the time of shipment, and the correction data as a result is stored in a non-volatile memory such as a flash memory, and the correction data stored in the non-volatile memory is used during normal reception. Therefore, adjustment during operation can be omitted.

  Further, as the chip selection at the time of shipment, the element value of the phase adjustment unit 20 is not adjusted, and only the image rejection ratio (IRR) is measured, so that the phase adjustment unit 20, the quadrature mixer 18, the complex filter 14, etc. It is also possible to exclude only chips whose image rejection ratio (IRR) has deteriorated significantly due to device manufacturing variations.

  As in the case of the first embodiment, in the adjustment stage of the element value of the phase adjustment unit 20 at the time of shipment and the chip selection stage of the phase adjustment unit 20, the quadrature mixer 18 and the complex filter 14 at the time of shipment, Only a desired signal that does not include an image signal can be input to the receiving unit 103 of the low IF receiver. Therefore, when only a desired signal that does not include an image signal is input, the operation mode 3 is omitted and the signal intensity P1 and the signal detected in the operation mode 1 and the operation mode 2 are omitted as in the first embodiment. The image removal ratio (IRR) can be calculated by the arithmetic processing unit 16 using only the intensity P2.

  As described above, the configuration of the third embodiment is the same as that of the first embodiment, and a simulated image is obtained even when an image signal exists in addition to a desired signal. The image removal ratio can be measured without increasing the power consumption or the chip area due to the installation of a high-frequency signal source for signal generation or an encoder for the Q signal. Based on the measurement result of the image removal ratio By calibrating the I / Q mismatch including the quadrature mixer, a low IF receiver having a high image rejection ratio can be obtained.

(Fourth embodiment)
Next, a fourth embodiment of the receiver according to the present invention will be described with reference to FIG. The apparatus configuration of the receiver in the fourth embodiment is the same as that of the low-IF receiver shown in FIG. 1 as the first embodiment, and the fourth embodiment. As an operation mode of the receiver, an operation mode 4 for setting a signal path as shown in FIG. 15 is provided instead of the operation mode 3 in the first embodiment. FIG. 15 is an explanatory diagram illustrating a connection state of the signal path switching unit 13 in the operation mode 4 of the receiver of FIG. 1 as a fourth embodiment.

(Description of operation of receiver in the fourth embodiment)
Next, the operation in the fourth embodiment of the receiving unit 101 of the low IF receiver shown in FIG. 1 will be described in detail.

  Also in the fourth embodiment, as in the case of the first embodiment, in the low IF receiver shown in FIG. 1, the high-frequency signal RF input including the desired signal and the image signal is a low noise amplifier. After being amplified by (LNA) 1, the signal is input to the receiving unit 101, and in the quadrature mixer 11, the frequency is converted into two quadrature demodulated signals IF_I and quadrature demodulated signals IF_Q whose phases of the intermediate frequency (IF) band are shifted from each other by 90 degrees And output to the signal path switching unit 13.

  The signal path switching unit 13 is controlled by a signal path control signal from the arithmetic processing unit 16, and unlike the case of the first embodiment, instead of the operation mode 1 to the operation mode 3, instead of the operation mode 3, A switching operation using operation mode 4 is performed. That is, first, in the two operation modes of the operation mode 1 and the operation mode 2, the input signal to the complex filter 14 is switched, and each time the operation mode is switched, the output signal output from the complex filter 14 is changed. The signal strength is detected by the signal strength detector 15 as the signal strengths P1 and P2 for each of the operation modes 1 and 2, as shown in the equations (1) and (2) in the first embodiment.

  Thereafter, in the signal path switching unit 13, as shown in FIG. 15, the switch 132 and the switch 134 are turned off and the switch 131 and the switch 133 are connected, so that the output of the Q mixer 112 in the orthogonal mixer 11 is output. The quadrature demodulated signal IF_Q is suppressed from being input to the complex filter 14, and the quadrature demodulated signal IF_I, which is the output of the I mixer 111 in the quadrature mixer 11, is transmitted to both the I filter 141 and the Q filter 142 in the complex filter 14. A signal path is selected so as to be input (hereinafter referred to as operation mode 4).

  In the case of the operation mode 4 described above, assuming that the signal strength of the desired signal and the image signal at the output of the quadrature mixer 11 is P_SIG and P_IM, respectively, as in the first embodiment, the frequency characteristics of the complex filter 14 are 16, the frequency characteristic on the positive side in the case of the operation mode 1 shown in FIG. 5 of the first embodiment is attenuated by −3 dB, that is, the characteristic obtained by multiplying by (½) times is further obtained by DC The characteristic is inverted to a symmetrical negative position with respect to (DC component “0”), and both the desired signal and the image signal are (1/2) times as the output of the complex filter 14. And output as signal strength P_SIGb and signal strength P_IMb. FIG. 16 is a characteristic diagram showing the frequency characteristics of the complex filter 14 in the operation mode 4 of the receiver of FIG. 1, and shows the signal strength of the output signal output from the complex filter 14.

  That is, the output signal output from the I filter 141 of the complex filter 14 is compressed to (1/2) times the signal strength P_SIGb of the desired signal compressed (1/2) times as shown in FIG. The signal strength P_IMb of the image signal is output as the signal strength P4 added as the same frequency signal. In the operation mode 4, the signal strength P4 detected by the signal strength detection unit 15 is It is expressed as the following equation (8). FIG. 17 is an explanatory diagram for explaining the signal strength detected by the signal strength detection unit 15 in the operation mode 4 of the receiver of FIG.

P4 = P_SIGb + P_IMb
= (P_SIG + P_IM) / 2 Formula (8)

  In the operation mode 4, in the signal path switching unit 13, the switch 131 and the switch 133 are turned off and the switch 132 and the switch 134 are connected in the connection state, contrary to the switching state of FIG. 15. The quadrature demodulated signal IF_I that is the output of the I mixer 111 is inhibited from being input to the complex filter 14, and the quadrature demodulated signal IF_Q that is the output of the Q mixer 112 in the quadrature mixer 11 is converted into the I filter 141 and the Q filter in the complex filter 14. It is good also as operation | movement which selects a signal path | route so that it may input into both.

  As described above, the signal strength detection is performed every time the signal path switching unit 13 switches the input signal to the complex filter 14 in the three operation modes of the receiver of FIG. By detecting the signal strengths P1, P2, and P4 of the output signal output from the complex filter 14 in the unit 15, the arithmetic processing unit 16 performs the image removal ratio (IRR) as shown in the following equation (9). Can be calculated.

  1 / IRR = (P1 + P2-2 × P4) / (2 × P4) Equation (9)

  The image removal ratio (IRR) calculated by the arithmetic processing unit 16 is output to the element value control unit 17, and the element value control unit 17 controls the element value so that the image removal ratio (IRR) is maximized. By generating a signal and transmitting it to the complex filter 14, the element values of the constituent elements constituting the complex filter 14 are controlled.

  Furthermore, by repeating the switching of the signal path in the signal path switching unit 13, that is, by repeating the switching operation of the operation mode 1, the operation mode 2 and the operation mode 4 of the receiver, the expression calculated in the arithmetic processing unit 16 The element value of the complex filter 14 is adjusted so that the value on the left side of (9) becomes small, that is, the image rejection ratio (IRR) becomes large.

  When the adjustment of the element value of the complex filter 14 is completed, the signal path switching unit 13 is in the state of the operation mode 1 shown in FIG. 4 as the first embodiment, that is, the signal, as in the first embodiment. The switch 132 and the switch 133 in the path switching unit 13 are turned off, and the switch 131 and the switch 134 are set in a connected state, so that the quadrature demodulated signal IF_I and the Q mixer 112 output from the I mixer 111 in the quadrature mixer 11 A signal path in the signal path switching unit 13 is selected so that the orthogonal demodulated signal IF_Q as an output is input to the I filter 141 and the Q filter 142 in the complex filter 14, respectively, and a normal signal receiving operation is performed.

  At this time, since the adjustment of the element values as described above has been completed, the complex filter 14 is in a state in which the I / Q mismatch in the orthogonal mixer 11 and the complex filter 14 is compensated, and as a result, high image removal is achieved. It can operate as a low IF receiver with a ratio (IRR).

  The adjustment for compensating for the I / Q mismatch as described above is performed only once when the receiver is started, for example, and the correction data obtained at that time is stored in a memory provided in the arithmetic processing unit 16. The second and subsequent adjustments can be omitted by using the correction data stored in the memory for the second and subsequent times.

  Further, the element value of the complex filter 14 is adjusted at the time of shipment, and the correction data as a result thereof is stored in a non-volatile memory such as a flash memory, and the correction data stored in the non-volatile memory is used during normal reception. Thus, adjustment during operation can be omitted.

  Further, as the chip selection at the time of shipment, adjustment of the element value of the complex filter 14 is not performed, and only measurement of the image rejection ratio (IRR) is performed, so that due to manufacturing variations of the elements such as the orthogonal mixer 18 and the complex filter 14, It is also possible to exclude only chips whose image rejection ratio (IRR) has been significantly degraded.

  As described above, in the adjustment stage of the element values of the complex filter 14 at the time of shipment and the chip selection stage of the orthogonal mixer 18 and the complex filter 14 at the time of shipment, as in the case of the first embodiment, a desired signal that does not include an image signal. Only the signal can be input to the receiving unit 101 of the low-IF receiver. Therefore, when only a desired signal not including an image signal is input, the operation mode 4 is omitted, and the signal intensity P1 and signal detected in the operation mode 1 and the operation mode 2 are the same as in the first embodiment. The image removal ratio (IRR) can be calculated by the arithmetic processing unit 16 using only the intensity P2.

  In the fourth embodiment, the element value of the complex filter 14 is adjusted as in the case of the first embodiment. However, as in the case of the second embodiment, as shown in FIG. Instead of the quadrature mixer 11, the quadrature mixer 18 shown in FIG. 13 may be used to adjust the element value of the quadrature mixer 18. Alternatively, as in the third embodiment, the local oscillator 12 A configuration may be adopted in which the phase adjustment unit 20 is further arranged in the subsequent stage and the element value of the phase adjustment unit 20 is adjusted.

  As described above, the configuration of the fourth embodiment is the same as that of the first embodiment, and a simulated image is obtained even when an image signal exists in addition to a desired signal. The image removal ratio can be measured without increasing the power consumption or the chip area due to the installation of a high-frequency signal source for signal generation or an encoder for the Q signal. Based on the measurement result of the image removal ratio By calibrating the I / Q mismatch including the quadrature mixer, a low IF receiver having a high image rejection ratio can be obtained.

(Fifth embodiment)
Next, the apparatus configuration of the fifth embodiment of the receiver according to the present invention will be described with reference to FIG. FIG. 18 is a configuration diagram showing a device configuration of a fifth embodiment of a receiver according to the present invention, and shows a device configuration of a low-IF type receiver.

  The low IF receiver shown in FIG. 18 has a low noise amplifier (LNA) 1, a variable gain amplifier (VGA) 2, and a receiving unit 105 as well as the case of FIG. An encoder (ADC: Analog-to-Digital Converter) 3, and a digital signal processing unit 5 instead of the digital signal processing unit 4. Here, the receiving unit 105 includes at least a quadrature mixer 11, a local oscillator (LO) 12, a signal path switching unit 13, and a complex filter 14, and the digital signal processing unit 5. Is configured to include at least the signal intensity detection unit 22, the arithmetic processing unit 16, and the element value control unit 17.

  That is, in the receiving unit 105 of the receiver shown in FIG. 18, the signal intensity detecting unit 15, the arithmetic processing unit 16, and the element value control unit 17 are changed from the receiving unit 101 of the receiver shown in FIG. 1 as the first embodiment. Are added to the digital signal processing unit 5 side arranged in the subsequent stage of the encoder 3 by adding a signal intensity detection unit 22, an arithmetic processing unit 16 and an element value control unit 17 to the digital signal processing unit 5 side. After the output signal output from the complex filter 14 is amplified by the variable gain amplifier 2, and further converted into a digital signal by the encoder 3, the signal strength of the digitally converted output signal is converted into the signal strength. The detection unit 22 is configured to detect.

  In the reception unit 105, the complex filter 14 is configured by an I filter 141 and a Q filter 142, and allows a desired real signal to pass therethrough by an image removal ratio (IRR) set in advance as a removal ratio of the image signal. The signal is attenuated and the output signal of the I filter 141 is output to the variable gain amplifier 2 located at the subsequent stage of the receiving unit 105.

  The variable gain amplifier 2 amplifies the signal input from the complex filter 14 of the receiving unit 105 to an appropriate amplitude and outputs the amplified signal to the encoder 3 at the next stage. The encoder 3 converts the input analog signal. The digital signal is converted and output to the digital signal processing unit 5.

  In the digital signal processing unit 5, the signal strength of the output signal from the complex filter 14 that is input after being digitally converted is detected by the signal strength detection unit 22, and the detected signal strength information is converted into an arithmetic processing unit. 16

  The arithmetic processing unit 16 controls the switching of the signal path between the quadrature mixer 11 and the complex filter 14 in the signal path switching unit 13 by outputting the signal path control signal, and each time the signal path is switched, the signal intensity detection unit The image removal ratio (IRR) in the receiving unit 105 of the low IF receiver is calculated from each signal intensity information detected by the output unit 22, and the calculation result is output to the element value control unit 17.

  The element value control unit 17 generates an element value control signal using the calculation result of the image removal ratio (IRR) obtained by the calculation processing unit 16 so that the image removal ratio (IRR) is maximized, By transmitting to the complex filter 14, the element values of the components constituting the complex filter 14 are controlled.

  In the receiver shown in FIG. 18 as the fifth embodiment, the same reference numerals as those shown in FIG. 1 for the components shown in FIG. The receiver has the same function as that shown in FIG.

(Description of operation of receiver in fifth embodiment)
Next, the operation of the low IF receiver shown in FIG. 18 will be described in more detail.

  Also in the low IF receiver shown in FIG. 18, as in the case of the low IF receiver shown in FIG. 1, the high frequency signal RF including the desired signal and the image signal is received by the low noise amplifier (LNA). ) After being amplified by 1, it is input to the receiving unit 105, and in the quadrature mixer 11, the phase of the intermediate frequency (IF) band is frequency-converted into two quadrature demodulated signals IF_I and quadrature demodulated signals IF_Q that are shifted from each other by 90 degrees. To the signal path switching unit 13.

  The signal path switching unit 13 is controlled by the signal path control signal from the arithmetic processing unit 16 and switches the input signal to the complex filter 14 from the operation mode 1 to the operation mode 3 as in the case of the first embodiment. And the output signal of the complex filter 14 output from the complex filter 14 and input to the digital signal processing unit 5 via the variable gain amplifier 2 and the encoder 3 each time the operation mode is switched. The signal strength detection unit 22 detects the signal strength as signal strengths P1, P2, and P3 for each of the operation modes 1, 2, and 3.

  Based on the signal intensities P1, P2, and P3 of the operation modes 1, 2, and 3 detected by the signal intensity detecting unit 22, the arithmetic processing unit 16 uses the equation (4) described above in the first embodiment. Calculate the image rejection ratio (IRR).

  The image removal ratio (IRR) calculated by the arithmetic processing unit 16 is output to the element value control unit 17, and the element value control unit 17 controls the element value so that the image removal ratio (IRR) is maximized. By generating a signal and transmitting it to the complex filter 14, the element values of the constituent elements constituting the complex filter 14 are controlled.

  Further, as in the case of the first embodiment, the calculation is performed by repeating the switching of the signal path in the signal path switching unit 13, that is, by repeating the switching operation from the operation mode 1 to the operation mode 3 of the receiver. The element value of the complex filter 14 is adjusted so that the value on the left side of the expression (4) calculated in the processing unit 16 is small, that is, the image rejection ratio (IRR) is large.

  When the adjustment of the element value of the complex filter 14 is completed, the signal path switching unit 13 is in the state of the operation mode 1 shown in FIG. 4 as the first embodiment, that is, the signal, as in the first embodiment. The switch 132 and the switch 133 in the path switching unit 13 are turned off, and the switch 131 and the switch 134 are set in a connected state, so that the quadrature demodulated signal IF_I and the Q mixer 112 output from the I mixer 111 in the quadrature mixer 11 A signal path in the signal path switching unit 13 is selected so that the orthogonal demodulated signal IF_Q as an output is input to the I filter 141 and the Q filter 142 in the complex filter 14, respectively, and a normal signal receiving operation is performed.

  At this time, since the adjustment of the element values as described above has been completed, the complex filter 14 is in a state in which the I / Q mismatch in the orthogonal mixer 11 and the complex filter 14 is compensated, and as a result, high image removal is achieved. It can operate as a low IF receiver with a ratio (IRR).

  The adjustment for compensating for the I / Q mismatch as described above is performed only once when the receiver is started, for example, and the correction data obtained at that time is stored in a memory provided in the arithmetic processing unit 16. The second and subsequent adjustments can be omitted by using the correction data stored in the memory for the second and subsequent times.

  Further, the element value of the complex filter 14 is adjusted at the time of shipment, and the correction data as a result thereof is stored in a non-volatile memory such as a flash memory, and the correction data stored in the non-volatile memory is used during normal reception. Thus, adjustment during operation can be omitted.

  Further, as the chip selection at the time of shipment, adjustment of the element value of the complex filter 14 is not performed, and only measurement of the image rejection ratio (IRR) is performed. It is also possible to exclude only chips whose image rejection ratio (IRR) has been significantly degraded.

  As described above, in the adjustment stage of the element values of the complex filter 14 at the time of shipment and the chip selection stage of the orthogonal mixer 18 and the complex filter 14 at the time of shipment, as in the case of the first embodiment, a desired signal that does not include an image signal. Only the signal can be input to the receiving unit 105 of the low-IF receiver. Therefore, when only a desired signal that does not include an image signal is input, the operation mode 3 is omitted and the signal intensity P1 and the signal detected in the operation mode 1 and the operation mode 2 are omitted as in the first embodiment. The image removal ratio (IRR) can be calculated by the arithmetic processing unit 16 using only the intensity P2.

  In the fifth embodiment, the element value of the complex filter 14 is adjusted as in the case of the first embodiment. However, as in the case of the second embodiment, as shown in FIG. Instead of the quadrature mixer 11, the quadrature mixer 18 shown in FIG. 13 may be used to adjust the element value of the quadrature mixer 18. Alternatively, as in the third embodiment, the local oscillator 12 A configuration may be adopted in which the phase adjustment unit 20 is further arranged in the subsequent stage and the element value of the phase adjustment unit 20 is adjusted. Further, as in the case of the fourth embodiment, the signal path switching unit 13 may be controlled using the operation mode 4 instead of the operation mode 3.

  As described above, the configuration of the fifth embodiment is the same as that of the first embodiment, and a simulated image is also obtained when an image signal is present in addition to a desired signal. The image removal ratio can be measured without increasing the power consumption or the chip area due to the installation of a high-frequency signal source for signal generation or an encoder for the Q signal. Based on the measurement result of the image removal ratio By calibrating the I / Q mismatch including the quadrature mixer, a low IF receiver having a high image rejection ratio can be obtained.

The configuration of the preferred embodiment of the present invention has been described above. However, it should be noted that such examples are merely illustrative of the invention and do not limit the invention in any way. Those skilled in the art will readily understand that various modifications and changes can be made according to a specific application without departing from the gist of the present invention. For example, the embodiment of the present invention can be expressed as the following configuration in addition to the configuration (1) in the means for solving the problems.
(2) It further has a local oscillator that outputs first and second local signals having a predetermined frequency in an orthogonal relationship, and the orthogonal mixer outputs the received high-frequency signal from the local oscillator. By down-converting with the first and second local signals, the first and second quadrature demodulated signals are output, and the complex filter is composed of first and second filters, and the first and second The receiver according to (1), wherein any one of the first and second quadrature demodulated signals output from the quadrature mixer can be input to either of the filters.
(3) The signal path switching unit includes a first input terminal for inputting the first quadrature demodulated signal, a second input terminal for inputting the second quadrature demodulated signal, and the first input terminal of the complex filter. A first output terminal that outputs a signal to one filter, a second output terminal that outputs a signal to the second filter of the complex filter, and first to fourth switches, The first switch selects whether or not to connect the first input terminal and the first output terminal, and the second switch includes the second input terminal and the first output terminal. The third switch selects whether to connect the first input terminal and the second output terminal, and the fourth switch selects the second switch. The above (2) for selecting whether or not to connect the input terminal and the second output terminal Receiver.
(4) A signal strength detector that detects a signal strength of an output signal of the complex filter is further provided, and the signal strength detector is an output from at least one of the first and second filters that constitute the complex filter. The receiver according to (3), wherein a signal intensity of an output signal of the complex filter is detected by inputting a signal.
(5) A calculation processing unit that performs a predetermined calculation based on the signal strength detected by the signal strength detection unit is further included, and the calculation processing unit ends the calculation based on the signal strength, The signal path control signal is output to switch on / off of the first to fourth switches in the signal path switching unit, and the signal path switching control between the quadrature mixer and the complex filter is performed. (4) Receiver.
(6) In the first operation mode, the arithmetic processing unit turns on the first switch and the fourth switch in the signal path switching unit by the signal path control signal, and the second switch The first signal strength detected as the signal strength by the signal strength detection unit in a state where the third switch is turned off, and the signal path switching unit according to the signal path control signal as a second operation mode. In the state in which the second switch and the third switch are turned on and the first switch and the fourth switch are turned off, the signal strength detection unit detects the signal strength detected by the signal strength detection unit. And removing the image signal with respect to the desired real signal based on the acquired first and second signal intensities. Or, as a third operation mode, the signal strength detection unit sets the signal strength in the state where all the first to fourth switches in the signal path switching unit are turned on by the signal path control signal. The detected third signal strength is further acquired, and an image removal ratio for suppressing the image signal with respect to the desired actual signal is calculated based on the acquired first, second, and third signal strengths. Alternatively, as a fourth operation mode, the first switch and the third switch in the signal path switching unit are turned on or off by the signal path control signal, and the second switch and the fourth switch A fourth signal strength detected as the signal strength by the signal strength detector in a state where the switch is turned off or on is further taken. And, the acquired first, second, on the basis of the fourth signal strength, the receiver of the (5) for calculating the image rejection ratio for suppressing the image signal for the desired real signal.
(7) The device further includes an element value control unit that controls element values of the constituent elements constituting the complex filter, and the element value control unit detects the first and second signals detected by the signal intensity detection unit. Image removal that suppresses the image signal calculated by the arithmetic processing unit based on the intensity, the first, second, or third signal intensity or the first, second, or fourth signal intensity (6) The receiver according to (6), wherein an element value of a constituent element that constitutes one of the complex filter, the quadrature mixer, or the phase adjustment unit is controlled so that a ratio is maximized.
(8) Configure either the image removal ratio that suppresses the image signal calculated by the arithmetic processing unit, or the complex mixer, the quadrature mixer, or the phase adjustment unit that maximizes the image removal ratio. The element value obtained by the element value control unit as the element value of the component element is stored in the memory as correction data, and the correction stored in the memory is performed during the subsequent adjustment for suppressing the image signal. (7) The receiver according to (7), wherein adjustment is performed using data.
(9) The first filter constituting the complex filter includes a first voltage-current converter that converts a signal voltage input from the first input terminal into a signal current, and the first voltage-current conversion. A first capacitor for inputting the signal current converted by the converter, and a third voltage-current converter, wherein the second filter outputs a signal voltage input from the second input terminal. A second voltage-current converter that converts current, a second capacitor that inputs the signal current converted by the second voltage-current converter, and a fourth voltage-current converter, and The output side from the third voltage-current converter is connected to the output side of the second voltage-current converter and is connected to the second output terminal, and the output from the fourth voltage-current converter is The output side is connected to the output side of the first voltage-current converter. Together, either receiver of said connected to said first output terminal (3) to (8).
(10) A quadrature mixer that outputs first and second quadrature demodulated signals having a quadrature relationship from the received high-frequency signal, and a desired one of the first and second quadrature demodulated signals output from the quadrature mixer A complex filter that passes a real signal and suppresses an image signal for the desired real signal, and a signal that switches a signal path for inputting the first and second quadrature demodulated signals output from the quadrature mixer to the complex filter An image removal ratio measurement method in a receiver comprising at least a path switching unit, wherein when calculating an optimum image removal ratio for suppressing the image signal, the signal path switching unit causes the orthogonal mixer and the By appropriately switching the signal path to and from the complex filter, the signal strength output from the complex filter in each signal path is changed. By leaving, image rejection ratio measuring method for calculating the image rejection ratio for suppressing the image signal.

  Although the present invention has been described with reference to the exemplary embodiments, the present invention is not limited to the above. Various changes that can be understood by those skilled in the art can be made to the configuration and details of the present invention within the scope of the invention.

  This application claims the priority on the basis of Japanese application Japanese Patent Application No. 2009-289246 for which it applied on December 21, 2009, and takes in those the indications of all here.

1 Low Noise Amplifier (LNA)
2 Variable Gain Amplifier (VGA)
3 Encoder (ADC: Analog-to-Digital Converter)
4 Digital Signal Processing Unit 5 Digital Signal Processing Unit 11 Quadrature Mixer 12 Local Oscillator (LO)
13 Signal Path Switching Unit 14 Complex Filter 15 Signal Strength Detection Unit 16 Arithmetic Processing Unit 17 Element Value Control Unit 18 Orthogonal Mixer 19 Element Value Control Unit 20 Phase Adjustment Unit 21 Element Value Control Unit 22 Signal Strength Detection Unit 25 Orthogonal Mixer 26 Local Oscillator (LO: Local Oscillator)
27 Complex filter 31 Low noise amplifier 32 Quadrature mixer 33a Variable gain amplifier 33b Variable gain amplifier 34 Complex filter 35 Amplitude detection unit 36 Filter control unit 37 Simulated image signal generation unit 38 Signal switching unit 41 Orthogonal mixer 41a Switch 42a Variable gain amplifier 42b Variable Gain amplifier 43a Encoder 43b Encoder 44 Filter mismatch calibration circuit 45 Image removal circuit 46 Calibration control circuit 47 Calibration signal source 48 Filter mismatch detection circuit 49 Tap count calculation circuit 51 Low noise amplifier 52a Multiplier 52b Multiplier 53 Phase lock Oscillator 54a Low-pass filter 54b Low-pass filter 55 Path switching circuit 56 Phase adjustment circuit 57a Image suppression circuit 57b Image suppression circuit 58a Encoder 58b Encoder 59 Digital signal Processing circuit 101 Receiver 102 Receiver 103 Receiver 105 Receiver 111 I mixer 112 Q mixer 131 Switch 132 Switch 133 Switch 134 Switch 141 I filter 142 Q filter 143a Voltage current converter 143b Voltage current converter 144a Voltage current converter 144b Voltage-current converter 145a Capacitor 145b Capacitor 181 I mixer 182 Q mixer 251 I mixer 252 Q mixer 271 I filter 272 Q filter 341a I filter 341b Q filter 342 Element value controller IF_I Orthogonal demodulated signal IF_Q Orthogonal demodulated signal LO_I Local signal LO_Q Local signal

Claims (8)

A quadrature mixer that outputs first and second quadrature demodulated signals having a quadrature relationship from the received high-frequency signal, and a desired real signal among the first and second quadrature demodulated signals output from the quadrature mixer A receiver comprising at least a complex filter that passes and suppresses the image signal for the desired real signal,
Signal path switching means for switching a signal path for inputting the first and second quadrature demodulated signals output from the quadrature mixer to the complex filter;
A local oscillator that outputs first and second local signals of a predetermined frequency that are orthogonal to each other, and
The quadrature mixer outputs the received high-frequency signals as the first and second quadrature demodulated signals by down-converting the first and second local signals output from the local oscillator,
The complex filter includes first and second filters, and both the first and second quadrature demodulated signals are input to both the first and second filters simultaneously, or At least one of the first and second quadrature demodulated signals is simultaneously input to both the first and second filters;
The signal path switching means includes a first input terminal for inputting the first quadrature demodulated signal, a second input terminal for inputting the second quadrature demodulated signal, and the first filter of the complex filter. A first output terminal that outputs a signal to the second filter, a second output terminal that outputs a signal to the second filter of the complex filter, and first to fourth switches. The switch selects whether to connect the first input terminal and the first output terminal, and the second switch connects the second input terminal and the first output terminal. The third switch selects whether to connect the first input terminal and the second output terminal, and the fourth switch selects the second input terminal. to and selects whether to connect the second output terminal and Receiver. Signal intensity detecting means for detecting the signal intensity of the output signal of the complex filter is further provided, and the signal intensity detecting means inputs an output signal from at least one of the first and second filters constituting the complex filter. by receiver according to claim 1, characterized by detecting the signal strength of the output signal of the complex filter. Computation processing means for performing a predetermined computation based on the signal strength detected by the signal strength detection means is further provided, and the computation processing means performs signal path control every time the computation based on the signal strength is terminated. By switching on and off of the first to fourth switches in the signal path switching means by outputting a signal, switching control of the signal path between the quadrature mixer and the complex filter is performed. The receiver according to claim 2 . The arithmetic processing means turns on the first switch and the fourth switch in the signal path switching means by the signal path control signal, and the second switch and the third switch as the first operation mode. The first signal strength detected as the signal strength by the signal strength detection means in a state where the switch is turned off, and as the second operation mode, the second signal in the signal path switching means by the signal path control signal. The second signal detected as the signal strength by the signal strength detection means in a state where the second switch and the third switch are turned on and the first switch and the fourth switch are turned off. An image that suppresses the image signal with respect to the desired real signal based on the acquired first and second signal intensities. The signal strength detecting means calculates the residual ratio or, as a third operation mode, the signal intensity detecting means turns on the signal in a state where all of the first to fourth switches in the signal path switching means are turned on by the signal path control signal. A third signal intensity detected as an intensity is further acquired, and an image removal ratio for suppressing the image signal with respect to the desired actual signal is determined based on the acquired first, second, and third signal intensity. As a fourth operation mode to be calculated, the first switch and the third switch in the signal path switching means are turned on or off by the signal path control signal, and the second switch and the second switch The fourth signal strength detected as the signal strength by the signal strength detection means in a state where the switch 4 is turned off or on. And further obtains, the acquired first, second, on the basis of the fourth signal strength, to claim 3, characterized in that for calculating the image rejection ratio for suppressing the image signal for the desired real signal The listed receiver. It further comprises element value control means for controlling element values of the constituent elements constituting the complex filter, wherein the element value control means comprises the first and second signal intensities detected by the signal intensity detection means or the The image removal ratio for suppressing the image signal calculated by the arithmetic processing unit based on one of the first, second, and third signal strengths or the first, second, and fourth signal strengths is maximum. The element value of the constituent element constituting either the complex filter, the quadrature mixer, or the phase adjusting means for adjusting the phase of the first and second local signals is controlled. Item 5. The receiver according to Item 4 . An image removal ratio for suppressing the image signal calculated by the arithmetic processing means, or a component constituting either the complex filter, the quadrature mixer, or the phase adjustment means that maximizes the image removal ratio. The element value acquired by the element value control means as the element value is stored in the memory as correction data, and the correction data stored in the memory is used for the subsequent adjustment for suppressing the image signal. The receiver according to claim 5 , wherein adjustment is performed. The first filter constituting the complex filter includes a first voltage-current converter that converts a signal voltage input from the first input terminal into a signal current, and the first voltage-current converter. A first capacitor for inputting the converted signal current; and a third voltage-current converter, wherein the second filter converts the signal voltage input from the second input terminal into a signal current. A second voltage-to-current converter, a second capacitor for inputting the signal current converted by the second voltage-to-current converter, and a fourth voltage-to-current converter. The output side from the voltage-current converter is connected to the output side of the second voltage-current converter and is connected to the second output terminal, and the output side from the fourth voltage-current converter is When connected to the output side of the first voltage-current converter A receiver according to any one of claims 2 to 6, characterized in that it is connected to the first output terminal. A quadrature mixer that outputs first and second quadrature demodulated signals having a quadrature relationship from the received high-frequency signal, and a desired real signal among the first and second quadrature demodulated signals output from the quadrature mixer And the first and second quadrature demodulated signals output from the quadrature mixer and the complex filter consisting of the first and second filters that suppress and output the image signal with respect to the real signal. A signal path to be input to the complex filter is switched, a first input terminal for inputting the first quadrature demodulated signal, a second input terminal for inputting the second quadrature demodulated signal, and the first input terminal of the complex filter. A first output terminal that outputs a signal to one filter, a second output terminal that outputs a signal to the second filter of the complex filter, and first to fourth switches. The first switch selects whether to connect the first input terminal and the first output terminal, and the second switch selects the second input terminal and the first output terminal. Selecting whether to connect an output terminal, the third switch selects whether to connect the first input terminal and the second output terminal, and the fourth switch A signal path switching means for selecting whether or not to connect a second input terminal and the second output terminal, and an image removal ratio measuring method in a receiver comprising at least
The first and second quadrature demodulated signals are input to the first and second filters, respectively, the actual signal is passed through, the image signal is suppressed and output, and the first output is output. A first step of detecting the strength of the signal;
The first and second quadrature demodulated signals are input to the second and first filters, respectively, the image signal is passed through, the real signal is suppressed and output, and the second output is output. A second step of detecting the strength of the signal;
Both the first and second quadrature demodulated signals are simultaneously input to the first and second filters, both the real signal and the image signal are passed through and output, and output third. A third step of detecting the signal strength of
Only one of the first and second quadrature demodulated signals is input to both the first and second filters, and both the real signal and the image signal are output and output. A fourth step of detecting the intensity of the fourth signal to be performed,
A fifth step of calculating an image removal ratio by performing a predetermined calculation based on the signal intensity detected in the first, second and third, or the first, second and fourth steps; And a method for measuring an image removal ratio.

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