JP5644707B2 - Electronic control device and control system - Google Patents

Description

  The present invention relates to a control system in which a master unit stores data in memories of a plurality of slave units.

  In the field of vehicle control, it is known that an actuator device (for example, an injector) as a slave unit controlled by an electronic control device as a master unit incorporates a memory. The data unique to the actuator device (for example, a correction value for correcting the machine difference of the actuator device) is written. The data in the memory is read into the electronic control device and used for controlling the actuator device (see, for example, Patent Documents 1 and 2).

  In addition, the learning value obtained in the process of controlling the actuator device by the electronic control device is written and stored in the memory of the actuator device to prevent the learning value from being lost due to the replacement of the electronic control device. It is also conceivable to do this (for example, see Patent Document 1).

  Here, as data to be saved that should be saved from the electronic control unit to the memory of the actuator device, in addition to data unique to the actuator device, for example, vehicle identification information, freeze frame data (fault detected) There is common data in the control system such as vehicle state data such as engine speed, vehicle speed, and fuel pressure at the time. For this reason, the storage area of the memory of the actuator device is divided into a unique area in which data unique to the actuator device is stored and a common area in which common data is stored in the control system.

  Then, when there are a plurality of actuator devices, such as an injector provided for each cylinder of the engine, the electronic control device may be configured to write the same storage target data in a common area in the memory of each actuator device. It is done. With this configuration, even if one of the plurality of actuator devices is replaced, the same storage target data remains in the memory of another actuator device, so the certainty of continuously storing the storage target data is improved. To do. Hereinafter, storing the same data in a plurality of locations is referred to as “redundant storage of data”.

JP 2008-057413 A JP 2009-228681 A

  By the way, in the above-described control system in which the electronic control device writes the same data to be stored in the common area in the memory of each actuator device, although redundant storage of data can be realized, there is a problem that the utilization efficiency of the memory is poor.

  That is, assuming that the capacity of the common area in the memory of each actuator device is a capacity capable of storing A data, the number of data that can be stored on the actuator device side as viewed from the electronic control device (meaning the number of types) Is still A. The number of data that can be stored does not change even if the number of actuator devices increases and the total capacity of the common area in all actuator devices increases.

  Therefore, an object of the present invention is to improve the utilization efficiency of the memory of the slave unit in the control system in which the master unit stores data in the memories of a plurality of slave units.

The electronic control device according to claim 1 is a master unit that is communicably connected to N (where N is an integer of 3 or more) slave units via a communication line, and the control system together with the N slave units. Is made. The slave unit is an injector that is provided for each cylinder of an automobile engine and injects fuel into the corresponding cylinder. Each slave unit is provided with a non-volatile memory capable of rewriting data, and data to be saved is written into a specific storage area of the memory by the electronic control device as a master unit.

  Particularly, the electronic control device according to claim 1 includes virtual memory creating means for creating a continuous virtual memory area from the specific storage area in each slave unit. Then, the virtual memory creating means divides the specific storage area in each slave unit into unit storage areas of a certain capacity capable of storing one of the storage target data, and each unit storage area is divided into the same slave A virtual memory area is created by allocating each unit storage area from the beginning of the virtual memory area in the order in which the items held in the unit appear every N times.

  The electronic control device according to claim 1 further comprises a writing means, and the writing means is a unit of R units (where 2 ≦ R <N) that is continuous in the created virtual memory area. The same data to be saved is written in each storage area.

  The specific storage area in the slave unit is specifically a specific storage area of a memory provided in the slave unit. Further, the specific storage area may be a part or all of the storage area of the memory. In addition, in each unit storage area of the created virtual memory area, any unit storage area of the specific storage area in any slave unit is an actual physical storage area (in general terms, a physical storage area Address) is assigned (in other words, is associated), the fact that the writing means writes data to any unit storage area of the virtual memory area is assigned to that unit storage area. That is, data is written to a physical storage area.

  According to such an electronic control device, compared with a conventional configuration in which the same storage target data is written to a specific storage area in each slave unit, the data storage efficiency is improved and the memory utilization efficiency of the slave unit is improved. be able to. That is, if the specific storage areas have the same capacity, the number of data that can be stored can be increased.

For example, the number of slave units is 4 (N = 4), and the specific storage area in each slave unit is composed of 30 unit storage areas.
In this case, in the conventional configuration, only 30 pieces of data can be stored on the slave unit side.

On the other hand, in the electronic control device of claim 1, if R = 3, 40 data can be stored on the slave unit side, and if R = 2, 60 data on the slave unit side. Data can be saved. Also, since each data is stored in R different slave units, redundant storage of data is also realized. In other words, even if any slave unit is replaced, the data stored in that slave unit is also stored in any other slave unit, and the data to be stored is not lost. .
Moreover, the electronic control device according to claim 1 is:
For each of the slave units, replacement detection means for determining whether the slave unit has been replaced,
When it is determined that one of the slave units has been replaced by the replacement detection unit, the post-replacement capacity that is the capacity of the specific storage area in the post-replacement slave unit that is the slave unit that has been determined to be replaced, A capacity for determining whether or not a change has occurred with respect to the capacity before replacement, which is the capacity of the specific storage area in the slave unit before replacement, which is the slave unit connected to the electronic control unit before the slave unit after replacement. Change determination means,
The virtual memory creating unit corrects the virtual memory area when the capacity change determining unit determines that the post-replacement capacity has changed with respect to the pre-replacement capacity.

  Next, an electronic control device according to a second aspect is the electronic control device according to the first aspect, wherein the virtual memory creating means obtains area information indicating the head and capacity of the specific storage area from each slave unit, and the obtained area. A specific storage area in each slave unit is specified from the information to create a virtual memory area.

  According to this configuration, even if the head position (head address) or the capacity of the specific storage area of each slave unit changes, the specific storage area can be specified and a virtual memory area can be created.

According to a third aspect of the present invention, there is provided an electronic control device according to the first or second aspect, further comprising a master-side memory that is a non-volatile memory capable of rewriting data.
In this electronic control device, the virtual memory creating means is a virtual memory that cannot allocate unit storage areas of the specific storage areas in the slave units according to the order because there is a capacity difference in the specific storage areas in the slave units. The unit storage area of the master side memory is allocated to the unit storage area of the memory area.

  In other words, for the slave unit that has run out of unit storage areas to be allocated to the virtual memory area due to the difference in capacity of the specific storage area, the unit storage area of the master side memory is used instead of the unit storage area that the slave unit has run out. Is used. The unit storage area of the slave unit is specifically a unit storage area of the specific storage area in the slave unit, and more specifically, a specific storage area of the memory provided in the slave unit. It is a unit storage area.

  According to this configuration, redundant storage of data can be realized even if the capacity of a specific storage area in a certain slave unit is smaller than the capacity of a specific storage area in another slave unit. In other words, even if one of the slave units is replaced, the data stored in the slave unit is stored in the other slave unit or the master side memory, and the data to be stored is not lost. .

Next, an electronic control device according to a fourth aspect is the electronic control device according to the third aspect,
Discriminating means for discriminating whether the post-replacement capacity has increased or decreased with respect to the pre-exchange capacity when it is determined by the capacity change determination means that the post-exchange capacity has changed with respect to the pre-exchange capacity With
The virtual memory creating means
When it is determined by the determination means that the post-replacement capacity has increased with respect to the pre-replacement capacity, as a process of correcting the virtual memory area,
For the unit storage area of the virtual memory area that had previously been allocated the unit storage area of the master side memory although the unit storage area of the specific storage area in the slave unit before replacement should be allocated Among the unit storage areas of the specific storage area in the slave unit, the process of assigning an increased unit storage area,
The virtual memory creating means
When the determination means determines that the post-replacement capacity has decreased with respect to the pre-replacement capacity, as a process of correcting the virtual memory area,
Of the unit storage areas of the specific storage area in the slave unit before replacement, the master side memory with respect to the unit storage area of the virtual memory area that has been allocated a unit storage area that has been lost due to replacement of the slave unit The unit storage area is allocated.
Then, the electronic control device according to claim 5, in the electronic control device according to claim 1-4, provided with a restoring means.

Restore unit, when any of the slave units are determined to be replaced by the exchange detection unit, is connected to the electronic control unit before the slave unit which is determined to be the replacement (replacement after slave unit) The unit storage area in the virtual memory area in which the same storage target data as the storage target data stored in the unit storage area of the specific storage area in the slave unit ( slave unit before replacement ) is specified and specified From the storage target data stored in the unit storage area, the storage target data to be written in the unit storage area of the specific storage area in the slave unit after replacement is restored.

By providing this restoring means, it becomes possible to save the data to be saved, which has been saved in the slave unit before exchange, to the slave unit after exchange.
If R is 3 or more, when any one of the slave units is replaced, the storage target data stored in the slave unit is stored in two or more physical units other than the slave unit. Therefore, the restoration means, for example, performs a majority process on the storage target data stored in the two or more unit storage areas, so that the correct storage target is stored. Data can be restored more reliably.

In addition, when replacing a plurality of slave units, it is possible to prevent the data to be saved from being lost by defining a work rule so that the slave units are replaced one by one.
The electronic control unit 請 Motomeko 1-5, the slave unit is provided for each cylinder of an automobile engine, a injector for injecting fuel into the corresponding cylinder.

Thus, if each of the plurality of slave units is an injector for each cylinder, it is advantageous in the following points.
(1) Since each of the plurality of slave units has the same hardware, the communication circuit and communication procedure of the electronic control device can be made common to each slave unit.

(2) Since the connectors of the slave units are the same, a device for connecting to the connectors and reading data from the memory can be shared.
(3) When the data (eg freeze frame data) stored in the memory (specific storage area) of each slave unit is to be analyzed at a location different from the automobile (vehicle), if it is an injector, a normal control unit It is more compact and convenient to carry.

On the other hand, according to the control system of the sixth aspect, since the electronic control device according to the first to fifth aspects is provided as a master unit, the effects described with respect to the electronic control device according to the first to fifth aspects can be obtained. Also in 請 Motomeko 6 control system, the slave unit is an injector for each cylinder of the engine.

It is explanatory drawing explaining the hardware constitutions of the control system of embodiment. It is explanatory drawing explaining the creation procedure of a virtual memory area. It is a flowchart showing an exchange determination process. It is a flowchart showing a memory management process. It is a flowchart showing a virtual memory mapping process. It is a flowchart showing all mapping processing. It is a flowchart showing a difference mapping process. It is a flowchart showing a writing process. It is explanatory drawing explaining an example of the virtual memory area (mapping information of a virtual memory address and a physical address) created.

  Hereinafter, a control system according to an embodiment to which the present invention is applied will be described. In addition, the control system of embodiment described below is mounted in a vehicle (automobile) and controls the fuel injection to the engine of this vehicle. The engine will be described as a four-cylinder engine.

  As shown in FIG. 1A, the control system 1 of the present embodiment is provided for each of the engine cylinders # 1 to # 4, and four injectors IJ1 to IJ4 for injecting fuel into the corresponding cylinders. An electronic control unit (hereinafter referred to as ECU) 11 that controls the injectors IJ1 to IJ4. The ECU 11 and the injectors IJ1 to IJ4 are communicably connected via a communication line 12 disposed in the vehicle.

  The ECU 11 includes a microcomputer 16 having a CPU 13, a ROM 14, a RAM 15, a nonvolatile memory (an EEPROM in the present embodiment) 17 capable of rewriting data, and the microcomputer 16 via injectors IJ 1 to IJ 4 via the communication line 12. A communication circuit 18 for communication, and a drive circuit 19 for driving the injectors IJ1 to IJ4 (specifically, actuators described later provided in the injectors IJ1 to IJ4) according to a control signal from the microcomputer 16 are provided. Yes.

  On the other hand, the injectors IJ1 to IJ4 are each driven by an actuator 21 that opens a fuel injection port, a nonvolatile memory (EEPROM in this embodiment) 23 that can rewrite data, a communication processing unit 25, The communication processing unit 25 includes a communication circuit 27 for communicating with the ECU 11 (specifically, the microcomputer 16). The communication processing unit 25 can be realized by, for example, a microcomputer, but may be configured by other hardware circuits such as a logic circuit.

  And although illustration is abbreviate | omitted, the drive signal output by the drive circuit 19 of ECU11 is supplied to the actuator 21 of each injector IJ1-IJ4 via the drive signal line | wire for every injector IJ1-IJ4. The actuator 21 is, for example, an electromagnetic solenoid, but may be a piezo actuator using a piezo element.

  Furthermore, although not shown, each of the injectors IJ1 to IJ4 is also provided with a pressure sensor that is provided at the fuel intake port of the injector and detects the fuel pressure (so-called inlet pressure) at the fuel intake port. The pressure signal (analog signal indicating the detected pressure) output from the pressure sensor is input to the ECU 11 via a sensor signal line for each of the injectors IJ1 to IJ4.

  As shown in FIG. 1B, the storage area in the EEPROM 23 of each of the injectors IJ1 to IJ4 contains data unique to the injector IJn (n is any one of 1 to 4) (hereinafter also referred to as unique data). The unique area 29 to be written and the common area 30 in which common data to be stored in the control system 1 (in other words, data not specific to the injectors IJ1 to IJ4, hereinafter also referred to as common data) are written. It is divided.

  The unique data written in the unique area 29 includes the unit ID of the injector IJn, the start address of the common area 30 (hereinafter referred to as the common area start address), the number of common area data indicating the capacity of the common area 30, and the injector. There are machine difference correction values used for correcting machine differences of the injector IJn in controlling IJn, and these are written when the injector IJn is manufactured. Further, for example, if the learning value obtained in the process in which the microcomputer 16 of the ECU 11 controls the injector IJn is written in the EEPROM 23 of the injector IJn, the learning value is also written in the specific area 29 as specific data.

  The common data written in the common area 30 includes, for example, vehicle identification information and freeze frame data, which are written by the microcomputer 16 of the ECU 11.

  In this embodiment, the unit ID of the injector IJn is “unit ID = 1” if the injector is used for the cylinder # 1, and “unit ID = 2” if the injector is used for the cylinder # 2. To be more specific, the cylinder number to be used is assigned, and this does not change even if the injector IJn is replaced. The unit ID is also used as a communication ID indicating a communication partner.

  On the other hand, in the present embodiment, the EEPROM 17 of the ECU 11 and the EEPROM 23 of the injectors IJ1 to IJ4 each have one address area (each area to which an address is assigned, hereinafter referred to as one address area) of a predetermined number of bytes (for example, The capacity is 1 byte or 2 bytes), and one data is written for each address area. For this reason, in the common area 30 of the EEPROM 23, one address area is a unit storage area of a certain capacity capable of storing one of the save target data. The number of common area data indicates the number of one address area (that is, the number of addresses) of the common area 30 and the number of data that can be stored in the common area 30.

And in ECU11, the microcomputer 16 performs the various processes including the process of fuel-injection control by running the program in ROM14 by CPU13.
For example, the microcomputer 16 determines the fuel injection start timing and the injection time for each cylinder based on the engine operating state such as the engine speed and the intake air amount. Further, the microcomputer 16 reads the above-described machine difference correction value from each of the injectors IJ1 to IJ4 and stores it in the RAM 15 or the EEPROM 17, and uses the machine difference correction value from the determined fuel injection start timing and injection time. Thus, the drive start timing and drive duration of the actuator 21 of each injector IJ1 to IJ4 are calculated, and a drive signal for driving the actuator 21 is output from the drive circuit 19 to each injector IJ1 to IJ4 according to the calculation result. . Furthermore, the microcomputer 16 detects the actual fuel injection characteristics of the injectors IJ1 to IJ4 by sampling the pressure signals output from the pressure sensors of the injectors IJ1 to IJ4 at regular intervals, and the detection result. Is also used to correct the drive start timing and drive duration of the actuator 21.

  When reading (reading) data (information) from the injectors IJ1 to IJ4, the microcomputer 16 of the ECU 11 reads the unit ID of the injector IJn of the communication partner (in this case, the reading partner) and the data reading destination address (EEPROM 23). The read request frame including the address in the communication line 12 is sent out. Then, the communication processing unit 25 of the injector IJn that holds the unit ID included in the read request frame extracts an address from the read request frame, and among the addresses in the EEPROM 23 of the injector IJn, the extracted address The data is read out from the data, and the data is transmitted to the ECU 11. Then, the microcomputer 16 of the ECU 11 acquires data from the injector IJn via the communication circuit 18.

  Conversely, when the microcomputer 16 of the ECU 11 writes data (information) to the injectors IJ1 to IJ4, the unit ID of the injector IJn of the communication partner (in this case, the writing partner), the data to be written, and the data write destination A write request frame including an address (an address in the EEPROM 23) is sent to the communication line 12. Then, the communication processing unit 25 of the injector IJn having the unit ID included in the write request frame extracts data and an address from the write request frame, and the extracted data is used as the EEPROM 23 of the injector IJn. Of these addresses, the extracted address is written.

  The microcomputer 16 of the ECU 11 writes the above-described common data in the common area 30 of the EEPROM 23 in the injectors IJ1 to IJ4 (hereinafter also simply referred to as the common area 30 of the injectors IJ1 to IJ4). 1 is characterized in how to handle the common area 30 and a common data writing method.

First, an outline will be described.
As shown in FIG. 2, the microcomputer 16 of the ECU 11 creates a continuous virtual memory area (virtual memory space) 31 from the common area 30 of the injectors IJ1 to IJ4.

  Specifically, as shown on the left side of FIG. 2, the common area 30 of each of the injectors IJ1 to IJ4 is not simply connected to each injector as a continuous virtual memory area. As shown on the right side, the common area 30 of each of the injectors IJ1 to IJ4 is divided into one address area, and each of the one address area is held by the same injector (N is the number of the injectors IJ1 to IJ4). In this embodiment, the virtual memory area 31 is created by assigning each address area from the beginning of the virtual memory area 31 in the order of appearance every 4).

  In the present embodiment, each of one address area in the common area 30 of the injectors IJ1 to IJ4 (hereinafter, also simply referred to as one address area of the injectors IJ1 to IJ4) is expressed as “what the injector IJ1 has → the injector IJ2 has. The virtual memory area 31 is formed by repeatedly arranging them in the order of “things → the ones held by the injector IJ3 → the ones held by the injectors IJ4” (hereinafter, this order is also referred to as the injector order).

  In FIG. 2, one rectangular frame hatched by diagonal lines from the upper right to the lower left is one address area of the injector IJ1, and one square frame hatched by the mesh lines is the one of the injector IJ2. One rectangular area that is one address area and hatched by diagonal lines from the upper left to the lower right direction is one address area of the injector IJ3, and one rectangular frame that is hatched by vertical lines is that of the injector IJ4. One address area.

  Further, the microcomputer 16 of the ECU 11 has one address area of the virtual memory area 31 in which one address area of each of the injectors IJ1 to IJ4 cannot be assigned according to the above order due to a difference in capacity between the common areas 30 of the injectors IJ1 to IJ4. Is assigned one address area of a predetermined area (hereinafter referred to as ECU memory) 33 prepared for the virtual memory area 31 in the EEPROM 17 of the ECU 11. When any one address area of the ECU memory 33 is assigned to the virtual memory area 31, among the empty addresses (that is, addresses not assigned to the virtual memory area 31 at that time), A value close to the head address is preferentially used.

In FIG. 2, a white square frame without hatching is one address area of the ECU memory 33.
In the example of FIG. 2, the common area data number of the injector IJ1 is 3, the common area data number of the injector IJ2 is 7, the common area data number of the injector IJ3 is 5, and the common area data of the injector IJ4. The number is two.

  Therefore, in the example of FIG. 2, when each of the address areas of the injectors IJ1 to IJ4 is repeatedly arranged in the order of the injectors described above, first, in the third cycle (refer to the portion of m = 3), one address area of the injector IJ4 Is not enough.

  Therefore, in the virtual memory area 31, the fourth one address area in the third cycle (the 12th one address area from the head, and the virtual one address area to which the one address area of the injector IJ4 should be assigned: e = 11), the first one address area of the ECU memory 33 is assigned.

Further, in the next fourth cycle (see the part of m = 4), not only one address area of the injector IJ4 but also one address area of the injector IJ1 is insufficient.
Therefore, in the virtual memory area 31, the first one address area in the fourth cycle (the thirteenth one address area from the beginning, and the virtual one address area to which the one address area of the injector IJ1 should be assigned: e = 12) is assigned the second 1-address area from the beginning of the ECU memory 33, and is the fourth 1-address area (the 16th one-address area from the beginning) in the fourth cycle. A virtual one address area to which one address area of the injector IJ4 is to be assigned (refer to the part of e = 15) is assigned the third one address area from the top of the ECU memory 33.

Similarly, even in the next fifth cycle (see the part of m = 5), one address area of the injectors IJ1 and IJ4 is insufficient.
Therefore, in the virtual memory area 31, the first one address area in the fifth cycle (the 17th one address area from the top: see the part of e = 16) is the fourth one address from the top of the ECU memory 33. An area is allocated, and the fifth 1-address area from the top of the ECU memory 33 is allocated to the 4th 1-address area in the fifth cycle (the 20th 1-address area from the top: see the part of e = 19). Will be.

Furthermore, in the next 6th cycle (refer to the portion of m = 6), not only one address area of the injectors IJ1 and IJ4 but also one address area of the injector IJ3 is insufficient.
Therefore, in the virtual memory area 31, the first one address area in the sixth cycle (the 21st one address area from the head: see the part of m = 20) is the sixth address from the head of the ECU memory 33. The area is allocated, and the third one address area in the sixth cycle (the first one address area from the head, which is the first one address area of the injector IJ3 is supposed to be allocated to the virtual one address area: e = 22 The 7th one address area from the top of the ECU memory 33 is allocated to the partial reference), and the 4th 1 address area in the sixth cycle (the 24th 1 address area from the top: see the part of m = 23) Is assigned an eighth address area from the top of the ECU memory 33. That is, one address area of the ECU memory 33 is assigned to each one address area other than the second one in the sixth cycle.

In the next seventh cycle (refer to the portion of m = 7), as in the sixth cycle, one address area of the injectors IJ1, IJ3, and IJ4 is insufficient.
Therefore, in the virtual memory area 31, one address area of the ECU memory 33 is also allocated to each one address area other than the second one in the seventh cycle.

Since the maximum number of address areas among the common areas 30 of the injectors IJ1 to IJ4 is 7, the creation of the virtual memory area 31 is completed in the seventh cycle.
Here, in the present embodiment, as shown on the right side of FIG. 2, the microcomputer 16 of the ECU 11 groups every three consecutive address areas from the top of the created virtual memory area 31, and The same common data is written in each address area. For this reason, three pieces of the same data are written in the virtual memory area 31, and hereinafter, the number of the same data written in the virtual memory area 31 is referred to as a “redundant data number”. Note that writing data to any one address area of the virtual memory area 31 actually means that one physical address area (that is, the injectors IJ1 to IJ4) assigned to the virtual one address area. That is, data is written in the common area 30 or any one address area in the ECU memory 33.

  For this reason, in the example of FIG. 2, a maximum of 28 1-address areas can be set as the virtual memory area 31, but the number of 1-address areas only needs to be a multiple of the number of redundant data (= 3). The 28th one address area from the beginning is not necessary. Therefore, as the virtual memory area 31, the third address in the seventh cycle and the 27th one address area from the top are set (in other words, the physical address is mapped to the 27th virtual address). doing).

  That is, in this embodiment, if the maximum number of address areas (number of common area data) of the common area 30 of the injectors IJ1 to IJ4 is Mmax, the number of one address area (number of addresses) of the virtual memory area 31. Are set to the maximum value of multiples of the number of redundant data (= 3) which is equal to or less than “4 × Mmax”.

Next, the contents of the process performed by the microcomputer 16 of the ECU 11 for storing the common data on the injectors IJ1 to IJ4 side will be described using a flowchart.
First, FIG. 3 is a flowchart showing a replacement determination process for detecting that any of the injectors IJ1 to IJ4 has been replaced. This replacement determination process is executed, for example, when the operation power is turned on to the ECU 11 and the microcomputer 16 is activated when the vehicle is turned on. In the present embodiment, it is assumed that two or more of the injectors IJ1 to IJ4 are not replaced at the same time. That is, the work rule is determined so that the injectors IJ1 to IJ4 are exchanged one by one.

As shown in FIG. 3, when starting the replacement determination process, the microcomputer 16 first reads and acquires replacement determination information from each of the injectors IJ1 to IJ4 in S110.
This replacement determination information is information for determining whether or not the injectors IJ1 to IJ4 have been replaced. For example, the replacement determination information is stored at a predetermined address in the unique area 29 of the EEPROM 23. The replacement determination information has a predetermined default value (for example, 0) at the time of manufacture of the injectors IJ1 to IJ4 (before the injectors IJ1 to IJ4 are connected to the ECU 11). By S140 or S150 described later, the value is rewritten to a predetermined value (hereinafter referred to as a checked value) different from the default value.

In the next S120, it is determined whether or not there is an injector whose replacement determination information acquired in S110 is not a checked value. If there is such an injector, the process proceeds to S130.
In S130, it is determined whether or not the replacement determination information for all the injectors IJ1 to IJ4 is not a checked value, and if the replacement determination information for all the injectors IJ1 to IJ4 is not the checked value, the ECU 11 has four information. At the first startup after the injectors IJ1 to IJ4 are connected, it is determined that the four injectors IJ1 to IJ4 are in the initial state, and the process proceeds to S140.

  In S140, the status information S1 to S4 of the injectors IJ1 to IJ4 is set to “1” indicating the initial state, and a checked value is set to the storage destination address of the replacement determination information in the EEPROM 23 of each injector IJ1 to IJ4. Write. By this writing, the replacement determination information on the injectors IJ1 to IJ4 side is rewritten from the default value to the checked value. Thereafter, the exchange determination process is terminated.

  Further, if the determination in S130 is negative (determined as NO), that is, if not all the injectors but the replacement determination information of any one of the injectors is not a checked value, the injector has been replaced. Determination is made and the process proceeds to S150.

  In S150, the status information Sx of the injector IJx (x is any one of 1 to 4) whose replacement determination information is not a checked value is set to “2” indicating replacement, and replacement of the injector IJx in the EEPROM 23 is performed. Write the checked value to the storage address of the judgment information. As a result of this writing, the replacement determination information on the replaced injector IJx side is rewritten from the default value to the checked value. Thereafter, the exchange determination process is terminated.

  On the other hand, if it is determined in S120 that there is no injector whose replacement determination information is not the checked value (that is, the replacement determination information of all the injectors is the checked value), the injectors IJ1 to IJ4 are If it is determined that they have not been exchanged, the process proceeds to S160. In S160, the state information S1 to S4 of the injectors IJ1 to IJ4 is set to “0” indicating non-exchange, and then the exchange determination process is terminated.

  Note that the process of writing the checked value as the replacement determination information (the process of rewriting the default value to the checked value) in the EEPROM 23 of the injector is not performed in S140 and S150, but the process of S230 in FIG. The mapping process may be performed immediately after execution. In this case, for example, even if the microcomputer 16 is restarted for some reason after the processing of S140 or S150 in FIG. 3 is completed and until the processing of S230 in FIG. 4 is completed. Since the replacement determination information has not been rewritten to the checked value, it is determined again as “YES” in S120 and S130 in FIG. 3, and the state information S1 to S4 can be correctly set again in S140 or S150. As a result, it is possible to prevent the process of S230 in FIG.

  In S120 and S130, it may be determined that “the replacement determination information is a default value” instead of “the replacement determination information is not a checked value”. Further, the checked value may be a value different for each of the injectors IJ1 to IJ4. Further, the injectors IJ1 to IJ4 are configured such that when the connection with the ECU 11 is released (that is, when the injectors IJ1 to IJ4 are removed from the vehicle), the stored replacement determination information automatically returns to the default value. Also good. For example, in the injectors IJ1 to IJ4, if the replacement determination information is configured to be stored in a backup RAM that is constantly supplied with power from the ECU 11, the replacement determination information is automatically updated along with the removal of the injectors IJ1 to IJ4. Can be reset automatically.

Next, FIG. 4 is a flowchart showing a memory management process for creating the virtual memory area 31. This memory management process is executed following the replacement determination process of FIG.
As shown in FIG. 4, when starting the memory management process, the microcomputer 16 first reads state information S1 to S4 of the injectors IJ1 to IJ4 in S210.

  Next, in S220, it is determined whether there is "1" or "2" among the state information S1 to S4. If there is no state information "1" or "2", the memory management is performed as it is. The process ends.

  On the other hand, if any of the status information S1 to S4 is “1” or “2” (S220: YES), the process proceeds to S230, and after performing the virtual memory mapping process of FIG. To do.

  Here, as shown in FIG. 5, in the virtual memory mapping process, first, in S310, the above-mentioned common area data numbers M1 to M4 are read and acquired from the injectors IJ1 to IJ4. At this time, the common area head addresses AI1 to AI4 are also read and acquired from the injectors IJ1 to IJ4.

In the next S320, the largest one of the common area data numbers M1 to M4 of the injectors IJ1 to IJ4 is stored as Mmax.
In step S330, the virtual memory address pointer e and the stored data number counter d are initialized to zero. As shown in FIG. 9, the virtual memory address pointer e is a pointer indicating a virtual memory address that is an address of the virtual memory area 31, and what number when the top address E of the virtual memory area 31 is 0th is shown. This is a virtual memory address. The stored data number counter d is a counter that counts the number of data that can be stored in the virtual memory area 31 to be created.

  Next, in S340, a counter m for counting the number of processes is initialized to 1, and thereafter, the process consisting of S350 to S450 shown in the one-dot chain line frame is performed, and then in S460, the counter m is incremented. In next S470, it is determined whether or not the counter m is equal to or less than Mmax. If the counter m is equal to or less than Mmax, the process returns to S350 next to S340, but if the counter m is not equal to or less than Mmax (Mmax The virtual memory mapping is terminated. For this reason, the process which consists of S350-S450 shown in a dashed-dotted line frame is repeated as many times as Mmax.

  Further, in the process within the one-dot chain line frame, in the first S350, the counter u provided to count the number of processes and to indicate the injector to be processed is set to 1, and then S360 shown in the dotted line frame After performing the process consisting of S430, the counter u is incremented in S440. In next S450, it is determined whether or not the counter u is equal to or smaller than N (= 4) which is the number of injectors IJ1 to IJ4. If the counter u is equal to or smaller than N, the process returns to S360 next to S350. However, if the counter u is not less than or equal to N (if N is exceeded), the process proceeds to S460.

  Therefore, as shown in FIG. 2, the counter u is incremented by 1 between 1 and N (= 4) and wraps round, and each time the counter u becomes 1 to N, a dotted frame The process which consists of S360-S430 shown inside is performed. Further, every time the counter u makes a round from 1 to N, the counter m is incremented by 1. When the counter m exceeds Mmax, the virtual memory mapping process ends.

  In the process within the dotted frame repeated in this manner, in the first S360, it is determined whether or not the remainder obtained by dividing the virtual memory address pointer e by the redundant data number R (R = 3 in this embodiment) is zero. judge. The virtual memory address pointer e is incremented in S430, which will be described later, in the processing within the dotted line frame. Therefore, the virtual memory address pointer e is incremented every time processing within the dotted frame is performed (every time the counter u changes), with 0 as an initial value (see FIG. 2).

  If it is determined in S360 that the “remainder of e / R” is not 0, the process proceeds to S380, but if it is determined that the “remainder of e / R” is 0, the process proceeds to S370. After incrementing the stored data number counter d, the process proceeds to S380. Therefore, as shown in FIG. 2, the stored data number counter d is incremented every time the virtual memory address pointer e becomes a multiple (including 0) of the redundant data number R (= 3).

In S380, it is determined whether a mapping end condition is satisfied.
The mapping end condition is a condition that does not require the processing of S400 or S410, which will be described later, for mapping (associating or assigning) a physical address to the virtual memory address indicated by the virtual memory address pointer e. Is the condition that the number of virtual memory addresses for which mapping has been completed reaches “N × Mmax” or less and reaches the maximum value among multiples of R. In S380, as a specific determination formula, it is determined whether or not “d × R> N × Mmax”.

  If it is determined in S380 that the mapping end condition is satisfied (YES determination), the process within the dotted line frame is directly exited and the process proceeds to S440. In this case, an affirmative determination is made in subsequent S380, and as a substantial process, only the count up of the counter u (S440) and the count up of the counter m (S460) are performed, and the counter m exceeds Mmax. At this point, the virtual memory mapping process ends.

On the other hand, if it is determined in S380 that the mapping end condition is not satisfied, the process proceeds to S390.
In S390, it is determined whether or not the status information Su of the injector IJu (u is the current value of the counter u and any one of 1 to 4) corresponding to the current value of the counter u is “1”. .

  If the status information Su is “1” (S390: YES), the process proceeds to S400, and the injector IJu performs an all mapping process of FIG. 6 to be described later, and then proceeds to S430 to set the virtual memory address pointer e. Increment. Thereafter, the process in the dotted line frame is exited and the process proceeds to S440. If the status information S1 to S4 is set to “1”, all the status information S1 to S4 are set to “1” in S140 of FIG. It is performed in all cases where the counter u is 1 to 4 (in other words, it is performed for all the injectors IJ1 to IJ4).

  In S390, when it is determined that the state information Su is not “1”, the process proceeds to S410, and it is determined whether or not the state information Su is “2”. If the status information Su is not “2” (S410: NO), the process proceeds to S430 as it is. If the status information Su is “2” (S410: YES), the process proceeds to S430, and the injector IJu is After performing the differential mapping process of FIG. 7 described later, the process proceeds to S430. If the status information S1 to S4 is set to “2”, only one of the status information S1 to S4 is set to “2” in S150 of FIG. This is performed for the injector IJu that corresponds to the status information Su set to “2” and that has been replaced.

Next, the all mapping process performed in S400 of FIG. 5 will be described.
As shown in FIG. 6, in the all mapping process, first, in S510, the memory mapping of the processing target injector IJu corresponding to the current value of the counter u (that is, each address of the common area 30 of the injector IJu is set to the virtual memory address). It is determined whether or not (assignment to any) is incomplete. Specifically, the common area data number Mu of the injector IJu is compared with the current value of the counter m to determine whether or not “m ≦ Mu”.

  If “m ≦ Mu”, it is determined that the memory mapping of the injector IJu has not been completed, and the process proceeds to S520, where the physical corresponding to (allocated) the virtual memory address “E + e” indicated by the virtual memory address pointer e. Information including the unit ID of the injector IJu and an address obtained by adding “m−1” to the common area head address AIu of the injector IJu is stored as the address. Then, the all mapping process ends.

  If it is determined in S510 that “m ≦ Mu” is not satisfied (m> Mu), the memory mapping of the injector IJu is complete (that is, the injector IJu not assigned to the virtual memory address). Since there is no longer an address in the common area 30, the process proceeds to S530. In S530, as the physical address corresponding to (assigned to) the virtual memory address “E + e” indicated by the virtual memory address pointer e, the unit ID of the ECU 11 (0 in the present embodiment) and the free address of the ECU memory 33 (virtual memory) Information consisting of the smallest address among the addresses not assigned to the address) is stored. Then, the all mapping process ends.

  That is, in the present embodiment, the physical address assigned to each virtual memory address is an address (hereinafter referred to as a physical memory address) in a physical memory (actually existing memory, the EEPROM 23 of the injectors IJ1 to IJ4 or the EEPROM 17 of the ECU 11). And the unit ID indicating the unit (injectors IJ1 to IJ4 or ECU 11) in which the physical memory is mounted (see FIG. 9).

  Note that the mapping information, which is the correspondence information between the virtual memory address and the physical address stored in the processing of S520 and S530, is stored in a specific area in the EEPROM 17. This also applies to mapping information that is reset by a differential mapping process described later.

  Then, when the above-described all mapping process is performed in S400 of FIG. 5, after the four injectors IJ1 to IJ4 are connected to the ECU 11, the ECU 11 is started for the first time (generally, the ECU 11 is assembled to the vehicle). At the time of startup immediately after), the virtual memory area 31 is created as shown on the right side of FIG.

  For example, FIG. 9 is a diagram illustrating mapping information between virtual memory addresses and physical addresses using specific address values for the virtual memory area 31 created in the example of FIG. In the example of FIG. 9, the start address E of the virtual memory area 31 is “0x0000”, and the common area start addresses AI1 to AI4 of the injectors IJ1 to IJ4 are all the same and “0x1000”. “0x” indicates that the subsequent alphanumeric characters are displayed in hexadecimal.

  As shown in FIG. 9, in the first cycle in which the counter m is 1 among the cycles in which the counter u is between 1 and 4, all mapping is performed when the counter u is 1 to 4. By performing the process of S520 in the process (FIG. 6), the common area head address of each of the injectors IJ1 to IJ4 is assigned to each of the four addresses “0x0000” to “0x0003” from the head of the virtual memory area 31 to the fourth. (AI1 to AI4 = “0x1000”) are mapped.

  Specifically, for the virtual memory address “0x0000”, the unit ID (= 1) of the injector IJ1 and the common area head address “0x1000” of the injector IJ1 are mapped as physical addresses, and the virtual memory address “ For “0x0001”, the unit ID (= 2) of the injector IJ2 and the common area head address “0x1000” of the injector IJ2 are mapped as physical addresses, and for the virtual memory address “0x0002”, the injector IJ3 Unit ID (= 3) and the common area head address “0x1000” of the injector IJ3 are mapped as physical addresses, and for the virtual memory address “0x0003”, the unit ID (= 4) of the injector IJ4 and Inji Common area start address of Kuta IJ4 as "0x1000", but is mapped as the physical address.

  In the second cycle in which the counter m is 2, the S520 process in the all mapping process (FIG. 6) is performed in each case where the counter u is 1 to 4, thereby starting from the fifth in the virtual memory area 31. The second address (AI1 + 1 to AI4 + 1 = “0x1001”) of the common area 30 of each injector IJ1 to IJ4 is mapped to each of the four addresses “0x0004” to “0x0007” up to the eighth.

  Specifically, for the virtual memory address “0x0004”, the unit ID (= 1) of the injector IJ1 and the second address “0x1001” of the common area 30 of the injector IJ1 are mapped as physical addresses. For the virtual memory address “0x0005”, the unit ID (= 2) of the injector IJ2 and the second address “0x1001” of the common area 30 of the injector IJ2 are mapped as physical addresses, and the virtual memory address “0x0006” ", The unit ID (= 3) of the injector IJ3 and the second address" 0x1001 "of the common area 30 of the injector IJ3 are mapped as physical addresses, and for the virtual memory address" 0x0007 " Injector IJ4 Knit ID (= 4), and the address of the second common area 30 of the injector IJ4 "0x1001", but is mapped as the physical address.

In this example, since the common area data number M4 of the injector IJ4 is 2, the memory mapping of the injector IJ4 is completed in the second cycle.
Therefore, in the third cycle in which the counter m is 3, in the case where the counter u is 1 to 3, the process of S520 in the all mapping process (FIG. 6) is performed, and the ninth of the virtual memory area 31 is performed. The third address (AI1 + 2 to AI3 + 2 = “0x1002”) of the common area 30 of each injector IJ1 to IJ3 is mapped to each of the three addresses “0x0008” to “0x000A” from the first to the eleventh, but the counter u 4 is determined as “NO” in S510 in the all mapping process (FIG. 6), and the process of S530 is performed. For this reason, the 12th address “0x000B” of the virtual memory area 31 is mapped to the head address of the ECU memory 33 (“0x1F00” in this example). Specifically, for the virtual memory address “0x000B”, the unit ID (= 0) of the ECU 11 and the head address “0x1F00” of the ECU memory 33 are mapped as physical addresses.

In this example, since the common area data number M1 of the injector IJ1 is 3, the memory mapping of the injector IJ1 is completed in the third cycle.
Therefore, in the fourth cycle, where the counter m is 4, when the counter u is 2 or 3, the process of S520 in the all mapping process (FIG. 6) is performed, and the 14th of the virtual memory area 31 And the 15th address “0x000D” and “0x000E” are mapped to the fourth address (AI2 + 3, AI3 + 3 = “0x1003”) of the common area 30 of the injectors IJ2 and IJ3. In each case 4, it is determined as “NO” in S510 in the all mapping process (FIG. 6), and the process of S530 is performed. For this reason, the 13th and 16th addresses “0x000C” and “0x000F” of the virtual memory area 31 respectively include the second and third addresses of the ECU memory 33 (in this example, “0x1F01” and “0x1F02”). ) Will be mapped. Specifically, for the virtual memory address “0x000C”, the unit ID (= 0) of the ECU 11 and the second address “0x1F01” of the ECU memory 33 are mapped as physical addresses, and the virtual memory address For “0x000F”, the unit ID (= 0) of the ECU 11 and the third address “0x1F02” of the ECU memory 33 are mapped as physical addresses.

  Although not shown in FIG. 9, the number of virtual memory addresses that have been mapped to physical addresses is equal to or less than “N × Mmax” and is the maximum value among multiples of R (in the example of FIG. 2). 27), “YES” is determined in S380 of FIG. 5, and the creation of the virtual memory area 31 is completed.

On the other hand, the microcomputer 16 of the ECU 11 executes the writing process shown in FIG. 8 at regular intervals, for example, in a state where the creation of the virtual memory area 31 is completed.
Then, as shown in FIG. 8, when the microcomputer 16 starts the writing process, first, in S710, it is common data to be saved on the injectors IJ1 to IJ4 side, and whether there is unsaved common data or not. Determine.

  If there is no unsaved common data, the writing process is terminated as it is, but if there is unsaved common data, the process proceeds to S720. For example, if the common data to be stored is freeze frame data, the process proceeds to S720 when new freeze frame data is generated by detecting a failure.

In S720, the corresponding data (unsaved common data) is written to R (= 3) consecutive addresses in the virtual memory area 31, and then the writing process is terminated.
Note that in S720, among the unwritten addresses in the virtual memory area 31, the address closest to the head is preferentially selected and the data is written.

  Therefore, as shown on the right side of FIG. 2, the same data is written in each group of three addresses from the top in the virtual memory area 31. Therefore, in the example of FIG. 2, a maximum of nine (9 types) data are written in the virtual memory area 31.

  Further, data writing to an address (virtual memory address) in the virtual memory area 31 means that data writing is performed to a physical address assigned to the virtual memory address.

  Therefore, if the unit ID is “IDw” and the physical memory address is “ADw” among the physical addresses assigned to the virtual memory address to be written, the IDw is any one of 1 to 4. If present, the above-mentioned write request frame including “IDw” as the unit ID and “ADw” as the write destination address is sent to the communication line 12, so that the EEPROM 23 in the injector having “IDw” as the unit ID (common) Data is written to “ADw” in the address of the area 30). If IDw is 0, data is written to “ADw” in the address of the EEPROM 17 (particularly, the ECU memory 33) of the ECU 11 without using communication.

  On the other hand, although not performed in the writing process of FIG. 8, data reading from the address (virtual memory address) of the virtual memory area 31 is performed by reading data from the physical address assigned to the virtual memory address. is there.

  Therefore, out of the physical addresses assigned to the virtual memory address to be read, if the unit ID is “IDr” and the physical memory address is “ADr”, IDr is any one of 1 to 4. If there is, the above-mentioned read request frame including “IDr” as the unit ID and “ADr” as the read destination address is sent to the communication line 12, so that the EEPROM 23 in the injector having “IDr” as the unit ID (common) Data is read from “ADr” in the address of the area 30). If IDr is 0, data is read out from “ADr” in the address of the EEPROM 17 (particularly, the ECU memory 33) of the ECU 11 without using communication.

Next, returning to the description of FIG. 5, the difference mapping process performed in S420 of FIG. 5 will be described.
As shown in FIG. 7, in the differential mapping process, first, in S610, the common area data number Mu of the processing target injector (in this case, the replaced injector) IJu corresponding to the current value of the counter u is determined as the injector IJu. A memory capacity difference Mdu indicating how much has changed since the replacement is calculated. Specifically, from the common area data number Mu of the injector IJn acquired in S310 of the current virtual memory mapping process, the number of common area data of the injector IJu acquired in S310 of the previously executed virtual memory mapping process (ie, exchange The value obtained by subtracting Mou (the number of common area data of the previous injector IJu) is calculated as the memory capacity difference Mdu.

  Next, in S620, it is determined whether or not the common area head address AIu of the injector IJu has changed. Specifically, the common area start address AIu of the injector IJn acquired in S310 of the current virtual memory mapping process is the common area start address of the injector IJu acquired in S310 of the previously executed virtual memory mapping process (that is, the exchange It is determined whether or not there is a change from the common area head address (AIou) of the previous injector IJu. If it is determined that the common area start address AIu of the injector IJu has not changed, the process proceeds to S630.

  In S630, it is determined whether the common area data number Mu of the injector IJu has increased or decreased. Specifically, it is determined whether the memory capacity difference Mdu calculated in S610 is not zero. If “Mdu = 0”, it is determined that the common area data number Mu has not increased or decreased, and the process directly proceeds to S700. In this case, since both the common area start address AIu and the common area data number Mu of the injector IJu have not changed, the process proceeds to S700 without changing the mapping information with the physical address of the virtual memory area 31. Will be.

On the other hand, if it is determined in S630 that the common area data number Mu has increased or decreased (Mdu ≠ 0), the process proceeds to S640.
In S640, it is determined whether or not “Mdu <0”. If “Mdu <0”, it is determined that the number of common area data Mu has increased, and the process proceeds to S650.

  In S650, the current value of the counter m is read to determine whether or not “Mou <m ≦ Mu”. If “Mou <m ≦ Mu”, the process proceeds to S700 as it is, but if “Mou <m ≦ Mu”, the process proceeds to S660, and the same processing as S520 in FIG. 6 is performed. That is, the physical address corresponding to the virtual memory address “E + e” indicated by the virtual memory address pointer e is composed of the unit ID of the injector IJu and the address obtained by adding “m−1” to the common area start address AIu of the injector IJu. Store information. Then, the process proceeds to S700.

  That is, the common area start address AIu of the injector IJu does not change, and when the common area data number (the number of addresses of the common area 30) Mu increases, the address of the common area 30 of the injector IJu should be assigned until then. However, the address of the common area 30 of the injector IJu increased this time is assigned to the virtual memory address to which the address of the ECU memory 33 has been assigned.

  For example, in the example of FIG. 9, if the injector IJ4 is replaced, the common area start address AI4 of the injector IJ4 does not change, and the common area data number M4 increases from 2 to 4, “m = 3, u = 4 ”and“ m = 4, u = 4 ”, the process of S660 is performed. As a result, the common area 30 of the injector IJ4 is assigned to each of the virtual memory addresses “0x000B” and “0x000F” to which the first address “0x1F00” and the third address “0x1F02” of the ECU memory 33 have been assigned. The third address (AI4 + 2 = “0x1002”) and the fourth address (AI4 + 3 = “0x1003”) are assigned.

If it is determined in S640 that “Mdu <0”, it is determined that the number of common area data Mu has decreased, and the process proceeds to S670.
In S670, the current value of the counter m is read to determine whether “Mu <m ≦ Mou”. If “Mu <m ≦ Mou”, the process proceeds to S700 as it is, but if “Mu <m ≦ Mou”, the process proceeds to S680, and the same processing as S530 in FIG. 6 is performed. That is, as the physical address information corresponding to the virtual memory address “E + e” indicated by the virtual memory address pointer e, information including the unit ID of the ECU 11 and the minimum address among the free addresses of the ECU memory 33 is stored. . Then, the process proceeds to S700.

  That is, the common area start address AIu of the injector IJu does not change, and when the number of common area data (the number of addresses of the common area 30) Mu decreases, the address of the common area 30 of the injector IJu that has been lost due to the decrease An empty address of the ECU memory 33 is assigned to the assigned virtual memory address.

  For example, in the example of FIG. 9, if the injector IJ1 is replaced, the common area start address AI4 of the injector IJ1 does not change, and the common area data number M1 decreases from 3 to 2, “m = 3, u = In the case of “1”, the process of S680 is performed. As a result, the address “0x1F0A” of the ECU memory 33 is assigned to the virtual memory address “0x0008” to which the third address of the common area 30 of the injector IJ1 has been assigned. In this example, since ten addresses “0x1F00” to “0x1F09” of the ECU memory 33 are already used (see FIG. 2), the smallest “0x1F0A” among the free addresses is the virtual memory. Assigned to address “0x0008”.

On the other hand, if it is determined in S620 that the common area head address AIu of the injector IJu has changed, the process proceeds to S690.
In S690, as in S510 of FIG. 6, it is determined whether or not “m ≦ Mu”. If “m ≦ Mu”, it is determined that the memory mapping of the injector IJu is incomplete. , The process proceeds to S693, and the same process as S520 in FIG. 6 is performed. Then, the process proceeds to S700.

  If it is determined in S690 that “m ≦ Mu” is not satisfied (m> Mu), the process proceeds to S695. At this time, each of the addresses in the common area 30 of the injector IJu after replacement, and each of the Mu addresses is the “u + 4 × i” -th (from the top) of the virtual memory addresses by the processing of S693 (however, i = 0, 1,..., Mu−1) are assigned to the respective virtual memory addresses.

  In S695, it is determined whether or not “Mdu <0”. If “Mdu <0”, the common area data number Mu is the same or increased. It is determined that there is no need to change the mapping information with the physical address, and the process directly proceeds to S700.

If it is determined in S695 that “Mdu <0”, it is determined that the number of common area data Mu has decreased, and the process proceeds to S670 described above.
For this reason, if “Mu <m ≦ Mou” is not satisfied (S670: NO), the process proceeds to S700 as it is, and if “Mu <m ≦ Mou” is satisfied (S670: YES), the process proceeds to S680. After performing the same process as S530 of No. 6, the process proceeds to S700.

  In other words, when the common area start address AIu of the injector IJu changes, regardless of whether the common area data number Mu increases or decreases, each of the Mu virtual memories to which the addresses of the common area 30 of the injector IJn should be assigned as physical addresses. For the address (the above-mentioned “u + 4 × i” -th (i = 0, 1,..., Mu−1) virtual memory addresses), the corresponding physical address is reset by performing the process of S693.

  When the resetting is completed (S690: NO), the increase / decrease in the common area data number Mu is determined. If the common area data number Mu is the same or increased (S695: NO), the process directly proceeds to S700. Going forward, the mapping information with the physical address of the virtual memory area 31 is not changed. For this reason, the mapping information with the physical address is not changed at all for the virtual memory address to which the address of the ECU memory 33 has been assigned before the replacement of the injector IJu.

  If the common area data number Mu is reduced (S695: YES), the process of S680 is performed on the virtual memory address to which the address of the common area 30 of the injector IJu that has been lost due to the reduction is assigned. An empty address in the ECU memory 33 is assigned. Even if the common area data number Mu decreases, if NO is determined in S670, the process proceeds to S700, and the mapping information with the physical address of the virtual memory area 31 is not changed any more. Therefore, also in this case, the mapping information with the physical address is not changed at all for the virtual memory address to which the address of the ECU memory 33 has been assigned before the replacement of the injector IJu.

  When any of the injectors IJu is exchanged, the mapping information with the physical address of the virtual memory area 31 is changed within the minimum necessary range by the processing of S610 to S695.

On the other hand, in the difference mapping process, in the last S700 to be shifted from all the processing paths, the data restoration process is performed, and then the difference mapping process is ended.
Here, the data restoration process in S700 is a process for inheriting and storing the common data stored in the injector before the replacement in the injector IJu after the replacement. 3 processing].

[First processing]
Other “R−1” data (this embodiment) in which the same data as the virtual memory address “E + e0” indicated by the current virtual memory address pointer e (here, the current value of the e is described as “e0”) is stored. In the embodiment, since R = 3, 2) virtual memory addresses are specified.

[Second processing]
From the data stored in the “R−1” virtual memory addresses identified by the first process (specifically, the data stored in the physical address assigned to the virtual memory address), the virtual memory address “ The data to be written to “E + e0” is restored.

[Third process]
The data restored by the second process is written to the virtual memory address “E + e0”.
More specifically, first, in the first process, e0 is assigned to any group among groups 0 to 3 (0 to 2, 3 to 5, 6 to 8, 9 to 11,...). It is determined whether it is included, and among the three values of the determined group, two values e1 and e2 other than e0 are specified, and the above two values e1 and e2 are assigned to the top address E of the virtual memory area 31. The added addresses “E + e1” and “E + e2” are calculated as the other two virtual memory addresses in which the same data as the virtual memory address “E + e0” is stored.

  It should be noted that whether the group e0 is in the group from 0 to 3 is determined by the expression “{(d−1) × 3} to {d × 3-1}” in the current stored data number counter d. Can be determined by substituting the value of (see FIG. 2).

  In the second process, first, data is read from each of the two virtual memory addresses “E + e1” and “E + e2” calculated in the first process. Note that reading data from a virtual memory address means reading data from a physical address assigned to the virtual memory address as described above. Further, in the second process, it is determined whether or not the two data D1 and D2 read from each of the virtual memory addresses “E + e1” and “E + e2” match, and both the data D1 and D2 match. For example, the data is data to be written to the virtual memory address “E + e0” (that is, restored data). Further, when the two data D1 and D2 do not match, it is not possible to specify which is true, and therefore, the data to be written to the virtual memory address “E + e0” is set to a predetermined initial value (fixed value), for example.

  In the third process, the write target data obtained in the second process is written to the virtual memory address “E + e0”. That is, a process of writing the write target data to the physical address assigned to the virtual memory address “E + e0” is performed.

  In this embodiment, the redundant data number R is set to a value larger than 2 and smaller than the number N of injectors, but N is 5 or more and the redundant data number R is set to 4 or more. In this case, for example, in the second process, the majority process is performed on “R−1” data stored in “R−1” virtual memory addresses, and the number of matching data is determined. The most data can be set as data to be written to the virtual memory address “E + e0”.

  On the other hand, in the present embodiment, the ECU 11 corresponds to an electronic control device as a master unit, the injectors IJ1 to IJ4 correspond to slave units, and the common area 30 of the EEPROM 23 provided in the injectors IJ1 to IJ4 This corresponds to a specific storage area of a rewritable nonvolatile memory, and the common data corresponds to data to be saved. Further, the common area head address and the number of common area data correspond to area information indicating the head and capacity of the specific storage area.

  The microcomputer 16 of the ECU 11 corresponds to each of the virtual memory creating means and the writing means, and the memory management process of FIG. 4 (particularly the virtual memory mapping process of FIG. 5) is a process as the virtual memory creating means. The writing process of FIG. 8 corresponds to a process as writing means. Further, the EEPROM 17 (particularly the ECU memory 33) of the ECU 11 corresponds to the master side memory. Further, the microcomputer 16 of the ECU 11 corresponds to a replacement detection unit, and the replacement determination process in FIG. 3 corresponds to a process as a replacement detection unit.

  Further, the microcomputer 16 of the ECU 11 also corresponds to a restoration unit, and the first process and the second process in the process of S700 in FIG. 7 correspond to the process as the restoration unit. That is, among the times when the differential mapping process of FIG. 7 is performed, each time the counter m is less than or equal to Mou (the number of common area data of the injector IJu before replacement), the first process of S700 performs the injector IJu before replacement. Among the addresses in the common area 30, for the address assigned to the virtual memory address “E + e” indicated by the current virtual memory address pointer e, the virtual data in which the same data as the data stored in the address is stored is stored. A memory address (unit storage area in the virtual memory area) is specified. At that time, if “Mu ≧ Mou” is obtained in the second process, the data stored in the virtual memory address specified in the first process is used to determine the address in the common area 30 of the injector IJu after the replacement. Thus, the data to be written to the address assigned to the virtual memory address “E + e” is restored.

  According to the ECU 11 in the control system 1 of the present embodiment as described above, compared with a configuration in which the same data is written in the common area 30 of each of the injectors IJ1 to IJ4, memory use efficiency is achieved while realizing redundant storage of data. Can be improved. That is, if the capacity of the common area 30 is the same, the number of data that can be stored can be increased.

  For example, it is assumed that the number of addresses in the common area 30 of the injectors IJ1 to IJ4 is 30. In this case, in the configuration in which the same data is written in the common area 30 of each of the injectors IJ1 to IJ4, only 30 (types) of data can be stored on the injectors IJ1 to IJ4 side.

  On the other hand, in this embodiment, since the redundant data number R is 3, 40 data can be stored on the injectors IJ1 to IJ4 side. Since each data is stored in R different injectors, redundant storage of data is also realized. That is, even if any injector is replaced, the data stored in the injector is also stored in any other injector (in this embodiment, stored in the ECU 11 side). In some cases, the data to be saved is not lost.

  Further, the microcomputer 16 of the ECU 11 acquires the common area head address and the number of common area data from each of the injectors IJ1 to IJ4, specifies the common area 30 of each injector IJ1 to IJ4 from the acquired information, and virtual memory area 31 Therefore, the virtual memory area 31 can be created even if the head address or capacity of the common area 30 of the injectors IJ1 to IJ4 changes.

  Further, the microcomputer 16 of the ECU 11 sets the address of the common area 30 of the injectors IJ1 to IJ4 in the order of the injectors (IJ1 → IJ2 → IJ3 → IJ4) due to the difference in capacity between the common areas 30 of the injectors IJ1 to IJ4. For the virtual memory addresses that cannot be assigned in this order, the addresses in the ECU memory 33 are assigned (S530). For this reason, even if the capacity of the common area 30 of a certain injector is smaller than the capacity of the common area 30 of another injector, it is possible to realize redundant storage of data.

In addition, by the data restoration process performed in S700 of FIG. 7, the common data stored in the injector before replacement can be inherited and stored in the injector after replacement.
Further, in the present embodiment, the slave unit viewed from the ECU 11 is the injectors IJ1 to IJ4 provided for each cylinder of the automobile engine, which is advantageous in the above points (1) to (3).

  As mentioned above, although one Embodiment of this invention was described, this invention is not limited to such Embodiment at all, Of course, in the range which does not deviate from the summary of this invention, it can implement in a various aspect. .

  For example, the communication between the ECU 11 and each of the injectors IJ1 to IJ4 may be one-to-one communication using separate communication lines. In that case, it is not necessary to use the unit ID for communication with the injectors IJ1 to IJ4.

  Further, the nonvolatile memory capable of rewriting data may be other than the EEPROM, for example, a flash memory. Further, the unit storage area capable of storing one of the save target data is not limited to one address area, but may be an area having two or more addresses.

The number N of slave units (injectors IJ1 to IJ4) is not limited to 4, but may be 3 or more, and the redundant data number R may be “2 or more and less than N”.
When R = 2, in S700 of FIG. 7, one virtual memory address is specified by the first process described above. Therefore, in the subsequent second process and third process, the first process is performed. Data stored at the specified virtual memory address is handled as data to be written to the virtual memory address “E + e” indicated by the current virtual memory address pointer e.

  On the other hand, the slave unit may be other than the injector, for example, an electronic control device other than the ECU 11.

DESCRIPTION OF SYMBOLS 1 ... Control system, 11 ... ECU (electronic control unit), IJ1-IJ4 ... Injector 12 ... Communication line, 13 ... CPU, 14 ... ROM, 15 ... RAM, 16 ... Microcomputer 17, 23 ... EEPROM, 18, 27 ... Communication Circuit, 19 ... Drive circuit 21 ... Actuator, 29 ... Eigen area, 30 ... Common area, 31 ... Virtual memory area 33 ... ECU memory, 25 ... Communication processor

Claims (6)

A master unit, and N (N is an integer of 3 or more) slave units connected to the master unit via a communication line so as to be communicable,
Each of the N slave units is an injector that is provided for each cylinder of an automobile engine and injects fuel into the corresponding cylinder.
In each control unit in which each slave unit is provided with a nonvolatile memory capable of rewriting data, and data to be saved is written into the specific storage area of the memory by the master unit,
An electronic control device used as the master unit,
As a means for creating a continuous virtual memory area from the specific storage area in each slave unit, the specific storage area in each slave unit is a unit storage area of a certain capacity capable of storing one of the save target data By dividing each unit storage area and assigning each unit storage area as each unit storage area from the top of the virtual memory area in the order in which every N pieces owned by the same slave unit will appear. A virtual memory creating means for creating the virtual memory area,
And a writing means for writing the same data to be stored in each of the R unit memory areas that are consecutive in the created virtual memory area (where 2 ≦ R <N) .
Moreover, for each of the slave units, exchange detection means for determining whether or not the slave unit has been exchanged,
When it is determined that one of the slave units has been replaced by the replacement detection unit, the post-replacement capacity that is the capacity of the specific storage area in the post-replacement slave unit that is the slave unit that has been determined to be replaced, A capacity for determining whether or not a change has occurred with respect to the capacity before replacement, which is the capacity of the specific storage area in the slave unit before replacement, which is the slave unit connected to the electronic control unit before the slave unit after replacement. Change determination means,
The virtual memory creating means
Correcting the virtual memory area when the capacity change determining means determines that the post-replacement capacity has changed with respect to the pre-replacement capacity;
An electronic control device. The electronic control device according to claim 1.
The virtual memory creating means
Acquiring area information indicating the head and capacity of the specific storage area from each slave unit, specifying the specific storage area in each slave unit from the acquired area information, and creating the virtual memory area;
An electronic control device. The electronic control device according to claim 1 or 2,
It has a master memory that is a non-volatile memory that can rewrite data.
The virtual memory creating means
For the unit storage areas of the virtual memory area that cannot be allocated according to the order, the unit storage areas of the specific storage areas in the slave units due to the capacity difference in the specific storage areas in the slave units, Allocating a unit storage area of the master side memory;
An electronic control device. The electronic control device according to claim 3.
Discriminating means for discriminating whether the post-replacement capacity has increased or decreased with respect to the pre-exchange capacity when it is determined by the capacity change determination means that the post-exchange capacity has changed with respect to the pre-exchange capacity With
The virtual memory creating means
When it is determined by the determination means that the post-replacement capacity has increased with respect to the pre-replacement capacity, as a process of correcting the virtual memory area,
For the unit storage area of the virtual memory area that had previously been allocated the unit storage area of the master side memory although the unit storage area of the specific storage area in the slave unit before replacement should be allocated Among the unit storage areas of the specific storage area in the slave unit, the process of assigning an increased unit storage area,
The virtual memory creating means
When the determination means determines that the post-replacement capacity has decreased with respect to the pre-replacement capacity, as a process of correcting the virtual memory area,
Of the unit storage areas of the specific storage area in the slave unit before replacement, the master side memory with respect to the unit storage area of the virtual memory area that has been allocated a unit storage area that has been lost due to replacement of the slave unit Process to allocate unit storage areas of
An electronic control device. The electronic control device according to any one of claims 1 to 4 ,
If any of the slave units is determined to have been replaced by the previous SL exchange detecting means, the same data to be stored and storage target data stored in the unit storage area of the specific storage area in the exchange before the slave unit The unit storage area in the stored virtual memory area should be specified, and the storage target data stored in the specified unit storage area should be written to the unit storage area of the specified storage area in the slave unit after replacement Restoration means for restoring data to be saved ,
An electronic control device comprising: A master unit, and N (N is an integer of 3 or more) slave units connected to the master unit via a communication line so as to be communicable,
Each of the N slave units is an injector that is provided for each cylinder of an automobile engine and injects fuel into the corresponding cylinder.
In each control unit in which each slave unit is provided with a nonvolatile memory capable of rewriting data, and data to be saved is written into the specific storage area of the memory by the master unit,
The electronic control device according to any one of claims 1 to 5 is provided as the master unit.
Control system characterized by.

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