JP5640448B2 - Manufacturing method of semiconductor device - Google Patents

Description

  The present invention relates to a method for manufacturing a semiconductor device.

  Conventionally, when forming a contact plug, a Ti film and a TiN film are formed as a glue film in a contact hole, and then a W film is formed. In addition, annealing may be performed in a reducing gas atmosphere before the W film is formed. This is to remove the natural oxide film present on the surface of the TiN film.

  However, the conventional method has a problem that even if a semiconductor device is manufactured on a plurality of substrates under the same conditions, the characteristics are likely to vary.

Japanese Patent No. 3240678 Japanese Patent Laid-Open No. 10-70091 JP 2008-103370 A Japanese Patent No. 2820915

S. L. Lantz et al, J. Vac. Sci. Technol. A 12, (1994), 1032

  An object of the present invention is to provide a semiconductor device manufacturing method capable of suppressing variation in characteristics.

In one embodiment of a method for manufacturing a semiconductor device, an insulating film is formed above a substrate , a Ni silicide film is formed on the insulating film, and an opening exposing a conductive region located under the insulating film is formed. Then, a glue film containing Ti is formed on the conductive region and on the side surface of the opening. Further, the natural oxide film present on the surface of the glue film is removed, the surface of the glue film is exposed , and heat treatment is performed at a temperature of 100 ° C. or higher and 450 ° C. or lower in an atmosphere containing at least oxygen or water. the turned into acid the surface of the glue film, the oxidation is carried out the glue film, a conductive film containing W. The oxidation is started with the surface of the glue film exposed.
In another aspect of the method for manufacturing a semiconductor device, an insulating film is formed above a substrate, a Co silicide film is formed on the insulating film, and an opening exposing a conductive region located under the insulating film A glue film containing Ti is formed on the conductive region and on the side surface of the opening. Further, the natural oxide film present on the surface of the glue film is removed, the surface of the glue film is exposed, and heat treatment is performed at a temperature of 100 ° C. to 640 ° C. in an atmosphere containing at least oxygen or water. A surface of the glue film is oxidized, and a conductive film containing W is formed on the oxidized glue film. The oxidation is started with the surface of the glue film exposed.

  According to the above semiconductor device manufacturing method, etc., after removing the natural oxide film existing on the surface of the glue film, oxidation is performed under a certain condition, and this oxidation is started with the surface of the glue film exposed. Therefore, the amount of oxygen present on the surface of the glue film can be adjusted appropriately. For this reason, variation in specific resistance of the conductive film containing W can be suppressed, and variation in characteristics of the semiconductor device can be suppressed.

It is a figure which shows the content of experiment. It is a figure which shows the SEM photograph of W film | membrane. It is sectional drawing which shows the manufacturing direction of the semiconductor device which concerns on embodiment to process order. FIG. 3B is a cross-sectional view illustrating the manufacturing direction of the semiconductor device in order of processes following FIG. 3A. FIG. 3B is a cross-sectional view showing the manufacturing direction of the semiconductor device in the order of steps, following FIG. 3B. FIG. 3D is a cross-sectional view illustrating the manufacturing direction of the semiconductor device in order of processes following FIG. 3C. It is a figure which shows the structure of a processing apparatus.

  As a result of intensive investigations on the causes of variations in characteristics of semiconductor devices, the inventors of the present application have found variations in specific resistance even when W films of contact plugs are formed on a plurality of substrates under the same conditions. It was easy to find that this variation affected the characteristics of the semiconductor device.

  In addition, the inventors of the present application have also intensively studied the cause of variations in the specific resistance of the W film. As a result, in the conventional method, although annealing is performed in a reducing gas atmosphere, when the natural oxide film is formed thick, the natural oxide film remains after the annealing, and the specific resistance varies. Turned out to be. It has also been found that the specific resistance increases when the W film is formed without any oxide film on the surface of the TiN film.

  Here, experiments and the like conducted by the inventors will be described. As shown in FIG. 1A, the inventors of the present application form a Ti film 102 on a substrate 101, form a TiN film 103 thereon, and form a W film 104 having a thickness of 100 nm thereon. did. Two types of combinations of the substrate temperature when forming the Ti film 102 (the temperature of the substrate 101) and the substrate temperature when forming the TiN film 103 were used. On the other hand, the substrate temperature when forming the Ti film 102 was 450 ° C., and the substrate temperature when forming the TiN film 103 was 480 ° C. On the other hand, the substrate temperature when the Ti film 102 was formed was 640 ° C., and the substrate temperature when the TiN film 103 was formed was 650 ° C. Hereinafter, the former may be referred to as low temperature film formation and the latter may be referred to as high temperature film formation. Various combinations of the thickness of the Ti film 102 and the thickness of the TiN film 103 were used. These conditions are shown in Table 1 below.

  Then, the specific resistance of the W film 104 in each sample was measured. Further, the ratios of Ti and O contained in the Ti film 102 and the TiN film 103 were also measured. In the measurement of the ratio of Ti and O, the ratio of Ti atoms (Ti2p) and the ratio of O atoms (O1s) were determined by X-ray photoelectron spectroscopy (XPS). Furthermore, from the values of Ti2p and O1s, the ratio of O atoms to the total amount of Ti atoms and O atoms was determined as “O / Ti ratio”. That is, the O / Ti ratio is represented by “O1s / (Ti2p + O1s)”. These results are shown in Table 2 below. Further, the relationship between the O / Ti ratio and the specific resistance is shown in FIG.

  As shown in Table 2 and FIG. 1B, a result that the specific resistance of the W film 104 was lower as the O / Ti ratio was higher was obtained. From this, it can be said that there is a correlation between the O / Ti ratio and the specific resistance.

  Further, the inventors of the present application photographed the W film 104 with respect to each sample from an oblique bird's-eye view using a scanning electron microscope (SEM). The result is shown in FIG. 2 (a) to 2 (f) show sample No. 1-No. It is a figure which shows the SEM photograph of the W film | membrane 104 of FIG.

  As shown in FIG. 1-No. 3, the sample No. on which the high-temperature film formation was performed was performed. 4-No. Compared to between 6, the size of the crystal grains changed greatly. Further, as shown in Table 2, sample No. 1-No. 3, sample no. 4-No. Compared with the interval between 6, the magnitude of the specific resistance also changed greatly. From this, it can be said that there is a correlation between the size of the crystal grains and the size of the specific resistance.

  From these, it can be said that there is a correlation among the O / Ti ratio, the size of the crystal grains, and the specific resistance. That is, it can be said that the higher the O / Ti ratio, the larger the crystal grains and the lower the specific resistance. Therefore, if the O / Ti ratio of the Ti film 102 and the TiN film 103 can be stabilized, the specific resistance of the W film 104 is also stabilized. Further, as shown in FIG. 1B, the specific resistance of the W film 104 increases as the O / Ti ratio decreases, so it is preferable that the Ti film 102 and the TiN film 103 contain O.

  Based on such experiments, the inventors of the present application have come up with the following embodiment.

  3A to 3D are cross-sectional views showing the manufacturing direction of the semiconductor device according to the embodiment in the order of steps.

  In this embodiment, first, as shown in FIG. 3A (a), an element isolation insulating film 2 that defines an element region is formed on the surface of a substrate 1 such as a silicon substrate. Next, the transistor 3 is formed in the element region. As the transistor 3, for example, a field effect transistor including a gate insulating film 3a, a gate electrode 3b, a sidewall 3c, a source diffusion layer 3s, and a drain diffusion layer 3d is formed. A silicide layer such as a Ni silicide layer or a Co silicide layer may be formed on the surfaces of the source diffusion layer 3s and the drain diffusion layer 3d.

  Thereafter, as shown in FIG. 3A (b), an interlayer insulating film 4 covering the transistor 3 is formed. For example, a silicon oxide film is formed as the interlayer insulating film 4. Subsequently, a contact hole 6 reaching the drain diffusion layer 3 d is formed in the interlayer insulating film 4. At this time, a contact hole reaching the source diffusion layer 3s and / or a contact hole reaching the gate electrode 3b may be formed in parallel.

Next, as shown in FIG. 3A (c), a Ti film 11 is formed in the contact hole 6 and on the interlayer insulating film 4 by, for example, chemical vapor deposition (CVD). When the Ti film 11 is formed, for example, the temperature of the substrate 1 is set to 640 ° C., the pressure in the chamber is set to 666.6 Pa, and the RF power is set to 800 W. Further, for example, TiCl ₄ gas is supplied into the chamber at a flow rate of 12 sccm, and the thickness of the Ti film 11 is set to 10 nm. After the Ti film 11 is formed, for example, the supply of TiCl ₄ gas is stopped while maintaining the temperature of the substrate 1, the pressure in the chamber, and the RF power, and NH ₃ gas is supplied into the chamber at a flow rate of 196 sccm. . As a result, the surface of the Ti film 11 is slightly nitrided.

Thereafter, in the same chamber as that for forming the Ti film 11, as shown in FIG. 3B (d), a TiN film 12 is formed on the Ti film 11 by, for example, a CVD method. When forming the TiN film 12, for example, the temperature of the substrate 1 is set to 650 ° C., and the pressure in the chamber is set to 666.6 Pa. Further, for example, TiCl ₄ gas is supplied into the chamber at a flow rate of 60 sccm, NH ₃ gas is supplied at a flow rate of 60 sccm, and the thickness of the TiN film 12 is set to 10 nm. After the TiN film 12 is formed, for example, while maintaining the pressure in the chamber, the temperature of the substrate 1 is lowered to 640 ° C., the supply of TiCl ₄ gas is stopped, and NH ₃ gas is supplied into the chamber at a flow rate of 2000 sccm. To do. As a result, the surface of the TiN film 12 is further nitrided. In this way, the glue film 17 including the Ti film 11 and the TiN film 12 is formed.

  Subsequently, as shown in FIG. 3B (e), the natural oxide film present on the surface of the glue film 17 is removed by annealing in a reducing atmosphere. This reduction annealing is performed using, for example, a processing apparatus shown in FIG. This processing apparatus is provided with a load lock chamber 51, a reduction chamber 52, an oxidation chamber 53, and a film formation chamber 54 where the substrate 1 is transferred and carried out. In addition, the load lock chamber 51, the reduction chamber 52, the oxidation chamber 53, and the film formation chamber 54 are connected to each other via a transfer chamber 55.

In this reduction annealing, the substrate 1 on which the glue film 17 or the like is formed is loaded into the load lock chamber 51 and transferred to the reduction chamber 52 via the transfer chamber 55. Then, the surface of the glue film 17 is reduced excessively by annealing in the reduction chamber 52, the natural oxide film existing on the surface of the glue film 17 is removed, and the entire surface of the glue film 17 is exposed. At this time, for example, the temperature (annealing temperature) of the substrate 1 is 350 ° C., the annealing time is 30 seconds, and the pressure in the reduction chamber 52 is 10666 Pa. As the reducing gas, for example, H ₂ gas or SiH ₄ gas is used.

  When the Ni silicide layer is formed on the surface of the source diffusion layer 3s and the drain diffusion layer 3d, the annealing temperature is preferably 200 ° C. to 450 ° C., and when the Co silicide layer is formed. The annealing temperature is preferably 200 ° C. to 640 ° C. This is because if the annealing temperature is less than 200 ° C., it may be difficult to perform sufficient reduction, and if the annealing temperature exceeds the above 450 ° C. or 640 ° C., the silicide layer may be altered. Because there is. The annealing time is preferably 15 seconds to 120 seconds. This is because if the annealing time is less than 15 seconds, it may be difficult to perform sufficient reduction, and if it exceeds 120 seconds, the throughput decreases. The pressure in the reduction chamber 52 is preferably 10 Pa to 15000 Pa. This is because if the pressure is less than 10 Pa, it may be difficult to perform sufficient reduction, and if it exceeds 15000 Pa, it may be necessary to adopt a special structure for high pressure in the reduction chamber 52. Because there is.

After removing the natural oxide film present on the surface of the glue film 17, the substrate 1 is transferred to the oxidation chamber 53 via the transfer chamber 55. At this time, the inside of the reduction chamber 52, the transfer chamber 55, and the oxidation chamber 53 is set to a non-oxidizing atmosphere. Then, as shown in FIG. 3B (f), an oxide film 15 is formed on the surface of the glue film 17 by annealing under certain conditions in an oxidizing atmosphere. When the oxide film 15 is formed, for example, the temperature of the substrate 1 (annealing temperature) is set to 300 ° C., the annealing time is set to 15 seconds, and the pressure in the oxidation chamber 53 is set to 5 Pa. In the oxidation chamber 53, for example, O ₂ gas is supplied at a flow rate of 10 sccm, and N ₂ gas is supplied at a flow rate of 400 sccm.

  When the Ni silicide layer is formed on the surface of the source diffusion layer 3s and the drain diffusion layer 3d, the annealing temperature is preferably set to 100 ° C. to 450 ° C., and the Co silicide layer is formed. The annealing temperature is preferably 100 ° C. to 640 ° C. This is because if the annealing temperature is less than 100 ° C., it may be difficult to oxidize sufficiently, and if the annealing temperature exceeds the above 450 ° C. or 640 ° C., the silicide layer may be altered. Because there is. The annealing time may be determined according to the specific resistance required for the W film to be formed later. The longer the annealing time, the higher the O / Ti ratio and the lower the specific resistance of the W film. The thickness of the oxide film 15 is preferably 5 nm or less. This is because if the thickness of the oxide film 15 exceeds 5 nm, the resistance between the W film and the glue film 17 may become too high even if the specific resistance of the W film can be lowered.

After the oxide film 15 is formed, the substrate 1 is transferred to the film forming chamber 54 via the transfer chamber 55. At this time, the inside of the transfer chamber 55 and the film forming chamber 54 is set to a non-oxidizing atmosphere. Then, as shown in FIG. 3C (g), a W film 13 is formed on the oxide film 15 by, for example, an SFD (sequential flow deposition) method. When the W film 13 is formed, for example, the temperature of the substrate 1 is 350 ° C., and the pressure in the film forming chamber 54 is 1000 Pa. Further, for example, the WF ₆ gas is supplied into the film forming chamber 54 at a flow rate of 160 sccm and purged, and the SiH ₄ gas is supplied into the film forming chamber 54 at a flow rate of 400 sccm and purged. The thickness of the W film 13 is, for example, 0.1 nm to 5 nm.

Next, in the film forming chamber 54, as shown in FIG. 3C (h), the W film 14 is formed on the W film 13 by, for example, the CVD method. When the W film 14 is formed, for example, the temperature of the substrate 1 is set to 400 ° C., and the pressure in the chamber is set to 10666 Pa. Further, for example, WF ₆ gas is supplied into the chamber at a flow rate of 200 sccm, and H ₂ gas is supplied at a flow rate of 2200 sccm. The thickness of the W film 14 is, for example, 100 nm to 500 nm.

  Thereafter, as shown in FIG. 3C (i), the W film 14, the W film 13, the oxide film 15, the TiN film 12, and the Ti film 11 are exposed by chemical mechanical polishing (CMP) until the interlayer insulating film 4 is exposed. Is processed. As a result, a contact plug 16 is formed in the contact hole 6.

  Subsequently, as shown in FIG. 3D (j), an interlayer insulating film 21 that covers the contact plug 16 is formed on the interlayer insulating film 4, and a cap film 22 is formed on the interlayer insulating film 21. As the interlayer insulating film 21, for example, a low dielectric constant film is formed, and as the cap film 22, for example, an SiC film is formed.

  Next, as shown in FIG. 3D (k), the interconnect 25 including the barrier metal film 23 and the Cu film 24 and connected to the contact plug 16 is formed in the interlayer insulating film 21 and the cap film 22 by, for example, the damascene method. To do.

  Thereafter, an upper layer wiring, a passivation film, a pad, and the like are formed to complete the semiconductor device.

  According to such an embodiment, after removing the natural oxide film existing on the surface of the glue film 17, the surface of the glue film 17 is oxidized under a certain condition. The Ti ratio can be adjusted strictly. Therefore, the variation in specific resistance of the W film 14 can be significantly reduced by controlling the size of the crystal grains of the W film 14.

The method for oxidizing the surface of the glue film 17 is not particularly limited, and for example, thermal oxidation using H ₂ O gas may be performed. In addition, the conductive region located under the insulating film does not need to be a diffusion layer formed on the surface of the semiconductor substrate, and may be a wiring or the like.

  Hereinafter, various aspects of the present invention will be collectively described as supplementary notes.

(Appendix 1)
Forming an insulating film above the substrate;
Forming an opening in the insulating film to expose a conductive region located under the insulating film;
Forming a glue film containing Ti on the conductive region and the side surface of the opening;
Removing a natural oxide film present on the surface of the glue film to expose the surface of the glue film;
Oxidizing the surface of the glue film under certain conditions;
Forming a conductive film containing W on the oxidized glue film;
Have
The method of manufacturing a semiconductor device, wherein the oxidation is started in a state where a surface of the glue film is exposed.

(Appendix 2)
The method for manufacturing a semiconductor device according to appendix 1, wherein the oxidation is performed by heat treatment in an atmosphere containing at least oxygen or water.

(Appendix 3)
The method for manufacturing a semiconductor device according to appendix 2, wherein the temperature of the heat treatment is 100 ° C. or higher.

(Appendix 4)
Ni silicide film is formed on the surface of the conductive region,
4. The method of manufacturing a semiconductor device according to appendix 2 or 3, wherein the temperature of the heat treatment is 450 ° C. or lower.

(Appendix 5)
A Co silicide film is formed on the surface of the conductive region,
4. The method of manufacturing a semiconductor device according to appendix 2 or 3, wherein the temperature of the heat treatment is 640 ° C. or lower.

(Appendix 6)
The step of forming the glue film includes
Forming a Ti film on the conductive region and on the side surface of the opening;
Forming a TiN film on the Ti film;
The method for manufacturing a semiconductor device according to any one of appendices 1 to 5, wherein:

(Appendix 7)
7. The method for manufacturing a semiconductor device according to any one of appendices 1 to 6, wherein a W film is formed as the conductive film.

(Appendix 8)
8. The method of manufacturing a semiconductor device according to any one of appendices 1 to 7, wherein when the natural oxide film is removed, reduction annealing is performed for 15 seconds or more in a chamber having a pressure of 10 Pa or more.

1: Substrate 3: Transistor 3s: Source diffusion layer 3d: Drain diffusion layer 4: Interlayer insulating film 6: Contact hole 11: Ti film 12: TiN film 13: W film 14: W film 15: Oxide film 16: Contact plug 17 : Glue film

Claims (2)

Forming an insulating film above the substrate;
Forming a Ni silicide film on the surface of the insulating film, and forming an opening that exposes a conductive region located under the insulating film;
Forming a glue film containing Ti on the conductive region and the side surface of the opening;
Removing a natural oxide film present on the surface of the glue film to expose the surface of the glue film;
Atmosphere containing at least oxygen or water, by heat treatment at 100 ° C. or higher 450 ° C. or less of the temperature, a step of oxidation of the surface of the glue film,
Forming a conductive film containing W on the oxidized glue film;
Have
The method of manufacturing a semiconductor device, wherein the oxidation is started in a state where a surface of the glue film is exposed. Forming an insulating film above the substrate;
A step of forming a Co silicide film on the surface of the insulating film and forming an opening exposing a conductive region located under the insulating film;
Forming a glue film containing Ti on the conductive region and the side surface of the opening;
Removing a natural oxide film present on the surface of the glue film to expose the surface of the glue film;
Oxidizing the surface of the glue film by heat treatment at a temperature of 100 ° C. or higher and 640 ° C. or lower in an atmosphere containing at least oxygen or water;
Forming a conductive film containing W on the oxidized glue film;
Have
The method of manufacturing a semiconductor device, wherein the oxidation is started in a state where a surface of the glue film is exposed.

Images