JP5634941B2 - Arithmetic apparatus, arithmetic method and arithmetic program - Google Patents

Description

  The present invention relates to a calculation device, a calculation method, and a calculation program.

  By operating on a computer, for example, a library that performs a matrix operation of an M-row N-column binary matrix having elements other than 0 (zero) and a number other than 0 (zero) and an N-dimensional real vector is provided. It has been proposed (see Non-Patent Document 1). For example, in this library, when the matrix is sparse, that is, when K << MN when the number of non-zero elements is K, matrix calculation is performed only for non-zero components.

“SPARSKIT: a basic tool kit for sparse matrix computations (Version 2)”. Datasheet. [Online]. Youcef Saad, University of Minnesota, Department of Computer Science and Engineering, June 6 1994, pages 3-12. Retrieved from the Internet: <URL: http://www-users.cs.umn.edu/~saad/software/SPARSKIT/index.html>

  In general, when performing a matrix operation of a binary matrix of M rows and N columns and an N-dimensional real vector, calculation time and storage capacity corresponding to the calculation amount of “O (MN)” are required. “O (O)” indicates the order of matrix operation, and “MN” indicates the number of elements. On the other hand, in the above-described library, when the matrix is sparse, that is, when the number of non-zero elements “K” is K << MN, matrix calculation is performed only for the non-zero component, so “O (K) The calculation time and the storage capacity according to the calculation amount of “are required. As described above, when performing matrix operation using the above-described library, calculation time and storage capacity corresponding to the non-zero number of elements “K” are required for matrix operation. For this reason, when a calculation is performed on a matrix with a large number of elements using the above-described library, there is a problem that the calculation amount and the storage capacity required for the calculation increase as a result of the large calculation amount.

  The present invention has been made in view of the above, and an object of the present invention is to provide an arithmetic device, an arithmetic method, and an arithmetic program capable of efficiently executing a matrix operation between a binary matrix and a real vector. To do.

  In order to solve the above-described problems and achieve the object, the present invention is an arithmetic device that performs a matrix operation of a binary matrix and an N-dimensional real vector, and has M rows and N columns (M and N are integers). A data input unit for inputting the binary matrix data, a vector input unit for inputting the N-dimensional (N is an integer) real vector, and the binary matrix data input by the data input unit, A construction unit that constructs transformation data converted into a data structure of a binary decision graph, and a computation unit that performs matrix computation of the transformation data constructed by the construction unit and the real vector input by the vector input unit And an output unit for outputting a calculation result by the calculation unit.

  Further, the present invention is an operation method in which a matrix operation between a binary matrix and an N-dimensional real vector is executed by a computer, and the binary matrix data of M rows and N columns (M and N are integers) are obtained. A data input step for inputting, a vector input step for inputting the N-dimensional (N is an integer) real vector, and the binary matrix data input by the data input step are converted into a data structure of a binary decision graph. A construction step for constructing the converted data, a computation step for performing a matrix computation of the conversion data constructed by the construction step and the real vector input by the vector input unit, and a computation result by the computation step And an output step of outputting.

  The present invention also provides an arithmetic program for causing a computer to perform a matrix operation of a binary matrix and an N-dimensional real vector, the computer having M rows and N columns (M and N are integers). Data input procedure for inputting binary matrix data, vector input procedure for inputting N-dimensional (N is an integer) real vector, and binary matrix data input by the data input procedure are determined in binary. A construction procedure for constructing transformation data converted into a data structure of a graph, a computation procedure for performing a matrix computation of the transformation data constructed by the construction procedure and the real vector input by the vector input procedure, An output procedure for outputting a calculation result according to the calculation procedure is executed.

  According to the present invention, there is an effect that a matrix operation between a binary matrix and a real vector can be efficiently executed.

FIG. 1 is a functional block diagram illustrating the configuration of the arithmetic device according to the first embodiment. FIG. 2 is a diagram illustrating an example of a binary matrix input by the data input unit. FIG. 3 is a diagram illustrating an example of ZDD. FIG. 4 is a diagram illustrating an example of a node table corresponding to the ZDD illustrated in FIG. FIG. 5 is a diagram illustrating an example of ZDD constructed by the ZDD constructing unit 120. FIG. 6 is a diagram illustrating an example of a node table corresponding to the ZDD constructed by the ZDD constructing unit 120. FIG. 7 is a diagram showing the ZDD constructed for the data in the first row of the matrix shown in FIG. FIG. 8 is a diagram showing a node table corresponding to FIG. FIG. 9 is a diagram illustrating the flow of the ZDD construction process according to the first embodiment. FIG. 10 is a diagram illustrating a flow of calculation processing of the product of the matrix and the real vector according to the first embodiment. FIG. 11 is a diagram showing the flow of matrix calculation processing. FIG. 12 is a diagram illustrating an example of an electronic device that executes an arithmetic program.

  Hereinafter, embodiments of a calculation device, a calculation method, and a calculation program according to the present application will be described in detail with reference to the drawings. The embodiment described below is merely an example, and does not limit the arithmetic device, the arithmetic method, and the arithmetic program according to the present application. In addition, the embodiments described later can be appropriately combined within a range that does not cause a contradiction in the processing contents.

[Outline and Features of Arithmetic Unit (Example 1)]
The arithmetic device according to the first embodiment is summarized as performing a matrix operation of a binary matrix and a real vector. The arithmetic device according to the first embodiment is characterized in that a binary matrix is compressed using a predetermined data structure, and an operation is performed on the compressed binary matrix.

  Specifically, the arithmetic device according to the first embodiment uses a binary matrix of M rows and N columns (M and N are positive integers) as a zero-suppressed binary decision diagram (hereinafter referred to as ZDD). To a data structure using Then, the arithmetic device according to the first embodiment executes the operation of the product of the ZDD and the real vector as a recursive algorithm on the ZDD. That is, the arithmetic device according to the first embodiment can compress and represent binary matrix data by converting the binary matrix into a data structure using ZDD. And the arithmetic unit which concerns on Example 1 does not perform the calculation according to the non-zero element number "K" which a binary matrix has, but when converting a binary matrix into the data structure using ZDD An operation corresponding to the number of nodes “W” of ZDD can be executed. For this reason, the arithmetic device according to the first embodiment can reduce the calculation time and the storage capacity necessary for calculating the product of the binary matrix and the real vector, and can efficiently execute the matrix operation.

[Configuration of Arithmetic Unit (Example 1)]
FIG. 1 is a functional block diagram illustrating the configuration of the arithmetic device according to the first embodiment. The arithmetic device 100 according to the first embodiment corresponds to, for example, a personal computer, a workstation, or an office computer that performs predetermined arithmetic processing according to a procedure described in a predetermined program. In FIG. 1, functions necessary for describing the arithmetic device 100 are illustrated, and general functions such as a central arithmetic device, a main storage device, and an auxiliary storage device are not shown.

  As illustrated in FIG. 1, the arithmetic device 100 according to the first embodiment includes a data input unit 110, a ZDD construction unit 120, a data storage unit 130, a vector input unit 140, a matrix operation execution unit 150, and a calculation result. And an output unit 160.

  The data input unit 110 inputs a binary matrix (a matrix whose elements are values of 0 or 1) of M rows and N columns (M and N are positive integers). FIG. 2 is a diagram illustrating an example of a binary matrix input by the data input unit. As shown in FIG. 2, the data input unit 110 inputs, for example, a 3 × 3 binary matrix. The data input unit 110 inputs a binary matrix via, for example, a user interface such as a keyboard or a mouse, or a hardware interface such as USB (Universal Serial Bus) or Ethernet (registered trademark).

  The ZDD constructing unit 120 constructs a ZDD (Zero-Suppressed Binary Decision Diagram) from the binary matrix of M rows and N columns input by the data input unit 110. First, ZDD will be described prior to the description of the ZDD construction procedure by the ZDD construction unit 120.

ZDD is a data structure that holds a combination set in the form of a binary graph. Here, the combination set is a set whose element is e such that e⊆A with respect to a set A = {a ₁ , a ₂ ,... For example, when there is a set B = {a, b, c}, the set {{a, b}, {b, c}, {a, c}} is a combination set of the set B. Become. FIG. 3 is a diagram illustrating an example of ZDD. FIG. 3 represents the ZDD of the combination set {{a, b}, {b}, {c}}. As shown in FIG. 3, ZDD “I ₁ ” has a graph structure having directivity. In addition, as shown in FIG. 3, the ZDD “I ₁ ” has a terminal node (a square node in FIG. 3) labeled with “0 or 1” and a label “a, b, or c”. It has two types of nodes with attached intermediate nodes (round nodes in FIG. 3). Further, as shown in FIG. 3, each intermediate node has an HI link (solid arrow) and an LO link (dotted arrow). Each link that an intermediate node has points to a different child node. Also, as shown in FIG. 3, the ZDD is provided with a pointer “f” representing the head node. Thus, ZDD represents a combination set by a graph structure having terminal nodes, intermediate nodes, HI links, LO links, and pointers.

  For example, whether or not a certain combination e is included in the combination set represented by ZDD can be determined by the procedure described below. First, a transition is made to the head node along a pointer representing the head node of ZDD. Therefore, if the item represented by the label of the first node is included in e, the transition is made to the node pointed to by the HI link. If the above procedure is finally executed until the terminal node is reached, and finally the transition is made to the terminal node having label 1, and the nodes corresponding to all items included in e have been transitioned, e is combined. Included in the set. On the other hand, if the above procedure is finally executed until the terminal node is reached, and finally the terminal node having the label 1 is not changed, and the nodes corresponding to all items included in e have not been changed, e is not included in the combination set.

  FIG. 4 is a diagram illustrating an example of a node table corresponding to the ZDD illustrated in FIG. As shown in FIG. 4, on the computer, the ZDD is represented by a node table in which each element is arranged with a node ID as an index. As shown in FIG. 4, the node table stores a node label, a HI link destination node ID, and a LO link destination node ID for each node ID as each element.

By the way, when a certain combination is expressed in ZDD, an order is determined in advance between items. Specifically, there is a restriction that when an item that is a label of a certain node is compared with an item that is a label of the child node, the order of the items of the child node is always later. For example, in the above-described ZDD “I ₁ ” (FIG. 3), the items “a”, “b”, “c” are placed in the order of “a”, “b”, “c”. The order is determined. Further, when the node ID of the node that becomes the HI link destination of the node whose node ID is i is HI (i) and the node ID of the node that becomes the LO link destination is LO (i), the above ZDD array ( 4), when i> 2, HI (i) <i and LO (i) <i are always satisfied. Hereinafter, the label of the node whose node ID is i is described as v (i), the node ID of the HI link destination node as HI (i), and the node ID of the LO link destination node as LO (i).

  Following the description of ZDD, a procedure in which the ZDD constructing unit 120 constructs a ZDD from a binary matrix of M rows and N columns will be described. The ZDD constructing unit 120 acquires a binary matrix of M rows and N columns from the data input unit 110, and creates a set composed of only one element for each row of the matrix. For each row of the matrix, a set consisting of only one element created by the ZDD constructing unit 120 is expressed by, for example, the following formula (1).

  Subsequently, the ZDD constructing unit 120 creates a set consisting of only one element for each row of the matrix, and then creates a union thereof. The union created by the ZDD constructing unit 120 is expressed by, for example, the following formula (2).

Note that a (i, j) shown in the above-described equations (1) and (2) is an array of column numbers having a value of “1” among the N elements in the i-th row of the matrix. . For example, if the binary matrix acquired from the data input unit 110 is given by a binary matrix of 3 rows and 3 columns as shown in FIG. 2, a (1,1) = 1, a (1,2) = 3 Also, b (i) shown in the above equations (1) and (2) indicates the number of elements whose value is “1” among the N elements in the i-th row of the matrix. For example, if the binary matrix acquired from the data input unit 110 is given by a binary matrix of 3 rows and 3 columns as shown in FIG. 2, b (1) = 2, b (2) = 1, b ( 3) = 1. Further, R _i shown in the above-described equations (1) and (2) indicates a symbol corresponding to the i-th row of the matrix, and C _i shown in the above-described equations (1) and (2) is a matrix. The symbol corresponding to the i-th column is shown.

  As described above, the ZDD constructing unit 120 can express the binary matrix input by the data input unit 110 by compressing it as shown in the above equation (2).

Subsequently, the ZDD constructing unit 120 calculates the ZDD of the combination set F using the union represented by the above formula (2) as the combination set F, and stores the ZDD in the data storage unit 130. If a combination set and the order of symbols appearing in the set are given, the ZDD can be calculated by performing an operation on the ZDD using an existing technique. Therefore, ZDD construction unit 120, the symbol _{R 1,} R ₂ appearing in the combined set F (equation _{(2)), ..., R} M, C 1, C 2, ..., with respect to _{C N, R} 1 _{<R 2} <... <R _M <C ₁ <C ₂ <... <C _N is given, and the ZDD of the combination set F is calculated by performing an operation using the existing technology. In addition, as an existing technique for performing an operation on ZDD, for example, there are Shin-ichi Minato, “Zero-Suppressed BDDs for Set Manipulation in Combinatorial Problems”, DAC '93, pp.272-277, and the like.

FIG. 5 is a diagram illustrating an example of ZDD constructed by the ZDD constructing unit 120. FIG. 6 is a diagram illustrating an example of a node table corresponding to the ZDD constructed by the ZDD constructing unit 120. 5 and 6 are ZDDs constructed from the combination set represented by the above-described formula (2). When the combination set F and the order of symbols appearing in the combination set F are given, the ZDD construction unit 120 constructs a ZDD “I ₂ ” as shown in FIG. 5 by performing an operation using the existing technology. it can. As shown in FIG. 5, the ZDD “I ₂ ” is an intermediate where labels “R ₁ ”, “R ₂ ”, “R ₃ ”, “C ₁ ”, “C ₂ ”, “C ₃ ” are pasted. A node (round node) and a terminal node (square node) labeled “0” or “1”. As shown in FIG. 5, ZDD “I ₂ ” has a node to which the label “R ₁ ” indicated by the pointer “f” is pasted among the intermediate nodes as the _first node. As shown in FIG. 6, ZDD “I ₂ ” is represented on a computer as a node table in which each element is arranged with a node ID as an index. The node IDs “1” to “8” in the node table have labels “0”, “1”, “C ₃ ”, “C ₂ ”, “C ₁ ”, “R ₃ ”, “R ₂ ” shown in FIG. ”And“ R ₁ ”respectively. The ZDD constructed by the ZDD constructing unit 120 is a data structure that can express a combination set in a compressed form as much as possible. Assume that the ZDD constructing unit 120 constructs a ZDD without compressing the combination set at all. In this case, the ZDD constructing unit 120 represents the combination set as ZDD having the number of rows of the binary matrix and intermediate nodes corresponding to the number of non-zero components in the matrix. On the other hand, it is assumed that the ZDD constructing unit 120 constructs a ZDD with a structure in which each row of a binary matrix represented by a combination set is used as a vector and the common part is compressed as much as possible. In this case, the ZDD constructing unit 120 can express the combination set as a ZDD in which the number of intermediate nodes is reduced as compared to the ZDD constructed without compressing the common part.

  The vector input unit 140 inputs an N-dimensional (N is a positive integer) real vector that is a calculation target of a product with the binary matrix input by the data input unit 110. Similar to the data input unit 110, the vector input unit 140 inputs an N-dimensional real vector via a user interface, a hardware interface, or the like.

  The matrix calculation execution unit 150 uses the ZDD constructed from the binary matrix by the ZDD construction unit 120 and the N-dimensional real vector input by the vector input unit 140 (hereinafter referred to as an N-dimensional vector as appropriate). , Perform matrix operations.

Specifically, the matrix calculation execution unit 150 executes a calculation of the product of the ZDD constructed from the binary matrix and the real vector as a recursive algorithm on the ZDD, as will be described below. First, the matrix calculation execution unit 150 acquires an N-dimensional vector from the vector input unit 140, and represents the acquired N-dimensional vector as q and the i-th element as q _i . Subsequently, the matrix calculation execution unit 150 acquires ZDD from the data storage unit 130 and calculates a product with the N-dimensional vector. The calculation result of the N-dimensional vector “q” and ZDD is an M-dimensional vector p. The matrix calculation execution unit 150 first prepares a one-dimensional array score of the number of elements (WM) for storing scores, and initializes all elements with zero. Here, the number of elements (W-M) is the number of ZDD intermediate nodes having labels corresponding to columns. Next, the matrix operation execution unit 150 initializes the index (i) to i = 3. Subsequently, the matrix operation execution unit 150 determines whether v (i) matches any of C _{1 to} C _N. v (i) is the label of the node whose node ID is i. When v (i) matches one of C _{1 to} C _N , the matrix operation execution unit 150 sets the value of the one-dimensional array score [i] to the child node of the node whose node ID is i. The one-dimensional array score [HI (i)] and the parameter q _j corresponding to j where v (i) = C _j are updated. HI (i) is the node ID of the node that is the HI link destination of the node whose node ID is i. Since HI (i) <i holds for the node table, the score [i] value can be calculated using the updated score [HI (i)] value.

On the other hand, v (i) _is, when does not match any of the _C. 1 to _{C N} is a matrix operation executing unit 150 substitutes the value of the score [HI (i)] to _{p k.} Note that k is a row number when v (i) = _Rk . That, v (i) _is, if not match any of _{C 1~ C N, v (i} ) _is to match any of the _R. 1 to _{R M.}

  Subsequently, the matrix calculation execution unit 150 determines whether or not the calculation of the one-dimensional array score has been completed for all the nodes of ZDD (i ≦ W). If the calculation of the one-dimensional array score has not been completed for all the nodes, the matrix operation execution unit 150 increments the index (i) by 1, and calculates the one-dimensional array score in the same procedure as described above. I do. On the other hand, if the calculation of the one-dimensional array score has been completed for all the nodes, the matrix calculation execution unit 150 sends the matrix calculation result p to the calculation result output unit 160 described later, and ends the processing.

  As described above, the matrix calculation performed by the matrix calculation execution unit 150 uses the fact that it can be calculated as shown in the following equation (3), and stores the value during calculation in each node to obtain the final calculation result. p is obtained.

Hereinafter, the matrix calculation performed by the matrix calculation execution unit 150 will be supplementarily described with reference to FIGS. 7 and 8. FIG. 7 is a diagram showing the ZDD constructed for the data in the first row of the matrix shown in FIG. FIG. 8 is a diagram showing a node table corresponding to FIG. The matrix calculation execution unit 150 sets score [3] = q ₃ for the node having the node ID 3 among the nodes constituting the ZDD “I ₃ ” illustrated in FIG. 7. Subsequently, the matrix calculation execution unit 150 sets score [4] = q ₁ + q ₃ for the node having the node ID 4 among the nodes constituting the ZDD “I ₃ ” illustrated in FIG. Calculate p ₁ = q ₁ + q ₃ .

  As described above, the matrix operation execution unit 150 can finish the operation of the product of the ZDD and the real vector in a time proportional to the number of nodes (W) of the ZDD. That is, the matrix calculation execution unit 150 can perform processing with a calculation time and a storage capacity corresponding to the calculation amount “O (W)”, and the calculation amount “O (MN)” or the calculation amount “O (K)”. Rather than the required calculation time and storage capacity. The reason why the amount of calculation of the product of ZDD and the real vector can be reduced to “O (W)” by the method described above is as follows. The score value calculated corresponding to each intermediate node in the recursive calculation holds the calculation result up to the middle of the multiplication of the row vector and the real vector q. At this time, in the case of multiplication for one row vector and multiplication for another row vector, if the calculation up to the middle is the same, the result is held in the same node, so the number of calculations can be reduced. it can. As a result, the amount of calculation of the product of ZDD and real vector can be reduced to “O (W)”.

  The calculation result output unit 160 outputs the result of the calculation performed by the matrix calculation execution unit 150 to the outside. For example, the calculation result output unit 160 outputs the calculation result to peripheral devices such as a display, a monitor, and a printer.

  Note that the various processing functions of the arithmetic device 100 described above can be implemented by, for example, an electronic circuit or an integrated circuit. Examples of the electronic circuit include a CPU (Central Processing Unit) and an MPU (Micro Processing Unit). Examples of integrated circuits include ASIC (Application Specific Integrated Circuit) and FPGA (Field Programmable Gate Array). The data storage unit 130 can be mounted using a semiconductor memory element such as a RAM (Random Access Memory) or a flash memory.

[Processing by Arithmetic Unit (Example 1)]
The flow of processing performed by the arithmetic device according to the first embodiment will be described with reference to FIGS. FIG. 9 is a diagram illustrating the flow of the ZDD construction process according to the first embodiment. FIG. 10 is a diagram illustrating a flow of calculation processing of the product of the matrix and the real vector according to the first embodiment. FIG. 11 is a diagram showing the flow of matrix calculation processing. The processing performed by the arithmetic device 100 according to the first embodiment is divided into two parts: a ZDD construction process shown in FIG. 9 and a matrix and real vector calculation process shown in FIGS. 10 and 11.

(ZDD construction process)
As shown in FIG. 9, the data input unit 110 inputs a binary matrix of M rows and N columns (S101). Subsequently, the ZDD constructing unit 120 calculates a combination set F by using each row of the matrix input in S101 as an input (S102). Then, the ZDD constructing unit 120 constructs a ZDD corresponding to the combination set F calculated in S102 (S103).

Specifically, the ZDD constructing unit 120 acquires a binary matrix of M rows and N columns from the data input unit 110, and creates a set consisting of only one element for each row of the matrix (see Expression (1)). . Subsequently, the ZDD constructing unit 120 creates a set composed of only one element for each row of the matrix, creates a union of those sets, and creates a combination set F (see Expression (2)). Then, ZDD construction unit 120, the symbol _{R 1,} R ₂ appearing in the combined set F (equation _{(2)), ..., R} M, C 1, C 2, ..., with respect to _{C N, R} 1 _{<R 2} <... _<given order of _{R M <C 1 <C 2} <··· <C N, by performing a calculation utilizing the existing technology, building a ZDD corresponding to the combination set F.

(Calculation processing of product of matrix and real vector)
As shown in FIG. 10, the vector input unit 140 inputs an N-dimensional real vector (S201). Subsequently, the matrix calculation execution unit 150 executes matrix calculation using the ZDD constructed from the binary matrix by the ZDD construction unit 120 and the N-dimensional real vector input by the vector input unit 140 (S202). ).

(Matrix operation processing)
The matrix calculation execution unit 150 acquires the N-dimensional vector q from the vector input unit 140, acquires the ZDD from the data storage unit 130, and stores the score (W) before executing the processing shown in FIG. -M) 1-dimensional array score is prepared, and all elements are initialized with 0. After the above preparation is completed, the matrix calculation execution unit 150 initializes the index (i) to i = 3 (S301).

Subsequently, the matrix operation execution unit 150 determines whether v (i) matches any of C _{1 to} C _N (v (i) = C _j (1 ≦ j ≦ N)?). (S302). As a result of the determination, when v (i) matches any of C _{1 to} C _N (S302, Yes), the matrix operation execution unit 150 sets the value of score [i] to score (HI (i )) is updated to + _{q j} (S303).

  Subsequently, the matrix calculation execution unit 150 determines whether i ≦ W is satisfied (S304). If i ≦ W as a result of the determination (S304, Yes), the matrix calculation execution unit 150 assumes that the calculation of the score has been completed for all the nodes of the ZDD, and outputs the calculation result p to the calculation result output unit. 150 (S305), and the matrix calculation process is terminated. On the other hand, if i ≦ W is not satisfied as a result of the determination (S304, No), the matrix calculation execution unit 150 assumes that score calculation has not been completed for all the nodes of the ZDD, and increments the value of i by 1. (I ← i + 1) (step S306), the process returns to S302 described above.

In step S302 described above, the result of the determination, v (i) _is, in a case that does not match any of the _{C 1~ C N (S302, No} ), the matrix operation executing unit 150, _{p k} ← score (HI ( i)) (S307), the process proceeds to S305 described above.

[Effects of Example 1]
As described above, the arithmetic device 100 according to the first embodiment converts a binary matrix of M rows and N columns (M and N are positive integers) into a data structure using ZDD (FIGS. 5 and 6, etc.). ). Then, the arithmetic device according to the first embodiment executes the operation of the product of the ZDD and the real vector as a recursive algorithm on the ZDD (FIG. 11 and the like). That is, the arithmetic device according to the first embodiment can compress and represent binary matrix data by converting the binary matrix into a data structure using ZDD. And the arithmetic unit which concerns on Example 1 does not perform the calculation according to the non-zero element number "K" which a binary matrix has, but when converting a binary matrix into the data structure using ZDD An operation corresponding to the number of nodes “W” of ZDD can be executed. For this reason, the arithmetic device according to the first embodiment can reduce the calculation time required for calculating the product of the binary matrix and the real vector, and can efficiently execute the matrix operation.

  In addition, since the data of a sparse binary matrix is compressed, the storage capacity required for computation can be reduced.

  In the above-described first embodiment, the ZDD construction process illustrated in FIG. 9 and the calculation process of the product of the matrix and the real vector illustrated in FIGS. 10 and 11 are divided into two. However, the ZDD illustrated in FIG. The construction process and the calculation process of the product of the matrix and the real vector shown in FIGS. 10 and 11 may be executed serially.

  The arithmetic device according to the first embodiment described above can be widely applied to various numerical calculations, physical simulations, various information management, and the like. In particular, in a situation where a specific binary matrix is repeatedly used, once the binary matrix is constructed by ZDD, the effect of reducing the amount of calculation is expected.

  Hereinafter, Example 2 will be described as another embodiment of the arithmetic device, the arithmetic method, and the arithmetic program according to the present invention.

(1) Device Configuration, etc. Each component of the arithmetic device 100 shown in FIG. 1 is functionally conceptual and does not necessarily need to be physically configured as illustrated. That is, the specific form of distribution or integration of the arithmetic device 100 is not limited to that shown in FIG. 1, and the ZDD constructing unit 120, the data storage unit 130, and the matrix arithmetic executing unit 150 of the arithmetic device 100 are functionally integrated. Also good. As described above, all or some of the components of the arithmetic device 100 can be configured to be functionally or physically distributed / integrated in arbitrary units according to various loads or usage conditions.

(2) Arithmetic Program The various types of processing of the arithmetic unit 100 described in the first embodiment (for example, see FIGS. 9 to 11 and the like) execute a program prepared in advance on an electronic device such as a personal computer or a workstation. Can be realized. Therefore, in the following, an example of an electronic device that executes an arithmetic program having the same function as the arithmetic device 100 described in the first embodiment will be described with reference to FIG. FIG. 12 is a diagram illustrating an example of an electronic device that executes an arithmetic program.

  As shown in FIG. 12, the electronic device 200 having the same function as that of the arithmetic device 100 includes a CPU (Central Processing Unit) 210, an input unit 220, an output unit 230, a memory 240, and a hard disk device 250. The CPU 210, the input unit 220, the output unit 230, the memory 240, and the hard disk device 250 are connected via the bus 260.

  The CPU 210 executes various arithmetic processes. Note that the electronic device 200 may use, for example, an electronic circuit such as an MPU (Micro Processing Unit) or an integrated circuit such as an ASIC (Application Specific Integrated Circuit) or an FPGA (Field Programmable Gate Array) instead of the CPU 210.

  The input unit 220 inputs various information such as a binary matrix. Further, the output unit 230 outputs the result of the matrix operation. The memory 240 temporarily stores various information such as ZDD obtained by converting a binary matrix. The memory 240 can be mounted using a semiconductor memory element such as a RAM (Random Access Memory) or a flash memory. The hard disk device 250 stores information necessary for the CPU 210 to execute various processes.

  The hard disk device 250 stores a calculation program 251 and calculation data 252 that exhibit functions similar to the functions of the calculation device 100. Note that the arithmetic program 251 may be appropriately distributed and stored in a storage unit of another computer that is communicably connected via a network.

  Then, the CPU 210 reads out the arithmetic program 251 from the hard disk device 250 and expands it in the memory 240, whereby the arithmetic program 251 functions as an arithmetic process 241 as shown in FIG. The calculation process 241 expands various data such as the calculation data 252 read from the hard disk device 250 in an area allocated to itself on the memory 240 as appropriate, and executes various processes based on the expanded data.

  Note that the arithmetic process 241 includes, for example, the processing executed by the ZDD constructing unit 120 and the matrix arithmetic execution unit 150 of the arithmetic device 100 described above, for example, the processing described with reference to FIGS.

  Note that the above-described arithmetic program 251 is not necessarily stored in the hard disk device 250 from the beginning. For example, the electronic device 200 may read and execute the arithmetic program 251 stored in advance on a “portable physical medium” such as a flexible disk, a CD-ROM, a DVD, a magneto-optical disk, and an IC card.

  Furthermore, the electronic device 200 may read and execute the arithmetic program 251 stored in “another computer (or server)” that can be connected via a public line, the Internet, a LAN, a WAN, or the like. .

(3) Calculation Method The following calculation method is realized by the calculation device 100 described in the first embodiment.

  That is, an arithmetic method in which a computer as the arithmetic device 100 executes a matrix operation between a binary matrix and an N-dimensional real vector, and the computer is an M-row N-column (M, N is an integer) binary matrix. A data input process for inputting data (FIG. 9, S101), a vector input process for inputting N-dimensional (N is an integer) real vector (FIG. 10, S201), and a binary matrix input by the data input process A construction step of constructing transformation data obtained by converting data into a data structure of a binary decision graph (FIG. 9, S103), a matrix operation of the transformation data constructed by the construction step and a real vector input by the vector input unit And a calculation method characterized in that the calculation method is executed (FIG. 10, S202, FIG. 11) and an output step for outputting a calculation result of the calculation step. .

DESCRIPTION OF SYMBOLS 100 Arithmetic apparatus 110 Data input part 120 ZDD construction part 130 Data storage part 140 Vector input part 150 Matrix operation execution part 160 Calculation result output part 200 Electronic device 210 CPU
220 Input unit 230 Output unit 240 Memory 250 Hard disk device 260 Bus

Claims (3)

An arithmetic device that performs a matrix operation between a binary matrix and an N-dimensional real vector,
A data input unit for inputting data of the binary matrix of M rows and N columns (M and N are integers);
A vector input unit for inputting the N-dimensional real vector;
A construction part for constructing conversion data obtained by converting the data of the binary matrix input by the data input part into a data structure of a binary decision graph;
An arithmetic unit that performs a matrix operation on the conversion data constructed by the construction unit and the real vector input by the vector input unit;
And an output unit that outputs a calculation result of the calculation unit. An arithmetic method executed by a computer that performs a matrix operation between a binary matrix and an N-dimensional real vector,
Data input unit, M rows and N columns (M, N are integers) and a data input step of inputting data of said binary matrix,
A vector input unit that inputs the N-dimensional real vector; and
Construction unit, the construction process of the data of the data inputted by the input step the binary matrix, to construct a conversion data converted into the data structure of BDD,
An operation step of performing a matrix operation between the conversion data constructed in the construction step and the real vector input in the vector input step ;
An output method includes: an output step of outputting a calculation result of the calculation step. An arithmetic program for causing a computer to perform a matrix operation between a binary matrix and an N-dimensional real vector,
The computer,
Data input means for inputting data of the binary matrix of M rows and N columns (M and N are integers);
Vector input means for inputting the N-dimensional real vector;
Construction means for constructing conversion data obtained by converting the data of the binary matrix input by the data input means into a data structure of a binary decision graph;
Arithmetic means for performing a matrix operation between the conversion data constructed by the construction means and the real vector input by the vector input means ;
And output means for outputting a calculation result by the calculating means
Arithmetic program to function as

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