JP5615384B2 - ハードウエアトランザクショナルメモリにおける自動サスペンド及び再開 - Google Patents

ハードウエアトランザクショナルメモリにおける自動サスペンド及び再開 Download PDF

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JP5615384B2
JP5615384B2 JP2012555083A JP2012555083A JP5615384B2 JP 5615384 B2 JP5615384 B2 JP 5615384B2 JP 2012555083 A JP2012555083 A JP 2012555083A JP 2012555083 A JP2012555083 A JP 2012555083A JP 5615384 B2 JP5615384 B2 JP 5615384B2
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processor
speculative
data
condition
transaction
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JP2013520753A (ja
JP2013520753A5 (enExample
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チュン ジェウン
チュン ジェウン
エス． クリスティ デイビッド
エス． クリスティ デイビッド
ピー．ホーミュス ミヒャエル
ピー．ホーミュス ミヒャエル
ディーステルホースト シュテファン
ディーステルホースト シュテファン
ポーラック マーティン
ポーラック マーティン
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Advanced Micro Devices Inc
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Advanced Micro Devices Inc
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/466—Transaction processing
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/3004—Arrangements for executing specific machine instructions to perform operations on memory
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30076—Arrangements for executing specific machine instructions to perform miscellaneous control operations, e.g. NOP
    • G06F9/30087—Synchronisation or serialisation instructions
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30181—Instruction operation extension or modification
    • G06F9/30189—Instruction operation extension or modification according to execution mode, e.g. mode flag
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3824—Operand accessing
    • G06F9/3834—Maintaining memory consistency
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/461—Saving or restoring of program or task context
    • G06F9/463—Program control block organisation

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  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Executing Machine-Instructions (AREA)
  • Advance Control (AREA)
  • Financial Or Insurance-Related Operations Such As Payment And Settlement (AREA)
  • Multi Processors (AREA)
JP2012555083A 2010-02-24 2011-02-22 ハードウエアトランザクショナルメモリにおける自動サスペンド及び再開 Active JP5615384B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US12/711,851 US8739164B2 (en) 2010-02-24 2010-02-24 Automatic suspend atomic hardware transactional memory in response to detecting an implicit suspend condition and resume thereof
US12/711,851 2010-02-24
PCT/US2011/025778 WO2011106333A2 (en) 2010-02-24 2011-02-22 Automatic suspend and resume in hardware transactional memory

Publications (3)

Publication Number Publication Date
JP2013520753A JP2013520753A (ja) 2013-06-06
JP2013520753A5 JP2013520753A5 (enExample) 2014-04-10
JP5615384B2 true JP5615384B2 (ja) 2014-10-29

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JP2012555083A Active JP5615384B2 (ja) 2010-02-24 2011-02-22 ハードウエアトランザクショナルメモリにおける自動サスペンド及び再開

Country Status (6)

Country Link
US (1) US8739164B2 (enExample)
EP (1) EP2539816A2 (enExample)
JP (1) JP5615384B2 (enExample)
KR (1) KR101678133B1 (enExample)
CN (1) CN102906703B (enExample)
WO (1) WO2011106333A2 (enExample)

Families Citing this family (63)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9626187B2 (en) 2010-05-27 2017-04-18 International Business Machines Corporation Transactional memory system supporting unbroken suspended execution
US9880848B2 (en) * 2010-06-11 2018-01-30 Advanced Micro Devices, Inc. Processor support for hardware transactional memory
US8782434B1 (en) 2010-07-15 2014-07-15 The Research Foundation For The State University Of New York System and method for validating program execution at run-time
US8424015B2 (en) * 2010-09-30 2013-04-16 International Business Machines Corporation Transactional memory preemption mechanism
US8788794B2 (en) * 2010-12-07 2014-07-22 Advanced Micro Devices, Inc. Programmable atomic memory using stored atomic procedures
US9122476B2 (en) 2010-12-07 2015-09-01 Advanced Micro Devices, Inc. Programmable atomic memory using hardware validation agent
US9116759B2 (en) 2011-02-18 2015-08-25 Ab Initio Technology Llc Restarting data processing systems
US9021299B2 (en) * 2011-02-18 2015-04-28 Ab Initio Technology Llc Restarting processes
CN103765430A (zh) * 2011-08-26 2014-04-30 惠普发展公司，有限责任合伙企业 数据泄漏防止系统和方法
US20130339680A1 (en) * 2012-06-15 2013-12-19 International Business Machines Corporation Nontransactional store instruction
US9436477B2 (en) 2012-06-15 2016-09-06 International Business Machines Corporation Transaction abort instruction
US8688661B2 (en) * 2012-06-15 2014-04-01 International Business Machines Corporation Transactional processing
US9448796B2 (en) 2012-06-15 2016-09-20 International Business Machines Corporation Restricted instructions in transactional execution
US9298469B2 (en) 2012-06-15 2016-03-29 International Business Machines Corporation Management of multiple nested transactions
US9317460B2 (en) 2012-06-15 2016-04-19 International Business Machines Corporation Program event recording within a transactional environment
US9348642B2 (en) 2012-06-15 2016-05-24 International Business Machines Corporation Transaction begin/end instructions
US9262320B2 (en) 2012-06-15 2016-02-16 International Business Machines Corporation Tracking transactional execution footprint
US9311101B2 (en) 2012-06-15 2016-04-12 International Business Machines Corporation Intra-instructional transaction abort handling
US10437602B2 (en) 2012-06-15 2019-10-08 International Business Machines Corporation Program interruption filtering in transactional execution
US9442737B2 (en) 2012-06-15 2016-09-13 International Business Machines Corporation Restricting processing within a processor to facilitate transaction completion
US9361115B2 (en) 2012-06-15 2016-06-07 International Business Machines Corporation Saving/restoring selected registers in transactional processing
US8880959B2 (en) 2012-06-15 2014-11-04 International Business Machines Corporation Transaction diagnostic block
US9015419B2 (en) 2012-06-15 2015-04-21 International Business Machines Corporation Avoiding aborts due to associativity conflicts in a transactional environment
US8682877B2 (en) * 2012-06-15 2014-03-25 International Business Machines Corporation Constrained transaction execution
US9384004B2 (en) 2012-06-15 2016-07-05 International Business Machines Corporation Randomized testing within transactional execution
US9772854B2 (en) 2012-06-15 2017-09-26 International Business Machines Corporation Selectively controlling instruction execution in transactional processing
US9367323B2 (en) 2012-06-15 2016-06-14 International Business Machines Corporation Processor assist facility
US9223687B2 (en) 2012-06-15 2015-12-29 International Business Machines Corporation Determining the logical address of a transaction abort
US8966324B2 (en) 2012-06-15 2015-02-24 International Business Machines Corporation Transactional execution branch indications
US9740549B2 (en) 2012-06-15 2017-08-22 International Business Machines Corporation Facilitating transaction completion subsequent to repeated aborts of the transaction
US9298631B2 (en) * 2012-06-15 2016-03-29 International Business Machines Corporation Managing transactional and non-transactional store observability
US9336046B2 (en) 2012-06-15 2016-05-10 International Business Machines Corporation Transaction abort processing
US9182956B2 (en) * 2012-07-08 2015-11-10 International Business Machines Corporation Flattening conditional statements
US9122873B2 (en) 2012-09-14 2015-09-01 The Research Foundation For The State University Of New York Continuous run-time validation of program execution: a practical approach
US9069782B2 (en) 2012-10-01 2015-06-30 The Research Foundation For The State University Of New York System and method for security and privacy aware virtual machine checkpointing
US9081607B2 (en) 2012-10-24 2015-07-14 International Business Machines Corporation Conditional transaction abort and precise abort handling
US9459877B2 (en) 2012-12-21 2016-10-04 Advanced Micro Devices, Inc. Nested speculative regions for a synchronization facility
US20140280669A1 (en) * 2013-03-15 2014-09-18 Microsoft Corporation Memory Sharing Over A Network
US9824039B2 (en) * 2013-09-09 2017-11-21 International Business Machines Corporation Signal interrupts in a transactional memory system
US9384036B1 (en) * 2013-10-21 2016-07-05 Google Inc. Low latency thread context caching
US9311260B2 (en) * 2013-12-09 2016-04-12 Jack Mason Context preservation during thread level speculative execution
CN105723348B (zh) * 2013-12-17 2019-02-15 英特尔公司 使用事务性存储器检测未授权存储器修改及访问
US9317379B2 (en) 2014-01-24 2016-04-19 International Business Machines Corporation Using transactional execution for reliability and recovery of transient failures
US10120681B2 (en) 2014-03-14 2018-11-06 International Business Machines Corporation Compare and delay instructions
US9558032B2 (en) 2014-03-14 2017-01-31 International Business Machines Corporation Conditional instruction end operation
US9454370B2 (en) 2014-03-14 2016-09-27 International Business Machines Corporation Conditional transaction end instruction
GB2528270A (en) * 2014-07-15 2016-01-20 Advanced Risc Mach Ltd Call stack maintenance for a transactional data processing execution mode
WO2016155008A1 (en) 2015-04-03 2016-10-06 Yahoo! Inc. Method and system for scheduling transactions in a data system
US9760494B2 (en) * 2015-06-24 2017-09-12 International Business Machines Corporation Hybrid tracking of transaction read and write sets
US10776115B2 (en) 2015-09-19 2020-09-15 Microsoft Technology Licensing, Llc Debug support for block-based processor
US10261827B2 (en) 2015-10-29 2019-04-16 International Business Machines Corporation Interprocessor memory status communication
US9563467B1 (en) 2015-10-29 2017-02-07 International Business Machines Corporation Interprocessor memory status communication
US9772874B2 (en) * 2016-01-29 2017-09-26 International Business Machines Corporation Prioritization of transactions based on execution by transactional core with super core indicator
US20180004946A1 (en) * 2016-07-01 2018-01-04 Intel Corporation Regulating control transfers for execute-only code execution
US20180267807A1 (en) * 2017-03-15 2018-09-20 Microsoft Technology Licensing, Llc Precise exceptions for edge processors
KR102287758B1 (ko) * 2018-03-05 2021-08-09 삼성전자주식회사 부채널 공격으로부터 캐시를 보호하는 시스템
US10824429B2 (en) 2018-09-19 2020-11-03 Microsoft Technology Licensing, Llc Commit logic and precise exceptions in explicit dataflow graph execution architectures
US11586439B2 (en) 2020-10-20 2023-02-21 Micron Technology, Inc. Detecting infinite loops in a programmable atomic transaction
US11403023B2 (en) 2020-10-20 2022-08-02 Micron Technology, Inc. Method of organizing a programmable atomic unit instruction memory
US11740929B2 (en) 2020-10-20 2023-08-29 Micron Technology, Inc. Registering a custom atomic operation with the operating system
US11436187B2 (en) 2020-10-20 2022-09-06 Micron Technology, Inc. Method of notifying a process or programmable atomic operation traps
US12020062B2 (en) 2020-10-20 2024-06-25 Micron Technology, Inc. Method of executing programmable atomic unit resources within a multi-process system
US11693690B2 (en) 2020-10-20 2023-07-04 Micron Technology, Inc. Method of completing a programmable atomic transaction by ensuring memory locks are cleared

Family Cites Families (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4819234A (en) * 1987-05-01 1989-04-04 Prime Computer, Inc. Operating system debugger
US5428761A (en) * 1992-03-12 1995-06-27 Digital Equipment Corporation System for achieving atomic non-sequential multi-word operations in shared memory
US5659721A (en) * 1995-02-14 1997-08-19 Hal Computer Systems, Inc. Processor structure and method for checkpointing instructions to maintain precise state
US5884059A (en) * 1996-01-26 1999-03-16 Advanced Micro Devices, Inc. Unified multi-function operation scheduler for out-of-order execution in a superscalar processor
GB2362733B (en) * 2000-05-25 2002-02-27 Siroyan Ltd Processors having compressed instructions.
JP3661614B2 (ja) * 2001-07-12 2005-06-15 日本電気株式会社 キャッシュメモリ制御方法及びマルチプロセッサシステム
JP3632635B2 (ja) * 2001-07-18 2005-03-23 日本電気株式会社 マルチスレッド実行方法及び並列プロセッサシステム
US6799236B1 (en) * 2001-11-20 2004-09-28 Sun Microsystems, Inc. Methods and apparatus for executing code while avoiding interference
US6810472B2 (en) * 2002-06-24 2004-10-26 Intel Corporation Page handling efficiency in a multithreaded processor
US7657880B2 (en) * 2003-01-31 2010-02-02 Intel Corporation Safe store for speculative helper threads
US6862664B2 (en) * 2003-02-13 2005-03-01 Sun Microsystems, Inc. Method and apparatus for avoiding locks by speculatively executing critical sections
US7269717B2 (en) * 2003-02-13 2007-09-11 Sun Microsystems, Inc. Method for reducing lock manipulation overhead during access to critical code sections
US7451300B1 (en) * 2003-07-15 2008-11-11 Transmeta Corporation Explicit control of speculation
US7856537B2 (en) * 2004-09-30 2010-12-21 Intel Corporation Hybrid hardware and software implementation of transactional memory access
US7984248B2 (en) * 2004-12-29 2011-07-19 Intel Corporation Transaction based shared data operations in a multiprocessor environment
US7240183B2 (en) * 2005-05-31 2007-07-03 Kabushiki Kaisha Toshiba System and method for detecting instruction dependencies in multiple phases
US7882339B2 (en) * 2005-06-23 2011-02-01 Intel Corporation Primitives to enhance thread-level speculation
US8683143B2 (en) * 2005-12-30 2014-03-25 Intel Corporation Unbounded transactional memory systems
US7404041B2 (en) * 2006-02-10 2008-07-22 International Business Machines Corporation Low complexity speculative multithreading system based on unmodified microprocessor core
US8135405B2 (en) * 2006-08-31 2012-03-13 Qualcomm Incorporated Efficient search for wireless networks while minimizing page loss
US7516365B2 (en) * 2007-07-27 2009-04-07 Sun Microsystems, Inc. System and method for split hardware transactions
US8930644B2 (en) * 2008-05-02 2015-01-06 Xilinx, Inc. Configurable transactional memory for synchronizing transactions
US9218290B2 (en) * 2009-04-27 2015-12-22 Intel Corporation Data caching in a network communications processor architecture
US8250331B2 (en) * 2009-06-26 2012-08-21 Microsoft Corporation Operating system virtual memory management for hardware transactional memory
US8229907B2 (en) * 2009-06-30 2012-07-24 Microsoft Corporation Hardware accelerated transactional memory system with open nested transactions
US8438571B2 (en) * 2010-02-24 2013-05-07 International Business Machines Corporation Thread speculative execution and asynchronous conflict
US9626187B2 (en) * 2010-05-27 2017-04-18 International Business Machines Corporation Transactional memory system supporting unbroken suspended execution

Also Published As

Publication number Publication date
WO2011106333A3 (en) 2011-10-27
JP2013520753A (ja) 2013-06-06
CN102906703B (zh) 2016-10-19
CN102906703A (zh) 2013-01-30
US20110209151A1 (en) 2011-08-25
KR20120130004A (ko) 2012-11-28
KR101678133B1 (ko) 2016-12-06
EP2539816A2 (en) 2013-01-02
US8739164B2 (en) 2014-05-27
WO2011106333A2 (en) 2011-09-01

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