JP5593590B2 - Resonance sound generator, electronic musical instrument, and resonance sound generation program - Google Patents

Description

  The present invention relates to a resonance generator that generates a resonance to be added to a musical sound, an electronic musical instrument that includes the resonance generator, and a resonance generation program.

A resonance generator for generating resonance to be added to a musical tone generally accepts digital musical tone signal data and applies a filtering process to the musical tone signal data with a digital filter to generate resonant tone data. . In the filter processing, an FIR (Finite Impulse Response) filter or IIR (Infinite Impulse Response: Infinite Impulse)
Response) filter is used.

  When the FIR filter is used, it is obtained from the input music signal data X [n−k] (k = 0, 1, 2,..., N−1) and the reverberation characteristics of the music hall. Resonance sound data S [n] = ΣX [n−k] × a [k] can be obtained by performing a convolution operation on the impulse response a [k].

  For example, in Patent Document 1, in order to obtain high sound quality, a signal processing system that performs convolution of a direct sound part of an impulse response and a signal processing system that performs convolution of a reflected sound part of an impulse response are separately provided in parallel. In the signal processing system that performs the convolution of the reflected sound part and uses the signal down-sampled to a lower sampling signal than the signal processing system that performs the convolution of the direct sound part has been proposed.

Patent Document 2 discloses that each of the resonance coefficients to be multiplied with the musical tone signal data from the delay element is changed according to the pitch of the musical tone to be generated, and the musical tone signal data is multiplied by the resonant coefficient. A resonance apparatus that adds the multiplication results is disclosed.
Japanese Patent Laid-Open No. 2007-202020 JP 2002-31957 A

  In a configuration in which two signal processing systems are arranged in parallel as in Patent Document 1, not only a convolution operation circuit including two FIR filters is required, but two series of impulse response data are required. Therefore, many circuit elements and data are required. In addition, since the two signal processing systems are provided in parallel, there may occur a situation where the impulse response coefficient is “0” and one of the signal processing systems does not substantially perform the operation. In some cases, computation is wasted.

  Moreover, in the resonance apparatus described in Patent Document 2, it is necessary to change all the resonance coefficients in accordance with the state of the musical sound. When the number of taps of the filter is large (for example, thousands to tens of thousands of taps), it takes a long time to calculate the resonance coefficient. Even when the resonance coefficient is held by the table, the amount of data in the table becomes enormous.

  An object of the present invention is to provide a resonance generator, an electronic musical instrument, and a resonance generation program that can generate an appropriate resonance with a small circuit and a small amount of data.

An object of the present invention is to provide an impulse response coefficient memory storing a plurality of impulse response coefficients,
The musical tone signal data supplied in chronological order is delayed, and the delayed musical tone signal data is multiplied by the corresponding impulse response coefficient read from the impulse response coefficient memory, and each multiplication result is added. A product-sum operation means for outputting a product-sum operation result,
The product-sum operation means has a predetermined number of taps and outputs a product-sum operation result obtained by adding the multiplication results of the tone signal data and the impulse response coefficient data, and connects the delayed tone signal data in series. A plurality of product-sum operation blocks that output the music signal data to be supplied to the product-sum operation block of the next stage,
Further, an output control means having a plurality of multiplication means for respectively accepting the product-sum operation results from the product-sum operation block of the product-sum operation means and amplifying the product-sum operation results at a predetermined amplification rate,
Adding output from the plurality of multiplying means of the output control means, and outputting as resonance sound data,
The output control means has amplification factor calculation means for calculating an amplification factor to be output to each of the multiplication means,
As the degree of delay of the musical tone signal data increases in the product-sum operation block, the amplification factor calculation unit decreases the amplification factor for the multiplication unit connected to the product-sum operation block from a predetermined initial value. Alternatively, it is achieved by a resonance generator that calculates the amplification factor so that the amplification factor is increased from a predetermined initial value.

In a preferred embodiment, the gain calculation means changes a value at the start of a decrease or increase in the gain, or changes a decrease or increase in the gain according to the degree of delay. Is possible.

Another object of the present invention is to provide the above-described resonance generator,
A waveform data memory storing waveform data;
A tone generator for reading out waveform data from the waveform data memory and generating tone signal data of a specified predetermined pitch based on the waveform data;
An electronic musical instrument having a damper pedal for controlling the resonance degree of the resonance sound,
This is achieved by an electronic musical instrument characterized in that the amplification factor calculation means of the output control means calculates the amplification factor according to the state of the damper pedal.

In a preferred embodiment, the impulse response coefficient memory stores an impulse response coefficient corresponding to when the piano damper pedal is on,
The gain calculation means of the output control means is connected to the product-sum calculation block as the degree of delay of the musical sound signal data in the product-sum calculation block increases when the damper pedal is in the off state. An amplification factor is calculated such that the amplification factor for the multiplication unit is small, and the calculated amplification factor is output to the multiplication unit of the output control unit.

In a preferred embodiment, the damper pedal indicates any of a full pedal state, a half pedal state, and an off state,
The amplification factor calculation means of the output control means has a first amplification factor in the full pedal state, a corresponding second amplification factor in the half pedal state, and a corresponding third amplification factor in the off state. ,
The amplification factor is calculated so that the first amplification factor ≧ the second amplification factor ≧ the third amplification factor.

Another object of the present invention is to provide a computer including a storage device including an impulse response coefficient memory that stores a plurality of impulse response coefficients.
The musical tone signal data supplied in chronological order is delayed, and the delayed musical tone signal data is multiplied by the corresponding impulse response coefficient read from the impulse response coefficient memory, and each multiplication result is added. A product-sum operation means for outputting a product-sum operation result, having a predetermined number of taps, outputting a product-sum operation result obtained by adding a multiplication result of musical tone signal data and impulse response coefficient data, and delayed. A product-sum operation means having a plurality of product-sum operation blocks for outputting the tone signal data to be the tone signal data supplied to the product-sum operation block of the next stage connected in series;
A product-sum operation result from the product-sum operation block of the product-sum operation unit is received, and a plurality of multiplication units for amplifying the product-sum operation result at a predetermined amplification rate, respectively, and output to each of the multiplication units An output control means having an amplification factor calculating means for calculating the amplification factor, and
Add the outputs from the plurality of multiplication means of the output control means, function as addition means for outputting as resonance sound data,
As the degree of delay of the musical tone signal data increases in the product-sum operation block, the amplification factor calculation unit decreases the amplification factor for the multiplication unit connected to the product-sum operation block from a predetermined initial value. Alternatively, it is achieved by a resonance sound generating program characterized in that the amplification factor is calculated so that the amplification factor is increased from a predetermined initial value.

  According to the present invention, it is possible to provide a resonance generator, an electronic musical instrument, and a resonance generation program that can generate an appropriate resonance with a small circuit and a small amount of data.

  Embodiments of the present invention will be described below with reference to the accompanying drawings. FIG. 1 is a block diagram showing a configuration of an electronic musical instrument according to an embodiment of the present invention. In the present embodiment, a resonance sound adding circuit is provided in the electronic musical instrument.

  As shown in FIG. 1, the electronic musical instrument 10 according to the present embodiment includes a keyboard 12, a CPU 14, a ROM 16, a RAM 18, a musical tone generator 20, a damper pedal 21, and an operator group 22. The keyboard 12, CPU 14, ROM 16, RAM 18, musical tone generator 20, damper pedal 21 and operator group 22 are connected via a bus 30. The tone generation unit 20 includes a tone generation circuit 24, a resonance addition circuit 26, and an acoustic system 28.

  The keyboard 12 can transmit to the CPU 14 information specifying the key that has been pressed and information indicating the velocity of the key that has been pressed, in accordance with the player's key pressing operation.

  The CPU 14 detects the operation of the system control, the operation of the switches constituting the operator group 22, the operation of the key constituting the keyboard 12, and generates the musical sound data of the pitch corresponding to the depressed key. The generation of various control signals to be supplied to the resonance signal, the generation of control signals to be supplied to the resonance sound adding circuit 26, and the like are executed.

  The ROM 16 includes various programs and programs such as a program for detecting switch and key operations, a control signal generation program to be supplied to the musical sound generation circuit 24 of the musical sound generation unit 20, and a control signal generation program to be output to the resonance addition circuit 26. , Constants used at the time of execution, waveform data that is the basis of the musical tone signal data generated by the musical tone generator circuit 24 of the musical tone generator 20, and an impulse including an impulse response coefficient used by the resonant tone adding circuit 26 Stores response data and the like. The RAM 18 temporarily stores variables necessary in the course of program execution, values obtained by calculation, parameters, input data, output data, and the like.

  In the present embodiment, the damper pedal 21 can output a signal indicating not only on / off but also an intermediate stage. For example, the damper pedal 21 is provided with two switches (not shown) in the vertical direction (perpendicular to the rotation axis of the pedal), and both the first switch and the second switch are off (the damper pedal 21 is depressed). In a state where only the first switch is turned on (a state where the damper pedal 21 is depressed halfway), and a state where both the first switch and the second switch are turned on (the damper pedal 21 is full). Can be made). With this configuration, it is possible to create three states: a full pedal when both switches are on, a half pedal when only the first switch is on, and a pedal off when both switches are off. It becomes.

  Alternatively, a variable resistance value whose resistance value can be changed according to the depression amount of the damper pedal 21 may be provided, and a signal corresponding to the resistance value may be output.

  FIG. 2 is a block diagram showing an example of a musical sound generating circuit, a resonance sound adding circuit and related components according to the present embodiment.

  As shown in FIG. 1 and FIG. 2, the musical tone generating circuit 24 is based on the tone color information indicating the tone color of the musical tone to be generated, the pitch information indicating the pitch to be generated, and the velocity information, which are given from the CPU 14. Musical tone signal data having a predetermined tone color and a predetermined pitch is output. The timbre information, pitch information, and velocity information constitute the first control signal.

  The pitch information and velocity information included in the first control signal are generated by the CPU 14 based on the signal from the keyboard 12. The timbre information included in the first control signal is generated by the CPU 14 based on the switch operation information included in the operator group 22.

  The resonance addition circuit 26 includes a resonance generation circuit 30 having a plurality of convolution operation circuits, a multiplication circuit 31 for adjusting the output level, and an addition circuit 32, and the resonance sound based on the musical tone signal data according to the second control signal. Data is generated, and synthesized data obtained by synthesizing the musical tone signal data and the resonance sound data is generated and output.

  The resonance generating circuit 30 multiplies the musical tone signal data output from the musical tone generating circuit 24 by the corresponding impulse response coefficient read from the impulse response data memory 33, and adds the multiplication results to obtain resonance sound data. Output. The multiplication circuit 31 multiplies the resonance data by a predetermined amplification factor. In the present embodiment, the amplification factor in the multiplier circuit 31 is constant. Further, the multiplication circuit 31 may be omitted. The adder circuit 32 adds the musical tone signal data and the resonance sound data, and outputs synthesized data.

  As shown in FIG. 2, the resonance signal generating circuit 30 is given a second control signal. The CPU 12 generates a second control signal according to the state of the damper pedal 21 and outputs the second control signal to the resonance generating circuit 30.

  The acoustic system 28 includes a D / A converter, an amplifier circuit, and a speaker, converts the synthesized data into an analog signal, amplifies the analog signal, and emits sound from the speaker.

  FIG. 3 is a block diagram showing a configuration example of the tone generation circuit and the waveform memory according to the present embodiment. As shown in FIG. 3, the tone generation circuit 24 according to the present embodiment includes a waveform reproduction circuit 36, an envelope generation circuit 37, and a multiplication circuit 38.

  The waveform memory 35 stores various tone color waveform data such as piano tone color data, guitar tone color data, and violin tone color data. The waveform memory 35 is realized by, for example, the ROM 16. The waveform reproduction circuit 36 performs first control on waveform data of a predetermined type (for example, piano timbre) from various timbre data stored in the waveform memory 35 in accordance with the timbre information included in the first control signal. Read according to the pitch information contained in the signal. The envelope generation circuit 37 outputs envelope data according to velocity information included in the first control signal. The waveform data and the envelope data are multiplied by the multiplication circuit 38, and the musical tone signal data X [n] is output.

  In the present embodiment, the impulse response data memory 33 stores impulse response data including an impulse response coefficient to be multiplied with each value of the musical tone signal data. The impulse response data memory stores impulse response data for each tone color. When the waveform memory shown in FIG. 3 is used, the piano tone impulse response data, folk guitar tone impulse response data, gut guitar tone impulse response data, cello tone impulse response data, and violin tone impulse data are stored in the impulse response data memory 33. Stored in For example, the impulse response data memory 33 is realized by the ROM 16. Further, the second control signal includes information for selecting impulse response data, and an amplification factor given to each of the multiplication circuits included in the resonance generating circuit 30.

  In a general product-sum operation circuit, a product-sum operation according to the following equation is executed.

S [n] = ΣX [n−k] × a [k] (k = 0, 1, 2,..., M)
S [n] is the product-sum operation result. X [n−k] is the tone signal data, and a [k] is the impulse response coefficient.

  FIG. 4 is a block diagram showing an outline of a general product-sum operation circuit. As shown in FIG. 4, the product-sum operation circuit is an FIR filter, which receives input data (for example, musical tone signal data X [n]) and delays it by one clock and outputs it. The circuit 40-1 to 40- (n-1), the musical tone signal data, or the delayed musical tone signal data output from the delay circuit is received, the received musical tone signal data, and the impulse response coefficient a [k] Multiplication circuits 41-0 to 41- (n-1) and addition circuits 42-1 to 42- (n-1) for adding the outputs of the multiplication circuits 41-0 to 41- (n-1). And have. In the example illustrated in FIG. 4, the adder circuit 42-1 adds the output of the 0th multiplier circuit 41-0 and the output of the 1st multiplier circuit 41-1. The adder circuit 42-i (i ≧ 2) adds the output of the preceding adder circuit 42- (i−1) and the output of the i-th multiplier circuit 41-i.

  In the example shown in FIG. 4, the output from the last (number (n-1)) delay circuit 40- (n-1) is the delayed music signal data (delayed music signal data) Y (n ) Can be output.

  Since the number of taps of the FIR filter is as large as, for example, 1024, if a circuit as shown in FIG. 4 is to be realized as it is, a large amount of delay circuits and multiplication circuits are required. For example, in the example shown in FIG. 4, 1023 delay circuits, addition circuits, and 1024 multiplication circuits are required as they are. Therefore, in practice, an FIR filter using a small number of multiplier circuits and adder circuits is realized by using a pipeline to execute data reading, multiplication in a multiplier circuit, and addition in an adder circuit in parallel.

  For example, although not shown, the FIR filter stores the delayed tone signal data, shifts the tone signal data according to the clock, the tone signal data of a predetermined stage held by the shift register, A read circuit for reading musical tone signal data and an impulse response coefficient; a multiplier circuit for multiplying the musical tone signal data by an impulse response coefficient to be multiplied; and an adder circuit for accumulating an output from the multiplier circuit and its own output. Reading, multiplication in the multiplication circuit, and accumulation in the addition circuit are executed in parallel by pipeline processing.

  FIG. 5 is a diagram illustrating the pipeline. As shown in FIG. 5, the FIR filter acquires the musical tone signal data X [n] and the impulse response coefficient a [0] at the first clock timing (clock = 0) (see reference numeral 501), and the next clock timing. At (clock = 1), the musical tone signal data X [n] is multiplied by the impulse response coefficient a [0] to obtain a multiplication value Z [0] (see reference numeral 511). At the clock timing of clock = 1, the FIR filter reads the next musical sound signal data X [n−1] and impulse response coefficient a [1] in parallel with the multiplication (see reference numeral 502).

  Further, at the next clock timing (clock = 2), the multiplied value Z [0] and the original accumulated value (initially accumulated value = 0) are added to obtain an accumulated value S [0]. (See reference numeral 521). Even at the clock timing of clock = 2, in the FIR filter, the tone signal data X [n-2] and the impulse response coefficient a [2] are acquired in parallel (see reference numeral 503), and the tone signal data X [N−1] and the impulse response coefficient a [1] are multiplied to calculate a multiplication value Z [1] (see 512).

  By the pipeline processing, a high-speed product-sum operation is realized by a small number of multiplication circuits and addition circuits. However, assuming that the sampling frequency of the musical tone signal data is 44.1 kHz, it is necessary to finish all the product-sum operations in 22.7 μs. Even if the operation clock of the FIR filter is assumed to be 50 MHz and high-speed operation, the time per clock is 20 ns. Therefore, “22.7 μs / 20 ns = 1135”, and the number of taps of the FIR filter is about 1100. Actually, an FIR filter of about 1100 taps is insufficient for generating a resonance sound.

  Therefore, in the present embodiment, the resonance generating circuit 30 is provided with a plurality of FIR filters capable of product-sum operation of a plurality of taps, for example, 1024 taps, and the product-sum operation result is output from each FIR filter, and The FIR filter is connected in series, and the delayed musical tone signal data delayed by the upstream FIR filter and output is input to the downstream FIR filter. According to such a plurality of FIR filters, by adding the product-sum operation values output from the respective FIR filters, an FIR filter having a larger number of taps can be realized without reducing the sampling frequency. .

  FIG. 6 is a block diagram showing an example of a resonance generating circuit according to the present embodiment. As shown in FIG. 6, the resonance generating circuit 30 according to the present embodiment includes a plurality (28 in the present embodiment) of FIR filters 60-1 to 60-28. Functionally, the FIR filters 60-1 to 60-28 can output the product-sum operation data S (n) and the delayed musical tone signal data Y (n) as in the product-sum operation circuit shown in FIG. it can. In practice, these FIR filters 60-1 to 60-28 each implement a product-sum operation with a small number of multiplier circuits and adder circuits by using pipeline operations. In the present embodiment, the plurality of FIR filters 60-1 to 60-28 constitute an FIR filter as a whole. Therefore, in the following description, the FIR filters 60-1 to 60-28 are also referred to as product-sum operation blocks 60-1 to 60-28, respectively.

  In the resonance generating circuit 30 according to the present embodiment, the delayed tone signal data Y (n) output from each of the product-sum operation blocks 60-1 to 60-27 is adjacent to the downstream side. Is input as musical tone signal data. For example, the delayed musical tone signal data Y1 (n) of the product-sum calculation block 60-1 located at the most upstream becomes the musical tone signal data X2 (n) of the product-sum calculation block 60-2 adjacent downstream.

  The resonance generation circuit 30 uses the product-sum operation outputs (product-sum operation data) S1 (n) to S28 (n) of the product-sum operation blocks 60-1 to 60-28 using a predetermined amplification factor. Output control circuit 61 including multiplication circuits 62-1 to 62-28 for multiplication. The amplification factors of the multiplication circuits 62-1 to 62-28 are calculated by the CPU 14 in accordance with the state of the damper pedal 21 and the like, and are supplied from the CPU 14 to the output control circuit 61 of the resonance generating circuit 30 as the second control signal. . The calculation of the amplification factor will be described in detail later.

  The resonance generating circuit 30 includes an addition (accumulation) circuit 63 that adds (accumulates) the outputs of the multiplication circuits 62-1 to 62-8. The addition (accumulation) circuit has one input as its own output (accumulation value), and the other input as the product-sum output from any one of the product-sum operation blocks 60-1 to 60-28. As the operation value, the accumulated value and the product-sum operation value from any of the product-sum operation blocks 60-1 to 60-28 are accumulated. Resonance sound data S [n] can be obtained by accumulating the product-sum operation values of all the product-sum operation blocks.

  In the present embodiment, a 28672-tap FIR filter is realized by using 28 1024-tap FIR filters (product-sum operation blocks). The addition (accumulation) circuit 63 requires 28 accumulation processes. However, the 1024 tap FIR filter process and the accumulation process require only about 1024 + 28 = 1076 clocks. Fits within range.

  Next, processing executed in the electronic musical instrument 10 having the above-described configuration will be described. FIG. 7 is a flowchart showing an outline of processing executed in the electronic musical instrument 10 according to the present embodiment. As shown in FIG. 7, the CPU 14 executes a process (initialization) for initializing various parameters stored in the RAM 18 (step 701). Next, the CPU 14 detects the operation of the switch of the operator group 22 and the operation of the key of the keyboard 12, and stores the operated switch and key information in the RAM 18 (step 702). Further, the CPU 14 detects the depression state of the damper pedal 21 (step 703). In the pedal process of step 703, the CPU 14 detects whether the current pedal state of the damper pedal 21 is a full pedal, a half pedal or off. Next, the CPU 14 compares the pedal state stored in the RAM 15 with the current pedal state, and if there is a change in the pedal state, the information indicating that the pedal state has changed is stored in the RAM 15. (For example, turning on the flag), the pedal state in the RAM 15 is changed to the latest one.

  The CPU 14 controls the degree of resonance target value for controlling each of the multiplication circuits of the output control circuit 61 (step 704), and the degree of resonance calculation process for calculating the current value of the degree of resonance. (Step 705) is executed. The resonance degree target value calculation process and the resonance degree calculation process will be described in detail later. Further, the CPU 14 outputs a first control signal including information indicating tone color, pitch, and velocity to the musical tone generation circuit 24 in order to start sounding the key determined to be turned on in step 702. As a result, musical tone signal data corresponding to the pitch of the depressed key is output from the musical tone generation circuit 24 (step 706).

  FIG. 8 is a flowchart showing in detail the resonance degree target value calculation processing according to the present embodiment. As shown in FIG. 8, the CPU 14 refers to the information stored in the RAM 15 by the pedal process, and determines whether or not the state of the damper pedal 21 has changed (step 801). When it is determined Yes in step 801, the CPU 14 determines whether or not the latest state of the damper pedal 21 is a pedal-off state (step 802). If YES is determined in step 803, a value “key press number × a + C” corresponding to the current key press number is calculated (step 803). a is a coefficient and C is a constant. For example, a = 8 and C = 30.

  Next, the CPU 14 determines whether or not the value calculated in step 803 is equal to or greater than the resonance degree target value 83 corresponding to the state of the half pedal (step 804). When it is determined No in step 804, the value calculated in step 803 is directly used as the resonance degree target value. On the other hand, if it is determined Yes in step 803, the CPU 11 determines the resonance degree target value as “83” (step 807). The resonance degree target value is stored in the RAM 15.

  When it is determined No in step 802, the CPU 11 refers to the RAM 15 and determines whether or not the latest state of the damper pedal 21 is a full pedal state (step 805). If No in step 805, that is, if the damper pedal 21 is in the half pedal state, the CPU 11 sets the resonance degree target value to “83” (step 805). On the other hand, if YES in step 802, that is, if the damper pedal 21 is in the full pedal state, the CPU 11 sets the resonance degree target value to “100” (step 806).

  FIG. 9 is a flowchart showing in detail the resonance degree calculation processing according to the present embodiment. The resonance degree calculation processing prevents the noise from being generated in the resonance sound by gradually bringing the current value of the resonance degree closer to the resonance degree target value. In the present embodiment, the multiplication circuit 62-n multiplies the product-sum operation output Si (n) of each product-sum operation block and the amplification factor A (i) according to the current value of the resonance level. The This amplification factor A (i) is also calculated from the product-sum operation block number i and the current value of resonance.

  The plurality of product-sum operation blocks 60-1 to 60-28 perform product-sum operation with musical tone signal data close to the present on the time axis as i of the product-sum operation block 60-i decreases. In the present embodiment, basically, the amplification factor A (i) has a maximum value at a position close to the present on the time axis, and thereafter, the value is constant or decreases as it becomes past on the time axis. Take a value that

  As shown in FIG. 9, the CPU 11 acquires the current resonance degree value and the resonance degree target value stored in the RAM 15 (step 901), and compares the current resonance degree value with the resonance degree target value (step 902). ).

  When the resonance level current value is smaller than the resonance level target value (current value <target value), the CPU 14 increments the resonance level current value (step 903). When the current resonance degree value is larger than the resonance degree target value (current value> target value), the CPU 14 decrements the resonance degree current value (step 904). The obtained resonance degree present value is stored in the RAM 15. If the two values are equal (current value = target value), the CPU 14 does not perform the process for the resonance degree current value.

  Next, the CPU 14 initializes a parameter i for specifying the product-sum operation blocks 60-1 to 60-28 to “1” (step 906), and until i becomes “29” or more (Yes in step 906). Steps 907 to 911 are repeated.

  If the parameter i is 4 or less (that is, 1 ≦ i ≦ 4), the CPU 14 sets the amplification factor A (i) for the parameter i to “1” (step 908). The obtained amplification factor A (i) is stored in the RAM 15. If the parameter i is 5 or more (that is, 5 ≦ i ≦ 28), the CPU 14 determines the amplification factor A (i) for the parameter i when the current value of resonance is 100 (Yes in step 909). It is set to “1” (step 908). On the other hand, if the current value of resonance is not 100 (that is, less than 100), the CPU 14 calculates the amplification factor A (i) for the parameter as follows (step 910).

Amplification factor A (i) = (current value of resonance degree * (29−i) / 2400
The amplification factor A (i) in step 910 is a function that decreases as i increases and becomes “0” when i is “29”.

  The CPU 14 increments the parameter i (step 911) and returns to step 906.

  The amplification factor A (i) is the following function for i. If the current value of resonance is 100, the amplification factor A (i) is a constant “1”. When the current value of resonance is less than 100, the amplification factor A (i) is a constant value “1” when i is 1 to 4, and decreases as i increases when i is 5 or more. When i is “29”, the value is “0”. Further, this amplification factor A (i) is i = 5, that is, the value at the start of the decrease changes depending on the current value of the resonance degree. FIGS. 10A, 10B, and 10C are graphs showing the amplification factors when the current values of resonance are “30”, “80”, and “100”, respectively. 10A and 10B, the amplification factor A (i) is “1” when the parameter i (number of product-sum operation block) is in the range of 1 to 4. After that, when the parameter i (product-sum operation block number) is in the range of 5 to 28, the parameter i is set according to the calculation formula of amplification factor A (i) = (resonance current value * (29−i) / 2400). The amplification factor A (i) monotonously decreases from the predetermined value, and the amplification factor A (5) at the parameter i = 5, that is, the initial value (maximum value) of the monotonically decreasing amplification factor is the resonance current value. As it grows, it grows.

  The CPU 14 outputs the calculated amplification factors A (i) (i = 1 to 28) to the multiplication circuits 62-i connected to the product-sum operation block 60-i, respectively. Hereinafter, the product-sum operation block 60-i, the multiplication circuit 62-i, and the amplification factor A (i) will be described.

  11A and 11B are graphs showing examples of piano impulse response coefficients. FIG. 11A shows an impulse response coefficient when the damper pedal is a full pedal, and FIG. 11B shows an impulse response coefficient when the damper pedal is off. As can be understood from FIGS. 11A and 11B, in the full pedal state, the piano strings are released from the damper, so that a large string resonance is added to the resonance of the frame and the plate, and the resonance is long. Continue over time. In contrast, when the damper pedal is in the off state, the strings are pressed by the damper, so there is almost no string resonance of keys other than the pressed key, and the overall level is small. Also, the time for which the resonance is continued is short compared to the full pedal state.

  Therefore, only the impulse response coefficient when the damper pedal is in the full pedal state is held in a memory such as the ROM 16, and when the damper pedal is in the OFF state, the impulse response coefficient is multiplied by a predetermined amplification factor and the value of the impulse response coefficient is weighted. It is possible. However, in order to perform a weighting operation on a large number of impulse response coefficients (for example, 1024 × 28 = 28672 taps in the present embodiment), the number of multiplications becomes very large.

  In the present embodiment, each product-sum operation output of product-sum operation blocks 60-1 to 60-28 having a predetermined number of taps (1024 taps) is given a weight based on the amplification factor, and multiplication circuits 62-1 to 62-1 62-28, the product-sum operation output is multiplied by a predetermined amplification factor, the weighted product-sum operation output is accumulated by the addition (accumulation) circuit 63, and the final product-sum operation result is obtained. It is output as resonance sound data. In this way, by multiplying the product-sum operation output of each product-sum operation block connected in series and the amplification factor, the number of multiplications by weighting operation can be significantly reduced.

  In particular, in this embodiment, the impulse response coefficient when the damper pedal is in the full pedal state is stored in the impulse response coefficient memory 33, and when the pedal is full, the amplification factor is set to "1" and the product-sum operation result is output as it is. In other cases, weighting is performed with an amplification factor of 1 or less, so that the resonance sound in the half pedal state or the pedal off state can be appropriately generated.

  In the present embodiment, the plurality of product-sum operation blocks 60-1 to 60-28 perform product-sum operation with musical tone signal data close to the present on the time axis as i of the product-sum operation block 60-i decreases. It is done. Therefore, the amplification factor has a maximum value at a position close to the current position on the time axis, and then decreases as it becomes past on the time axis.

  According to the present embodiment, the resonance generating circuit 30 has a plurality of product-sum operation blocks 60-1 to 60-28, and each of the product-sum operation blocks 60-1 to 60-28 has a predetermined tap. Output the product-sum operation result obtained by adding the multiplication results of the musical tone signal data and the impulse response coefficient data, and the delayed musical tone signal data in the next stage product-sum operation block connected in series Is output so as to be musical tone signal data to be supplied to. Each product-sum operation output of the product-sum operation block is multiplied by a predetermined amplification factor A (i) (i = 1 to 28) by multiplication circuits 62-1 to 62-28 of the output control unit 61, and further added. Addition is performed in the circuit 63.

  Therefore, by changing the weight of the product-sum operation output from the product-sum operation block with a fixed number of taps without changing each of the impulse response coefficients by the product-sum operation, the desired load can be increased without increasing the processing load. Resonance sound can be generated. Further, it is possible to change the resonance sound without having to have a large number of sets of impulse response coefficients.

  In the present embodiment, the CPU 14 calculates the amplification factor output to each of the multiplication means. The CPU 14 has an initial value of “1”, and the amplification factor for the multiplication circuit connected to the product-sum operation block becomes smaller as the delay of the musical tone signal data increases in the product-sum operation block. The amplification factor is calculated as follows. For example, as an impulse response coefficient, an impulse response coefficient for a musical tone having the highest degree of resonance is stored in the impulse response data memory 33, and the product is increased as the degree of delay of the musical tone signal data increases as necessary. By weighting the multiplication circuit connected to the sum operation block so as to reduce the amplification factor, it is possible to generate the resonance sound data in which the degree of resonance is appropriately reduced.

  In the present embodiment, the CPU 14 can change the value at the start of the decrease in the amplification factor, or can change the degree of decrease in the amplification factor according to the degree of delay. Thereby, the degree of resonance can be arbitrarily changed.

  Furthermore, in the present embodiment, the CPU 14 can change the amplification factors for the multiplication circuits connected to the product-sum operation block according to the state of the damper pedal. Thereby, it is possible to generate resonance data having different degrees of resonance appropriately based on the state of the damper pedal of the electronic musical instrument.

  In particular, in the present embodiment, when the damper pedal 21 is in the OFF state, the CPU 14 is connected to the product-sum operation block as the degree of delay of the musical tone signal data increases in the product-sum operation block. An amplification factor is calculated such that the amplification factor of the multiplication circuit becomes small. Thereby, when the damper pedal 21 is in the off state, resonance sound data can be generated so that the degree of resonance becomes smaller as time passes than when the damper pedal 21 is in the on state.

  Further, in the present embodiment, the damper pedal 21 indicates one of the full pedal state, the half pedal state, and the off state, and the CPU 14 has the first amplification factor in the full pedal state, and the half pedal state. For the corresponding second amplification factor and the corresponding third amplification factor in the OFF state, the amplification factor is calculated so that the first amplification factor ≧ the second amplification factor ≧ the third amplification factor. doing. Accordingly, it is possible to generate resonance sound data having an appropriate degree of resonance according to the depression state of the damper pedal 21.

  The present invention is not limited to the above embodiments, and various modifications can be made within the scope of the invention described in the claims, and these are also included in the scope of the present invention. Needless to say.

For example, although a 1024 tap FIR filter is used in the above embodiment, the number of taps of the FIR filter is not limited to this, and the sampling frequency of the tone signal data (the first sampling frequency fs _1). ) And the processing speed of the FIR filter.

  According to the present embodiment, the amplification factor A (i) is set to the amplification factor A (i) = (resonance current value * (29− i) / 2400. However, the present invention is not limited to the above-described mathematical expressions, and the resonance degree current values are “30”, “80”, and FIGS. It is a graph which shows the other example of the amplification factor at the time of "100. In this example, if the number (parameter) i of the product-sum operation block is 4 or less (that is, 1≤i≤4), amplification is performed. The rate A (i) is “1”, and when the product-sum operation block number i is 5 ≦ i ≦ 28, the amplification factor A (i) is calculated by the following equation.

A (i) = (− (100−resonance current value) / a) * (i−5)
+ ((1-C) / 100) * resonance current value + C
a is a constant that determines the degree of decrease, and C (0 <C <1) is a constant that indicates the initial value of the amplification factor A (i) when i = 5. In this example, as the current value of resonance increases, the initial value when i = 5 increases, and the degree of decrease in the amplification factor A (i) as i increases is the current value of resonance. Becomes smaller as becomes larger.

  In the above-described embodiment, only the impulse response coefficient when the damper pedal is in the full pedal state is held in a memory such as a ROM, and the degree of resonance is reduced as the pedal depression is reduced. i) monotonically decreases within a certain range. However, the present invention is not limited to this. For example, the impulse response coefficient when the damper pedal is half-pedal or pedal-off is responsive to a memory such as a ROM, and as the pedal is stepped on, the resonance degree is increased and the amplification factor A (i) is i may be increased within a certain range.

  In the embodiment, a table storing the amplification factor A (i) for the current value of resonance is stored in a memory such as a ROM, and the CPU 11 reads the table according to the current value of resonance and reads the gain. A (i) may be acquired.

  In the above embodiment, the present invention is applied to an electronic musical instrument having a keyboard and a damper pedal. However, the present invention is not limited to this. For example, a processing program for realizing the resonance generating circuit according to the above embodiment is stored in a storage device of a normal personal computer, and the personal computer is used as various means for realizing the processing according to FIGS. Just make it work.

FIG. 1 is a block diagram showing a configuration of an electronic musical instrument according to an embodiment of the present invention. FIG. 2 is a block diagram showing an example of a musical sound generating circuit, a resonance sound adding circuit and related components according to the present embodiment. FIG. 3 is a block diagram showing a configuration example of the tone generation circuit and the waveform memory according to the present embodiment. FIG. 4 is a block diagram showing an outline of a general product-sum operation circuit. FIG. 5 is a diagram illustrating the pipeline. FIG. 6 is a block diagram showing an example of a resonance generating circuit according to the present embodiment. FIG. 7 is a flowchart showing an outline of processing executed in the electronic musical instrument 10 according to the present embodiment. FIG. 8 is a flowchart showing in detail the resonance degree target value calculation processing according to the present embodiment. FIG. 9 is a flowchart showing in detail the resonance degree calculation processing according to the present embodiment. FIGS. 10A, 10B, and 10C are graphs showing the amplification factors when the current values of resonance are “30”, “80”, and “100”, respectively. 11A and 11B are graphs showing examples of piano impulse response coefficients. FIGS. 12A to 12C are graphs showing other examples of amplification factors when the current values of resonance are “30”, “80”, and “100”, respectively.

Explanation of symbols

10 Electronic musical instrument 12 Keyboard 14 CPU
16 ROM
18 RAM
DESCRIPTION OF SYMBOLS 20 Musical sound production | generation part 21 Damper pedal 22 Control element group 24 Musical sound generation circuit 26 Resonance addition circuit 28 Acoustic system 30 Resonance sound generation circuit 31 Multiplication circuit 32 Addition circuit

Claims (6)

An impulse response coefficient memory storing a plurality of impulse response coefficients;
The musical tone signal data supplied in chronological order is delayed, and the delayed musical tone signal data is multiplied by the corresponding impulse response coefficient read from the impulse response coefficient memory, and each multiplication result is added. A product-sum operation means for outputting a product-sum operation result,
The product-sum operation means has a predetermined number of taps and outputs a product-sum operation result obtained by adding the multiplication results of the tone signal data and the impulse response coefficient data, and connects the delayed tone signal data in series. A plurality of product-sum operation blocks that output the music signal data to be supplied to the product-sum operation block of the next stage,
Further, an output control means having a plurality of multiplication means for respectively accepting the product-sum operation results from the product-sum operation block of the product-sum operation means and amplifying the product-sum operation results at a predetermined amplification rate,
Adding output from the plurality of multiplying means of the output control means, and outputting as resonance sound data,
The output control means has amplification factor calculation means for calculating an amplification factor to be output to each of the multiplication means,
As the degree of delay of the musical tone signal data increases in the product-sum operation block, the amplification factor calculation unit decreases the amplification factor for the multiplication unit connected to the product-sum operation block from a predetermined initial value. The resonance generation apparatus is characterized in that the amplification factor is calculated so that the amplification factor increases from a predetermined initial value.   The amplification factor calculating means can change a value at the start of the decrease or increase in the amplification factor, or can change the decrease or increase of the amplification factor according to the degree of the delay. The resonance generator according to claim 1, wherein A resonance generator according to claim 1 or 2,
A waveform data memory storing waveform data;
A tone generator for reading out waveform data from the waveform data memory and generating tone signal data of a specified predetermined pitch based on the waveform data;
An electronic musical instrument having a damper pedal for controlling the resonance degree of the resonance sound,
An electronic musical instrument characterized in that the amplification factor calculation means of the output control means calculates the amplification factor according to the state of the damper pedal. The impulse response coefficient memory stores an impulse response coefficient corresponding to the piano damper pedal being on,
The gain calculation means of the output control means is connected to the product-sum calculation block as the degree of delay of the musical sound signal data in the product-sum calculation block increases when the damper pedal is in the off state. 4. The electronic musical instrument according to claim 3, wherein an amplification factor is calculated such that the amplification factor with respect to the multiplication unit is small, and the calculated amplification factor is output to the multiplication unit of the output control unit. The damper pedal indicates one of a full pedal state, a half pedal state and an off state,
The amplification factor calculation means of the output control means has a first amplification factor in the full pedal state, a corresponding second amplification factor in the half pedal state, and a corresponding third amplification factor in the off state. ,
5. The electronic musical instrument according to claim 4, wherein the amplification factor is calculated such that the first amplification factor ≧ the second amplification factor ≧ the third amplification factor. A computer having a storage device including an impulse response coefficient memory storing a plurality of impulse response coefficients,
The musical tone signal data supplied in chronological order is delayed, and the delayed musical tone signal data is multiplied by the corresponding impulse response coefficient read from the impulse response coefficient memory, and each multiplication result is added. A product-sum operation means for outputting a product-sum operation result, having a predetermined number of taps, outputting a product-sum operation result obtained by adding a multiplication result of musical tone signal data and impulse response coefficient data, and delayed. A product-sum operation means having a plurality of product-sum operation blocks for outputting the tone signal data to be the tone signal data supplied to the product-sum operation block of the next stage connected in series;
A product-sum operation result from the product-sum operation block of the product-sum operation unit is received, and a plurality of multiplication units for amplifying the product-sum operation result at a predetermined amplification rate, respectively, and output to each of the multiplication units An output control means having an amplification factor calculating means for calculating the amplification factor, and
Add the outputs from the plurality of multiplication means of the output control means, function as addition means for outputting as resonance sound data,
As the degree of delay of the musical tone signal data increases in the product-sum operation block, the amplification factor calculation unit decreases the amplification factor for the multiplication unit connected to the product-sum operation block from a predetermined initial value. The resonance generation program is characterized in that the amplification factor is calculated so that the amplification factor increases from a predetermined initial value.

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