JP5560664B2 - Control method of DC-DC converter circuit - Google Patents

Description

  The present invention relates to an insulation type direct current to direct current (DC / DC) conversion circuit whose primary side is a full bridge configuration, and more particularly to a control method capable of increasing efficiency.

FIG. 5 is a circuit configuration diagram showing an example (Japanese Patent Application No. 2009-018302) filed as an earlier application by the applicant, and FIG. 6 is a waveform diagram for explaining the operation thereof.
In the above-mentioned prior application, the switching element is controlled by the hard switching method at light loads and by the phase shift method at heavy loads, so that the dv / dt of the switching elements does not exceed the specified value even at light loads. It is what makes it work. Reference numerals 1 to 4 in FIG. 5 denote switching elements (also simply referred to as elements), and these four devices constitute a so-called full bridge circuit.

  A DC voltage of the DC power source 11 is applied to the full bridge circuit, and one end of the inductor 5 is connected to the midpoint of one of the two legs (arms) constituting the full bridge circuit. A primary winding of a transformer (transformer) 9 is connected between the other end of the inductor 5 and the midpoint of another arm constituting the bridge circuit. A center tap is provided on the secondary side of the transformer 9. The anodes of the rectifying diodes 7 and 8 are connected to both ends of the secondary winding of the transformer 9, respectively. The cathodes of these diodes 7 and 8 are connected to one end of an inductor 10 for DC smoothing. A DC smoothing capacitor 12 is connected between the other end of the inductor 10 and the center tap of the transformer 9. A load 13 is connected in parallel with the DC smoothing capacitor 12.

  A control method in which the switching elements 1 and 2 of FIG. 5 are alternately turned on and off and the elements 3 and 4 are turned on and off with a phase difference with respect to the switching elements 1 and 2 is called a phase shift method. 4 or 4 or elements 2 and 3 are turned on and off simultaneously, the control signals of elements 1 and 4 and the control signals of elements 2 and 3 are generated alternately, and the output voltage is adjusted by the pulse width of the control signal. This is called a switching method.

  The hard switching operation will be described below with reference to FIG. 6, Vc is an output voltage command waveform, Vcr is a carrier signal waveform, Gs1 to Gs4 are gate signal waveforms of the switching elements 1 to 4 in FIG. 5, and Vs1 to Vs4 are drain-source voltage waveforms of the elements 1 to 4. Show. Although not shown in FIG. 5, the insulated direct current-direct current (DC / DC) conversion circuit includes a gate driving unit that generates a gate signal to be applied to the gates of the switching elements 1 to 4. Although details will be described later, the gate driver generates a gate signal based on an output voltage command given to the gate driver and a carrier signal generated in the gate driver.

  First, in the period t1, the switching elements 1 and 4 are simultaneously turned on, and a current flows through the path of the DC power source 11 → the switching element 1 → the inductor 5 → the transformer 9 → the switching element 4 → the DC power source 11, and the primary side of the transformer 9 Is supplied with the power supply voltage Ed. The inductor 5 can be replaced with the leakage inductance of the transformer 9. Here, since the switching elements 1 and 4 are in the ON state, these voltages Vs1 and Vs4 are clamped to zero, and the voltages Vs2 and Vs3 of the switching elements 2 and 3 are clamped to Ed which is a DC power supply voltage.

Next, when the switching elements 1 and 4 are turned off during the period t2, the parasitic capacitances of the switching elements 1 to 4 (capacitance equivalently formed in parallel with the switching elements) and the inductance components in the inductor 5 and the circuit. And the voltages Vs1 to Vs4 of the switching element oscillate around Ed / 2.
In the period t3, the gate signals Gs2 and Gs3 of the switching elements 2 and 3 are turned on at the same time, and the direction of the DC power supply 11 → switching element 3 → transformer 9 → inductor 5 → switching element 2 → DC power supply 11 is opposite to the period t1. Current flows, and a reverse voltage (−Ed) is applied to the primary side of the transformer 9.

Here, since the switching elements 2 and 3 are in the ON state, these voltages Vs2 and Vs3 are zero, and the voltages Vs1 and Vs4 of the switching elements 1 and 4 are clamped to Ed which is a DC power supply voltage.
In the period of t4, all the elements are turned off as in the period of t2, so that the resonance operation occurs, and the voltages Vs1 to Vs4 of the switching elements oscillate around Ed / 2.
Thus, positive and negative voltages are applied to the primary side of the transformer 9, and a voltage proportional to the turns ratio is generated on the secondary side. Further, the secondary side voltage of the transformer 9 is rectified by the diodes 7 and 8, the high frequency component is reduced by the inductor 10 and the capacitor 12, and a DC output voltage is obtained across the capacitor 12.

The gate signals Gs1 to Gs4 are generated by distributing the signal Vr obtained by comparing the output voltage command Vc and the carrier signal Vcr. Therefore, the temporal relationship between Gs1 to Gs4 is t1 = t3 and t2 = t4.
As described above, a voltage is already applied to the switching element when the switching element is turned on. For this reason, the energy stored in the parasitic capacitance is consumed at the same time as the turn-on, and a loss occurs. For example, when the switching element 2 is turned on (t2 → t3), the parasitic capacitance of the element 2 is short-circuited, and the energy stored in the parasitic capacitance is discharged and consumed. Such an operation is repeated at each switching in each element.

Here, the loss P per switching element caused by discharging the parasitic capacitance is expressed by the following equation (1).
P = Cv ² fs / 2 (1)
C is a parasitic capacitance of the switching element, v is a voltage of the switching element applied at turn-on, and fs is a switching frequency. That is, the loss increases in proportion to the square of the voltage v at turn-on.

  At the same time when the switching element 2 is turned on, the voltage Vs2 becomes zero, the parasitic capacitance of the switching element 1 is rapidly charged, and the voltage Vs1 of the element 1 rises to Ed. At this time, the path for charging the parasitic capacitance of the element 1 is the DC power source 11 → the parasitic capacitance of the switching element 1 → the switching element 2 → the DC power supply 11. Flowing. Therefore, the switching loss (turn-on loss) of the switching element 2 increases.

In addition, since the large energy stored in the parasitic capacitance is rapidly charged and discharged, there is a risk that noise generated from the circuit increases and other devices malfunction.
For heavy loads, switching to the phase shift control method causes the voltage Vs1 to Vs4 of the element to become zero before the switching element is turned on, and zero voltage switching (soft switching) is established. do not do.

On the other hand, Patent Literature 1 introduces a technique called pseudo-resonance that turns on a switching element when the voltage of the switching element reaches a minimum value.
However, the quasi-resonance described in Patent Document 1 is intended for a one-stone converter for small capacity using only one switching element, and such a one-stone converter obtains a large output power. It is difficult.
Further, in the circuit having a full-bridge configuration for a large capacity according to the present invention, when the on-timing of the switching element is changed as in Patent Document 1, the voltage / time product applied to the transformer is different in positive and negative and is demagnetized. A problem arises that a large current flows and the device is damaged.

JP 2008-31399 A

  Therefore, an object of the present invention is to reduce the loss associated with charging / discharging of the parasitic capacitance that occurs when the switching element that constitutes the large-capacity DC-DC converter circuit is turned on, thereby improving the efficiency of the circuit device. .

In order to solve such a problem, according to the first aspect of the present invention, first and second series circuits in which two switching elements are connected in series are respectively connected in parallel with a DC power source, and the first series circuit is provided. One end of the primary winding of the transformer is connected to the internal connection point, the other end of the primary winding is connected to the internal connection point of the second series circuit, and the secondary winding of the transformer When performing a hard switching system control in a DC-DC converter circuit that obtains DC by connecting a rectifying element,
A first on-period in which an upper arm switching element in the first series circuit and a lower arm switching element in the second series circuit are both turned on;
On condition that the second on-period in which the switching element of the lower arm in the first series circuit and the switching element of the upper arm in the second series circuit are both turned on is equal,
After the switching element of the upper arm in the first series circuit and the switching element of the lower arm in the second series circuit are turned off, the switching element of the lower arm in the first series circuit and the second series circuit A first off period in which all the switching elements are turned off until the upper arm switching elements are turned on;
After the switching element of the lower arm in the first series circuit and the switching element of the upper arm in the second series circuit are turned off, the switching element of the upper arm in the first series circuit and the second series circuit The second off period in which all the switching elements are turned off until the lower arm switching elements are turned on is set to be different from each other.

In the first aspect of the present invention, when the voltage of the switching element of the upper arm in the first or second series circuit reaches a minimum value, the switching element of the upper arm of the series circuit is turned on. Adjust the switching frequency or
Alternatively, the switching frequency may be adjusted so that the switching element of the lower arm of the series circuit is turned on when the voltage of the switching element of the lower arm of the first or second series circuit reaches a minimum value. (Invention of claim 2)
Alternatively, when the voltage of the switching element of the upper arm in the first or second series circuit reaches a minimum value, the switching element of the upper arm of the series circuit is turned on. Adjust the off period,
Alternatively, when the voltage of the switching element of the lower arm in the first or second series circuit reaches a minimum value, the switching element of the lower arm of the series circuit is turned on. The off period can be adjusted (invention of claim 3).

In the invention of claim 1, a capacitor is connected between the internal connection point of the first or second series circuit and the transformer,
When the voltage of the switching element of the upper arm (or lower arm) in the first or second series circuit reaches a minimum value, the switching element of the upper arm (or lower arm) of the series circuit is turned on,
When the voltage of the switching element of the lower arm (or upper arm) in the first or second series circuit reaches a minimum value, the switching element of the lower arm (or upper arm) of the series circuit is turned on. In addition, the timing for turning off the switching element of the upper arm (or the lower arm) can be determined (invention of claim 4).
In the invention according to any one of the first to fourth aspects, at least one of the on-timing, off-timing, or switching frequency of the switching element is changed according to the magnitudes of the output power and the output current, and the voltage of the switching element is changed. It can be adjusted so that the switching element is turned on when it reaches the vicinity of the minimum value (the invention of claim 5).
The control according to any one of claims 1 to 5 is performed when the output power is equal to or less than a predetermined value, and when the output power exceeds a predetermined value, control of a phase shift method is performed (claim). Item 6).

  According to the present invention, in a DC-DC converter circuit having a full bridge configuration for a large capacity, loss due to charging / discharging of the parasitic capacitance generated when the switching element is turned on can be reduced. High efficiency can be achieved. Further, it is possible to reduce the size and cost of the cooling fins accompanying the loss reduction. Further, since the energy for charging and discharging the parasitic capacitance during switching is reduced, the generated noise can be reduced.

The waveform diagram of each part for explaining the embodiment of the present invention. The waveform diagram of each part for explaining another embodiment of the present invention. The circuit block diagram which shows embodiment of this invention. Each part waveform diagram for demonstrating other embodiment of this invention. The circuit diagram which shows a prior art example. FIG. 6 is a waveform diagram of each part for explaining the operation of FIG. 5.

FIG. 1 is a waveform diagram of each part for explaining an embodiment according to the present invention. The circuit configuration is the same as in FIG.
This is an example in which the period between t2 and t4 in which all switching elements are turned off is adjusted, and the switching elements are set to turn on when the voltage reaches a minimum value. For example, the on-timing of the element 2 is adjusted so that the switching element 2 is turned on when Vs2 reaches near the minimum value. However, if the positive and negative voltage time products applied to the transformer are not equal, the transformer will be magnetized and excessive current will flow, causing damage to the circuit device. Therefore, it is necessary to adjust the on-timing of the element 2.

  Therefore, the ratio between t2 and t4 is adjusted with t2 + t4 being constant. For example, if the on-timing of the element 2 is advanced, it is necessary to advance the off-timing by the same time. By doing so, the voltage of the switching element at the time of turn-on becomes small, so that the energy stored in the parasitic capacitance of the element 2 becomes small and the loss consumed at the time of turn-on. Can also be reduced.

At the same time, the voltage Vs1 of the element 1 is expressed by the following equation (2), and the voltage Vs1 has a maximum value when the voltage Vs2 is minimum.
Vs1 = Ed−Vs2 (2)
That is, since the difference between Ed and Vs1 becomes small when the voltage Vs2 is minimal, the current for charging the parasitic capacitance of the element 1 when the element 2 is turned on (DC power supply 11 → parasitic capacitance of the element 1 → element 2 → The path of the DC power source 11 is reduced, and the turn-on loss of the element 2 is also reduced.

In addition, since the energy of the parasitic capacitance charged and discharged at turn-on can be reduced, the generation of noise can be suppressed, and as a result, the operation can be performed without adversely affecting other devices.
Here, the example in which the ratio of t2 and t4 is changed by shifting the on timing and the off timing of the element 2 has been described, but the same operation can be performed even if the control timing of other switching elements is shifted.

FIG. 2 shows an operation waveform diagram corresponding to claim 2.
Here, the switching frequency is adjusted so that the switching element is turned on when the voltage of the switching element reaches near the minimum value. For example, when the switching frequency is increased, t0 to t5 are each shortened. Conversely, when the switching frequency is decreased, t0 to t5 are respectively increased. However, the resonance period of the voltage of the switching element at t2 and t4 when the switching element is off is determined by circuit constants and parasitic components and is constant. Therefore, by adjusting the switching frequency, the turn-on timing can be adjusted so that the element is turned on when the voltage of the switching element reaches a minimum value. As a result, the same operations and effects as in FIG. 1 are brought about.

FIG. 3 shows an example of a main circuit according to the present invention, and FIG. 4 shows an operation waveform diagram for explaining another embodiment of the present invention.
In FIG. 4, by adjusting the ON period of the switching elements 1 and 4 shown in FIG. For example, the element 2 is turned on at the timing when the voltage Vs2 is minimized, and the timing at which the element 2 is turned off is adjusted so that the element 1 is turned on when the voltage Vs1 of the element 1 is minimized. However, the control signal of the element 1 at this time is not adjusted.

In the above, since both the on-timing and off-timing of the element 2 are adjusted, the control pulse width of the element 2 changes and t1 ≠ t3, and the transformer may be demagnetized. Therefore, as shown in FIG. 3, a DC component of the primary voltage of the transformer 9 is removed by inserting a capacitor 6 on the primary side of the transformer 9. As a result, the circuit device can operate safely without the transformer being demagnetized.
Here, the on-timing and off-timing of the element 2 are shifted so that when the voltage Vs1 of the element 1 and the voltage Vs2 of the element 2 become minimum values, the respective elements are turned on. It goes without saying that the same operation can be obtained by shifting the on-timing and off-timing of the element 2 and the same effect can be obtained.

  By the way, in order to keep the output voltage constant even when the output power or output current changes, the ratio between the t1, t3, and t5 periods when the element is on and the t2, t4 periods when the element is off, the so-called conduction ratio Need to change. Therefore, as in claim 5, even if the conduction ratio changes according to the change in output power or output current, the on-timing is changed so that the voltage of the element is in the vicinity of the minimum value. High efficiency and low noise can be achieved. If digital control is used, it is easy to store in advance the amount of adjustment of on-timing and the amount of change in switching frequency as a control amount. It becomes possible to control with.

Similarly to the previous application (Japanese Patent Application No. 2009-018302), soft switching is established by performing a phase shift operation at a heavy load, and a hard switching operation is performed at a light load, thereby setting a limit value of dv / dt. It can be operated safely without exceeding. Furthermore, by applying the present invention, not only can loss be reduced in a hard switching operation at light load, but also loss can be reduced over a wide load range.
The adjustment of the on timing and the off timing can be easily realized by using a general digital control or a shift register.

  DESCRIPTION OF SYMBOLS 1-4 ... Switching element, 5,10 ... Inductor, 6, 12 ... Capacitor, 7, 8 ... Diode, 9 ... Transformer, 11 ... DC power supply, 13 ... Load.

Claims (6)

First and second series circuits each having two switching elements connected in series are connected in parallel with a DC power source, and one end of a primary winding of a transformer is connected to an internal connection point of the first series circuit. In the DC-DC converter circuit, the other end of the primary winding is connected to the internal connection point of the second series circuit, and the rectifier is connected to the secondary winding of the transformer to obtain a DC output. When performing hard switching control,
A first on-period in which an upper arm switching element in the first series circuit and a lower arm switching element in the second series circuit are both turned on;
On condition that the second on-period in which the switching element of the lower arm in the first series circuit and the switching element of the upper arm in the second series circuit are both turned on is equal,
After the switching element of the upper arm in the first series circuit and the switching element of the lower arm in the second series circuit are turned off, the switching element of the lower arm in the first series circuit and the second series circuit A first off period in which all the switching elements are turned off until the upper arm switching elements are turned on;
After the switching element of the lower arm in the first series circuit and the switching element of the upper arm in the second series circuit are turned off, the switching element of the upper arm in the first series circuit and the second series circuit A control method for a DC-DC conversion circuit, wherein a second off period in which all switching elements are turned off until the lower arm switching elements are turned on is set to be different from each other. Adjusting the switching frequency so that the switching element of the upper arm of the series circuit is turned on when the voltage of the switching element of the upper arm in the first or second series circuit reaches a minimum value;
Alternatively, the switching frequency is adjusted so that the switching element of the lower arm of the series circuit is turned on when the voltage of the switching element of the lower arm of the first or second series circuit reaches a minimum value. The method for controlling a DC-DC converter circuit according to claim 1, wherein: The first and second off periods so that the switching element of the upper arm of the series circuit is turned on when the voltage of the switching element of the upper arm in the first or second series circuit reaches a minimum value. Adjust or
Alternatively, when the voltage of the switching element of the lower arm in the first or second series circuit reaches a minimum value, the switching element of the lower arm of the series circuit is turned on. 2. The method of controlling a DC-DC converter circuit according to claim 1, wherein the off period is adjusted. A capacitor is connected between an internal connection point of the first or second series circuit and the transformer;
When the voltage of the switching element of the upper arm (or lower arm) in the first or second series circuit reaches a minimum value, the switching element of the upper arm (or lower arm) of the series circuit is turned on,
When the voltage of the switching element of the lower arm (or upper arm) in the first or second series circuit reaches a minimum value, the switching element of the lower arm (or upper arm) of the series circuit is turned on. The method for controlling a DC-DC converter circuit according to claim 1, further comprising: determining a timing at which the switching element of the upper arm (or the lower arm) is turned off.   Depending on the magnitude of the output power and output current, at least one of the ON timing, OFF timing or switching frequency of the switching element is changed so that the switching element is turned on when the voltage of the switching element reaches a minimum value. The method for controlling a DC-DC converter circuit according to any one of claims 1 to 4, wherein the control method is adjusted.   The control according to any one of claims 1 to 5 is performed when the output power is equal to or less than a predetermined value, and when the output power exceeds a predetermined value, the phase shift control is performed. A method for controlling a DC-DC converter circuit.

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