JP5556654B2 - Noise removal method and noise removal apparatus - Google Patents

Description

  The present invention relates to a noise removal method and a noise removal device for removing noise superimposed on a digital signal, and more particularly to a noise removal method and a noise removal device for removing noise of a control signal transmitted and received in in-vehicle communication.

  Currently, in-vehicle devices such as engines, brakes, steering, meters, air conditioners, airbags, door locks, power windows and car navigation systems are electronically controlled. Electronic control units (ECUs) that control electronic devices ) Is on the rise.

  The plurality of ECUs mounted on the vehicle realizes control in cooperation with the control system such as the engine control system, the brake control system, and the air conditioner control system in cooperation with the infrastructure outside the vehicle. Therefore, the network is configured.

The plurality of ECUs constitute a network such as LIN (Local Interconnect Network) or CAN (Control Area Network), and are connected to a communication line and exchange information by communication.
Further, power line communication (PLC) that transmits a signal to a power line used for power supply to each ECU has attracted attention as one of in-vehicle communication.

  In communication performed in a network such as LIN or CAN or power line communication, various noises are superimposed on a digital signal transmitted in bit units. Particularly in power line communication, since an actuator is connected to the power line in addition to the ECU, the impedance of the power line and the transmission path loss vary depending on the connection state or operating state of the actuator, and noise is easily superimposed on the signal.

  A method for removing noise superimposed on a digital signal in this way is disclosed in Patent Document 1. In the method described in Patent Document 1, the value of a digital signal is sampled a plurality of times during 1-bit transmission time, and noise superimposed on the digital signal is detected. In the method described in Patent Document 1, when a plurality of values sampled in a 1-bit transmission time do not match due to noise superimposition, a value sampled within a time when noise is not detected is used as a bit value. To do. Thereby, the noise superimposed on the signal can be removed.

JP 2006-270416 A

  However, in order to execute the method described in Patent Document 1, noise must be detected. For this reason, since the apparatus which implement | achieves the method described in patent document 1 needs to be equipped with the circuit which detects noise, there exists a problem that the manufacturing cost of an apparatus increases.

  The present invention has been made in view of such circumstances, and an object of the present invention is to provide a noise removal method and a noise removal apparatus capable of removing noise superimposed on a digital signal without detecting noise. There is.

The noise removal method according to the present invention is a noise removal method for removing noise superimposed on a digital signal transmitted in bit units, wherein the digital signal is shorter than a transmission time per bit of the digital signal. A delay signal generating step for generating three or more delayed signals obtained by delaying the binarized signal by the predetermined period, and simultaneously detecting the signal levels of the generated three or more delayed signals in a predetermined period. , a majority signal generating step of generating a majority signal by extracting the largest signal level among the plurality of signal levels detected, every time the transmission time has elapsed, at the time of the multiple in the transmission time, generated a detection step of detecting a signal level of the majority signal, and extracting the largest signal level among the detected multiple signal level Characterized in that it obtain.

  The noise removal method according to the present invention is characterized in that the number of the delayed signals and the number of time points detected in the detection step are odd numbers.

The noise removal apparatus according to the present invention is a noise removal apparatus that removes noise superimposed on a digital signal transmitted in bit units. The digital signal is transmitted at a predetermined cycle shorter than a transmission time per bit of the digital signal. A delay signal generation unit that generates three or more delay signals obtained by delaying the signal binarized by the predetermined period, and a signal level of each of the three or more delay signals generated by the delay signal generation unit simultaneously detected in a majority signal generator for generating a majority signal by extracting the largest signal level among the plurality of signal levels detected, every time the transmission time has elapsed, double in the transmission time at the time of a few, the majority signal and generating detection unit for detecting a signal level of the majority signals generated by the unit, multiple signal level detected by the detection unit Characterized in that it comprises an extraction unit for extracting the highest signal level in the middle.

  The noise removal apparatus according to the present invention is characterized in that the number of delay signals generated by the delay signal generation unit and the number of time points detected by the detection unit are odd numbers.

  In the present invention, noise superimposed on a digital signal transmitted in bit units is removed. Since noise is superimposed on the digital signal, an analog waveform exists. An analog waveform is converted into a digital waveform by binarizing the digital signal at a predetermined cycle shorter than the transmission time per bit, for example, a predetermined cycle that is 1/10 of the transmission time. At this time, an error may occur in the signal level of the binarized signal due to noise superposition. Three or more delayed signals are generated by delaying the binarized signal by a predetermined period.

The majority signal is generated by detecting the signal levels of three or more delayed signals simultaneously in a predetermined cycle and extracting the highest signal level among the detected signal levels. Every time the transmission time per bit of the digital signal has passed to detect the signal level of the majority signal at the time of the multiple in the transmission time. Extracting the highest signal level among the detected multiple signal level. Thereby, a signal obtained by removing noise from the digital signal is generated.

  In the present invention, since the number of delay signals and the number of time points at which the signal level of the majority signal is detected is an odd number, when the majority signal is generated and when the signal level is extracted, the largest number of signal levels are provided. Never become. Therefore, it is not necessary to set in advance a procedure for processing a signal when the most signal level becomes plural.

  ADVANTAGE OF THE INVENTION According to this invention, the noise removal method and noise removal apparatus which can remove the noise superimposed on the digital signal, without detecting noise can be provided.

It is a block diagram which shows the structure of the noise removal apparatus which concerns on this invention. It is a timing chart for demonstrating the noise removal method by a noise removal apparatus.

Hereinafter, the present invention will be described in detail with reference to the drawings illustrating embodiments thereof.
FIG. 1 is a block diagram showing a configuration of a noise removing apparatus according to the present invention. The noise removing device 1 removes noise superimposed on a received signal S0 transmitted in bit units received from a communication line such as a power line, for example, impulse noise generated from a motor in power line communication.

  The noise removal apparatus 1 includes a delay signal generation unit 2, a majority signal generation unit 3, a detection unit 4, and an extraction unit 5. The noise removal apparatus 1 receives the reception signal S0 and a clock having a period Tq, and outputs a noise removal signal from which noise has been removed from the reception signal S0.

  Here, the period Tq is a period obtained by dividing the transmission time T per bit of the received signal S0 by an integer N of 3 or more. The received signal S0 is composed of two signal levels, High and Low. The received signal S0 corresponds to a digital signal in the claims.

  The delay signal generation unit 2 includes k (k = 5 in FIG. 1) D flip-flops 21, 21,..., 21 and receives a reception signal S0 and a clock having a period Tq. Here, k is an integer of 3 or more and N or less. The delay signal generation unit 2 detects the signal level of the reception signal S0 at the rising edge (or falling edge) of the clock, and outputs a signal level closest to the detected signal level among High or Low, thereby generating noise. The superimposed received signal S0 is binarized. Thereby, the noise part of the reception signal S0 which is an analog waveform becomes a digital waveform. The delayed signal generator 2 generates delayed signals S1, S2,..., Sk obtained by delaying the binarized signal by Tq, 2Tq,. The delayed signals S1, S2,..., Sk are output to the majority signal generator 3.

  The k D flip-flops 21, 21,..., 21 included in the delay signal generator 2 are connected in series as shown in FIG. , K-1th D flip-flops 21, 21,..., 21 from the left side of FIG. .., 21 are connected to the respective input terminals D. Each of the k D flip-flops 21, 21,..., 21 receives the same clock having the cycle Tq from the CLK terminal. The output terminals Q of the k D flip-flops 21, 21,..., 21 are connected to the majority signal generation unit 3. The reception signal S 0 is input to the input terminal D of the first D flip-flop 21.

  The D flip-flop 21 detects the signal level of the signal received from the input terminal D at the rising (or falling) time of the clock received from the CLK terminal, and the signal level close to the detected signal level among High or Low. To extract. The D flip-flop 21 outputs the extracted signal level from the output terminal Q.

  Accordingly, the D flip-flops 21, 21,..., 21 connected in series output the delayed signals S1, S2,. At this time, the delayed signals S2, S3,..., Sk are signals delayed by a period Tq from the delayed signals S1, S2,.

  The majority signal generator 3 receives the delay signals S1, S2,..., Sk and a clock having a cycle Tq from the CLK terminal, and sets the signal levels of the delay signals S1, S2,. (Or fall) at the same time.

  The majority signal generator 3 extracts the highest signal level among the signal levels of the delay signals S1, S2,..., Sk detected simultaneously at the time when the clock rises (or falls). The majority signal generation unit 3 outputs the extracted signal level until the next signal level is detected, that is, until the period Tq elapses. The majority signal generator 3 extracts High if the number of High is (k + 1) / 2 (3 in FIG. 1) or more, and extracts Low if the number of High is less than (k + 1) / 2. . As a result, the majority signal generated by extracting the signal level by majority vote is output from the majority signal generator 3 to the detector 4.

  The detection unit 4 receives the majority signal output from the majority signal generation unit 3 and a clock having a period Tq from the CLK terminal. The detection unit 4 detects the signal level of the majority signal at three time points within the transmission time T every time the transmission time T per bit of the received signal S0 elapses. When the noise is not superimposed on the received signal S0 within the transmission time T, the detection unit 4 has (the number of High, the number of Low) of the delayed signals S1, S2,. Alternatively, detection is performed at three time points within a period of (0, k).

  The detection unit 4 stores the time interval at which the signal level of the majority signal is detected as the number of clocks, counts the number of clocks, and the rising edge of the clock (or the counted number becomes the stored count number (or The signal level of the majority signal is detected at the time of falling. The detection unit 4 outputs the detected three signal levels to the extraction unit 5.

  The extraction unit 5 receives the three signal levels detected by the detection unit 4 and a clock having a cycle Tq from the CLK terminal. The extraction unit 5 stores the received three signal levels while the transmission time T elapses, and each time the transmission time T elapses, the extraction unit 5 obtains the highest signal level among the three stored signal levels. Extract and output the extracted signal level. For example, the extraction unit 5 extracts Low when (Number of High, Number of Low) is (1, 2) among the stored signal levels, and outputs Low for the transmission time T.

  As a result, an erroneous signal level is not output from the extraction unit 5 due to noise superimposed on the reception signal S0, and a noise-removed signal from which noise has been removed is output from the extraction unit 5.

Next, a method for removing noise performed by the noise removing apparatus 1 will be described. FIG. 2 is a timing chart for explaining a noise removal method by the noise removal apparatus 1. In FIG. 2, a clock having a cycle Tq input to each of the delay signal generation unit 2, the majority signal generation unit 3, the detection unit 4, and the extraction unit 5, the reception signal S0, the delay signals S1, S2,. Sk (k = 5 in FIG. 2) and a majority signal are shown. Here, in FIG. 2, High is described as H, and Low as L. The signal level indicated by the received signal S0 is High, Low, and High in order every transmission time T (= NTq), and impulse noise is superimposed in a period in which the signal level is Low.
Hereinafter, it is assumed that each of the delay signal generation unit 2, the majority signal generation unit 3, the detection unit 4, and the extraction unit 5 detects the signal level at the rising edge of the clock. In FIG. 2, N = 10.

  First, the first D flip-flop 21 from the left side of FIG. 1 detects the signal level of the reception signal S0 at the rising edge of the clock, and outputs the signal level closest to the signal level detected in High or Low. To binarize. The binarized signal is the delayed signal S1.

  Here, the D flip-flop 21 has a time difference from the detection of the signal level of the signal received from the input terminal D to the output of the signal level from the output terminal Q. For this reason, the time point when the signal level of the delay signal S1 falls from High to Low is delayed in a range not exceeding the cycle Tq from the rising point of the clock that detected Low as the factor of falling. Similarly, the time when the signal level of the delay signal S1 rises from Low to High is delayed in a range not exceeding the cycle Tq from the rise time of the clock at which High is detected as the rise factor.

  Therefore, in the received signal S0 in which High is detected, the signal level of the delay signal S1 detected at the rising edge of the clock when the Low of the received signal S0 is detected is High, and in the delayed signal S1, the next clock rises. Low is detected at the time. Similarly, in the received signal S0 in which Low is detected, the signal level of the delay signal S1 detected at the rising edge of the clock at which High of the received signal S0 is detected is Low, and the next signal rises in the delayed signal S1. High is detected at the time.

  Further, the delay signal S2 is generated by detecting the signal level of the delay signal S1 at the rising edge of the clock and extracting the signal level closest to the detected signal level from among High and Low.

For this reason, the fall time and rise time of the delay signal S2 are delayed by the clock cycle Tq from the fall time and rise time of the delay signal S1. The delayed signal S2 is a signal obtained by delaying the delayed signal S1 by a period Tq.
For the same reason, the delayed signals S3, S4,..., Sk are signals obtained by delaying the delayed signals S2, S3,.

  Next, the majority signal generator 3 simultaneously detects the signal levels of the delay signals S1, S2,..., Sk at the rising edge of the clock. FIG. 2 shows the transition of the number of High and the number of Low in the entire delay signals S1, S2,.

  The majority signal generation unit 3 extracts the highest signal level from the k signal levels detected at the same time, and outputs the extracted signal level until the next clock rise, that is, until the period Tq elapses. To do.

  In the detection unit 4, when noise is not superimposed on the received signal S0, a period during which (High, Low) is (k, 0) or (0, k), for example, a broken line in the majority signal of FIG. The signal level of the majority signal is detected at three points in the period between.

  Thereby, even when the noise over the period of at least the period (k−1) Tq / 2 (2Tq in FIG. 2) is superimposed on the reception signal S0, the signal level detected by the detection unit 4 is the reception signal S0. There is no inversion due to the superimposed noise. Therefore, the detection unit 4 can detect High or Low without error.

  When the detection unit 4 detects the signal level of the majority signal within the period in which (the number of High and the number of Low) is (k−2, 2) or (2, k−2), it can be surely removed. The possible noise period is as short as (k-5) Tq / 2 (zero in FIG. 2).

  Therefore, as described above, the detection unit 4 detects the signal level of the majority signal within the period in which (High number, Low number) is (k, 0) or (0, k). The level can be detected.

  The extraction unit 5 extracts the highest signal level among the three signal levels detected by the detection unit 4, and outputs the extracted signal level until the transmission time T per bit elapses. For this reason, the probability that the signal output from the extraction unit 5 is a signal obtained by removing noise from the reception signal S0 is further increased.

  The majority signal becomes, for example, high due to noise superimposed on one of the received signals S0 in the period of (2, 3) (the number of high and the number of low) in FIG. In this case, the received signal S0 is not a signal obtained by removing noise. Even when the majority signal generation unit 3 generates such a majority signal, the noise removal device 1 includes the detection unit 4 and the extraction unit 5 so that a noise removal signal obtained by removing noise from the reception signal S0 is obtained. Can be output.

  Moreover, the noise removal apparatus 1 does not need to detect noise when removing noise. Therefore, since the noise removal apparatus 1 does not require a circuit for detecting noise, the noise removal apparatus 1 is small and the manufacturing cost of the noise removal apparatus 1 is low.

  In the present embodiment, since the number of delay signals S1, S2,..., Sk (the value of k) is an odd number, when the majority signal generator 3 outputs a majority signal, the number of High and Low The number is never the same. Furthermore, since the number of points detected by the detection unit 4 in the bit period of the majority signal is an odd number, the number of High and the number of Low do not become the same. For this reason, it is not necessary to set in advance a procedure for processing a signal when the most signal level becomes plural.

  Note that the number of delay signals S1, S2,..., Sk (value of k) and the number of points detected by the detection unit 4 may not be odd numbers. In this case, the majority signal generation unit 3 and the detection unit 4 may set in advance a procedure for processing a signal when there are a plurality of the highest signal levels.

  Further, the period in which the majority signal generation unit 3 simultaneously detects the signal levels of the delayed signals S1, S2,..., Sk detects the signal level of the signal input from the input terminal D by the D flip-flop 21. It does not have to be the same as the period. For example, the majority signal generator 3 may receive a clock having a cycle Tq / 2 and detect the signal level at the time of rising (or falling).

Further, the number of time points detected by the detection unit 4 within the transmission time T is not limited to three, and may be an odd number other than three.
Furthermore, the period in which the detection unit 4 detects the three signal levels is not limited to the period in which (the number of High and the number of Low) is (k, 0) or (0, k). For example, a period in which (the number of High, the number of Low) is (k−1, 1) or (1, k−1) may be included in the period detected by the detection unit 4.
Further, the noise removal apparatus 1 may be configured to correct a bit error of the noise removal signal output from the extraction unit 5 using an error correction code.

  The disclosed embodiments are to be considered in all respects as illustrative and not restrictive. The scope of the present invention is defined by the terms of the claims, rather than the description above, and is intended to include any modifications within the scope and meaning equivalent to the terms of the claims.

DESCRIPTION OF SYMBOLS 1 Noise removal apparatus 2 Delay signal generation part 3 Majority signal generation part 4 Detection part 5 Extraction part

Claims (4)

In a noise removal method for removing noise superimposed on a digital signal transmitted in bit units,
A delay signal generation step of generating three or more delay signals obtained by delaying a signal obtained by binarizing the digital signal at a predetermined period shorter than a transmission time per bit of the digital signal by the predetermined period;
A majority signal generation step of generating a majority signal by detecting the signal level of each of the generated three or more delayed signals simultaneously in a predetermined cycle and extracting the largest signal level among the detected plurality of signal levels. When,
Every time the transmission time has elapsed, at the time of the multiple in the transmission time, a detection step of detecting a signal level of the generated majority signal,
Noise removing method characterized by comprising an extraction step of extracting the largest signal level among the detected multiple signal level.   The noise removal method according to claim 1, wherein the number of the delayed signals and the number of time points detected in the detection step are odd numbers. In a noise removal device that removes noise superimposed on a digital signal transmitted in bit units,
A delay signal generating unit that generates three or more delayed signals obtained by delaying the signal obtained by binarizing the digital signal at a predetermined period shorter than a transmission time per bit of the digital signal by the predetermined period;
The signal level of each of the three or more delay signals generated by the delay signal generation unit is simultaneously detected at a predetermined period, and a majority signal is extracted by extracting the highest signal level from the detected plurality of signal levels. A majority signal generator to generate,
Every time the transmission time has elapsed, at the time of the multiple in the transmission time, a detection unit for detecting a signal level of the majority signal generated by the majority decision signal generating unit,
Noise removal device, characterized in that it comprises an extraction unit for extracting the highest signal level among the detected multiple signal level by the detection portion.   The noise removal apparatus according to claim 3, wherein the number of delay signals generated by the delay signal generation unit and the number of time points detected by the detection unit are odd numbers.

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