JP5515326B2 - Power supply apparatus, image forming apparatus, and program - Google Patents

Description

  The present invention relates to a power supply device, an image forming apparatus, and a program.

  Patent Document 1 includes a rectifier that performs full-wave rectification using an AC power supply as an input, a plurality of current paths branched from the output of the rectifier, a plurality of inductors provided in the plurality of current paths, A DC voltage generator that generates a DC voltage by integrating the output currents of the plurality of inductors, and switching the currents that flow through the plurality of inductors so that the average current that flows through the AC power supply is sinusoidal. A power supply apparatus having a switching unit to be controlled is disclosed, wherein the switching unit performs the control by the switching at a phase different from each other for each of the plurality of inductors.

  Further, Patent Document 2 includes a first control drive circuit that outputs a first drive signal having a predetermined duty ratio with at least a first switching means to drive the first switching means. A second converter driving the second switching means by outputting a second drive signal having a predetermined ON period and a switching converter, at least a second switching means connected in parallel with the first switching converter; A second switching converter having a control drive circuit, first and second capacitors, the first capacitor is repeatedly charged and discharged in synchronization with a rise of the first drive signal, and the first capacitor is When charging, the second capacitor is discharged, and when discharging the first capacitor, the second capacitor is charged. And an output of the second drive signal of the second control drive circuit is performed in synchronization with the inversion of the voltage difference by comparing the voltages of the first and second capacitors. A system switching converter is disclosed.

  In Patent Document 3, a rectifying circuit for full-wave rectification of alternating current input from an alternating current power supply and a switching element connected in series with a primary winding of a transformer to which the output of the rectifying circuit is input are turned on / off. In the DC power supply device comprising a DC / DC converter that rectifies and smoothes the voltage induced in the secondary winding of the transformer by a plurality of switching elements of the DC / DC converter are provided in parallel, and the DC / DC converter A current detection means for detecting an output current of the DC converter or a current proportional to the current; and when a current value detected by the current detection means is smaller than a preset value, one of the plurality of switching elements is First non-operation control means for bringing the other switching elements other than the non-operating state into an off-state, and further, the rectifier circuit and the D A power factor correction circuit (hereinafter referred to as “PFC circuit”) that improves the power factor by turning on / off the switching element between the DC / DC converter and a plurality of switching elements of the PFC circuit are provided in parallel. When the current value detected by the current detecting means is smaller than a preset value, except for one of the plurality of switching elements of the PFC circuit, the other switching elements are turned off and in a non-operating state. There is disclosed a technique characterized in that two non-operation control means are provided.

  Furthermore, in Patent Document 4, a rectifier circuit that rectifies an alternating current input from an alternating current power source and a pulsating current output from the rectifier circuit are input, and the input current waveform is controlled to be a waveform close to a sine wave. In a DC power supply device comprising: a power factor correction circuit that performs post-rectification smoothing; and a DC / DC converter that converts a DC voltage output from the power factor correction circuit into a predetermined voltage, an output current of the DC / DC converter or Current detection means for detecting a current value proportional to the current, and operation stop control for stopping the power factor improvement operation of the power factor improvement circuit when the current value detected by the current detection means is smaller than a preset value And a technique characterized by comprising means.

JP 2007-195282 A JP 10-1227049 A Japanese Patent No. 3568666 JP-A-9-201052

  An object of the present invention is to provide a power supply device, an image forming apparatus, and a program capable of suppressing a decrease in power supply efficiency accompanying a decrease in power consumption of a power supply destination.

To achieve the above object, a power supply device according to claim 1 includes a rectifier circuit that full-wave rectifies AC power input from an AC power supply, and a plurality of branch wirings that branch the output of the rectifier circuit into a plurality of branches. A plurality of inductors provided in each of the plurality of branch wirings; a DC voltage generation circuit that generates a DC voltage by integrating output currents of the plurality of inductors; and a plurality of inductors provided corresponding to the plurality of inductors, respectively. A plurality of switching elements for intermittently passing the current flowing through the plurality of inductors so that an average current of the AC power input from the AC power source is sinusoidal, and power consumption by a load is determined by a predetermined power If so, at least a portion of the plurality of respective current flows in the period of the inductor to control the plurality of switching elements so as to overlap, the power consumption before If it is the predetermined power less, and a and a control means for controlling the plurality of switching elements so that each time the current flows in the plurality of inductors do not overlap, and continuous.

The invention according to claim 2 is the invention according to claim 1, wherein the control means replaces the control when the power consumption is equal to or lower than the predetermined power, and the power consumption is When the current is less than or equal to the predetermined power and greater than the predetermined second power as a value smaller than the predetermined power, the periods in which current flows through each of the plurality of inductors do not overlap and are continuous. controlling the plurality of switching elements so that, if the power consumption is less than before Symbol second power, do not overlap each period in which a current flows to the plurality of inductors, and said plurality of such continuous It controls the switching element, controlled to disconnect all of the plurality of switching elements for a predetermined period including the timing of the zero crossing of the AC power Is shall.

  Further, the invention described in claim 3 is the invention described in claim 1 or 2, wherein two sets of the branch wiring, the inductor, and the switching element are provided.

  On the other hand, in order to achieve the above object, an image forming apparatus according to a fourth aspect includes a power supply device according to any one of the first to third aspects and a DC voltage generated by the power supply device. Forming means for forming an image based on the image information on a recording medium.

  Furthermore, in order to achieve the above object, a program according to claim 5 is for causing a computer to function as control means in the power supply device according to any one of claims 1 to 3. .

  According to the first, fourth, and fifth aspects of the invention, it is possible to obtain an effect that it is possible to suppress a decrease in power supply efficiency accompanying a decrease in power consumption at a power supply destination.

  In addition, according to the invention described in claim 2, compared to the case where the present invention is not applied, the effect that the reduction in power supply efficiency accompanying the reduction in power consumption at the power supply destination can be further suppressed. can get.

  Furthermore, according to the third aspect of the present invention, compared to a case where three or more sets of the branch wiring, the inductor, and the switching element are provided, the power supply destination can be reduced in cost and space. The effect that the reduction in power supply efficiency accompanying the reduction in power consumption can be suppressed is obtained.

1 is a front view of an image forming apparatus according to an embodiment. 1 is a schematic cutaway side view showing a configuration of main parts inside an image forming apparatus according to an embodiment. 1 is a block diagram illustrating a configuration of a main part of an electric system of an image forming apparatus according to an embodiment. 1 is a circuit diagram (partial block diagram) illustrating a configuration of a power supply circuit according to a first embodiment; It is a wave form diagram with which it uses for description of the interleave operation | movement which concerns on embodiment. It is a flowchart which shows the flow of a process of the power supply control processing program which concerns on 1st Embodiment. It is a wave form diagram with which it uses for description of normal operation time control and power saving operation time control concerning an embodiment. It is a circuit diagram (partial block diagram) showing a configuration of a power supply circuit according to a second embodiment. It is a flowchart which shows the flow of a process of the power supply control processing program which concerns on 2nd Embodiment. It is a wave form diagram with which it uses for description of the sleep operation time control which concerns on 2nd Embodiment.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

[First Embodiment]
FIG. 1 shows a front view of an image forming apparatus 10 according to the present embodiment.

  As shown in FIG. 1, the image forming apparatus 10 reads an image from a document placed at a predetermined image reading position, acquires image data indicating the image, and an image acquired by the scanner 11. An apparatus main body 12 that performs image forming processing using various image data such as data and image data acquired from an external apparatus, and a paper feeding apparatus that supplies paper 31 (see also FIG. 2) as a recording medium to the apparatus main body 12. 13, a touch panel display (hereinafter referred to as “display”) 14 that displays various information such as operation menus and messages, and has a transparent touch panel integrally provided on the display surface, and an apparatus in which an image is formed And a discharge tray 39 for holding the paper 31 discharged from the main body 12.

  Next, the internal configuration of the apparatus main body 12 will be described with reference to FIG.

  As shown in the figure, the apparatus main body 12 according to the present embodiment includes an image forming engine unit 15 that performs an image forming process on a sheet 31 by an electrophotographic method.

  The image forming engine unit 15 according to the present embodiment is of a full color type and includes four image forming units 20Y, 20M, 20C, and 20K. These image forming units 20Y, 20M, 20C, and 20K are arranged at predetermined intervals along the longitudinal direction of the intermediate transfer belt 18. The intermediate transfer body belt 18 is stretched around a plurality of rollers, and has an endless belt shape that is conveyed in the direction of arrow E in FIG. 2 at a predetermined speed.

  The image forming unit 20Y corresponds to yellow (Y), the image forming unit 20M corresponds to magenta (M), the image forming unit 20C corresponds to cyan (C), and the image forming unit 20K corresponds to black (K). An image of each corresponding color is formed. In FIG. 2, an alphabet (Y / M / C / K) indicating a color corresponding to the end of the code is given, but in the following, this alphabet at the end of the code is omitted unless the color is particularly distinguished. I will explain.

  The image forming unit 20 is provided with a cylindrical photosensitive drum 22 that is rotationally driven at a predetermined rotational speed in the direction of arrow F in FIG. Further, a charger 24 for uniformly charging the surface of the photosensitive drum 22 is disposed around each photosensitive drum 22. Charging of the photosensitive drum 22 by the charger 24 is the first stage of a series of image forming processes. Further, a light beam based on a desired image is irradiated in the axial direction of the photosensitive drum 22 uniformly charged by the charger 24 on the downstream side of the charger 24 along the rotation direction of each photosensitive drum 22. A ROS (Raster Output Scanner) 26 for forming an electrostatic latent image is disposed on the photosensitive drum 22.

  Further, around each photosensitive drum 22, the colors (yellow / yellow) each of which has an electrostatic latent image formed on the photosensitive drum 22 on the downstream side of the ROS 26 along the rotation direction of the photosensitive drum 22. A developing device 28 is provided for developing with toner of any one of magenta / cyan / black) to form a toner image. A contact point with the intermediate transfer belt 18 is located downstream of the developing device 28, and a first transfer device 29 is disposed so as to sandwich the intermediate transfer belt 18 with the photosensitive drum 22. Yes. The first transfer device 29 applies a predetermined voltage to transfer the toner image on the photosensitive drum 22 to the intermediate transfer belt 18.

  The toner images of different colors formed on the respective photosensitive drums 22 are respectively transferred to the intermediate transfer belt 18 so as to overlap (in the same area) on the belt surface of the intermediate transfer belt 18. As a result, a full-color toner image is formed on the intermediate transfer belt 18. In this embodiment, the toner image in which the four color toner images are transferred in a superimposed manner is referred to as a “final toner image”.

  A second transfer unit 34 including a pair of rollers is disposed on the downstream side of the transfer direction (the direction of arrow E in FIG. 2) from the toner image transfer position of the intermediate transfer belt 18 from the photosensitive drum 22. . Between the rollers in the second transfer unit 34, the paper 31 taken out from the paper feed tray of the paper feeding device 13 by the pickup roll and transported by the plurality of transport rollers is sandwiched. The final toner image is transferred from the intermediate transfer belt 18 to the paper 31 by this nipping and conveying.

  The paper 31 on which the final toner image has been transferred is conveyed to the nip portion between the rollers of the fixing device 36 composed of a pressure roller and a heating roller arranged opposite to each other and subjected to heat fixing. As a result, the final toner image is fixed on the paper 31 and a desired image (color image) is formed on the paper 31. The sheet 31 on which the image is formed is discharged to a discharge tray 39 by a pair of discharge rollers 38 disposed on the downstream side of the fixing device 36 in the sheet conveyance direction.

  Next, with reference to FIG. 3, the main configuration of the electrical system of the image forming apparatus 10 will be described.

  The image forming apparatus 10 has a CPU (Central Processing Unit) 40 that controls the operation of the entire apparatus, a RAM (Random Access Memory) 41 used as a work area when executing various programs, various programs, various parameters, and the like in advance. A stored ROM (Read Only Memory) 42, a flash memory 43 for storing various types of information, a display driver 44 for performing control for displaying various types of information on the display 14, and an operation for detecting a touch operation on the display 14 An input detection unit 46.

  Further, the image forming apparatus 10 includes a scanner driver 50 that controls an optical image reading operation by the scanner 11, an image forming engine control unit 54 that controls each part of the image forming engine unit 15, and a sheet that is fed by the paper feeding device 13. A sheet feeding device control unit 56 that controls the conveyance operation of the power supply 31, a power supply circuit 60 that supplies power of a corresponding voltage to each unit that is operated by power, a power supply control unit 58 that controls the operation of the power supply circuit 60, It has.

  The CPU 40, RAM 41, ROM 42, flash memory 43, display driver 44, operation input detection unit 46, scanner driver 50, image forming engine control unit 54, paper feed device control unit 56, and power supply control unit 58 are connected via the system bus BUS. Are connected to each other. Therefore, the CPU 40 accesses the RAM 41, the ROM 42, and the flash memory 43, displays various information on the display 14 via the display driver 44, controls the operation of the scanner 11 via the scanner driver 50, and the image forming engine. Control of the operation of each part of the image forming engine unit 15 via the control unit 54, control of the conveying operation of the paper 31 stored in each paper feed tray of the paper feed device 13 via the paper feed device control unit 56, Control of power supply from the power supply circuit 60 to each unit via the power control unit 58 can be performed. Further, the CPU 40 can grasp each of the operation instruction by the user's touch operation on the display 14 and the size of the document read by the scanner 11 via the scanner driver 50.

  By the way, in the image forming apparatus 10 according to the present embodiment, the load supplied with power by the power supply circuit 60 is not accompanied by a mechanical operation, and mainly includes a control system load that controls the operation of other parts, and a machine It is roughly classified into two types, that is, a drive system load that operates automatically. For example, the image forming engine control unit 54, the paper feeding device control unit 56, and the like correspond to control system loads, and the motors that rotationally drive various rollers that transport the paper 31 correspond to drive system loads. In the image forming apparatus 10 according to the present embodiment, power of different voltages is generated for each type by the power supply circuit 60 and is individually supplied to each of the control system load and the drive system load.

  In addition, the image forming apparatus 10 according to the present embodiment is provided with a plurality of power saving operation modes that reduce the power supplied from the power supply circuit 60 and consumed in the normal operation according to the degree of power reduction. In the image forming apparatus 10 according to the present embodiment, two types of operation modes, a standby mode and a sleep mode, are prepared as the power saving operation mode.

  Here, in the standby mode, the power supply to the drive system load is stopped, the display on the display 14 is stopped, and the temperature of the heating roller in the fixing unit 36 is changed with respect to the run mode which is an operation mode in normal operation. This is an operation mode in which the temperature is lowered to a predetermined temperature lower than that in the mode, and the sleep mode is for monitoring the placement of the document on the image reading position of the scanner 11 and the operation of the display 14 by the user. In this operation mode, only monitoring such as reception of image data (so-called print job) indicating an image to be formed from an external device is performed. Therefore, the standby mode is an operation mode in which power consumption is lower than that in the run mode, and the sleep mode is an operation mode in which power consumption is lower than that in the standby mode.

  Next, the configuration of the power supply circuit 60 according to the present embodiment will be described with reference to FIG.

  As shown in the figure, the power supply circuit 60 according to the present embodiment includes a rectifier circuit DB that performs full-wave rectification of an AC voltage (for example, an AC voltage of 100 V) supplied from the commercial power supply P, and a rectifier circuit DB. An interleaved power factor correction circuit 60A that is connected to the output terminal and smoothes and outputs a DC voltage while reducing harmonics of the input current supplied from the commercial power supply P.

  Here, at the output terminal of the power factor correction circuit 60A, the DC voltage input from the power factor correction circuit 60A is converted into a DC voltage (5V in the present embodiment) corresponding to the control system load described above, and The DC / DC converter 60B output to the control system load and the direct current voltage input from the power factor correction circuit 60A are converted into the direct current voltage (24 V in the present embodiment) corresponding to the drive system load described above, and the drive is performed. A DC / DC converter 60C that outputs to the system load is connected.

  The power factor correction circuit 60A according to the present embodiment includes two inductors, an inductor L1 and an inductor L2, for each branch wiring that branches the positive output terminal of the rectifier circuit DB into two. That is, one terminal of each of the inductor L1 and the inductor L2 is connected to the plus side output terminal of the rectifier circuit DB.

  The other terminal of the inductor L1 is connected to the anode of the diode D1 and to the drain of an N-channel MOS transistor (hereinafter referred to as “transistor”) Q1. In contrast, the other terminal of the inductor L2 is connected to the anode of the diode D2 and to the drain of an N-channel MOS transistor (hereinafter referred to as “transistor”) Q2.

  On the other hand, the sources of the transistors Q1 and Q2 are connected to the negative output terminal of the rectifier circuit DB, the gate of the transistor Q1 is connected to the power supply control unit 58 via the switch S1, and the gate of the transistor Q2 is connected to the switch It is connected to the power supply controller 58 via S2.

  The cathodes of the diodes D1 and D2 are connected to the DC / DC converter 60B and the DC / DC converter 60C. Further, a series circuit of an electrolytic capacitor (hereinafter referred to as “capacitor”) C1, a resistor R2, and a resistor R3 is provided between the cathodes of the diodes D1 and D2 and the negative output terminal of the rectifier circuit DB. Are connected in parallel. The connection point between the resistors R2 and R3 is branched and connected to the power supply control unit 58.

  The power supply control unit 58 according to the present embodiment compares the divided voltage at the connection point of the resistor R2 and the resistor R3 with the triangular wave generated inside the power supply control unit 58, and each gate of the transistor Q1 and the transistor Q2 The voltage applied to is individually controlled.

  In the power factor correction circuit 60A according to the present embodiment, energy is stored in the inductor L1 when the transistor Q1 is in the on state, and the stored energy is output to the output current when the transistor Q1 is in the off state. Is supplied to the capacitor C1 via the diode D1, while energy is stored in the inductor L2 when the transistor Q2 is in the on state, and the stored energy is output to the output current when the transistor Q2 is in the off state. Is supplied to the capacitor C1 through the diode D2. In this way, a DC voltage is generated at the output terminal of the power factor correction circuit 60A by supplying the output current from the inductors L1 and L2 to the capacitor C1. Further, the DC voltage generated at the output terminal of the power factor correction circuit 60A is boosted by adjusting the ON / OFF duty ratio of each of the transistors Q1 and Q2.

  As described above, in the power factor correction circuit 60A according to the present embodiment, two paths, that is, a current path that flows through the inductor L1 and a current path that flows through the inductor L2, are formed. Therefore, each of these two current paths flows. Since the magnitudes of the currents I1 and I2 are reduced, transistors having a small rated current are used as the transistors Q1 and Q2.

  Further, the power supply control unit 58 performs a so-called interleave operation in which the voltages applied to the gates of the transistors Q1 and Q2 are controlled to shift the switching phases of the transistors Q1 and Q2. The switching when the transistors Q1 and Q2 are interleaved is based on the zero cross point at which the input voltage value of the power supplied from the commercial power supply P to the rectifier circuit DB is inverted from positive to negative and from negative to positive. Do.

  Thereby, the switching timing of the transistors Q1 and Q2 is synchronized with the zero cross point of the input voltage from the commercial power source P. As a result, the waveform of the input current I3 from the commercial power supply P to the rectifier circuit DB is adjusted together with the phase of the input power from the commercial power supply P to the rectifier circuit DB, and as shown in FIG. As a result, the harmonic noise generated in the power supply circuit 60 is reduced, and the power supply efficiency is improved as compared with the case where the interleave operation is not performed.

By the way, the power supply control unit 58 according to the present embodiment has a period during which the current I1 and the current I2 flow as shown in FIG. 5 as an example during normal image formation (when in the run mode). The transistors Q1 and Q2 are controlled (hereinafter referred to as “normal operation control”) so that at least a part (in the example shown in FIG. 5, the whole period during which the current I1 and the current I2 flow ) overlap.

  However, in such an interleave operation, the operation mode set in the image forming apparatus 10 is the standby mode or sleep mode in which the drive system load does not operate and can be operated only by the power generated by the DC / DC converter 60B. Even in the mode, since both the inductor L1 and the inductor L2 in the power factor correction circuit 60A are energized, the power supply efficiency is not necessarily high when these power saving operation modes are set.

Therefore, in the power supply control unit 58 according to the present embodiment, when the set operation mode is the power saving operation mode, the current I1 and the current I2 flow periods do not overlap and are continuous. The transistors Q1 and Q2 are controlled (hereinafter referred to as “power saving operation control”).

  Next, with reference to FIG. 6, the operation of the power control unit 58 particularly related to the present invention will be described as the operation of the image forming apparatus 10 according to the present embodiment. FIG. 6 is a flowchart showing the flow of processing of the power supply control processing program executed by the power supply control unit 58, and the program is stored in the ROM 42 in advance.

  In step 100 in the figure, the operation mode set in the image forming apparatus 10 is acquired from the CPU 40, and in the next step 102, the acquired operation mode is a power saving operation mode (standby mode or sleep mode). When it is determined whether or not there is a negative determination, the routine proceeds to step 104, and after the execution of the normal operation control described above is started, the routine proceeds to step.

  On the other hand, if the determination in step 102 is affirmative, the process proceeds to step 106, and after the execution of the power saving operation control described above is started, the process proceeds to step 108.

  In step 108, the operation mode set at this point is acquired from the CPU 40, and in the next step 110, it is determined whether or not the acquired operation mode is changed from the previous operation mode. If YES, the process returns to step 102. If NO, the process proceeds to step 112.

  In step 112, it is determined whether or not a predetermined timing has arrived as a timing for ending the control of the power supply circuit 60. If a negative determination is made, the process returns to step 108, but at a time when an affirmative determination is made. Control goes to step 114. In the image forming apparatus 10 according to the present embodiment, the timing at which a main switch (not shown) of the image forming apparatus 10 is turned off is applied as the predetermined timing. However, the present invention is not limited to this. In addition to this timing, other timing such as the timing when the image forming operation is stopped due to some abnormality such as paper jam, the timing when the user inputs an instruction to forcibly stop execution of the image forming process, etc. Single or multiple combinations may be applied.

  In step 114, the normal operation time control started by the processing of step 104 or the power saving operation time control started by the processing of step 106 is stopped, and then the power supply control processing program is terminated.

  FIG. 7A shows an example of the transition of the currents I1 to I3 during the execution of the normal operation time control that is started by the process of step 104 of the power supply control process program. ) Shows an example of the transition of the currents I1 to I3 at the time of execution of the power saving operation time control that is started by the processing of step 106 of the power supply control processing program.

As shown in FIG. 7 (A), if the normal operation control is executed, the transistors Q1 to overlap the whole of the period of flow of the currents I1 and current I2, Q2 is that are controlled. At this time, as a result of adjusting the waveform of the input current I3 from the commercial power supply P to the rectifier circuit DB and reducing the ripple component ΔI of the input current I3, the power supply efficiency is higher than that in the case where the interleave operation is not performed. The improvement is as described above.

On the other hand, as shown in FIG. 7B, when the power saving operation time control is being executed, the transistors Q1 and Q1 are arranged so that the periods in which the currents I1 and I2 flow do not overlap and are continuous. , Q2 is that are controlled.

Thus, when the power saving operation control is executed, since the current I1 and current I2 are no periods simultaneously flowing, when the current I1 and current I2 is running normal operation control simultaneously flowing In comparison, the power loss in the power factor correction circuit 60A is reduced. As a result, the power supply efficiency is improved as compared with the case where the normal operation control is executed.

  In addition, when the power saving operation time control is being performed, the transistors that are turned on are distributed to the two transistors Q1 and Q2, and as a result, the temperature rise by the transistors is suppressed. When the fan is provided, the driving period of the fan is shortened or the life of the fan is extended.

  In this case, the power supplied from the power factor correction circuit 60A to the DC / DC converter 60B is the power of the current supplied alternately from the inductor L1 and the inductor L2 to the capacitor C1, but the power is supplied to the control system load. Since the power load of the DC / DC converter 60B to be supplied is small, the power by the alternately supplied current can be sufficiently covered.

As described above in detail, in this embodiment, a rectifier circuit (here, rectifier circuit DB) that rectifies AC power input from an AC power supply, and a plurality of branches that divide the output of the rectifier circuit into a plurality. DC wiring that generates a DC voltage by integrating the output current of each of the plurality of branch wirings, a plurality of inductors (here, inductors L1 and L2) provided in each of the plurality of branch wirings, and each of the plurality of inductors A plurality of circuits (here, DC / DC converters 60B and 60C) and the plurality of inductors are provided corresponding to the plurality of inductors, respectively, so that an average current of AC power input from the AC power supply is sinusoidal. And a plurality of switching elements (here, transistors Q1 and Q2) for intermittently passing the current flowing through the inductor, and the power consumption by the load is predetermined power ( Kodewa, power consumption) is greater than when it is the standby mode, the current (in this case to each of the plurality of inductors, the current I1, I2) of at least a portion of the flowing period (in this case, all) of overlap When the plurality of switching elements are controlled and the power consumption is less than or equal to the predetermined power, the plurality of inductors are arranged such that periods of current flowing through each of the plurality of inductors do not overlap and are continuous. The switching element is controlled.

  In the present embodiment, two sets of the branch wiring, the inductor, and the switching element are provided.

[Second Embodiment]
In the first embodiment described above, an example in which the control of the power supply circuit is switched in two steps according to the magnitude of power consumption by the load has been described. However, in the second embodiment, the control of the power supply circuit is described. A description will be given of an example of a case in which switching is performed in three stages according to the power consumption by the load.

  The configuration of the image forming apparatus 10 according to the second embodiment is the same as that of the image forming apparatus 10 (FIGS. 1 to 3) according to the first embodiment except for the power supply circuit. With reference to FIG. 8, the configuration of the power supply circuit 60 ′ according to the second embodiment will be described. The same components as those in FIG. 4 in FIG. 8 are denoted by the same reference numerals as those in FIG.

  As shown in the figure, the power supply circuit 60 ′ according to the second embodiment detects the output voltage value of the rectifier circuit DB as compared with the power supply circuit 60 according to the first embodiment. The only difference is that the voltage detector 62 is provided.

By the way, in the power saving operation time control provided in the image forming apparatus 10 according to the first embodiment, the transistors Q1, Q2 are arranged so that the periods in which the currents I1 and I2 flow do not overlap and are continuous. because but controlled, the drive loss due to either transistor is to occur. Therefore, in the case of alternating current in which the input current changes with time, the instantaneous drive loss also changes. As a result, the period near the zero cross where the input voltage is small is a period in which the power supply efficiency is extremely poor.

  Therefore, in the image forming apparatus 10 according to the second embodiment, when the standby mode is set by changing the control method of the power supply circuit 60 between the standby mode and the sleep mode, which are power saving operation modes. The above-mentioned control during power saving operation (hereinafter referred to as “control during standby operation”) is executed, while when the sleep mode is set, in addition to the power saving operation control, For a predetermined period including the timing, control for stopping the switching operation of the transistor Q1 and the transistor Q2 (hereinafter referred to as “sleep operation control”) is executed. The zero cross timing is obtained by referring to the voltage value detected by the voltage detector 62.

  Next, with reference to FIG. 9, the operation of the power control unit 58 particularly related to the present invention will be described as the operation of the image forming apparatus 10 according to the second embodiment. FIG. 9 is a flowchart showing the flow of processing of the power control processing program executed by the power control unit 58 according to the second embodiment, and the program is stored in the ROM 42 in advance. Moreover, the same step number as FIG. 6 is attached | subjected to the process step which performs the process same as the flowchart shown in FIG. 6 in the flowchart shown in the figure, and the description is abbreviate | omitted.

  If an affirmative determination is made in step 102 in the figure, the process proceeds to step 105, and it is determined whether or not the acquired operation mode is a standby mode. If the determination is affirmative, the process proceeds to step 106A. After the execution of the standby operation control described above is started, the routine proceeds to step 108.

  On the other hand, if a negative determination is made in step 105, the process proceeds to step 106B, and after the execution of the sleep operation control described above is started, the process proceeds to step 108.

  FIG. 10 shows an example of the transition of the currents I1 and I2 during execution of the sleep operation time control that is started by the process of step 106B of the power supply control process program.

When the power supply control unit 58 performs control during sleep operation, the transistors Q1 and Q2 are controlled so that the periods during which the currents I1 and I2 flow do not overlap and are continuous, and the input voltage During a predetermined period including the zero-cross timing (hereinafter referred to as “stop period”), the switching operations of the transistors Q1 and Q2 are stopped. As a result, as shown in FIG. 10, the periods during which the current I1 and the current I2 flow do not overlap and continue in the period excluding the stop period, while the currents I1 and I2 in the stop period are continuous. Both will not flow.

  Note that in the image forming apparatus 10 according to the present embodiment, the actual machine is preliminarily assumed that the sleep mode is executed even if the switching operation of the transistors Q1 and Q2 is stopped during the stop period. The period obtained by the experiment used is applied. However, the present invention is not limited to this. For example, instead of the experiment using the actual machine, the period obtained in advance by computer simulation based on the design specification of the actual machine is applied. Other forms such as a form and a form in which a period input in advance by the user is applied may be used.

  Thus, when the sleep operation time control is executed, both the transistor Q1 and the transistor Q2 are in the off state during the stop period, so that compared with the case where the standby operation control is executed. As a result of reducing the power loss in the power factor correction circuit 60A, the power supply efficiency is further improved as compared with the case where the standby operation control is executed.

  In this case, during the stop period, the power supplied from the power factor correction circuit 60A to the DC / DC converter 60B is accumulated in the capacitor C1 in a state where no current is supplied from either the inductor L1 or the inductor L2. However, since the power load of the DC / DC converter 60B that supplies power to the control system load is small when the sleep mode is set, only the power stored in the capacitor C1 is sufficient. I can pay.

As described above in detail, in this embodiment, a rectifier circuit (here, rectifier circuit DB) that rectifies AC power input from an AC power supply, and a plurality of branches that divide the output of the rectifier circuit into a plurality. DC wiring that generates a DC voltage by integrating the output current of each of the plurality of branch wirings, a plurality of inductors (here, inductors L1 and L2) provided in each of the plurality of branch wirings, and each of the plurality of inductors A plurality of circuits (here, DC / DC converters 60B and 60C) and the plurality of inductors are provided corresponding to the plurality of inductors, respectively, so that an average current of AC power input from the AC power supply is sinusoidal. And a plurality of switching elements (here, transistors Q1 and Q2) for intermittently passing the current flowing through the inductor, and the power consumption by the load is predetermined power ( Kodewa, power consumption) is greater than when it is the standby mode, the current (in this case to each of the plurality of inductors, the current I1, I2) of at least a portion of the flowing period (in this case, all) of overlap When the plurality of switching elements are controlled and the power consumption is less than or equal to the predetermined power, the plurality of inductors are arranged such that periods of current flowing through each of the plurality of inductors do not overlap and are continuous. The switching element is controlled.

  In the present embodiment, two sets of the branch wiring, the inductor, and the switching element are provided.

Furthermore, in the present embodiment, when the power consumption is equal to or lower than a second power that is predetermined as a value smaller than the predetermined power (here, power consumption in the sleep mode), The plurality of switching elements are controlled so that the periods in which current flows in each of the plurality of inductors do not overlap and are continuous, and the switching is performed for a predetermined period including a zero-cross timing of the AC voltage. Control is performed to cut all of the elements.

  As mentioned above, although this invention was demonstrated using the said embodiment, the technical scope of this invention is not limited to the range as described in the said embodiment. Various changes or improvements can be added to the above-described embodiment without departing from the gist of the invention, and embodiments to which the changes or improvements are added are also included in the technical scope of the present invention.

  The above embodiments do not limit the invention described in the claims, and all combinations of features described in the above embodiments are indispensable for the solution means of the invention. Not always. The above-described embodiments include inventions at various stages, and various inventions are extracted by combinations according to situations in a plurality of disclosed constituent requirements. Even if some constituent features are deleted from all the constituent features shown in the above embodiment, the configuration from which these constituent features are deleted is extracted as an invention as long as the effect is obtained.

For example, in each of the embodiments described above, the power supply device having two sets of the branch wiring, the inductor, and the switching element according to the present invention has been described. However, the present invention is not limited to this, Alternatively, a power supply device in which three or more elements are provided may be applied. In this case, when performing the power saving operation time control, the plurality of switching elements are arranged in a predetermined order so that the periods in which current flows through each of the plurality of inductors do not overlap and are continuous. Each switching element is controlled.

  Further, in each of the above embodiments, the case where the field effect transistor is applied as the switching element of the present invention has been described. However, the present invention is not limited to this, and other transistors such as bipolar transistors can be used. It is good also as a form to apply.

  In each of the above embodiments, the case where two types of operation modes of the standby mode and the sleep mode are applied as the power saving operation mode has been described. However, the present invention is not limited to this, for example, It is good also as a form which applies only any one of these, or the form which applies one or more types of power saving operation modes in addition to these.

Further, in each of the above embodiments, the case where the transistors Q1 and Q2 are controlled so that all the periods during which the current I1 and the current I2 flow is overlapped when the normal operation control is executed has been described. For example, the transistors Q1 and Q2 may be controlled so that parts of the periods in which the current I1 and the current I2 flow overlap each other.

  Further, in the above-described embodiment, the case where the image forming apparatus of the present invention is applied to an image forming apparatus that forms an image by an electrophotographic method has been described, but the present invention is not limited to this, for example, The image forming apparatus of the present invention may be applied to other image forming apparatuses such as a droplet discharge apparatus (so-called inkjet printer).

  In each of the above embodiments, the case where the power supply device of the present invention is applied to an image forming apparatus has been described. However, the present invention is not limited to this, and for example, a personal computer, a mobile phone, etc. The power supply device of the present invention may be applied to another electronic device provided with a plurality of levels of power consumption levels.

  In each of the above-described embodiments, the case where various programs are stored in advance in the ROM 42 has been described. However, the present invention is not limited to this, and these programs are stored in a CD-ROM, a DVD-ROM, or a USB. A form provided in a state of being stored in a computer-readable recording medium such as a memory may be applied, or a form distributed via wired or wireless communication means may be applied.

  Further, in each of the above embodiments, the case where the control for the power supply circuit is switched according to the operation mode has been described, but the present invention is not limited to this, and according to the power actually consumed in the power load. It is good also as a form which switches control. In this case, load current detection means for detecting the current of the power load is newly provided, and the power supply control unit 58 switches the control for the power supply circuit based on the load current detected by the load current detection means.

  In addition, the configuration of the image forming apparatus described in each of the above embodiments (see FIGS. 1 to 3) is merely an example, and unnecessary portions may be deleted or new ones may be used without departing from the gist of the present invention. A part may be added or the arrangement position of each part may be changed.

  The configuration of the power supply circuit (see FIGS. 4 and 8) described in each of the above embodiments is merely an example, and unnecessary parts can be deleted or new parts can be used without departing from the gist of the present invention. May be added, or the arrangement position of each part may be changed.

  Furthermore, the processing flow of the power supply control processing program described in the above embodiments (see FIGS. 6 and 9) is also an example, and unnecessary steps can be deleted without departing from the gist of the present invention. A new step may be added or the processing order may be changed.

DESCRIPTION OF SYMBOLS 10 Image forming apparatus 15 Image formation engine part (formation means)
31 paper (recording medium)
40 CPU
42 ROM
58 Power control unit (control means)
60, 60 'power supply circuit 60B, 60C DC / DC converter (DC voltage generation circuit)
DB Rectifier circuit L1, L2 Inductor P AC power supply Q1, Q2 Transistor (switching element)

Claims (5)

A rectifier circuit for full-wave rectification of AC power input from an AC power supply;
A plurality of branch wirings for branching the output of the rectifier circuit into a plurality;
A plurality of inductors provided in each of the plurality of branch wires;
A DC voltage generating circuit for generating a DC voltage by integrating output currents of the plurality of inductors;
A plurality of switching elements provided corresponding to each of the plurality of inductors, and intermittently flowing a current flowing through the plurality of inductors so that an average current of the AC power input from the AC power source is sinusoidal;
When the power consumption by the load is larger than a predetermined power, the plurality of switching elements are controlled so that at least a part of a period during which a current flows through each of the plurality of inductors, and the power consumption is determined in advance. Control means for controlling the plurality of switching elements so that the current flows in each of the plurality of inductors does not overlap and is continuous when the power is less than or equal to
Power supply unit with In place of the control in the case where the power consumption is equal to or less than the predetermined power , the control means preliminarily sets the power consumption to be equal to or smaller than the predetermined power and smaller than the predetermined power. If defined greater than the second power, do not overlap each period in which a current flows to the plurality of inductors, and controls said plurality of switching elements to be continuous, the power consumption before Symbol second When the power is less than or equal to the power, the plurality of inductors are controlled so that the current flowing periods do not overlap each other and are continuously controlled , and the AC power zero cross timing is determined in advance. The power supply apparatus according to claim 1, wherein the period is controlled so that all of the plurality of switching elements are disconnected. The power supply device according to claim 1, wherein two sets of the branch wiring, the inductor, and the switching element are provided. The power supply device according to any one of claims 1 to 3,
Forming means for forming an image based on image information on a recording medium by a DC voltage generated by the power supply device;
An image forming apparatus.   The program for functioning a computer as a control means in the power supply device of any one of Claims 1-3.

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