JP5492844B2 - Interface connection method and computer - Google Patents

Description

  The present invention relates to a technique for establishing a configuration of a predetermined one interface when a peripheral device having two types of interfaces is connected by a connector, and more specifically, canceling the configuration of the other interface established previously. The present invention relates to a technique for automatically establishing the configuration of one interface.

  USB (Universal Serial Bus) is an interface standard for connecting a peripheral device such as a keyboard, mouse, printer, or hard disk drive (HDD) to a computer. As for the USB standard, USB 1.0 was announced in January 1996, USB 2.0 was announced in April 2000, and USB 3.0 was announced in November 2008. Major changes of the USB 3.0 standard to the USB 2.0 standard include an increase in transfer speed and an enhancement of power supply capability.

  The USB 3.0 standard has backward compatibility with the USB 2.0 standard, and the USB 3.0 host has not only a USB device conforming to the USB 3.0 standard (hereinafter referred to as a USB 3.0 device), but also a USB2. A USB device conforming to the 0 standard (hereinafter referred to as a USB 2.0 device) can also be connected. In the present specification, the term “USB device” refers to both a hub and a peripheral device.

  In the USB 3.0 standard, in order to realize backward compatibility, the physical layer of the USB host and the USB device processes USB 3.0 standard communication in addition to the 2.0 physical layer that processes USB 2.0 standard communication. A so-called dual bus architecture with an added 3.0 physical layer was adopted. In this respect, USB 3.0 does not replace the function of the USB 2.0 device with the function of USB 3.0, but can be said to complement the function of USB 2.0.

  Plugs are attached to both ends of the USB cable connecting the USB device. Generally, an A plug connected to the host side (upstream) is attached to one end of the USB cable, and a B plug connected to the peripheral device side (downstream) is attached to the other end. The shape of the plug is determined by the USB standard, the A plug is connected to the downstream port of the USB hub or the A receptacle provided in the USB host, and the B plug is the B receptacle provided at the upstream port of the USB device. Connected to.

  The 3.0 cable that conforms to the USB 3.0 standard conforms not only to the USB host conforming to the USB 3.0 standard (hereinafter referred to as 3.0 host) and 3.0 devices, but also to the USB 2.0 standard. It is also possible to connect to a USB host (hereinafter referred to as a 2.0 host) and a 2.0 device. Table 1 shows whether or not the physical connection between the plug and the receptacle conforming to the two USB standards is possible, and the normal operating state of the USB system at that time.

  According to Table 1, the B plug of the 3.0 cable cannot be connected to the B receptacle of the 2.0 device, but can be connected in other combinations. However, in order to operate with the USB 3.0 standard, the USB host, the USB cable, and the USB device must all conform to the USB 3.0 standard. When either the USB cable or the USB device complies with USB 2.0, it operates in accordance with the USB 2.0 standard in communication speed and power supply.

  Patent Document 1 discloses an invention in which communication is resumed without connecting / disconnecting a connector when a communication error due to electrostatic noise occurs in a device corresponding to the USB communication standard. In the present invention, when the microcomputer of the device detects a communication error, communication is automatically restarted by turning on the circuit that pulls up the D + line or D- line and then turning it on. Patent Document 2 discloses an invention for recovering recognition of a USB device without inserting or removing a USB connector. In the present invention, when the polling signal transmitted from the host device is not received for a predetermined time in the USB device, the pull-up potential of the D + line or D− line is changed.

JP 2001-306413 A JP 2008-152533 A

  When connecting a 3.0 device to a 3.0 host, the user expects the system to operate at high speed according to the USB 3.0 standard. FIG. 8 is a diagram schematically showing a 3.0 connector used for the USB 3.0 standard A terminal. The 3.0 connector includes a 3.0 plug 301 and a 3.0 receptacle 321. 8A is a view of the 3.0 plug 301 as viewed from the opening direction, FIG. 8B is a plan view showing the pin arrangement of the 3.0 plug 301, and FIG. 8C is a 3.0 receptacle. It is a top view which shows 321 pin arrangement | positioning.

  The 3.0 plug 301 has two pins (hereinafter referred to as 2.0 pins) 303 used for USB 2.0 standard communication and two power pins 307 arranged in one layer for communication of USB 3.0 standard. A two-tier contact system is employed in which the five pins (SS pins or 3.0 pins) 305 to be used are arranged on the other layers. Two 2.0 pins 303 and two power pins 307 are arranged on the opening side of the 3.0 plug 301, and five 3.0 pins 305 are arranged on the back side.

  Five 3.0 pins 325 are arranged on the opening side of the 3.0 receptacle 321, and two 2.0 pins 323 and two power pins 327 are arranged on the back side. When the 3.0 plug 301 is inserted into the 3.0 receptacle 321 halfway, the 2.0 pins 303 and 323 are connected after the power supply pin 307. The 3.0 pins 305 and 325 are connected while maintaining the connection.

  The 3.0 connector employs a structure in which 3.0 pins are added to the 2.0 connector, and an extra force is required compared to the 2.0 connector for complete insertion. Then, it may take a lot of time from the start of insertion of the 3.0 plug 301 to the completion of connection. This occurs when the user slowly inserts the plug from the beginning to the end, or when the 2.0 pins 303 and 323 can be smoothly connected but the connection of the 3.0 pins 305 and 325 is troublesome. At this time, only the 2.0 pins 303 and 323 are connected and the 3.0 pins 305 and 325 are not connected continues for a predetermined time or longer.

  In this case, the system recognizes the USB device as a 2.0 device. After that, even if the 3.0 plug 301 is completely inserted and the 3.0 pins 305 and 325 are connected, the system does not perform reconfiguration so that it is automatically recognized as a 3.0 device. The system simply notifies the user by displaying a prompt on the screen indicating that the current USB device is capable of operating with the USB 3.0 standard.

  This is because it takes a predetermined time for the system to acquire the USB device descriptor and recognize the 3.0 device as a 3.0 device. This is probably because it is necessary to stop the communication after reconfiguration. In addition, a 3.0 device is recognized as a 2.0 device not only when a state where only 2.0 pins have been connected for a predetermined time or more due to the connection method of the connector but also when a connector is connected. In some cases, it may be caused by electrical noise.

  To reconfigure a USB device once configured as a 2.0 device as a 3.0 device, when a user receives a notification from the system or when the user feels that the operating speed is slower than expected, 3 It is a burden for the user only to insert / remove the 0.0 plug. Therefore, even if the 3.0 device is once recognized as a 2.0 device, the operability of the USB device is improved if it can be automatically recognized as a 3.0 device when the 3.0 pin is finally connected. To do.

  SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide a method for establishing a configuration of one predetermined interface without connecting / disconnecting a connector when a device having two interfaces is connected to a computer with a connector. Further, an object of the present invention is to change the configuration of a predetermined one interface when the connection of the connector is completed even if the configuration of the other interface is established first when a device having two interfaces is connected to the computer by the connector. An object of the present invention is to provide a method for establishing without user intervention. It is a further object of the present invention to provide a method for ensuring the safety of a bus system having two interfaces. It is a further object of the present invention to provide a computer that implements such a method.

  The first device and the second device each have a first interface function and a second interface function. The connector accommodates a first pin used for communication by the first interface function and a second pin used for communication by the second interface function. When the connection operation by the connector is started with respect to the first device and the second device, the state in which the second pin is connected and the first pin is not connected due to the slow insertion speed is longer than a predetermined time. As time passes, the system establishes the configuration of the second interface function.

  Thereafter, when the connection of the connector proceeds, the connection of the first pin in the connector is detected. Then, in response to the connection of the first pin, the first device is reset to establish the configuration of the first interface function. When the connection of the first pin is detected, there are two cases when the configuration of the second interface function is established and when the configuration of either the second interface function or the first interface function is not established. One state is assumed.

  Furthermore, the present invention can also be applied to cases where the configuration of the first interface function may be established first. In any case, in the present invention, since the first device is reset by the connection of the first pin as a trigger, the first interface is always connected when the first pin is connected no matter how the connector is connected. Function configuration is established.

  When the first interface function realizes data transfer at a higher speed than the second interface function, high-speed data transfer can be performed when the complete connection of the connector is completed according to the present invention. The present invention is particularly effective when the connector is formed so that the second pin is connected before the first pin, because the frequency with which the system establishes the configuration of the second interface function first is increased. It is.

  When the connector is composed of a plug and a receptacle, the plug connected to the first device with a cable or directly attached can be connected to the receptacle attached to the second device. The location of the connector in this case corresponds to the USB standard A terminal, and the connection is made by the second device. Alternatively, a plug connected to the second device with a cable can be connected to a receptacle attached to the first device. The connector in this case corresponds to a USB standard B terminal, and the connection is made by the first device.

  The first interface function may be a first interface that conforms to the USB 3.0 standard, and the second interface function may be a second interface that conforms to the USB 2.0 standard. In this case, the connection of the first pin can be detected by the connection of the GND_DRAIN line. Since the GND_DRAIN line does not transmit a signal, it is suitable for detecting the connection of the first pin. The first device can be reset by turning on and off the Vbus line. The establishment of the configuration of the first interface can be executed only before a fixed time elapses from the establishment of the configuration of the second interface to the start of data transfer.

  As a result, when the system first recognizes the second interface and starts data transfer, the data is not lost due to the sudden disconnection of the second interface because the reset is not performed. The first device may be a peripheral device and the second device may be a bus controller or computer including a host controller and a root hub. Also, the first device can be a peripheral device and the second device can be a root hub or hub.

  According to the present invention, when a device having two interfaces is connected to a computer with a connector, it is possible to provide a method for establishing a configuration of one predetermined interface without connecting and disconnecting the connector. Further, according to the present invention, when a device having two interfaces is connected to a computer with a connector, even if the configuration of the other interface is established first, when the connection of the connector is completed, the configuration of the predetermined one interface is changed by the user. It was possible to provide a way to establish without intervention. Furthermore, according to the present invention, a method for ensuring the safety of a bus system having two interfaces can be provided. Furthermore, according to the present invention, a computer that realizes such a method could be provided.

It is a functional block diagram which shows the schematic structure of the computer 10 which can apply this invention. 1 is a diagram illustrating a topology of one USB system 100 configured with a computer 10 as a center. 3 is a functional block diagram showing an internal structure of a USB controller 33. FIG. 3 is a functional block diagram showing a known interface of a peripheral device 37. FIG. It is a state machine diagram of USB3.0 standard. 4 is a flowchart showing an enumeration sequence when a peripheral device 37 is connected to a USB controller 33. 2 is a diagram illustrating a current limiter employed in the USB system 100. FIG. It is a figure which shows typically the structure of A connector which conforms to USB3.0 standard.

  FIG. 1 is a functional block diagram showing a schematic configuration of a computer 10 to which the present invention can be applied. The CPU 11 includes a memory controller and a PCI Express controller, and is connected to the main memory 13, the video card 15, and the chip set 19. An LCD 17 is connected to the video card 15. The chip set 19 incorporates a controller such as SATA, USB, PCI Express, and LPC, an RTC (Real Time Clock), and the like. An HDD 21 is connected to the SATA controller.

  The USB controller 33 shown in FIG. 2 supports the USB 3.0 standard, and typically two receptacles 155a and 157a are connected. Both the receptacle 155a and the receptacle 157a have the same structure for accommodating 3.0 pins, 2.0 pins, and power supply pins. Further, an embedded controller (EC) 25 is connected to the chip set 19 through an LPC bus.

  The EC 25 is a micro controller that controls the temperature inside the housing of the computer 10, controls the power of the device, and controls the input / output device. The EC 25 operates independently of the CPU 11. A DC / DC converter 27 is connected to the EC 25, and a keyboard, a mouse, a charger, a battery pack, an exhaust fan, and the like (not shown) are further connected. The EC 25 can communicate with the chip set 19 and the CPU 11.

[USB system]
FIG. 2 is a diagram showing the topology of one USB system 100 configured with the computer 10 as the center. The USB system 100 employs a hierarchical star topology in which connections are branched by hubs 35 provided hierarchically on the downstream side with the USB controller 33 formed in the chip set 19 as a vertex.

  The USB controller 33 and the USB device that support the USB 3.0 standard include a physically independent 2.0 physical layer and a 3.0 physical layer. The system enumerates the peripheral devices 37 and 39 individually and recognizes them as a device conforming to one of the standards. Therefore, the peripheral devices 37 and 39 are recognized by either the 3.0 device or the 2.0 device. Normally, the peripheral devices 37 and 39 are scheduled to operate as 3.0 devices, and are configured to be recognized as 3.0 devices when the plug is normally connected. However, if the system cannot recognize the peripheral devices 37 and 39 as 3.0 devices, it recognizes them as 2.0 devices.

  The USB controller 33 has a host controller function and a root hub function. The USB controller 33 adopts a dual bus structure including a 2.0 physical layer 45 that performs USB 2.0 standard communication and a 3.0 physical layer 43 that performs USB 3.0 standard communication, and supports two standards. . The interface 41 converts a protocol used in the system of the computer 10 and the USB system, and processes bidirectional data flow and control flow.

  The 3.0 physical layer 43 processes electrical signals based on the USB 3.0 standard and detects the connection of 3.0 devices. The 2.0 physical layer 45 processes electrical signals based on the USB 2.0 standard and detects the connection of 2.0 devices. The Vbus controller 47 supplies the power supplied from the DC / DC converter 27 to the USB device by controlling the power switch 101 connected to Vbus.

  The receptacles 155a and 157a are all connected to the 3.0 physical layer 43, the 2.0 physical layer 45, and Vbus. When a peripheral device is connected to the receptacles 155a and 157a directly or via the hub 35, the system recognizes each as a USB conforming to one of the standards. For example, the system may recognize a peripheral device connected to the receptacle 155a as a 3.0 device and simultaneously recognize a peripheral device connected to the receptacle 157a as a 2.0 device.

  The peripheral devices 37 and 39 may be storage devices, printers, cameras, or other computers that can be connected to the computer 10. The peripheral devices 37 and 39 and the hub 35 all adopt a dual bus structure like the USB controller 33, and are connected to a downstream or upstream USB device or the USB controller 33 via USB cables 158, 160 and 164. The USB cables 158, 160, and 164 are a pair of UTP (Unshielded Twist Pair) cables, a power cable, a ground cable, and two pairs for performing USB 3.0 standard communication. SDP (Shielded Differential Pair) cable and GND_DRAIN cable.

  As shown in Table 1, a USB device that supports only USB 2.0 can be connected to the USB system 100 using a USB cable with a 2.0 plug attached. The USB cables 158, 160, and 164 include plugs 157b, 155b, and 163b on the A terminal side, and plugs 159a, 161a, and 165a on the B terminal side, respectively. The receptacle 157a is connected to the receptacle 159b of the peripheral device 37 via the USB cable 158, and the receptacle 155a is connected to the receptacle 161b disposed at the upstream port of the hub 35 via the USB cable 160. A receptacle 165 b of the peripheral device 39 is connected to the receptacle 163 a arranged at the downstream port of the hub 35 by a USB cable 164.

  Peripheral device 37 and hub 35 operate with only power received from a self-powered device or Vbus line that receives power from the USB cable through the Vbus line but receives the main power source from another power source such as an AC / DC adapter. Any of bus-powered devices may be used. The computer 10 can also be equipped with a plurality of USB systems 100.

  FIG. 3 is a functional block diagram showing the internal structure of the USB controller 33. The 3.0 physical layer 43 is connected to the four 3.0 pins 51 by the SS_TX line of the pair of transmission differential signal pairs and the SS_RX line of the pair of reception differential signal pairs, respectively.

  The GND_DRAIN line is pulled up with DC 5 V through a resistor and connected to the ground with a capacitor 103. Further, an EC 25 is connected to the GND_DRAIN line in order to monitor the potential. When the 3.0 pin of the plug 157b of the USB cable 158 to which the peripheral device 37 is connected is connected to the 3.0 pin 51 of the USB controller 33, the potential of the GND_DRAIN line decreases.

  In the 2.0 physical layer 45, a pair of transmission / reception differential signal pairs is connected to the 2.0 pin 49 via the D + line and the D− line, respectively. Each of the D + line and the D− line is always pulled down via a resistor. The Vbus controller 47 is connected to the EC 25. The EC 25 controls the power switch 101 according to an instruction from the Vbus controller 47. The power switch 101 is connected to the Vbus pin and controls power supply to the USB device. The Vbus line and the GND line supply power to the USB device regardless of whether the port is configured according to the USB 3.0 standard or the USB 2.0 standard.

  The EC 25 detects the edge when the potential of the GND_DRAIN line drops, turns the power switch 101 off for a predetermined time, and then turns it on again, thereby causing the USB device to perform a reset operation. FIGS. 3 and 7 show only two 2.0 pins 49, two power pins and five 3.0 pins 51 included in the receptacle 157a, but the nine pins of the receptacle 155a are also shown in FIG. The 3.0 physical layer 43, the 2.0 physical layer 45, and the Vbus controller 47 are connected in the same topology as in FIG. In addition, the power switch of the receptacle 155a is desirably provided exclusively for the power switch 101 of the receptacle 157a. That is, when there are a plurality of ports, it is desirable to insert the power switch 101 into the Vbus line for each port so that the USB device can be reset for each port.

  FIG. 4 is a functional block diagram showing a known interface of the peripheral device 37. The 2.0 physical layer 57 is connected to the 2.0 pin 53 included in the receptacle 159 b and the 3.0 physical layer 59 is connected to the 3.0 pin 55. Either the D + line or the D− line is pulled up to the power supply voltage Vcc through a resistor in order to determine the transfer speed. Peripheral device 37 asserts that USB controller 33 pulls up the D + line to support the full speed function, and pulls up D- line to support the low speed function. Can be expressed.

  In addition, when the peripheral device 37 does not pull up either the D + line or the D− line, it announces that it is disconnected from the host controller 33 or conceals its presence. When the peripheral device 37 cannot detect the termination connected to the SS_RX line of the 3.0 physical layer 43 included in the USB controller 33 for 12 milliseconds or more after receiving power from the Vbus line, it connects with the USB standard 2.0. Pull up either the D + line or the D− line. Termination is a passive element connected to the end of a signal line in order to suppress signal reflection and echo.

  FIGS. 1 to 4 simply describe the main hardware configuration and connection relationships necessary for explaining the present embodiment. In addition to those mentioned above, many devices or components are used to configure the USB system. However, they are well known to those skilled in the art and will not be described in detail here. A person skilled in the art also arbitrarily selects a plurality of blocks described in the figure as one integrated circuit or device, or conversely, a block is divided into a plurality of integrated circuits or devices. Is included in the scope of the present invention.

[State machine]
FIG. 5 is a state machine diagram of a USB 3.0 device. Attached is a state in which the USB interface on the upstream side of the USB device is connected, but power is not supplied from there. Powered is a state in which power is further supplied from Vbus, but the upstream side link training has not been completed. Default is a state in which the device is reset but a unique address is not assigned from the host, so that it can respond with the default address.

  Address is a state where a unique address is assigned but not configured. Configured is a state in which the computer can use the 3.0 interface when the configuration is further completed. USB 2.0 Device Status is a state in which USB 3.0 connection is stopped and USB 2.0 interface enumeration and connection are started.

  The transition from Powered to USB2.0 Device Status occurs when no termination is detected or link training fails. The transition from Default to USB2.0 Device Status occurs when the device port configuration fails. However, once the system transitions to USB 2.0 Device Status, the system does not stipulate that the 3.0 interface is actively configured, so even a USB device that supports the USB 3.0 standard will have the 2.0 interface first. After that, even if the 3.0 interface is connected, it will work with it unless it is reconfigured in some way.

[Enumeration]
FIG. 6 is a flowchart showing an enumeration sequence when the peripheral device 37 is connected to the USB controller 33. The enumeration is an operation in which the system of the computer 10 and the USB controller 33 cooperate to detect, identify and configure the USB device while exchanging information with the USB device. In the description of FIG. 6, the system of the computer 10 includes hardware such as the CPU 11 and the main memory 13 and software such as an OS and a device driver.

  The computer 10 is powered on in advance, and the USB controller 33 is ready to execute enumeration when a USB device is connected to the receptacles 157a and 155a. Further, it is assumed that the peripheral device 37 is connected to the USB cable 158 with a plug 159a and a receptacle 159b. The enumeration is performed independently for each of the 2.0 interface and the 3.0 interface, and the computer 10 and the peripheral device 37 recognize and communicate with one of the interfaces established by the enumeration.

  When the peripheral device 37 is newly connected to the receptacle 157a, the system determines whether the peripheral device 37 has 2.0 or less depending on the time until the plug 157b is completely inserted into the receptacle 157a and the occurrence of electrical noise. Recognize either interface or 3.0 interface. However, once the 2.0 interface configuration is established, the present invention automatically establishes the 3.0 interface configuration in a very short time as follows.

  First, an operation procedure when the system recognizes the peripheral device 37 as a 3.0 device when the plug 157b is inserted at a standard speed and securely connected is described. Since the peripheral device 37 which is a 3.0 device in the block 201 is configured to be recognized as a 3.0 device by default, it conceals that it has a 2.0 interface when connected. The peripheral device 37 does not pull up either the D + line or the D− line at this time when the power of the Vbus line that has been stopped is supplied.

  In block 203, the user begins to insert the plug 157b into the receptacle 157a. The Vbus and GND pins are longer than the D + and D− pins. At block 205, the Vbus pin and the GND pin are first connected among the nine pins. The EC 25 has the power switch 101 turned on, and in block 207, the Vbus controller 47 supplies power to the Vbus line of the peripheral device 37 through the EC 25. When the insertion further proceeds, the D + pin and the D− pin are connected before any 3.0 pin 51. However, since neither the D + line nor the D− line of the peripheral device 37 is pulled up, the 2.0 physical layer 45 does not detect that the 2.0 device is connected.

  When the insertion further proceeds, the 3.0 pin 51 is connected. The EC 25 moves to block 212 when a signal edge is detected in block 209 when the GND_DRAIN pin is connected and the potential of the GND_DRAIN line drops. At block 212, it is determined whether the EC 25 has received a notification from the system that configuration as a 2.0 device has been completed. In the procedure so far, the peripheral device 37 conceals the provision of the 2.0 interface, and since the EC 25 has not received a notification that the configuration as the 2.0 device has been completed, the process proceeds to block 219.

  At block 219, the system, USB controller 33, and peripheral device 37 begin enumerating the 3.0 interface. When detecting that the 3.0 pin SS_TX line or SS_RX line is connected, the 3.0 physical layer 43 identifies the port to which the peripheral device 37 is connected to the system and notifies the event. At this time, the USB controller 33 also sends information indicating that the peripheral device 37 is a 3.0 device to the system. The system that has recognized that the event has occurred transmits a request to the USB controller 33 to acquire information about the connected peripheral device.

  The system that recognizes the newly connected peripheral device 37 sends a request to the USB controller to reset the port to which the peripheral device 37 is connected. Receiving the request, the USB controller 33 logically sets the 3.0 pin line low for a short time to reset the peripheral device 37. When the USB controller 33 releases the reset state, the peripheral device 37 transitions to the default state.

  At this time, the registers and status of the peripheral device 37 are all reset, and the peripheral device 37 can respond to the control transfer using the end point 0 with the default address. A signal path between them is established. The system sends a request to the USB controller 33 to verify whether the peripheral device 37 has returned from the reset state.

  Upon confirming that the device has returned from the reset state, the system sends a request to the USB controller 33 to cause the peripheral device 37 to assign a unique new address. At this time, the system can request the USB controller 33 to reset the peripheral device 37 in order for the system to reliably recognize that the peripheral device 37 has been reset.

  As a result, the peripheral device 37 transitions to the address state. The system sends a request to the new address of the peripheral device 37 to acquire the descriptor, and searches the HDD 21 for an optimal device driver that matches the acquired descriptor. The system loads the found device driver from the HDD 21 into the main memory 13. The device driver selects configuration information based on the descriptor and sets it in the peripheral device 37. The interface of the peripheral device 37 for which configuration information has been set by the system is established in the USB 3.0 standard at block 221 and data transfer with the application becomes possible.

  Next, an operation procedure when the system recognizes the peripheral device 37 as a 3.0 device when the plug 157b is slowly inserted will be described. If the connection of the plug 157b is started in block 203 and power is supplied to the Vbus line of the peripheral device 37 in block 207 via the block 205, but the 3.0 pin 51 is not connected, the EC 25 is switched in block 209. The connection of the GND_DRAIN pin is not detected due to a decrease in the potential of the GND_DRAIN line. Further, since the peripheral device 37 does not detect termination, the process proceeds to block 251.

  In block 251, if the peripheral device 37 does not detect termination after 12 milliseconds have passed since power was supplied to its Vbus line, in order to request connection as a 2.0 device, block 253 Pull up either the D + or D- pin. In block 255, when the 2.0 physical layer 45 detects that the voltage on the D + line or D- line has risen, the port to which the peripheral device 37 is connected to the system is started to start enumerating the 2.0 interface. Identify and notify the event.

  At this time, the USB controller 33 determines the voltage of the D + line and the D− line, and sends information indicating whether the transfer speed of the connected peripheral device 37 is low speed or full speed to the system. The system that has recognized that the event has occurred transmits a request to the USB controller 33 to acquire information on the connected peripheral device 37.

  The system that recognizes the newly connected peripheral device 37 sends a request to the USB controller 33 to reset the port to which the peripheral device 37 is connected. Receiving the request, the USB controller 33 sets the D + line and D− line of the peripheral device 37 logically low for a minimum of 10 milliseconds to bring them into a reset state. During the reset, when the chirp is exchanged between the USB controller 33 and the peripheral device 37 and it is confirmed that the peripheral device 37 supports high speed, communication is performed at high speed thereafter.

  When the USB controller 33 releases the reset state, the peripheral device 37 transitions to the default state. At this time, the registers and status of the peripheral device 37 are all in a reset state, and the peripheral device 37 can respond to the control transfer using the end point 0 with the default address. A signal path is established. The system sends a request to the USB controller 33 to verify whether the peripheral device 37 has returned from the reset state.

  Upon confirming that the device has returned from the reset state, the system sends a request to the USB controller 33 to cause the peripheral device 37 to assign a unique new address. At this time, the system can request the USB controller 33 to reset the peripheral device 37 in order for the system to reliably recognize that the peripheral device has been reset.

  As a result, the peripheral device 37 transitions to the address state. The system sends a request to the new address of the peripheral device 37 to acquire the descriptor, and searches the HDD 21 for an optimal device driver that matches the acquired descriptor. The system loads the found device driver from the HDD 21 into the main memory 13. The device driver selects configuration information based on the descriptor and sets it in the peripheral device 37. The interface of the peripheral device 37 in which the configuration information has been set establishes the USB 2.0 configuration in block 257 and can transfer data to and from the application.

  In the conventional USB system, once the system recognizes the peripheral device 37 as a 2.0 device in block 257, the state is maintained unless the user actively removes and then plugs in and removes the plug 157b. . In the present invention, a path / route that moves from any of the blocks 253, 255, and 257 to the block 209 is provided. That is, even after the peripheral device 37 starts enumeration as a 2.0 device by pulling up the D + line or the D− line, or even after the configuration as a 2.0 device is established, the EC25 Monitors the potential on the GND_DRAIN line. At block 257, the EC 25 receives a notification from the system that the configuration as a 2.0 device is completed, and measures the elapsed time thereafter.

  When the plug 157b is slowly inserted, the 3.0 pin 51 is eventually connected. In block 209, if the EC 25 detects the connection of the GND_DRAIN pin due to the potential drop, the process proceeds to block 212. When moving to block 212 from block 257, the EC 25 has received a notification from the system that the peripheral device 37 has been configured as a 2.0 interface and moves to block 213. In block 213, the EC 25 determines whether or not a predetermined time such as several milliseconds to several seconds has elapsed since the configuration as the 2.0 device is completed. The predetermined time in this case can be set as a time until the peripheral device 37 starts communication with the USB 2.0 standard interface.

  If the EC 25 determines that the predetermined time has elapsed, the EC 25 does not turn off the power switch 101 in block 215, and maintains the power supply of the Vbus line and proceeds to block 257. As a result, even if the configuration as a 2.0 device is maintained and communication through the 2.0 interface is started, it is possible to prevent data from being lost due to a sudden reset.

  If it is determined in block 213 that a predetermined time has not elapsed since the EC 25 established the configuration as a 2.0 device, the process proceeds to block 217 and the Vbus line is reset. At block 217, the Vbus line is reset by turning off the power switch 101 for about 10 milliseconds to 20 milliseconds and then turning it on. When the Vbus line is reset, the D + or D− pin pull-up done at block 253 stops and the peripheral 37 again hides itself from having a 2.0 interface.

  The procedure of block 213 is intended to prevent data that has started communication through the USB 2.0 standard interface from being lost due to a sudden reset operation of Vbus, and therefore is not necessary when data loss is allowed. At this time, there is a possibility that communication has already started between the downstream USB device connected to the receptacle 155a and the system, but the Vbus line to be reset is only the port of the 3.0 receptacle 157a. , The configuration will not be suddenly lost and data will not be lost.

  When returning from the block 217 to the block 207, since the connection of the 3.0 pin is detected, the process returns to the block 212 via the block 209. In this block 212, since the Vbus line was reset in block 217, the peripheral device 37 has stopped pulling up the D + line and the D− line, so the recognition as a 2.0 device is canceled, and the system The device 37 is not recognized as being configured as a 2.0 device. Thus, the system transitions from block 212 to block 219 and begins enumeration so that it is recognized as a 3.0 device.

  The above procedure is performed between the receptacle 163a of the hub 35 and the plug 163b to which the peripheral device 39 is connected by the cable 164, and the plug 155b and the receptacle 155a of the cable 160 connected to the hub 35 to which the peripheral device 39 is connected. It can also be applied to connections between. When the present invention is applied to the connection between the receptacle 163a and the plug 163b and the connection between the plug 165a and the receptacle 165b, the hub 35 detects the potential of the downstream GND_DRAIN line and resets the Vbus line. When the system receives an event that the USB device is connected from the hub 35, the system starts enumeration.

  According to the present invention, it is not necessary to plug in and out to configure the 3.0 interface after the 2.0 interface is configured. Even if the plug is inserted slowly and the 2.0 interface configuration is established, the user is not familiar with the plug connection method because the 3.0 interface configuration is established when the plug is completely inserted. Even if there is, it is always possible to connect with the 3.0 interface. Further, since the present invention can be realized only by hardware without receiving support from software such as an OS and a device driver, a 3.0 interface configuration can be realized in a short time. Peripheral devices and connectors need only perform normal operations corresponding to enumeration, and need not be changed for application of the present invention.

  The USB connector to which the present invention can be applied is not only a standard connector but also a mini connector and a micro connector. Further, although the connection of the 3.0 pin is detected by the connection of the GND_DRAIN line so as not to affect the communication, the present invention does not exclude the detection by the connection of the SX-TX line or the SX-RX line. . Furthermore, a contact different from the communication that contacts the plug and the receptacle at the position where the 3.0 pin is connected may be provided to detect the connection of the 3.0 pin. Further, a dedicated potential detection circuit may be provided in place of the EC 25 for detecting the potential of the GND_DRAIN line.

[Current limiter]
Next, a current limiter used in the USB system 100 will be described with reference to FIG. According to the USB standard, the USB controller 33 can supply a maximum current of 500 mA per port for 2.0 devices, and can supply a maximum current of 900 mA for 3.0 devices. Conventionally, a 2.0 mA host is provided with a 500 mA current limiter on the Vbus line, and a 3.0 host is provided with a 900 mA current limiter. The current limiter is turned off to protect the Vbus line when the current flowing through the Vbus line exceeds a specified value.

  The 3.0 device has an internal interface of 2.0 physical layer and 3.0 physical layer independent, and is recognized as a 3.0 device or a 2.0 device. A 2.0 device may be connected to the port. In the present invention, a current limiter 111 that becomes effective when a 2.0 device is connected to the Vbus line and a current limiter 113 that becomes effective when a 3.0 device is connected are provided. Then, based on the USB standard version recognized by the system, the USB controller 33 enables one of the current limiters through the Vbus controller 47 and the EC 25 and sets the other as invalid. The current limiter may be added to the USB controller 33 including the reset circuit described in FIG. 3, or may be provided independently from the reset circuit.

  Although the present invention has been described with the specific embodiments shown in the drawings, the present invention is not limited to the embodiments shown in the drawings, and is known so far as long as the effects of the present invention are achieved. It goes without saying that any configuration can be adopted.

10 Computer 33 USB controller 49, 53 2.0 pin 51, 55 3.0 pin 100 USB system

Claims (17)

The first device and the second device each having the first interface function and the second interface function are used for the first pin used for communication by the first interface function and the communication by the second interface function, respectively. A method in which a computer system establishes a configuration of the first interface function when connected by a connector containing a second pin ,
And initiating a connection of the first device and the second device in the connector,
Detecting the connection of the second pin in the connector;
Establishing a configuration of the second interface function in response to the connection of the second pin;
Detecting the connection of the first pin in the connector after the configuration of the second interface function is established ;
Responsive to the connection of the first pin, the first device resetting the second device to establish a configuration of the first interface function.   The method of claim 1, wherein the first interface function achieves a faster data transfer than the second interface function.   The method according to claim 1, wherein the connector is formed such that the second pin is connected before the first pin.   The method according to claim 1, wherein the connector comprises a plug and a receptacle, the plug is connected to the first device, and the receptacle is attached to the second device.   The method according to claim 1, wherein the connector comprises a plug and a receptacle, the plug is connected to the second device, and the receptacle is attached to the first device.   The first interface function is a first interface that conforms to the USB 3.0 standard, and the second interface function is a second interface that conforms to the USB 2.0 standard. The method described.   The method according to claim 6, wherein the connection of the first pin is detected by connection of a GND_DRAIN line. The method according to claim 6 or 7, wherein the reset of the second device is performed by turning on the Vbus line after turning it off.   9. The method according to claim 6, wherein the establishment of the configuration of the first interface is executed only before a fixed time elapses from the establishment of the configuration of the second interface until the start of data transfer. The method of crab. An interface controller that supports the first interface function and the second interface function is provided, and a peripheral device can be connected by a connector. When the connector is connected, the first interface function or the second interface function can be connected. A computer that establishes the configuration of one of the interface functions of
A receptacle containing a first pin used for communication by the first interface function and a second pin used for communication by the second interface function and connected to the interface controller;
It is detected that the third pin that is stored in the plug connected to the first pin and the peripheral device and is used for communication by the first interface function is connected, and further stored in the second pin and the plug. And a detection circuit for detecting that a fourth pin used for communication by the second interface function is connected,
In response to the connection between the first pin and the third pin after the second pin and the fourth pin are connected to establish the connection of the second interface function , A reset circuit for resetting a connection operation to the computer;
And a connection circuit for establishing a connection of the first interface function after resetting . The peripheral device, the first to express the presence of the interface functions, the second express claims the existence of interface function 10 when the predetermined time first interface function is not established when it is reset Computer as described in. 12. The computer according to claim 10, wherein the first interface function conforms to a higher version USB standard and the second interface function conforms to a lower version USB standard. A pull-up circuit for pulling up the GND_DRAIN line of the first pin;
13. The computer according to claim 12 , wherein the detection circuit detects that the first pin and the third pin are connected by a change in potential of the GND_DRAIN line. A power switch for controlling the power of the Vbus line for each port;
The computer according to claim 12 or 13 , wherein the reset circuit resets the peripheral device by turning the power switch off and then on. The Vbus line has a current limiter that conforms to the higher version USB standard and a current limiter that conforms to the lower version USB standard, and the computer has only a current limiter that conforms to the established USB standard. The computer according to claim 14 , wherein the computer is set to enable. The computer according to any one of claims 12 to 15 , wherein the reset circuit resets the peripheral device only when a predetermined time does not elapse after the configuration of the lower version USB standard is completed. A hub that includes a first interface that conforms to a higher version USB standard and a second interface that conforms to a lower version USB standard, and that connects a computer and peripheral devices;
A receptacle for housing a first pin used for communication by the first interface and a second pin used for communication by the second interface;
It is detected that the third pin that is stored in the plug connected to the first pin and the peripheral device and is used for communication by the first interface is connected, and is further stored in the second pin and the plug. A detection circuit for detecting that a fourth pin used for communication by the second interface is connected;
After the second pin and the fourth pin are connected to establish the connection of the second interface, in response to the connection of the first pin and the third pin, the peripheral device A reset circuit for resetting the connection operation to the computer;
A hub having a connection circuit for establishing a connection of the first interface after resetting .

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