JP5454200B2 - Power converter - Google Patents

Description

  The present invention relates to a power conversion device that drives an AC motor or a motor generator using a semiconductor element for power conversion such as an IGBT (Insulated Gate Bipolar Transistor), and particularly has a function of detecting the temperature of the semiconductor element with a temperature detection element. The present invention relates to a power conversion device.

  Conventionally, as in the power conversion device described in Patent Document 1, the detected temperature of a semiconductor element such as a switching element is output as an analog signal, converted into a digital signal, and then detected by a microcomputer (microcomputer). The circuit which recognizes is equipped.

  A method called PWM modulation (pulse width modulation) is widely known as a method for modulating an analog signal into a digital signal and outputting the digital signal. In this modulation method, for example, as described in Patent Document 2, the level of a reference waveform such as a triangular wave or sawtooth wave and an analog input signal are compared by a comparator or the like to generate a digital signal. Alternatively, a system such as using a duty conversion unit that generates a duty signal according to a digital value acquired by an A / D (analog / digital) converter is common.

  In the above-described power conversion device of Patent Document 1 that performs analog / digital conversion, an IGBT (Insulated Gate Bipolar Transistor) as a semiconductor element that outputs three-phase power of an inverter includes a diode as a temperature detection element. Has been. By converting the voltage of the diode into a digital signal and sending it to the microcomputer, the microcomputer can recognize the temperature of the IGBT, thereby enabling optimal control.

JP 2008-51775 A Japanese Patent Laid-Open No. 10-337036

  In the power conversion device of Patent Document 1 described above, a plurality of IGBTs may be connected and used in parallel. In this case, in order to control the power converter safely, it is necessary for the microcomputer to detect the temperature of the IGBT on the high temperature side in particular. For this reason, in Patent Document 1, only the temperature of the IGBT on the high temperature side is selected and sent to the microcomputer. However, since the detection characteristics of temperature detection elements such as diodes actually vary, it is impossible to accurately determine which IGBT temperature is higher simply by detecting the voltage of the temperature detection element. There's a problem.

  In order to properly detect the temperature of the IGBT on the high temperature side, it is necessary to take measures such as selecting a temperature detection element whose detection error is within an allowable range in advance, or improving variation of the temperature detection element itself, When these measures are implemented, there is a problem that the cost becomes high.

  Further, in order to accurately recognize the temperatures of the plurality of IGBTs, as shown in FIG. 1, two analog temperature signals 1 and 2 are respectively input to the individual duty conversion means 3 and 4, and the respective duty signals 5 and 5 are input. A configuration is also conceivable in which this is converted to 6 and input to the microcomputer 9 via the individual photocouplers 7 and 8. However, when such two signal transmission paths are provided, the number of photocouplers 7 and 8 is increased and the wiring area to the microcomputer 9 is increased, resulting in an increase in cost and the overall size. There is a problem of getting bigger.

  The present invention has been made in view of such circumstances, and can accurately detect temperatures of a plurality of semiconductor elements that perform power conversion, and can realize this with an inexpensive and small circuit. An object is to provide a conversion device.

In order to achieve the above object, the invention according to claim 1 has a converter having a plurality of semiconductor elements for boosting a DC voltage and a plurality of semiconductor elements for converting the boosted voltage in the converter into an AC voltage. In the power converter having a plurality of temperature detection elements that have both or any one of the inverters and that individually correspond to the plurality of semiconductor elements and generate a voltage according to the temperature of each semiconductor element, First selection means for selecting a voltage generated by a plurality of temperature detection elements; duty conversion means for converting the voltage selected by the first selection means into a duty signal having a predetermined duty ratio by pulse width modulation; and Header generating means for generating a header signal which is a unique duty signal having a period different from that of a duty signal by pulse width modulation; And the second selection means for selecting the header signal generated by the duty conversion means and the duty signal converted by the duty conversion means, and the first selection means alternately select the voltages generated by the plurality of temperature detection elements. the second selection means, corresponding to each of the semiconductor device after the said is selected alternately by the first selecting means varies depending Rukoto converted by the duty converting means of the header signal generated by the header generation means The duty signal based on the voltage generated by the temperature detecting element is sequentially arranged, and the header signal and the duty signal are controlled to be selected so that the order of arrangement of the duty signal starting from the header signal is repeated. and control means, the output side of the second selection means, said header signal and the duty signal selected by the second selection means And a calculation control means connected via a signal transmission element that reaches, the calculation control means stores a characteristic variation of the temperature detection element, and is input from the second selection means via the signal transmission element. The temperature information detected from the duty signal is corrected with the stored characteristic variation .

According to this configuration, the temperatures of the plurality of semiconductor elements individually detected by the plurality of temperature detection elements are transmitted through one system signal transmission path by the first selection unit, the duty conversion unit, and the second selection unit. The This eliminates the need for conventional signal transmission paths for multiple temperature information, reducing the signal transmission elements such as photocouplers and the wiring area for each path that were required in the subsequent stage of each signal transmission path. I can do it. As a result, the circuit of the temperature detection portion of the semiconductor element can be realized inexpensively and in a small size. In addition, the temperature of each semiconductor element can be accurately detected.

According to the second aspect of the present invention, there is provided a converter having a plurality of semiconductor elements for boosting a DC voltage and / or an inverter having a plurality of semiconductor elements for converting a boosted voltage in the converter into an AC voltage. And a plurality of temperature detection elements that are individually associated with the plurality of semiconductor elements and generate a voltage corresponding to the temperature of each of the semiconductor elements. A first selection means for selecting; a duty conversion means for converting the voltage selected by the first selection means into a duty signal having a predetermined duty ratio by pulse width modulation; and a duty signal and a period by the pulse width modulation. Header generating means for generating a header signal which is a different inherent duty signal; a header signal generated by the header generating means; The second selection means for selecting the duty signal converted by the duty conversion means, and the first selection means alternately generate voltages of the plurality of temperature detection elements, and the second selection means After the header signal generated by the header generation means, duty signals alternately selected by the first selection means and converted by the duty conversion means are sequentially arranged, and an arrangement of duty signals starting from this header signal Control means for controlling the header signal and the duty signal to be selected so that the order is repeated, and the duty conversion means generates a reference wave that repeats rising and falling at a constant period and A reference wave generating means for generating a pulse-like peak signal at the falling edge of the wave, a reference wave generated by the reference wave generating means, and the first wave And amplifying means for comparing the voltage selected by the selection means with the voltage selected by the selection means and converting the voltage into a duty signal having a predetermined duty ratio, and the control means includes the first selection means and the second selection means. The selection timing and the header signal generation timing of the header generation means are controlled to be synchronized with the peak signal generated by the reference wave generation means .

According to this configuration, the selection operation of the first and second selection means and the header signal generation operation of the header generation means are synchronized with the constant peak signal generated, so that the second selection means to the header The signal and the duty signal in a predetermined arrangement can be output in synchronization. As a result, the duty signal can be appropriately acquired by the arithmetic control means. In addition, since the operations of the plurality of circuit means are synchronized using only a constant peak signal, the entire circuit can be reduced in size.

According to a third aspect of the present invention, there is provided a converter having a plurality of semiconductor elements for boosting a DC voltage and / or an inverter having a plurality of semiconductor elements for converting the boosted voltage in the converter into an AC voltage. And a plurality of temperature detection elements that are individually associated with the plurality of semiconductor elements and generate a voltage corresponding to the temperature of each of the semiconductor elements. A first selection means for selecting; a duty conversion means for converting the voltage selected by the first selection means into a duty signal having a predetermined duty ratio by pulse width modulation; and a duty signal and a period by the pulse width modulation. Header generating means for generating a header signal which is a different inherent duty signal; a header signal generated by the header generating means; The second selection means for selecting the duty signal converted by the duty conversion means, and the first selection means alternately generate voltages of the plurality of temperature detection elements, and the second selection means After the header signal generated by the header generation means, duty signals alternately selected by the first selection means and converted by the duty conversion means are sequentially arranged, and an arrangement of duty signals starting from this header signal Control means for controlling the header signal and the duty signal to be selected so that the order is repeated, and the duty converter means a triangular wave as a reference wave that alternately repeats rising and falling at a constant slope And a second reference wave generator that generates a second peak signal that rises at the rising point of the triangular wave and falls at the falling point The second reference wave generating means compares the triangular wave generated by the second reference wave generating means with the voltage selected by the first selecting means, and converts the voltage into a duty signal having a predetermined duty ratio. Operational amplification means, and the control means converts the selection timing of the first selection means and the second selection means and the generation timing of the header signal of the header generation means into the second peak signal. In addition to performing control to synchronize, the second selection means performs control in which selection that at least two or more identical duty signals are successively arranged after the header signal is performed .

According to this configuration, the reference wave is a triangular wave, and each of a plurality of types of duty signals is output in a plurality of cycles. In the triangular wave, the voltage does not change instantaneously from the upper peak, and the voltage change when the voltage falls from the upper peak is small, so that it does not cross the duty signal voltage when switching to a different duty signal. Therefore, when the duty signal is switched, waveform breakage that occurs across the duty signal voltage at the time of switching does not occur. Further, at least two identical duty signals are continuous. As a result, when the duty signal is switched, the same “L” or “H” level continues, and it is not possible to recognize which duty signal in this continuous section, and the accurate duty cannot be obtained by the arithmetic control means. I can do it. That is, if two identical duty signals are continuous, for example, an “L” section between “H” and “H” can be detected, and thus the duty can be accurately obtained.

According to a fourth aspect of the present invention, a holding unit that holds and outputs voltages generated by the plurality of temperature detection elements is connected between the plurality of temperature detection elements and the first selection unit, and the control is performed. The means performs holding control so that the generated voltages of the plurality of temperature detecting elements are held in the holding means and output to the first selection means, and at the time of holding control, the first selection means performs the holding Generated voltages of a plurality of temperature detecting elements are alternately selected, and duty signals obtained by converting the alternately selected generated voltages by the duty converting means are arranged after the header signal, and the set in the arrangement order is The selection of the first selection means and the second selection means is controlled so as to be repeated a plurality of times, and the calculation control means is configured so that the duty of the same plurality of sets selected by the second selection means Compare the signals, Characterized by employing a duty signal to the detection of the temperature information only when the reference values that have the differences were determined in advance.

According to this configuration, even if the voltage generated by the temperature detection element is affected by noise, the duty signal affected by the noise is not adopted as temperature information by the calculation control means. Will not be performed. In other words, since only proper temperature information is employed in the arithmetic control means, the temperature information can be accurately recognized.

According to a fifth aspect of the present invention, a holding unit that holds and outputs voltages generated by the plurality of temperature detection elements is connected between the plurality of temperature detection elements and the first selection unit, and the control is performed. The means performs holding control so that the generated voltages of the plurality of temperature detecting elements are held in the holding means and output to the first selection means, and at the time of holding control, the first selection means performs the holding Generated voltages of a plurality of temperature detecting elements are alternately selected, and duty signals obtained by converting the alternately selected generated voltages by the duty converting means are arranged after the header signal, and the set in the arrangement order is The selection of the first selection means and the second selection means is controlled so as to be repeated a plurality of times, and the calculation control means is configured to control the duty in the same plurality of sets selected by the second selection means. From the signal Eliminating the duty signal exceeding the predetermined reference value, the duty signal that is not excluded, characterized in that employ the detection of the temperature information.

According to this configuration, even if the voltage generated by the temperature detection element is affected by noise, the duty signal affected by the noise is not adopted as temperature information by the calculation control means. Will not be performed. In other words, since only proper temperature information is employed in the arithmetic control means, the temperature information can be accurately recognized.

  According to a sixth aspect of the present invention, the calculation control means counts after resetting at the rising edge or falling edge of the header signal and the duty signal input from the second selection means via the signal transmission element. A counter that starts operation, and a register that holds the count value of the counter as a register value before the reset at the rising edge or the falling edge, and using the register value held in the register, An arithmetic process including a calculation for obtaining a duty is performed, and the period of the duty signal is set longer than the period of the main loop of the arithmetic control means for performing the arithmetic process.

  According to this configuration, since the cycle of the duty signal is longer than the cycle of the main loop of the calculation control unit, the calculation control unit reads the register value and calculates the duty of the duty signal in the main loop. This can be done without interruption.

  According to a seventh aspect of the present invention, the header signal is a specific signal including a section of “L” level or “H” level longer than the period of the duty signal in one period of the header signal. It is characterized by.

  According to this configuration, since the header signal can be reliably identified, reliable signal transmission can be performed.

  According to an eighth aspect of the present invention, the header signal is a specific signal including a section of “L” level or “H” level shorter than the period of the duty signal in one period of the header signal. It is characterized by.

  According to this configuration, since the header signal can be reliably identified, reliable signal transmission can be performed. Further, since the cycle of the header signal is shorter than the cycle of the duty signal, the transmission of the data signal including the header signal can be speeded up.

  According to a ninth aspect of the present invention, when the duty converter converts the voltage selected by the first selector into a duty signal by pulse width modulation, the duty ratio of the duty signal falls within a predetermined value. Conversion is performed in a limited manner, and the header signal is set to a duty ratio exceeding the limited duty ratio.

  According to this configuration, since the duty ratio of the header signal is different from the duty ratio of the duty signal, the header signal can be reliably identified, and reliable signal transmission can thereby be performed.

  According to a tenth aspect of the present invention, when the duty converter converts the voltage selected by the first selector into a duty signal by pulse width modulation, the duty ratio of the duty signal is less than 100%. It restrict | limits so that it may become.

  According to this configuration, if the duty ratio of the duty signal is less than 100%, there is always a rising edge or falling edge of the duty signal, so that the duty signal can always be identified by the arithmetic control means.

According to an eleventh aspect of the present invention, there is provided a converter having a plurality of semiconductor elements for boosting a DC voltage and / or an inverter having a plurality of semiconductor elements for converting the boosted voltage in the converter into an AC voltage. And a plurality of temperature detection elements that are individually associated with the plurality of semiconductor elements and generate a voltage corresponding to the temperature of each of the semiconductor elements. A plurality of duty conversion means for converting the generated voltage into a duty signal having a predetermined duty ratio by pulse width modulation, and a header signal that is a unique duty signal having a period different from that of the duty signal by the pulse width modulation. Header generation means for generating, header signal generated by the header generation means, and the plurality of duty conversion means The selection means for selecting each duty signal converted, and the duty signal converted by the plurality of duty conversion means after the header signal generated by the header generation means is sequentially arranged by the selection means, and the header The control means for controlling the header signal and the duty signal to be selected so that the arrangement order of the duty signal starting from the signal is repeated, and the selection means selects the output side of the selection means. Arithmetic control means connected via a signal transmission element for transmitting the header signal and the duty signal, wherein the arithmetic control means stores characteristic variations of the temperature detection element, and transmits the signal from the selection means. the temperature information is detected from the duty signal inputted through the device, to correct in the stored characteristic variations And butterflies.

According to this configuration, since the duty conversion means is connected to the voltage generation side of the plurality of temperature detection elements, noise due to switch switching or the like rides on the generated voltage of each temperature detection element before the duty conversion means. Such a thing disappears. Therefore, each duty converter can convert the generated voltage into a duty signal at an appropriate voltage level. In addition, the temperature of each semiconductor element can be accurately detected.

According to a twelfth aspect of the present invention, the plurality of duty conversion units use the reference wave generated from one reference wave generation unit that generates a reference wave having a constant period to generate voltages generated by the plurality of temperature detection elements. It converts into a duty signal, It is characterized by the above-mentioned.

  According to this configuration, since each duty conversion means performs duty conversion based on one reference wave, this conversion operation is synchronized. Therefore, when each duty signal is alternately selected by the selection means subsequent to each duty conversion means, for example, each duty signal can be alternately selected from the head at a predetermined cycle at the same timing. Therefore, when the duty signals are not synchronized, the selection positions of the duty signals are different, and the output waveform from the selection means is not disturbed.

It is a block diagram which shows the structure of the temperature detection circuit of the conventional power converter device. It is a block diagram which shows the structure of the temperature detection circuit of the power converter device which concerns on 1st Embodiment of this invention. It is a circuit diagram which shows the structure of the power converter device of this invention. It is a figure which shows the arrangement pattern of the data signal input into the microcomputer of the temperature detection circuit of the power converter device of 1st Embodiment. It is a block diagram which shows the structure of the 1st modification of the temperature detection circuit of the power converter device which concerns on 1st Embodiment. It is a figure which shows the arrangement pattern of the data signal input into the microcomputer of the temperature detection circuit of the power converter device of 1st Embodiment. It is a block diagram which shows the structure of the 2nd modification of the temperature detection circuit of the power converter device which concerns on 1st Embodiment. It is a figure which shows the arrangement pattern of the data signal input into the microcomputer of the temperature detection circuit of the power converter device of a 2nd modification. It is a block diagram which shows the structure of the temperature detection circuit of the power converter device which concerns on 2nd Embodiment of this invention. It is a signal waveform diagram for demonstrating operation | movement of the temperature detection circuit of the power converter device which concerns on 2nd Embodiment. It is a figure which shows the arrangement pattern of the data signal input into the microcomputer of the temperature detection circuit of the power converter device of 2nd Embodiment. It is a signal waveform diagram for demonstrating the arithmetic processing of the microcomputer of the temperature detection circuit of the power converter device which concerns on 2nd Embodiment. It is a figure which shows the arrangement pattern of the data signal input into the microcomputer of the temperature detection circuit of the power converter device of 2nd Embodiment. It is a block diagram which shows the structure of the temperature detection circuit of the power converter device which concerns on 3rd Embodiment of this invention. It is a signal waveform diagram for demonstrating operation | movement of the temperature detection circuit of the power converter device which concerns on 3rd Embodiment. It is a figure which shows the arrangement pattern of the data signal input into the microcomputer of the temperature detection circuit of the power converter device of 3rd Embodiment. It is a signal waveform diagram for demonstrating the fault of the temperature detection circuit of the power converter device of 2nd Embodiment. It is a figure which shows the arrangement pattern of the data signal input into the microcomputer of the temperature detection circuit of the power converter device of 3rd Embodiment. It is a block diagram which shows the structure of the temperature detection circuit of the power converter device which concerns on 4th Embodiment of this invention. It is a block diagram which shows the structure of the duty converter of the temperature detection circuit of the power converter device of 4th Embodiment. It is a block diagram which shows the detailed circuit structure of the duty converter of the temperature detection circuit of the power converter device of 4th Embodiment. It is a block diagram which shows the other structure of the duty converter of the temperature detection circuit of the power converter device of this embodiment.

  Embodiments of the present invention will be described below with reference to the drawings. However, parts corresponding to each other in all the drawings in this specification are denoted by the same reference numerals, and description of the overlapping parts will be omitted as appropriate.

(First embodiment)
FIG. 2 is a block diagram showing the configuration of the temperature detection circuit of the power conversion device according to the first embodiment of the present invention.

  A temperature detection circuit 100 shown in FIG. 2 includes a switching circuit 102 connected to the motor generator MG, changeover switches 103 and 104, a duty conversion unit 106, a header generation unit 108, a control unit 110, and a photocoupler 112. The microcomputer 114 and the buffer 116 are provided.

  Switching circuit 102 is provided in power conversion device 10 shown in FIG. 3. Power conversion device 10 includes converter 20 and inverter 30 that drives and controls motor generator MG, and is controlled by microcomputer 114. It is configured.

  A battery 40 is connected to the converter 20, and the battery 40 supplies DC power to the converter 20 and stores DC power regenerated from the converter 20. Converter 20 boosts the DC power supplied from battery 40 and outputs the boosted DC power to inverter 30, and steps down the DC power output from inverter 30 and outputs it to battery 40. Further, the converter 20 includes a capacitor 23, a reactor 24, an upper arm switching element (power conversion switching element) 21 which is a high voltage side semiconductor element, and a lower arm which is a high voltage GND (ground) side semiconductor element. Switching element (power conversion switching element) 22 and diodes D1 and D2.

  In these components, one end of the capacitor 23 and the reactor 24 is connected to the positive electrode side of the battery 40, and the other end of the capacitor 23 and the emitter terminal of the switching element 22 are connected to the negative electrode side. The switching element 21 and the switching element 22 are connected in series, and the other end of the reactor 24 is connected between them, that is, the emitter terminal of the switching element 21 and the collector terminal of the switching element 22.

  The collector terminal of the switching element 21 for the upper arm is connected to one end side of the inverter 30. The emitter terminal of the switching element 22 for the lower arm is connected to the other end side of the inverter 30. Between the collector and emitter of the switching element 21, a diode D <b> 1 that allows current to flow from the emitter side to the collector side is connected. Similarly, a diode D <b> 2 is also connected between the collector and emitter of the switching element 22.

  Motor generator MG is connected to inverter 30 and is driven by electric power supplied from battery 40. When working as a generator, AC power is output to the inverter 30.

  The inverter 30 includes a U phase, a V phase, and a W phase, and the U phase, the V phase, and the W phase are connected in parallel to the converter 20, and converts the DC power boosted by the converter 20 into a three-phase AC, Output to motor generator MG. When motor generator MG functions as a generator, AC power output from motor generator MG is converted to DC and output to converter 20. Furthermore, the inverter 30 includes a capacitor 31 for absorbing a surge voltage that also serves as a power storage, on the connection side with the converter 20.

  The U phase of the inverter 30 is formed by connecting a switching element 34 for the upper arm of the semiconductor element on the high voltage side and a switching element 35 for the lower arm of the semiconductor element on the high voltage GND side in series. Similarly, the switching element 36 for the upper arm and the switching element 37 for the lower arm are connected in the V phase, and the switching element 38 for the upper arm and the switching element 39 for the lower arm are connected in series in the W phase.

  Between the collectors and emitters of the respective switching elements 34 to 39, diodes D3 to D8 for passing a current from the emitter side to the collector side are respectively connected. An intermediate point of each UVW phase is connected to each phase end of each phase coil (not shown) of motor generator MG. Here, it is assumed that a power device such as an IGBT is used as the switching element included in each of the converter 20 and the inverter 30.

  Further, each of the switching elements 21 and 22 of the converter 20 and each of the switching elements 34 to 39 of the inverter 30 is such that when the upper arm switching element is on, the lower arm switching element is off and the upper arm switching element is off. In the off state, the microcomputer 114 performs switching control (on / off control) so that the lower arm switching element is turned on.

  According to the power conversion device 10, the DC power of the battery 40 is boosted by the converter 20 by the switching control of the switching elements 21 and 22 of the converter 20 and the switching elements 34 to 39 of the inverter 30 by the control unit 11. The motor generator MG is driven by this three-phase alternating current. On the other hand, when motor generator MG functions as a generator, AC power output from motor generator MG is converted into DC power by inverter 30, further stepped down by converter 20, and regenerated by battery 40.

  Incidentally, the switching elements 21 and 22 of the converter 20 of the power conversion device 10 and the switching elements 34 to 39 of the inverter 30 are shown in FIG. The switching circuit 102 is configured.

  The switching circuit 102 includes two switching elements 35a and 35b connected in parallel between the motor generator MG and the earth (ground), and is individually associated with the switching elements 35a and 35b and indicated by alternate long and short dashed lines 120a and 120b. The two diodes 122a and 122b as temperature detecting elements packaged in one package, two constant current circuits 124a and 124b individually connected to the anode side of each diode 122a and 122b, and these constant current circuits 124a and 124b. And a resistor 126 connected between the base end of each of the switching elements 35a and 35b and the buffer 116. However, the power source 126 is the battery 40 via the converter 20.

  Here, one diode 122a is defined as the Ach (A channel) side, and the other diode 122b is defined as the Bch (B channel) side. A constant current flows from the constant current circuit 124a to the Ach side diode 122a, and a constant current flows from the constant current circuit 124b to the Bch side diode 122b. The anode ends of the diodes 122a and 122b are connected to the changeover switch 103 by wiring.

  The changeover switch 103 performs a switching operation to connect either the anode end of the Ach-side diode 122 a or the anode end of the Bch-side diode 122 b to the duty conversion unit 106 in accordance with the control of the control unit 110. By this switching operation, an Ach analog signal that is a voltage at the time of temperature detection from the Ach side diode 122a or a Bch analog signal that is a voltage at the time of temperature detection from the Bch side diode 122b is output to the duty converter 106. Is done.

  The duty converter 106 PWM-modulates the Ach or Bch analog signal to convert it into a digital signal, for example, the Ach or Bch duty signal shown in FIG. 4A, and converts this to one input terminal of the changeover switch 104. Output. However, the duty signal has a predetermined duty ratio. The header signal shown in FIG. 4A from the header generation unit 108 is input to the other input terminal of the changeover switch 104. That is, the header generation unit 108 generates a header signal, and this header signal is a unique duty signal whose cycle is clearly different from the duty signal after PWM modulation by the duty conversion unit 106.

  The changeover switch 104 selects the Ach or Bch duty signal and the header signal so as to have the signal arrangement shown in FIG. 4B under the control of the control unit 110 and outputs the selected signal to the photocoupler 112. FIG. 4B shows a signal arrangement in the order of a header signal (header), an Ach duty signal (Ach), and a Bch duty signal (Bch).

  Each data signal is input from the changeover switch 104 to the photocoupler 112 in the arrangement of FIG. 4B and output from the photocoupler 112 to the microcomputer 114, so that the microcomputer 114 starts with a header signal from the signal arrangement. Thereafter, the Ach duty signal and the Bch duty signal can be sequentially detected, and the subsequent detection can be performed in the same order starting from the header signal. However, instead of the signal arrangement of FIG. 4B, the signal arrangement of the header signal (header), the Bch duty signal (Bch), and the Ach duty signal (Ach) shown in FIG. good.

  The microcomputer 114 detects the temperature from the Ach duty signal or the Bch duty signal, and controls the switching element 35a or 35b to be equal to or lower than a predetermined temperature via the buffer 116 according to this. Here, the diodes 122a and 122b, which are temperature detection elements, have variations in characteristics at the time of manufacture. Therefore, the duty signal, which is detection temperature information, also includes an error. Therefore, the microcomputer 114 stores in advance that the characteristic variation of the diodes 122a and 122b, for example, the diode 122a has 3% variation in the output characteristic and the diode 122b has 5% variation, and is detected from the duty signal of Ach. The temperature information is corrected by 3%, and the temperature information detected from the Bch duty signal is corrected by 5%.

  The power conversion device 10 according to the first embodiment selects the voltages generated by the plurality of diodes 122a and 122b associated with the switching elements 35a and 35b as the temperature detection circuit 100 for the plurality of switching elements 35a and 35b. A changeover switch 103 as a first selection means, a duty converter 106 as a duty conversion means for converting a voltage selected by the changeover switch 103 into a duty signal of a predetermined duty ratio by PWM modulation, and by PWM modulation A header generation unit 108 serving as a header generation unit that generates a header signal that is a unique duty signal having a period different from that of the duty signal, and a second selection that selects the generated header signal and the PWM modulated duty signal And a selector switch 104 as a means.

  Further, the voltage generated by the plurality of diodes 122a and 122b is alternately selected by the changeover switch 103, and the duty signal alternately selected by the changeover switch 103 after the header signal and PWM-modulated by the changeover switch 104 is sequentially arranged. A control unit 110 is provided as control means for controlling the header signal and the duty signal so that the arrangement order of the header signal and the duty signal is repeated.

  As a result, the temperature of the plurality of switching elements 35a and 35b individually detected by the plurality of diodes 122a and 122b is used for one-system signal transmission by the first changeover switch 103, the duty converter 106, and the second changeover switch 104. It is transmitted on the route. Accordingly, since the number of signal transmission paths corresponding to a plurality of temperature information as in the prior art is not required, the signal transmission elements such as photocouplers and the wiring area of each path that are required in the subsequent stage of each signal transmission path are provided. It can be reduced. Thereby, the temperature detection circuit 100 of the switching element in the power conversion device 10 can be realized at low cost and in a small size.

  In addition, the microcomputer 114 as a calculation control unit connected to the output side of the second changeover switch 104 via the photocoupler 112 stores the characteristic variation of each of the diodes 122a and 122b. The temperature information detected from the duty signal input through the photocoupler 112 is corrected with the stored characteristic variation. Thereby, the temperature of each diode 122a, 122b can be detected accurately.

  Further, as in the temperature detection circuit 100-1 shown in FIG. 5, the holding units 130a and 130b as holding means for holding the generated voltages of the diodes 122a and 122b between the diodes 122a and 122b and the changeover switch 103. May be connected. Each hold unit 130a, 130b holds the voltage generated from each diode 122a, 122b by holding control of the control unit 110, outputs the held voltage to the changeover switch 103, and releases the holding by release control. To do.

  While the hold units 130a and 130b hold and output the Ach voltage and the Bch voltage, the same Ach or Bch voltage is converted into a duty signal by the duty conversion unit 106 and output to the changeover switch 104. Will be. Therefore, as shown in FIG. 6A, the control unit 110 sends two sets of the header signal 200, the Ach duty signal 201, and the Bch duty signal 202 in the same order to the microcomputer 114 via the photocoupler 112. The change-over switches 103 and 104 are controlled so as to be output.

  Thereafter, the control unit 110 temporarily releases the holding of the holding units 130a and 130b, and holds new generated voltages from the diodes 122a and 122b by holding control again. Then, as shown in FIG. 6A, a plurality of sets of header signal 210, Ach duty signal 211, and Bch duty signal 212 are output to microcomputer 114 via photocoupler 112 in the same order. The selector switches 103 and 104 are controlled. This control may be performed so that Ach and Bch are reversed as shown in FIG.

  By controlling in this way, the following effects can be obtained. In a device that handles high power, such as the inverter 30, there is a case where a data signal cannot be read accurately due to the influence of noise. In particular, the temperature information of the duty signal handled here changes when the waveform collapses due to noise. In addition, there is a possibility that the microcomputer 114 does not recognize the header signal as a header and erroneously recognizes it as temperature information.

  Therefore, as shown in FIG. 6 (a) or (b) described above, the same data signal is transmitted at least twice, and the microcomputer 114 compares the read value (temperature value) of the two data signals, The read value (temperature value) is adopted only when the difference between the two is within a predetermined reference value. Alternatively, when the same data signal is transmitted three times or more, only the reading values that occupy a large number of those reading values are validated. Further, when the same data signal is transmitted three times or more, reading values exceeding a predetermined reference value are excluded from the reading values, and the remaining reading values are validated.

  In this way, even if the voltage generated by the diodes 122a and 122b is affected by noise, the duty signal as a data signal affected by the noise is not adopted as temperature information by the microcomputer 114, and thus erroneous recognition occurs. Will disappear. Further, since only appropriate temperature information is adopted in the microcomputer 114, the temperature information can be accurately recognized.

  In the above description, the diodes 122a and 122b serving as the temperature detection elements have two configurations. However, as shown in FIG. 7, the same effect can be obtained even in the case of three configurations in which one diode 122c is added. I can do it. That is, in the case of the three configurations, the switching element 35c connected to the output side of the buffer 116 via the resistor Rc is associated with the Cch-side diode 122c as shown by a one-dot chain line frame 120c to form one package. The anode end of the Cch-side diode 122b is connected to the three-input type changeover switch 103-1.

  In the temperature detection circuit 100-2 having such a configuration, as shown in FIGS. 8A to 8C, an Ach duty signal (Ach) and a Bch duty signal (Bch) are placed behind the header signal (header). ), The Cch duty signal (Cch) is arranged in the order of Ach, Bch and Cch, or Ach, Cch and Bch, or Cch, Bch and Ach, and is output to the microcomputer 114 via the photocoupler 112. The

(Second Embodiment)
FIG. 9 is a block diagram showing a configuration of a temperature detection circuit of the power conversion device according to the second embodiment of the present invention.

  A temperature detection circuit 100-3 shown in FIG. 9 includes a duty conversion unit 106-1, a comparator (operational amplification means) 106a using an operational amplifier, and a reference wave that generates a sawtooth wave J1 shown in FIG. 10B as a reference wave. The generator 106b is used to perform PWM modulation. The comparator 106a has a non-inverting input terminal “+” connected to the output terminal of the first changeover switch 103, an inverting input terminal “−” connected to the generation terminal of the sawtooth wave J1 of the reference wave generation unit 106b, and an output terminal. Is connected to one input terminal of the second changeover switch 104.

  In addition to generating the sawtooth wave J1, the reference wave generating unit 106b generates a pulse-like peak signal P1 that rises long and narrow as shown in FIG. 10C at the falling edge of the sawtooth wave J1, and supplies this to the control unit 110. It is designed to output.

  The control unit 110 outputs the switching control signal K1 shown in FIG. 10D to the changeover switch 103 with the peak signal P1 as a reference, and sends the switching control signal K2 shown in FIG. 10E to the changeover switch 104 and the header generation unit 108. Output. That is, the switching control signal K1 is lowered by the peak signal P1 at time t1, and the switching switch 103 is switched to the side for selecting the voltage generated by the Ach side diode 122a in response to this, and at the same time the switching control signal K2 is raised. Accordingly, the header generation unit 108 generates the header signal Hd, and the changeover switch 104 switches to the side for selecting the header signal Hd. As a result, the header signal Hd is output from the changeover switch 104 as shown in FIG. The header signal Hd is a data signal that is at the “H” level between the two peak signals P1 and at the “L” level between the three peak signals P1.

  After that, when the peak signal P1 is generated at time t2 and t3, and the third peak signal P1 is generated from time t1 at time t4, the control unit 110 causes the switching control signal K2 to fall and the changeover switch accordingly. 104 is switched to the side for selecting the Ach or Bch duty signals AD and BD output from the comparator 106a. As a result, the Ach duty signal AD is output from the changeover switch 104 as shown in FIG.

  At time t4, the sawtooth wave J1 generated from the reference wave generator 106b gradually rises to the right and is supplied to the inverting input terminal “−” of the comparator 106a. When the level of the sawtooth wave J1 that gradually rises exceeds the level of the voltage generated on the Ach side supplied to the non-inverting input terminal “+” of the comparator 106a at time t5, the level of the Ach output from the comparator 106a is increased. The duty signal AD falls from “H” to “L”. Further, when the level of the sawtooth wave J1 gradually increases and falls from a predetermined apex at time t6 and becomes equal to or lower than the level of the generated voltage on the Ach side, the Ach duty signal AD changes from “L” to “H”. Get up.

  Further, when the fourth peak signal P1 is generated from time t1 due to the fall of the sawtooth wave J1 at time t6, the control unit 110 raises the switching control signal K1, and the changeover switch 103 is set to the Bch side accordingly. Switch to the side to select the generation voltage. Accordingly, since the Bch duty signal BD is output from the comparator 106a, the changeover switch 104 selects the Bch duty signal BD and outputs it as shown in FIG.

  At time t6, when the sawtooth wave J1 gradually rises and the level thereof exceeds the level of the generated voltage on the Bch side supplied to the non-inverting input terminal “+” of the comparator 106a at time t7, the comparator 106a. The Bch duty signal BD output from “H” falls from “H” to “L”. Further, when the level of the sawtooth wave J1 gradually rises and falls from a predetermined apex at time t8 and falls below the level of the generated voltage on the Bch side, the Bch duty signal BD changes from “L” to “H”. Get up.

  When the fifth peak signal P1 is generated from time t1 due to the fall of the sawtooth wave J1 at time t8, the control unit 110 lowers the switching control signal K1 and raises the switching control signal K2. In response, the changeover switch 103 is switched to the side for selecting the generated voltage on the Ach side, the header generation unit 108 generates the header signal Hd, and the changeover switch 104 is switched to the side for selecting the header signal Hd. As a result, the header signal Hd is output from the changeover switch 104 as shown in FIG. Thereafter, operations similar to those at times t1 to t8 are repeated.

  However, in the data signal DS shown in FIG. 10A, the “L” section of the header signal Hd is set to be longer than the cycle of the Ach or Bch duty signals AD and BD. Here, the cycle of the duty signals AD and BD is the length between the two peak signals P1, but the “L” section of the header signal Hd is the length between the three peak signals P1.

  Thus, although the header signal Hd is a signal that is clearly different from the Ach or Bch duty signals AD and BD, the duty signals AD and BD change although the ratios of “H” and “L” change, The basic frequency is constant. Therefore, the data signal output from the changeover switch 104 is replaced with the data signals DS1 to DS3 shown in FIGS. 11B to 11D instead of the same data signal DS as shown in FIG. There may be.

  The data signal DS1 includes a header signal Hd1 having a level opposite to that of the data signal DS and Ach and Bch duty signals AD1 and BD1. In the data signal DS2, the header signal Hd2 is at the same level as that of the data signal DS1, and the positions of “L” and “H” are switched to become “H” in the long section and “L” in the short section. The signal Hd2 and the same header signal Hd as the data signal DS are alternately arranged at the heads of the Ach and Bch duty signals AD and BD. In the data signal DS3, the same Ach and Bch duty signals AD1 and BD1 as the data signal DS1 are arranged behind the header signal Hd3 having a level opposite to that of the header signal Hd2, and the same header signal Hd1 as the data signal DS1 is arranged behind this. Further, duty signals AD1 and BD1 are arranged, and thereafter, the arrangement of the header signal Hd1 and the duty signals AD1 and BD1 is repeated.

  Next, calculation processing when the data signal DS shown in FIG. 10A is input to the microcomputer 114 via the photocoupler 112 will be described. The data signal DS is also shown in FIG.

  The microcomputer 114 includes a timer counter (not shown) and first and second registers. FIG. 12B shows the count value TC of the timer counter, FIG. 12C shows the first register value RT1 of the first register, and FIG. 12D shows the second register value RT2 of the second register.

  The timer counter resets the count value TC at the rising edge or falling edge of the data signal DS, and counts the “L” or “H” section of the data signal DS from zero. The first register acquires the count value TC at the falling edge of the data signal DS, and holds this as the first register value RT1. The second register acquires the count value TC at the rising edge of the data signal DS, and holds this as the second register value RT2.

  For example, when the header signal Hd falls at time t1 in FIG. 12, the count value TC “H1” of the “H” section of the header signal Hd of the timer counter is held as the first register value RT1 at this falling edge. The count value TC is reset after this hold. Then, the timer counter counts the “L” section of the header signal Hd. When the Ach duty signal AD rises at time t2, “H2” of the count value TC in the “L” section of the header signal Hd is held as the second register value RT2 at this rising edge, and the count value TC is held after this hold. Reset. The timer counter then counts the “H” section of the Ach duty signal AD.

  Next, when the Ach duty signal AD falls at time t3, the count value “A1” of the “H” section of the Ach duty signal AD is held as the first register value RT1 at this falling edge. The count value “A1” of the timer counter is reset. The timer counter then counts the “L” section of the Ach duty signal AD. When the Bch duty signal BD rises at time t4, the count value TC “A2” of the “L” section of the Ach duty signal AD is held as the second register value RT2 at this rising edge. The count value TC is reset. The timer counter then counts the “H” section of the Bch duty signal BD.

  Next, when the Bch duty signal BD falls at time t5, the count value “B1” of the “H” section of the Bch duty signal BD is held as the first register value RT1 at this falling edge. The count value “B1” of the timer counter is reset. The timer counter then counts the “L” section of the Bch duty signal BD. When the header signal Hd rises at time t6, the count value TC “B2” of the “L” section of the Bch duty signal BD is held as the second register value RT2 at this rising edge. The value TC is reset. Then, the timer counter counts the “H” section of the header signal Hd. Thereafter, the operations at times t1 to t7 are repeated.

  Further, the microcomputer 114 calculates each duty of the Ach duty signal AD and the Bch duty signal BD using the first and second register values RT1 and RT2 held in the first and second registers as described above. To do. The duty ADD of the Ach duty signal AD is calculated by A1 / (A1 + A2). The duty BDD of the Bch duty signal BD is calculated by B1 / (B1 + B2).

  As described above, the microcomputer 114 reads the first and second register values RT1 and RT2, and calculates the duty by interrupting at the falling edge or the rising edge of the duty signals AD and BD of the Ach and Bch. A method is also conceivable. With this method, the entire count value TC can be obtained with certainty, but the original processing of the microcomputer 114 may be delayed if interrupt processing is entered.

  Therefore, paying attention to the fact that the update of the first and second register values RT1, RT2 always takes a longer time than the basic period Dcy (see FIG. 12) of the duty signals AD, BD, the basic period Dcy is set to the main of the microcomputer 114. It was set longer than the loop time. By setting in this way, the microcomputer 114 reads the first and second register values RT1, RT2, and calculates the duty of the Ach and Bch duty signals AD, BD without interruption in the main loop. Can be done.

  As described above, in the power conversion device of the second embodiment, in the temperature detection circuit 100-3, the duty converter 106-1 generates the sawtooth wave J1 as a reference wave that repeats rising and falling at a constant period and the saw. The reference wave generator 106b that generates the pulsed peak signal P1 at the falling edge of the wave J1, the generated sawtooth wave J1, and the voltage selected by the changeover switch 103 are compared, and the voltage is set to a predetermined value. And a comparator 106a for converting the duty signals into duty signals AD and BD. Further, the control unit 110 controls to synchronize the selection timing of the selector switch 103 and the selector switch 104 and the generation timing of the header signal Hd of the header generation unit 108 with the peak signal P1 generated by the reference wave generation unit 106b. I did it.

  As a result, the selection operation of the changeover switches 103 and 104 and the generation operation of the header signal Hd of the header generation unit 108 are synchronized with the constant generated peak signal P1, so that the header signal Hd and the predetermined arrangement from the changeover switch 104 are synchronized. The duty signals AD and BD can be synchronized and output. As a result, the microcomputer 114 can appropriately acquire the duty signals AD and BD. In addition, since the operations of the changeover switches 103 and 104 and the header generation unit 108, which are a plurality of circuit means, are synchronized using only the peak signal P1 that is constantly generated, the entire circuit can be reduced in size.

  Further, the microcomputer 114 includes a timer counter that starts a count operation after resetting at the rising edge or falling edge of the header signal Hd and the duty signals AD and BD input from the changeover switch 104 via the signal transmission element, and the rising edge Or a register that holds the count value TC of the timer counter as the first and second register values RT1 and RT2 before the reset at the falling edge, and the first and second register values RT1 and RT2 held in the registers are The calculation process including the calculation for obtaining the duty of the duty signals AD and BD is performed. In the present embodiment, the period of the duty signals AD and BD is set longer than the period of the main loop of the microcomputer 114 that performs the arithmetic processing.

  Accordingly, since the cycle of the duty signals AD and BD is longer than the cycle of the main loop of the microcomputer 114, the microcomputer 114 reads the register value and calculates the duty of the duty signals AD and BD in the main loop. This can be done without interruption.

  Further, as shown in FIGS. 11A to 11D, the header signals Hd, Hd1 to Hd3 are set to be longer than the cycle of the duty signals AD, BD or AD1, BD1 in one cycle of the header signal. The signal is a unique signal including a section of “L” level or “H” level. Therefore, the header signals Hd, Hd1 to Hd3 can be reliably identified by the microcomputer 114, so that reliable signal transmission can be performed.

  In addition, as shown in FIGS. 13A and 13B, the header signals Hd4 and Hd5 are set to “L” shorter than the cycle of the duty signals AD, BD or AD1, BD1 in one cycle of the header signal. It may be a specific signal including a level or a section of “H” level.

  In this manner, the header signals Hd4 and Hd5 can be reliably identified and reliable signal transmission can be performed as described above. Further, since the cycle of the header signals Hd4 and Hd5 is shorter than the cycle of the duty signals AD, BD or AD1, BD1, the transmission of the data signal including the header signal Hd can be speeded up.

  Further, when the duty converter 106-1 converts the voltage selected by the changeover switch 103 into the duty signals AD and BD by pulse width modulation, the duty ratio of the duty signals AD and BD is limited within a predetermined value. To convert. The header signal Hd is set to a duty ratio that exceeds the limited duty ratio.

  In this way, since the duty ratio of the header signal Hd is different from the duty ratios of the duty signals AD and BD, the header signal Hd can be identified with certainty, whereby reliable signal transmission can be performed.

  Further, when the duty converter 106-1 converts the voltage selected by the selector switch 103 into the duty signals AD and BD by pulse width modulation, the duty ratio of the duty signals AD and BD is less than 100%. Restrict to.

  In this way, since there is always a rising edge or falling edge of the duty signals AD and BD, the microcomputer 114 can always identify the duty signals AD and BD.

(Third embodiment)
FIG. 14 is a block diagram showing a configuration of a temperature detection circuit of the power conversion device according to the third embodiment of the present invention.

  A temperature detection circuit 100-4 shown in FIG. 14 has a duty conversion unit 106-2, a comparator (operational amplification means) 106a using an operational amplifier, and a reference wave generator that generates a triangular wave J2 shown in FIG. 15B as a reference wave. The unit 106c is configured to perform PWM modulation, and as illustrated in FIG. 15A, the Ach or Bch duty signals AD and BD output from the duty converter 106-2 are converted into the second The change-over switch 104 is configured to select two at a time and output to the photocoupler 112.

  In addition to generating the triangular wave J2, the reference wave generating unit 106b generates a rectangular peak signal P2 that falls at the falling point of the triangular wave J2 and rises at the rising point, as shown in FIG. This is output to the control unit 110.

  The control unit 110 outputs the switching control signal K3 shown in FIG. 15D to the changeover switch 103 based on the peak signal P2, and sends the switching control signal K4 shown in FIG. 15E to the changeover switch 104 and the header generation unit 108. Output. That is, the changeover control signals K3 and K4 rise at the rising edge of the peak signal P2 at time t1, and the changeover switch 103 is switched to the side for selecting the voltage generated by the Ach side diode 122a, and the header generation unit 108 The header signal Hd is generated, and the changeover switch 104 is further switched to the side for selecting the header signal Hd. As a result, a header signal Hd is output from the changeover switch 104 as shown in FIG. In this header signal Hd, one cycle of “H” and “L” is equivalent to three cycles of the peak signal P2, and the first “H” section in that cycle becomes one “H” of the peak signal P2. It corresponds.

  After that, the peak signal P2 repeats a fixed cycle in which “L” and “H” are indicated by times t2, t3,..., And three cycles are completed from the rising edge that triggered the rising of the switching control signals K3, K4. When the switching control signal K4 falls at the rising edge of the fourth cycle shown, the control unit 110 switches the changeover switch 104 to the side for selecting the duty signal output from the duty conversion unit 106-2. As a result, the changeover switch 104 selects and outputs the Ach duty signal AD.

  That is, as shown between times t7 and t11, the peak signal P2 is repeated two cycles, and the Ach duty signal AD for two cycles is output from the changeover switch 104 to the photocoupler 112. In addition, during the time t7 to t11, the triangular wave J2 generated from the reference wave generating unit 106c at time t7 gradually rises to the right and is supplied to the inverting input terminal “−” of the comparator 106a. When the level of the triangular wave J2 exceeds the level of the Ach-side generated voltage supplied to the non-inverting input terminal “+” of the comparator 106a at time t7a, the Ach duty signal AD output from the comparator 106a is Rise from “L” to “H”.

  Further, when the triangular wave J2 falls from the upper peak at time t8 and becomes equal to or lower than the level of the generated voltage on the Ach side at time t8a, the duty signal AD of Ach falls from “H” to “L”. Similarly, when the level of the triangular wave J2 exceeds the level of the generated voltage on the Ach side at time t9a, the Ach duty signal AD rises from “L” to “H”, and the triangular wave J2 rises to the upper peak at time t10. When the voltage falls below the level of the voltage generated on the Ach side at time t10a, the Ach duty signal AD falls from “H” to “L”.

  Next, when the peak signal P2 rises at time t11, the switching control signal K3 falls at this rising edge. At this falling edge, the changeover switch 103 switches to the side for selecting the Bch generated voltage, whereby the Bch duty signal BD is output from the duty converter 106-2 and selected by the changeover switch 104.

  That is, as shown between times t11 and t15, the peak signal P2 is repeated two cycles, and the Bch duty signal BD for two cycles is output from the changeover switch 104 to the photocoupler 112. Further, during this time t11 to t15, the triangular wave J2 gradually rises at time t11 and is supplied to the inverting input terminal “−” of the comparator 106B. When the level of the triangular wave J2 exceeds the level of the Bch-side generated voltage supplied to the non-inverting input terminal “+” of the comparator 106B at time t11a, the Bch duty signal BD changes from “L” to “H”. Get up.

  Further, when the triangular wave J2 falls from the upper peak at time t12 and becomes equal to or lower than the level of the generated voltage on the Bch side at time t12a, the Bch duty signal BD falls from “H” to “L”. Similarly, when the level of the triangular wave J2 exceeds the level of the generated voltage on the Bch side at time t13a, the Bch duty signal BD rises from “L” to “H”, and the triangular wave J2 peaks at time t14. When the voltage falls below the level of the generated voltage on the Bch side at time t14a, the Bch duty signal BD falls from “H” to “L”.

  Further, the changeover control signals K3 and K4 rise due to the rising edge of the peak signal P2 at time t15, and the changeover switch 103 is switched to the side for selecting the voltage generated by the Ach side diode 122a, and the header generation unit 108 The header signal Hd is generated, and the changeover switch 104 is further switched to the side for selecting the header signal Hd. As a result, a header signal Hd is output from the changeover switch 104 as shown in FIG. Thereafter, operations similar to those at times t1 to t15 are repeated.

  The reason why two duty signals AD or BD of the same channel follow the header signal Hd in this way is as follows. At the timing of time t7 indicated by T1, the header signal Hd is switched to the Ach duty signal AD at the same “L” level, and at the timing of time t11 indicated by T2, the same “L” is applied from the Ach duty signal AD to the Bch duty signal BD. At this time, since the level is the same, the microcomputer 114 cannot determine the switching timings T1 and T2. Therefore, if the “L” section between “H” and “H” of two consecutive Ach duty signals AD is detected and used for duty calculation, the duty can be accurately obtained. The same applies to the Bch side.

  By the way, in the data signal DS6 shown in FIG. 15A, the “L” section of the header signal Hd is set longer than the period of the duty signals AD and BD of Ach or Bch. Thus, although the header signal Hd is a signal that is clearly different from the Ach or Bch duty signals AD and BD, the duty signals AD and BD change although the ratios of “H” and “L” change, The basic frequency is constant. Accordingly, the data signals output from the changeover switch 104 are data signals DS7 to DS9 shown in FIGS. 16B to 16D instead of the same data signal DS6 as that shown in FIG. 15A shown in FIG. There may be.

  In the data signal DS7, the header signal Hd1 has a level opposite to that of the data signal DS6. In the data signal DS8, the header signal Hd2 is at the same level as that of the data signal DS7, and the positions of “L” and “H” are switched to become “H” in the long section and “L” in the short section. The data signal DS9 has a configuration in which a header signal Hd3 having a level opposite to that of the header signal Hd2 and a header signal Hd1 of the data signal DS7 are alternately arranged at the head of the Ach duty signal AD.

  As described above, in the power conversion device according to the third embodiment, in the temperature detection circuit 100-4, the duty conversion unit 106-2 generates the triangular wave J2 as a reference wave that rises in a triangular shape at a constant period, and the triangular wave J2 A reference wave generation unit 106c that generates a square-wave peak signal P2 that alternately repeats rising and falling at peaks above and below, a generated triangular wave J2, and a voltage selected by the changeover switch 103. The comparator 106a is configured to compare and convert the voltage into duty signals AD and BD having a predetermined duty ratio.

  Furthermore, the control unit 110 performs control to synchronize the selection timing of the selector switch 103 and the selector switch 104 and the header signal generation timing of the header generation unit 108 with the peak signal P2 generated by the reference wave generation unit 106c. In addition, the selector switch 104 is configured to perform control such that a plurality of duty signals AD or BD of the same channel are successively arranged after the header signal Hd.

  As a result, the waveform breakage (shown in the circle M1 in FIG. 17C) that occurs when the channels of the duty signals AD and BD are switched can be prevented as follows. FIG. 17A shows a data signal DS output from the changeover switch 104 to the microcomputer 114 in the temperature detection circuit 100-3 of the second embodiment. In the duty conversion unit 106-1 for obtaining the data signal DS, it is assumed that the levels of the generated voltages of Ach and Bch are high near the peak of the sawtooth wave J1, as shown in FIG.

  In this case, as shown in FIG. 17 (d) in which the vicinity of time t6 is enlarged, as shown in FIG. 17 (c) when the sawtooth wave J1 exceeds the generated voltage on the Ach side in the vicinity of arrival at time t6. Then, the edge e1 of the Ach duty signal AD rises. At this time, since the generated voltage on the Ach side is near the peak of the sawtooth wave J1, the sawtooth wave J1 exceeds the generated voltage and immediately falls after reaching the peak at time t6. Since the falling of the sawtooth wave J1 is performed by discharging while charging and discharging a capacitor (not shown) for generating the sawtooth wave J1, the discharge may take more time than necessary. For this reason, it may take from time t6 to time t6c when time elapses more than necessary.

  Thus, when the discharge takes time, the slope of the falling edge of the sawtooth wave J1 becomes smooth. In the case of this smooth falling edge, when switching from the Ach-side generated voltage to the Bch-side generated voltage is performed at time t6a immediately after the peak at time t6, the voltage during the switching is set to the rising edge of the sawtooth wave J1. The falling edge crosses downward. As a result, the edge e2 of the Ach duty signal AD falls. Here, when the falling edge of the sawtooth wave J1 is not smooth and is steep due to immediate discharge, it falls before the above switching, so that it does not cross the voltage during switching.

  At time t6b immediately after time t6a when the smooth falling edge crosses the voltage being switched as described above, the voltage is switched to the generated voltage on the Bch side, and when the falling edge of the sawtooth wave J1 crosses downward, Bch The edge e3 of the duty signal BD rises. Such an operation causes a waveform crack as shown between time t6a and time t6b when switching from Ach to Bch. When this waveform crack occurs, there is a possibility that the microcomputer 114 recognizes it as an incorrect value.

  Therefore, in the temperature detection circuit 100-4 of the third embodiment, the reference wave is set to the triangular wave J2, and the Ach and Bch duty signals AD and BD are output to the microcomputer 114 in a plurality of cycles. The triangular wave J2 is not an instantaneous voltage drop from the upper peak as in the sawtooth wave J1, and the voltage change from the upper peak is small, so that the voltage at the time of channel switching of the duty signals AD and BD is not crossed. Therefore, waveform breakage does not occur when switching channels.

  Further, at least two or more identical channels of the duty signal AD or BD are continuous. As a result, when the channels of the duty signals AD and BD are switched, the same “L” or “H” level is continuous, which data signal cannot be recognized in this continuous section, and the microcomputer 114 cannot obtain an accurate duty. Can be eliminated. In other words, if the duty signal AD of two identical channels (for example, Ach) is continuous, the “L” section between “H” and “H” can be detected. Can be requested.

  Also, in FIGS. 16A to 16D, header signals Hd, Hd1 to Hd3, which are inherent signals including a section of “L” level or “H” level longer than the period of the duty signals AD and BD, are shown. In addition to the above, header signals Hd4 and Hd5 in the data signals DS10 and DS11 shown in FIGS. 18A and 18B may be used.

(Fourth embodiment)
FIG. 19 is a block diagram showing the configuration of the temperature detection circuit of the power conversion device according to the fourth embodiment of the present invention.

  The temperature detection circuit 100-5 of the fourth embodiment shown in FIG. 19 is different from the temperature detection circuit 100 of the first embodiment shown in FIG. 2 in that each of the Ach side diode 122a and the Bch side diode 122b. The same duty conversion unit 106 was connected to the anode side of each of these, and the output ends of these duty conversion units 106 were connected to the input side of the three-input type changeover switch 104-1. Further, the changeover switch 104-1 receives the Ach or Bch duty signal converted by each duty converter 106 and the header signal from the header generator 108 in accordance with the control of the controller 110, as shown in FIGS. The signal array shown in c) is selected and output to the photocoupler 112.

  According to the temperature detection circuit 100-5 of the power conversion device of the fourth embodiment having such a configuration, the following effects can be obtained as compared with the temperature detection circuit 100 of the first embodiment. In the temperature detection circuit 100 of the first embodiment, the generated voltages of the Ach side and Bch side diodes 122 a and 122 b are alternately selected by one changeover switch 103 and output to one duty converter 106. For this reason, when noise is generated during switching by the changeover switch 103, the duty converter 106 converts the noise into a duty signal together with each generated voltage. For this reason, the voltage level of the duty signal may fluctuate due to the influence of noise. When the voltage level of the duty signal fluctuates as described above, the microcomputer 114 may not be able to read the duty signal accurately.

  Therefore, if the same duty converter 106 is connected to the anode side of each of the Ach side and Bch side diodes 122a and 122b as in the temperature detection circuit 100-5 of the fourth embodiment, the preceding stage of each duty converter 106 is provided. Thus, noise is not added to the generated voltage, so that each duty converter 106 can appropriately convert the generated voltage into a duty signal. Accordingly, each duty signal can be properly read by the microcomputer 114.

  However, in the above temperature detection circuit 100-6, if the two duty converters 106 are not synchronized, each generated voltage is converted into a duty signal at different timings. In this case, the waveform of the duty signal may be disturbed depending on the switching timing of the selector switch 104-1. Therefore, as shown in FIG. 20, a sawtooth wave J1 as a reference wave is input from one reference wave generator 106b to each inverting input terminal “−” of two comparators 106a corresponding to the two duty converters 106. May be synchronized.

  As shown in FIG. 21, the detailed circuit of the reference wave generator 106b includes a power supply 126, constant current circuits 131a and 131b, a comparator 134, switches 135 and 136, a capacitor C1, and resistors Rc, Rd, and Re. And is configured. In this configuration, the comparator 134 detects the voltage of the capacitor C1 via the non-inverting input terminal “+”, and if the voltage is low, the constant current circuit 131a supplies current to the capacitor C1. As a result, the voltage gradually increases, and when this voltage reaches a predetermined value, the comparator 134 is turned on to generate the peak signal P1, and the switches 135 and 136 are turned on by the peak signal P1.

  As a result, the charge of the capacitor C1 is discharged by the constant current circuit 131b connected in series to the constant current circuit 131a and having a current drawn twice as large as that of the constant current circuit 131a, and the voltage value of the capacitor C1 rapidly decreases. When this voltage falls below a predetermined value, the peak signal P1 disappears, the switches 135 and 136 are turned off, and charging to the capacitor C1 is started again. Thereafter, the same process is repeated, and the sawtooth wave J1 is continuously generated.

  Thus, since the comparator 106a which is two duty conversion means performs duty conversion based on one sawtooth wave J1, this conversion operation is synchronized. Therefore, when the duty signals AD and BD are alternately selected by the selector switch 104-1 at the subsequent stage of each comparator 106a, the duty signals AD and BD can be alternately selected at a predetermined cycle from the head at the same timing. Therefore, when the duty signals AD and BD are not synchronized, the selection positions of the duty signals AD and BD are different and the output waveform from the changeover switch 104-1 is not disturbed. In addition, although the reference wave generation unit 106b that generates the sawtooth wave J1 is used in the temperature detection circuit 100-6, a reference wave generation unit 106c that generates the triangular wave J2 may be used.

  In addition, in the temperature detection circuits 100 to 100-6 in the above-described embodiment, the duty converter 106 converts the voltage generated on the Ach side and Bch with an A / D (analog / digital) converter 141 as shown in FIG. A configuration may be adopted in which a duty signal is obtained by converting into a digital signal and reading the width of the digital signal with a counter value by the timer 142. Reading the width of the digital signal with the counter value by the timer 142 means, for example, that one period of the duty signal is “100”, the width of “H” of the digital signal is “10”, and the width of “L” is “ 90 ”and a duty signal with a duty“ 10 ”is obtained.

DESCRIPTION OF SYMBOLS 10 Power converter 20 Converter 21, 22 Switching element 23 Capacitor 24 Reactor 30 Inverter 34-39 Switching element D1-D8 Diode MG Motor generator 100, 100-1 to 100-6 Temperature detection circuit 102 Switching circuit 103, 103-1, 104, 104-1 changeover switch 106 Duty conversion unit 108 Header generation unit 110 Control unit 112 Photocoupler 114 Microcomputer 116 Buffer 35a, 35b Switching element 120a, 120b Package 122a, 122b Diode 124a, 124b, 131a, 131b Constant current circuit 126 Power supply Ra, Rb, Rc, Rd, Re Resistor 130a, 130b Hold unit 106a, 134 Comparator 106b, 106c Quasi wave generator P1, P2 peak signal J1 sawtooth J2 triangular wave K1, K2, K3, K4 switch control signal Hd header signal AD, BD duty signal DS~DS11 data signal 135 and 136 switch 141 A / D converter 142 timer C1 capacitor

Claims (12)

A converter having a plurality of semiconductor elements for boosting a DC voltage and an inverter having a plurality of semiconductor elements for converting the boosted voltage in the converter into an AC voltage; In a power conversion device having a plurality of temperature detection elements that are individually associated and generate a voltage corresponding to the temperature of each semiconductor element,
First selection means for selecting voltages generated by the plurality of temperature detection elements;
Duty conversion means for converting the voltage selected by the first selection means into a duty signal having a predetermined duty ratio by pulse width modulation;
Header generating means for generating a header signal which is a unique duty signal having a period different from that of the duty signal by the pulse width modulation;
Second selection means for selecting the header signal generated by the header generation means and the duty signal converted by the duty conversion means;
Voltages generated by the plurality of temperature detection elements are alternately selected by the first selection unit, and alternately by the first selection unit after the header signal generated by the header generation unit by the second selection unit. is selected is converted by the duty converting means is a duty signal are sequentially arranged based on the generated voltage of the temperature detecting element corresponding to each different said semiconductor element by Rukoto, the arrangement order of the duty signal for the header signal and the top as is repeated, and control means for controlling such that the header signal and the duty signal is selected,
Computation control means connected to the output side of the second selection means via a signal transmission element that transmits the header signal and the duty signal selected by the second selection means,
The arithmetic control unit stores characteristic variations of the temperature detection element, and temperature information detected from a duty signal input from the second selection unit via the signal transmission element is stored in the stored characteristic variation. The power converter characterized by correcting by . A converter having a plurality of semiconductor elements for boosting a DC voltage and an inverter having a plurality of semiconductor elements for converting the boosted voltage in the converter into an AC voltage; In a power conversion device having a plurality of temperature detection elements that are individually associated and generate a voltage corresponding to the temperature of each semiconductor element,
First selection means for selecting voltages generated by the plurality of temperature detection elements;
Duty conversion means for converting the voltage selected by the first selection means into a duty signal having a predetermined duty ratio by pulse width modulation;
Header generating means for generating a header signal which is a unique duty signal having a period different from that of the duty signal by the pulse width modulation;
Second selection means for selecting the header signal generated by the header generation means and the duty signal converted by the duty conversion means;
Voltages generated by the plurality of temperature detection elements are alternately selected by the first selection unit, and alternately by the first selection unit after the header signal generated by the header generation unit by the second selection unit. The duty signals selected by the duty conversion means are sequentially arranged, and the header signal and the duty signal are selected so that the arrangement order of the duty signals starting from the header signal is repeated. Control means for controlling,
The duty conversion means generates a reference wave that repeats rising and falling at a constant period and generates a pulse-like peak signal at the falling edge of the reference wave, and the reference wave generating means generates the reference wave. And amplifying means for comparing the reference wave and the voltage selected by the first selection means to convert the voltage into a duty signal having a predetermined duty ratio ,
The control unit synchronizes the selection timing of the first selection unit and the second selection unit and the generation timing of the header signal of the header generation unit with the peak signal generated by the reference wave generation unit. The power converter characterized by performing control . A converter having a plurality of semiconductor elements for boosting a DC voltage and an inverter having a plurality of semiconductor elements for converting the boosted voltage in the converter into an AC voltage; In a power conversion device having a plurality of temperature detection elements that are individually associated and generate a voltage corresponding to the temperature of each semiconductor element,
First selection means for selecting voltages generated by the plurality of temperature detection elements;
Duty conversion means for converting the voltage selected by the first selection means into a duty signal having a predetermined duty ratio by pulse width modulation;
Header generating means for generating a header signal which is a unique duty signal having a period different from that of the duty signal by the pulse width modulation;
Second selection means for selecting the header signal generated by the header generation means and the duty signal converted by the duty conversion means;
Voltages generated by the plurality of temperature detection elements are alternately selected by the first selection unit, and alternately by the first selection unit after the header signal generated by the header generation unit by the second selection unit. The duty signals selected by the duty conversion means are sequentially arranged, and the header signal and the duty signal are selected so that the arrangement order of the duty signals starting from the header signal is repeated. Control means for controlling ,
The duty conversion means generates a triangular wave as a reference wave that alternately repeats rising and falling with a constant slope, and generates a second peak signal that rises at the rising point of the triangular wave and falls at the falling point. The reference wave generating means, the triangular wave generated by the second reference wave generating means, and the voltage selected by the first selecting means are compared to convert the voltage into a duty signal having a predetermined duty ratio. Second operational amplification means
The control means performs control to synchronize the selection timing of the first selection means and the second selection means and the generation timing of the header signal of the header generation means with the second peak signal, The power conversion apparatus according to claim 1, wherein the second selection unit performs selection such that at least two or more identical duty signals are successively arranged after the header signal . A holding means for holding and outputting voltages generated by the plurality of temperature detection elements is connected between the plurality of temperature detection elements and the first selection means,
The control means performs holding control so that the generated voltages of the plurality of temperature detection elements are held in the holding means and output to the first selection means, and during the holding control, the first selection means The generated voltages of the plurality of temperature detecting elements are alternately selected, and the duty signal obtained by converting the alternately selected generated voltages by the duty conversion means is arranged after the header signal, Controlling the selection of the first selection means and the second selection means so that the set is repeated a plurality of times,
The arithmetic control means compares the same plurality of sets of duty signals selected by the second selection means, and detects the temperature information only when the difference between them is within a predetermined reference value. The power converter according to any one of claims 1 to 3, wherein the power converter is employed. A holding means for holding and outputting voltages generated by the plurality of temperature detection elements is connected between the plurality of temperature detection elements and the first selection means,
The control means performs holding control so that the generated voltages of the plurality of temperature detection elements are held in the holding means and output to the first selection means, and during the holding control, the first selection means The generated voltages of the plurality of temperature detecting elements are alternately selected, and the duty signal obtained by converting the alternately selected generated voltages by the duty conversion means is arranged after the header signal, Controlling the selection of the first selection means and the second selection means so that the set is repeated a plurality of times,
The arithmetic control means excludes duty signals exceeding a predetermined reference value from duty signals in the same plurality of sets selected by the second selection means, and sets duty signals that are not excluded to the temperature information. It employ | adopts for a detection, The power converter device of any one of Claims 1-4 characterized by the above-mentioned. The arithmetic control means includes a counter that starts a count operation after reset at a rising edge or a falling edge of the header signal and the duty signal input from the second selection means via the signal transmission element, and the rising edge A register that holds the count value of the counter as a register value before the reset at the edge or the falling edge, and includes an arithmetic process including an operation for obtaining the duty of the duty signal using the register value held in the register The power conversion device according to any one of claims 1 to 5, wherein the cycle of the duty signal is set to be longer than the cycle of the main loop of the calculation control means that performs the calculation process.   7. The header signal is a specific signal including a section of “L” level or “H” level longer than the period of the duty signal in one period of the header signal. The power converter device according to any one of the above.   7. The header signal is a unique signal including a section of “L” level or “H” level shorter than the period of the duty signal in one cycle of the header signal. The power converter device according to any one of the above. When converting the voltage selected by the first selection unit into a duty signal by pulse width modulation, the duty conversion unit performs conversion by limiting the duty ratio of the duty signal to a predetermined value,
The power converter according to claim 1, wherein the header signal is set to a duty ratio that exceeds the limited duty ratio.   The duty conversion means restricts the duty ratio of the duty signal to be less than 100% when converting the voltage selected by the first selection means into a duty signal by pulse width modulation. The power converter device according to any one of claims 1 to 8. A converter having a plurality of semiconductor elements for boosting a DC voltage and an inverter having a plurality of semiconductor elements for converting the boosted voltage in the converter into an AC voltage; In a power conversion device having a plurality of temperature detection elements that are individually associated and generate a voltage corresponding to the temperature of each semiconductor element,
A plurality of duty conversion means connected to the voltage generation sides of the plurality of temperature detection elements, respectively, and converting the generated voltage into a duty signal having a predetermined duty ratio by pulse width modulation;
Header generating means for generating a header signal which is a unique duty signal having a period different from that of the duty signal by the pulse width modulation;
Selection means for selecting the header signal generated by the header generation means and each duty signal converted by the plurality of duty conversion means;
In the selecting means, a duty signal based on the generated voltage of the temperature detecting element corresponding to each of the semiconductor elements having different by the plurality of Rukoto converted by the duty converting unit after the header signal generated by the header generation means sequentially A control means for controlling the header signal and the duty signal to be selected such that the order of arrangement of the duty signal is repeated and the header signal is repeated .
Computation control means connected to the output side of the selection means via a signal transmission element that transmits the header signal and the duty signal selected by the selection means,
The arithmetic control unit stores the characteristic variation of the temperature detection element, and corrects the temperature information detected from the duty signal input from the selection unit via the signal transmission element with the stored characteristic variation. The power converter characterized by the above-mentioned. The plurality of duty conversion means convert a voltage generated by the plurality of temperature detection elements into a duty signal using a reference wave generated from one reference wave generation means for generating a reference wave having a fixed period. The power conversion device according to claim 11 .

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