JP5450995B2 - IMAGING DEVICE AND IMAGING DEVICE CONTROL METHOD - Google Patents

Description

  The present invention relates to an imaging apparatus and a method for controlling the imaging apparatus.

  An imaging sensor such as a CMOS image sensor mounted on an imaging device such as an electronic camera has a pixel arrangement in which a plurality of pixels are arranged in a row direction and a column direction. Many electronic cameras in recent years are equipped with an imaging sensor having a pixel array including millions to tens of millions of pixels. It is very difficult to always manufacture an image sensor in which all pixels in the pixel array appropriately generate a signal corresponding to the amount of incident light, and there are some “defective pixels” that do not operate normally in the pixel array. Can be included.

  On the other hand, there is a method of detecting a defective pixel in an imaging sensor based on a photographed image and storing an address of the detected defective pixel in a memory of the imaging device in a manufacturing process of the imaging device. According to this method, the imaging apparatus can interpolate the image signal output from the defective pixel by using the image signal of the surrounding pixels by referring to the address stored in the memory.

  Alternatively, after the imaging device is shipped, when the imaging device receives a shooting instruction, the imaging device determines the difference between the level of the image signal output from each pixel of the pixel array of the imaging sensor and the level of its surrounding pixels. There is a method of detecting defective pixels in real time and storing them in a memory. Also by this method, the imaging apparatus can interpolate the image signal output from the defective pixel by using the image signal of the surrounding pixels by referring to the address stored in the memory.

  Here, it is conceivable that the cause of the defect is that a dark current is generated according to temperature and exposure time, or that the pixel itself is not formed properly and does not normally output a signal. These phenomena occur every time shooting is performed under the same shooting conditions.

  On the other hand, there is a “flashing defective pixel” in which a defect occurs or does not occur every time shooting is performed even under the same shooting conditions. In recent years, with the downsizing of pixels due to the increase in the number of pixels in an image sensor, the frequency of occurrence of blinking defects tends to increase, and accurate detection and interpolation have also been required for blinking defective pixels.

  Here, as one of the generation factors of the blinking defect, it has been found from the recent research that the 1 / f noise is generated in the amplification transistor of the pixel as a main factor. This phenomenon may or may not occur at every shooting even under the same shooting conditions.

On the other hand, in Patent Document 1, in a camera, an image is acquired over a plurality of frame periods, and a pixel whose luminance value fluctuation range in the acquired image of a plurality of frames exceeds a threshold is determined as a blinking defective pixel. ing.
JP 2003-298949 A

  In the method described in Patent Document 1, an image is acquired over a plurality of frame periods in order to detect a blinking defect with sufficient accuracy. As a result, an enormous amount of time is spent detecting pixels having blinking defects.

  Thereby, for example, the manufacturing time of the imaging device increases with an increase in the time spent in the defective pixel detection step in the manufacturing process of the imaging device. Therefore, the manufacturing cost of the imaging device may increase.

  Further, it takes a long time to complete the processing in the automatic detection function of the scratched pixels performed by the user of the imaging apparatus after shipment. For this reason, the user-friendliness of the imaging device is deteriorated.

  An object of the present invention is to improve the detection accuracy of a pixel having a blinking defect and reduce the time for detecting a pixel having a blinking defect.

An imaging apparatus according to a first aspect of the present invention includes a first photoelectric conversion unit, a second photoelectric conversion unit, a charge-voltage conversion unit, and charge generated in the first photoelectric conversion unit as the charge-voltage conversion. A first transfer unit for transferring to the unit, a second transfer unit for transferring the charge generated in the second photoelectric conversion unit to the charge-voltage conversion unit, a reset unit for resetting the charge-voltage conversion unit, A pixel array in which a plurality of pixel units each including an output unit that outputs a signal corresponding to a voltage of the charge-voltage converter is arranged in a row direction and a column direction;
A driving unit for driving the pixel array, in accordance with the signal output from the pixel array, and detecting means for detecting a defective pixel unit in the pixel array, the signal of the defective pixel units detected by the detecting means, Correcting means for correcting using a signal of a peripheral pixel unit of the detected defective pixel unit , and the driving unit is configured to detect a defective pixel unit by the detecting means in a one-frame period in a detection mode. The first transfer unit does not transfer the charge of the first photoelectric conversion unit to the charge voltage conversion unit, and the second transfer unit transfers the charge of the second photoelectric conversion unit. to not transferred to the charge-voltage converter, and signal to the output unit in a state in which the charge-voltage converter is reset according to the voltage of the charge-voltage converter by the reset unit The so as to output a plurality of times, and drives each pixel unit of the pixel array.

According to a second aspect of the present invention, there is provided a method for controlling an imaging apparatus, comprising: a first photoelectric conversion unit; a second photoelectric conversion unit; a charge-voltage conversion unit; and a charge generated in the first photoelectric conversion unit A first transfer unit that transfers to the charge-voltage conversion unit; a second transfer unit that transfers charges generated by the second photoelectric conversion unit to the charge-voltage conversion unit; and a reset that resets the charge-voltage conversion unit And a pixel array in which a plurality of pixel units each including an output unit that outputs a signal corresponding to the voltage of the charge-voltage converter is arranged in a row direction and a column direction, and a drive unit that drives the pixel array If, depending on the signal output from the pixel array, and detecting means for detecting a defective pixel unit in the pixel array, the signal of the defective pixel units detected by the detecting means, of the detected defective pixel units surrounding pixels Uni A control method of an imaging device having a correcting means for correcting using preparative signals, and setting the operation mode, the detection mode for detecting a defective pixel unit by the detection means, said detection mode The first transfer unit does not transfer the charge of the first photoelectric conversion unit to the charge voltage conversion unit during one frame period , and the second transfer unit does not transfer the second photoelectric conversion unit. The output unit outputs a plurality of signals corresponding to the voltage of the charge-voltage conversion unit while the charge-voltage conversion unit is reset by the reset unit so that the charge of the conversion unit is not transferred to the charge-voltage conversion unit. And a step of driving each of the pixel units of the pixel array by the driving unit so that the output is performed twice.

  According to the present invention, it is possible to improve the detection accuracy of a pixel having a blinking defect and reduce the time for detecting a pixel having a blinking defect.

  An imaging apparatus 100 according to a first embodiment of the present invention will be described with reference to FIG. FIG. 1 is a diagram illustrating a configuration of an imaging apparatus 100 according to the first embodiment of the present invention.

  The imaging apparatus 100 has a still image shooting mode, a moving image shooting mode, a detection mode, and the like as operation modes. The still image shooting mode is a mode in which each unit of the imaging apparatus 100 performs an operation for shooting a still image. The moving image shooting mode is a mode in which each unit of the imaging apparatus 100 performs an operation for moving image shooting. The detection mode is a mode for detecting a defective pixel in a pixel array PA described later by the detection unit 112b described later.

  The optical system 101 includes a lens 101a and a diaphragm 101b. The lens 101 a forms an image of the subject on the imaging surface of the imaging sensor 103. The diaphragm 101b is provided between the lens 101a and the image sensor 103 on the optical path, and adjusts the amount of light guided to the image sensor 103 after passing through the lens 101a.

  The mechanical shutter 102 is provided in front of the image sensor 103 on the optical path, and controls exposure. The mechanical shutter 102 has a function of shielding light after exposing the image sensor 103 for a predetermined time.

  The image sensor 103 converts the image of the subject formed in the pixel array into an image signal. The image sensor 103 is, for example, a CMOS image sensor. The image sensor 103 reads out the image signal (analog signal) from the pixel array and outputs it.

  Specifically, as shown in FIG. 2, the image sensor 103 includes a pixel array PA, a vertical scanning circuit (driving unit) 10, a reading circuit 20, a horizontal scanning circuit 30, and an output amplifier 232. FIG. 2 is a diagram illustrating the configuration of the image sensor 103.

  In the pixel array PA, a plurality of pixels 201 are arranged in the row direction and the column direction. As shown in FIG. 3, each pixel 201 includes a photoelectric conversion unit 202, a transfer unit 203, a charge voltage conversion unit 207, a reset unit 204, an output unit 206, and a selection unit 205. FIG. 3 is a diagram illustrating the configuration of each pixel 201 and the configuration for one column in the readout circuit 20.

  The photoelectric conversion unit 202 performs a charge accumulation operation in which charges corresponding to light are generated and accumulated for a predetermined accumulation time. The photoelectric conversion unit 202 is, for example, a photodiode.

  The transfer unit 203 transfers the charge generated by the photoelectric conversion unit 202 to the charge voltage conversion unit 207. The transfer unit 203 is, for example, a transfer MOS transistor (transfer switch), and is turned on when an active control signal PTX is supplied from the vertical scanning circuit 10 to the gate thereof, whereby charges generated in the photoelectric conversion unit 202 are transferred. Transfer to the charge voltage converter 207.

  The charge-voltage converter 207 converts the transferred charge into a voltage. The charge voltage conversion unit 207 is, for example, a floating diffusion layer (floating diffusion).

  The reset unit 204 resets the charge voltage conversion unit 207. The reset unit 204 is, for example, a reset MOS transistor, and is turned on when an active control signal PRES is supplied from the vertical scanning circuit 10 to the gate thereof, thereby bringing the charge-voltage conversion unit 207 to a level corresponding to the power supply SVDD. Reset.

  The output unit 206 outputs a signal corresponding to the voltage of the charge-voltage conversion unit 207 to the vertical output line 222. That is, the output unit 206 outputs a noise signal corresponding to the voltage of the charge voltage conversion unit 207 to the vertical output line 222 in a state after the reset of the charge voltage conversion unit 207 by the reset unit 204. The output unit 206 outputs an optical signal corresponding to the voltage of the charge voltage conversion unit 207 to the vertical output line 222 in a state where the charge of the photoelectric conversion unit 202 is transferred to the charge voltage conversion unit 207 by the transfer unit 203. Here, the optical signal is a signal in which a noise signal is superimposed on a signal generated by the photoelectric conversion unit 202. The output unit 206 is, for example, an amplifying MOS transistor (pixel amplifier), and performs a source follower operation together with the load current source 221 connected to the vertical output line 222, whereby a signal corresponding to the voltage of the charge voltage conversion unit 207 is obtained. Output to the vertical output line 222.

  The selection unit 205 puts the pixel 201 into a selected state / non-selected state. The selection unit 205 is, for example, a selection MOS transistor (selection switch), and is turned on when an active control signal PSEL is supplied from the vertical scanning circuit 10 to the gate thereof, thereby bringing the pixel 201 into a selected state. The selection unit 205 turns off the pixel 201 when the non-active control signal PSEL is supplied from the vertical scanning circuit 10 to the gate thereof, thereby bringing the pixel 201 into a non-selected state.

  The pixel array PA has an effective area EA and a light shielding area SA. The configuration of each pixel of the light shielding area SA is different from the configuration of each pixel of the effective area EA in that the photoelectric conversion unit 202 is shielded from light, but is the same as the configuration of each pixel of the effective area EA in other points.

  The vertical scanning circuit 10 shown in FIG. 2 scans the pixel array PA in the vertical direction. That is, the vertical scanning circuit 10 selects a predetermined row in the pixel array PA by supplying an active control signal PSEL to pixels in a predetermined row. Further, the vertical scanning circuit 10 drives the pixels in the predetermined row in the pixel array PA by supplying the control signals PTX and PRES to the pixels in the predetermined row.

  For example, the vertical scanning circuit (driving unit) 10 has the pixel array PA so that the transfer unit 203 does not transfer the charge of the photoelectric conversion unit 202 to the charge-voltage conversion unit 207 during one frame period in the detection mode. Each pixel is driven. In the detection mode, the vertical scanning circuit 10 drives each pixel of the pixel array PA as follows. In the vertical scanning circuit 10, the output unit 206 outputs a noise signal corresponding to the voltage of the charge-voltage conversion unit 207 a plurality of times after the charge-voltage conversion unit 207 is reset by the reset unit 204 during one frame period. Thus, each pixel of the pixel array PA is driven.

  That is, in the detection mode, a noise signal is output a plurality of times without outputting an optical signal from each pixel, so that the light signal and the noise signal are output a plurality of times (compared to the above-described still image shooting mode, etc.). The time for outputting a signal from each pixel can be shortened.

  The read circuit 20 reads a signal from the pixel array PA. Specifically, the configuration of each column in the readout circuit 20 includes a transfer switch 225, a transfer switch 224, a transfer capacitor CTS 227, a transfer capacitor CTN 226, a transfer switch 229, and a transfer switch 228.

  The transfer switch 224 is turned on when an active control signal PTN is supplied to the gate from the vertical scanning circuit 10, thereby transferring the noise signal output from the pixel 201 to the vertical output line 222 to the transfer capacitor CTN 226. The transfer switch 224 is turned off when the non-active control signal PTN is supplied to its gate. Thus, the transfer capacitor CTN 226 holds the transferred noise signal.

  The transfer switch 225 is turned on when the active control signal PTS is supplied from the vertical scanning circuit 10 to the gate thereof, thereby transferring the optical signal output from the pixel 201 to the vertical output line 222 to the transfer capacitor CTS 227. The transfer switch 225 is turned off when the non-active control signal PTS is supplied to its gate. Thereby, the transfer capacitor CTS 227 holds the transferred optical signal.

  The transfer switch 228 is turned on when the active control signal PHN is supplied from the horizontal scanning circuit 30 to the gate thereof, thereby outputting the noise signal held in the transfer capacitor CTN 226 to the horizontal output line 233. Here, since the horizontal output line 233 has the parasitic capacitance CHN230, the noise signal is output to the horizontal output line 233 by capacitive division of the capacitance value of the transfer capacitance CTN226 and the capacitance value of the parasitic capacitance CHN230.

  The transfer switch 229 is turned on when the active control signal PHS is supplied to the gate from the horizontal scanning circuit 30, thereby outputting the optical signal held in the transfer capacitor CTS 227 to the horizontal output line 234. Here, since the horizontal output line 234 has the parasitic capacitance CHS 231, the optical signal is output to the horizontal output line 234 by capacitive division of the capacitance value of the transfer capacitance CTS 227 and the capacitance value of the parasitic capacitance CHN 230.

  The horizontal scanning circuit 30 shown in FIG. 2 scans the readout circuit 20 in the horizontal direction. That is, the horizontal scanning circuit 30 sequentially transfers the noise signal of each column from the transfer capacitor CTN 226 to the horizontal output line 233 by sequentially turning on the transfer switches 228 of each column in the readout circuit 20. The horizontal scanning circuit 30 sequentially turns on the transfer switch 229 of each column in the readout circuit 20 to sequentially transfer the optical signal of each column from the transfer capacitor CTS 227 to the horizontal output line 234.

  The output amplifier 232 generates an image signal (analog signal) by taking the difference between the noise signal transmitted through the horizontal output line 233 and the optical signal transmitted through the horizontal output line 234 to generate an analog signal. Output to the processing circuit 104.

  For example, the output amplifier (difference unit) 232 obtains the image signal by taking the difference between the light signal and the noise signal from each pixel of the pixel array PA during one frame period in the still image shooting mode and the moving image shooting mode. Generate.

  For example, the output amplifier (difference unit) 232 generates a first difference image signal by taking a difference between a plurality of noise signals from each pixel of the pixel array PA during one frame period in the detection mode.

  An analog signal processing circuit 104 illustrated in FIG. 1 receives an image signal output from the imaging sensor 103. The analog signal processing circuit 104 performs analog signal processing on the received image signal (analog signal). The analog signal processing circuit 104 includes a CDS circuit 105, a signal amplifier (PGA) 106, a clamp (CLAMP) circuit 107, and an A / D converter 108.

  The CDS circuit 105 performs correlated double sampling (CDS) processing that takes a difference between an offset of the output amplifier 232 in the image sensor 103 and a signal in which the offset is superimposed on the image signal. As a result, the CDS circuit 105 generates an image signal from which the offset of the output amplifier 232 is removed, and outputs the generated image signal to the signal amplifier 106.

  The signal amplifier 106 receives the image signal output from the CDS circuit 105. The signal amplifier 106 amplifies the received image signal with a predetermined amplification factor, and outputs the amplified image signal to the clamp circuit 107.

  The clamp circuit 107 receives the image signal of the light shielding area SA (FIG. 2) output from the signal amplifier 106. The clamp circuit 107 holds the image signal of the light shielding area SA as an offset signal. The clamp circuit 107 receives the image signal of the effective area EA (FIG. 2) output from the signal amplifier 106. The clamp circuit 107 performs clamp processing (OB clamp processing) using an offset signal on the received image signal in the effective area EA, and outputs the processed image signal to the A / D converter 108.

  The A / D converter 108 receives the image signal (analog signal) output from the clamp circuit 107. The A / D converter 108 generates an image signal (digital signal) by performing A / D conversion processing on the received image signal (analog signal). The A / D converter 108 outputs the generated image signal (digital signal) to the digital signal processing circuit 112.

  The timing signal generation circuit 110 supplies timing signals to the drive circuit 111, the image sensor 103, and the analog signal processing circuit 104, respectively. Accordingly, the drive circuit 111, the image sensor 103, and the analog signal processing circuit 104 operate in synchronization with the timing signal.

  The drive circuit 111 drives the optical system 101 and the mechanical shutter 102. For example, the drive circuit 111 adjusts the position of the lens 101a, adjusts the opening of the diaphragm 101b, and opens and closes the mechanical shutter 102.

  The digital signal processing circuit 112 receives the image signal (digital signal) output from the analog signal processing circuit 104. The digital signal processing circuit 112 generates image data by performing digital signal processing such as various corrections on the received image signal (digital signal). Various corrections include image processing such as color conversion, white balance, and gamma correction, resolution conversion processing, and image compression processing.

  Specifically, the digital signal processing circuit 112 includes a detection unit (detection unit) 112b and an interpolation unit (interpolation unit) 112a.

  The detection unit 112b detects a defective pixel in the pixel array PA according to a signal output from the pixel array PA in a state where the pixel array PA is shielded from light, that is, using the first difference image signal.

  Specifically, the detection unit 112b includes a maximum value generation unit (maximum value generation unit) 112b1, a minimum value generation unit (minimum value generation unit) 112b2, a second difference generation unit (second difference generation unit) 112b3, And an extraction unit (extraction means) 112b4.

  The maximum value generation unit 112b1 receives the first difference image signal of a plurality of frames. The maximum value generation unit 112b1 generates a maximum value image signal by extracting the maximum value of the luminance level in the first difference image signal of a plurality of frames for each pixel.

  The minimum value generation unit 112b2 receives the first difference image signal of a plurality of frames. The minimum value generation unit 112b2 generates a minimum value image signal by extracting the minimum value of the luminance level in the first difference image signal of a plurality of frames for each pixel.

  The second difference generation unit 112b3 receives the maximum value image signal from the maximum value generation unit 112b1, and receives the minimum value image signal from the minimum value generation unit 112b2. The second difference generation unit 112b3 generates a second difference image signal by taking the difference between the maximum value image signal and the minimum value image signal.

  The extraction unit 112b4 receives the second difference image signal from the second difference generation unit 112b3. The extraction unit 112b4 extracts (detects) a pixel whose luminance level in the second difference image signal is equal to or higher than the first threshold value as a defective pixel.

  The interpolation unit 112a interpolates the signal of the defective pixel detected by the detection unit 112b using the signal of the pixel adjacent to the detected defective pixel.

  For example, the interpolation unit 112a averages the signals of two pixels closest to the horizontal direction or the vertical direction among normal pixels of the same color with respect to the defective pixels in the image signal for photographing, and determines the averaged signal as a defect. Interpolate as pixel signals.

  Alternatively, for example, the interpolation unit 112a averages the signals of the four pixels closest to the horizontal direction and the vertical direction among normal pixels of the same color with respect to the defective pixel in the image signal for photographing, and the averaged signal Are interpolated as defective pixel signals.

  Alternatively, for example, the interpolation unit 112a averages the signals of two pixels closest to one diagonal direction among normal pixels of the same color with respect to the defective pixel in the image signal for photographing, and the averaged signal Are interpolated as defective pixel signals.

  Alternatively, for example, the interpolation unit 112a averages the signals of the four pixels closest to the two diagonal directions among the normal pixels of the same color with respect to the defective pixel in the image signal for photographing, and the averaged signal Are interpolated as defective pixel signals.

  The image data for photographing generated in this way by the digital signal processing circuit 112 is supplied to the image memory 113, the display circuit 117, the system control unit 118, the recording circuit 115, and the like.

  The image memory 113 temporarily stores the image data output from the digital signal processing circuit 112.

  The recording circuit 115 converts the image data output from the digital signal processing circuit 112 into image data for recording (for example, file system data having a hierarchical structure). A recording medium (image recording medium) 114 is detachably connected to the recording circuit 115. Thereby, the recording circuit 115 records the image data for recording on the recording medium 114.

  The display circuit 117 converts the image data output from the digital signal processing circuit 112 into a display image signal (for example, an NTSC analog signal). The display circuit 117 supplies an image signal for display to the image display device 116.

  The image display device 116 receives the display image signal output from the display circuit 117. The image display device 116 displays an image corresponding to the received display image signal.

  The system control unit 118 controls each unit as a whole.

  The nonvolatile memory (ROM) 119 stores a program describing a control method executed by the system control unit 118, control data such as parameters and tables used when executing the program, and correction data such as a scratch address. I remember it.

  The volatile memory (RAM) 120 functions as a work area for temporarily storing a program transferred from the nonvolatile memory 119 by the system control unit 118 or performing predetermined control processing by the system control unit 118. To do.

  The temperature detection circuit 121 detects the temperature of the image sensor 103 or its peripheral circuit. The temperature detection circuit 121 supplies the detected temperature information to the system control unit 118. Thereby, the system control unit 118 controls each unit according to the detected temperature.

  The accumulation time setting unit 122 sets the accumulation time (shutter speed) in each pixel of the pixel array of the image sensor 103. The accumulation time setting unit 122 supplies information on the set accumulation time to the system control unit 118. Accordingly, the system control unit 118 controls the charge accumulation operation in each pixel of the pixel array of the image sensor 103 via the timing signal generation circuit 110 according to the set accumulation time.

  The shooting mode setting unit 123 sets the operation mode of the imaging device 100 in accordance with an instruction received via an operation unit (not shown). The operation modes set by the shooting mode setting unit 123 include, for example, a setting mode for setting shooting conditions such as ISO sensitivity, a still image shooting mode, and a moving image shooting mode.

  As described above, in the imaging mode 100, in the detection mode, signals are output from the pixel array PA a plurality of times during one frame period, and image signals of a plurality of frames are acquired according to the signals output a plurality of times. Since defective pixels are detected using the image signals of a plurality of frames acquired during the one frame period, it is possible to improve the detection accuracy of pixels having blinking defects and detect pixels having blinking defects. The time for doing so can be shortened.

  Next, a schematic operation of the imaging apparatus 100 in the still image shooting mode or the moving image shooting mode will be described.

  Prior to the photographing operation, the system control unit 118 transfers necessary programs, control data, and correction data from the nonvolatile memory 119 to the volatile memory 120 and temporarily stores them in accordance with a predetermined instruction such as power-on. Keep it. These programs and data are used when the system control unit 118 controls each unit. Further, the system control unit 118 transfers additional programs and data from the nonvolatile memory 119 to the volatile memory 120 as necessary, or directly reads and uses data in the nonvolatile memory 119.

  The system control unit 118 receives a still image shooting instruction or a moving image shooting instruction via an operation unit (not shown). The system control unit 118 sets the operation mode to the still image shooting mode or the moving image shooting mode according to the still image shooting instruction or the moving image shooting instruction, and controls the optical system 101 via the drive circuit 111. Thereby, the stop 101b and the lens 101a in the optical system 101 are driven, and an image of the subject set to an appropriate brightness is formed on the imaging surface of the imaging sensor 103.

  Next, the system control unit 118 controls the mechanical shutter 102 via the drive circuit 111 in the still image shooting mode. Thereby, the mechanical shutter 102 controls the exposure of the image sensor 103 so that a necessary exposure time is obtained in the still image shooting mode. The mechanical shutter 102 is driven to shield the image sensor 103 when the exposure time has elapsed.

  In the still image shooting mode, the system control unit 118 uses the electronic shutter function of the image sensor 103 (reset operation by the reset unit 204 of the pixel 201) and the mechanical shutter function of the mechanical shutter 102 to expose the image sensor 103. You may control.

  Alternatively, the system control unit 118 controls the accumulation time in each pixel of the pixel array PA of the image sensor 103 using the electronic shutter function of the image sensor 103 in the moving image shooting mode. Thereby, the exposure of the image sensor 103 is controlled. At this time, the system control unit 118 controls the mechanical shutter 102 to be in an open state until receiving an instruction to end moving image shooting.

  Each pixel of the pixel array PA of the image sensor 103 performs a charge accumulation operation according to a timing signal (drive pulse) generated by the timing signal generation circuit 110 controlled by the system control unit 118. The imaging sensor 103 converts the image of the subject formed on the pixel array PA into an image signal. That is, the imaging sensor 103 performs an exposure process. The image sensor 103 reads out the image signal (analog signal) from the pixel array and outputs it.

  The digital signal processing circuit 112 receives the image signal output from the imaging sensor 103 via the analog signal processing circuit 104. The digital signal processing circuit 112 generates image data by performing predetermined digital signal processing (development processing) on the received image signal, and outputs the generated image data to the recording circuit 115.

  The recording circuit 115 performs processing (recording processing) for converting image data into image data for recording, and records the processed image data on the recording medium 114.

  In this way, photographing processing (still image photographing processing, moving image photographing processing) including exposure processing, development processing, and recording processing is performed.

  Next, a schematic operation in the detection mode of the imaging apparatus 100 will be described. This detection mode is one of the operation modes in the imaging apparatus 100 and is a mode for detecting defective pixels by the detection means in the digital signal processing circuit 112.

  The system control unit 118 sets the operation mode to the detection mode in response to a predetermined instruction received via the operation unit or in response to satisfying a predetermined condition.

  Next, the system control unit 118 controls the mechanical shutter 102 via the drive circuit 111 in the detection mode. As a result, the mechanical shutter 102 is closed so as to shield the pixel array PA of the image sensor 103 in the detection mode.

  As will be described later, in this embodiment, in the detection mode, the defective pixel may be detected while the mechanical shutter 102 is in the open state.

  Each pixel of the pixel array PA of the image sensor 103 performs a charge accumulation operation in a light-shielded state in accordance with a timing signal (driving pulse) generated by the timing signal generation circuit 110 controlled by the system control unit 118. The imaging sensor 103 converts the light-shielded image into an image signal. That is, the imaging sensor 103 performs an exposure process. The imaging sensor 103 reads the first differential image signal (analog signal) from the pixel array and outputs it.

  The digital signal processing circuit 112 performs a scratch detection process described later in addition to a predetermined digital signal process (development process) using the first difference image signal.

  Here, the digital signal processing circuit 112 may output the digital image signal as it is as image data to the image memory 113 or the recording circuit 115 without performing signal processing based on the control signal from the system control unit 118.

  When requested by the system control unit 118, the digital signal processing circuit 112 outputs information on a digital image signal and image data generated in the signal processing process. For example, the digital signal processing circuit 112 outputs information such as the spatial frequency of the image, the average value of the designated area, the data amount of the compressed image, or information extracted from the information to the system control unit 118. Further, the recording circuit 115 outputs information such as the type and free capacity of the recording medium 114 to the system control unit 118 when requested by the system control unit 118.

  Next, a schematic operation in the reproduction mode of the imaging apparatus 100 will be described. This reproduction mode is one of the operation modes in the imaging apparatus 100, and is a mode for reproducing image data recorded on the recording medium 114.

  It is assumed that image data has already been recorded on the recording medium 114. The recording circuit 115 reads image data from the recording medium 114 in accordance with a control signal from the system control unit 118.

  The digital signal processing circuit 112 performs an image expansion process when the image data is compressed image data according to a control signal from the system control unit 118, and stores the processed image data in the image memory 113.

  Thereafter, the digital signal processing circuit 112 reads the image data stored in the image memory 113, performs resolution conversion processing on the read image data, and supplies the processed image data to the display circuit 117.

  The display circuit 117 converts the supplied image data into a signal suitable for the image display device 116, that is, an image signal for display, and supplies the converted image data to the image display device 116. As a result, the image display device 116 displays an image corresponding to the display image signal.

  FIG. 4 is a timing chart illustrating an operation in the still image shooting mode or the operation shooting mode of the imaging apparatus.

  At timing TM1, the timing signal generation circuit 110 falls the control signal HD indicating the start of the horizontal scanning period from the non-active level to the active level. At this time, a reset circuit (not shown) resets the vertical output line 222 to a predetermined potential.

  The vertical scanning circuit 10 supplies an active control signal PRES to pixels in a predetermined row. Accordingly, the reset unit 204 is turned on and the charge-voltage conversion unit 207 is reset to the potential SVDD in the pixels in the predetermined row.

  At timing TM2 after the elapse of period T1 from timing TM1, the vertical scanning circuit 10 supplies a non-active control signal PRES to pixels in a predetermined row. Thereby, in the pixels in the predetermined row, the reset unit 204 is turned off, and the reset operation by the reset unit 204 is completed.

  At timing TM4, the vertical scanning circuit 10 supplies an active control signal PSEL to pixels in a predetermined row. As a result, during the period T2, the selection unit 205 is turned on in a predetermined row of pixels to place the pixels in a selected state.

  At timing TM6, the vertical scanning circuit 10 supplies an active control signal PTN to the transfer switch 224. As a result, the transfer switch 224 turns on and transfers the noise signal output to the vertical signal line 222 to the transfer capacitor CTN 226.

  At timing TM7, the vertical scanning circuit 10 supplies a non-active control signal PTN to the transfer switch 224. As a result, the transfer switch 224 is turned off, and the transfer capacitor CTN 226 holds the noise signal.

  In a period of timings TM7 to TM8, a reset circuit (not shown) resets the vertical output line 222 to a predetermined potential.

  At timing TM8, the vertical scanning circuit 10 supplies an active control signal PTS to the transfer switch 225. As a result, the transfer switch 225 is turned on.

  At timing TM9, the vertical scanning circuit 10 supplies an active control signal PTX to pixels in a predetermined row. As a result, the transfer unit 203 is turned on in the pixels in the predetermined row, and the charge of the photoelectric conversion unit 202 is transferred to the charge-voltage conversion unit 207. The output unit 206 outputs an optical signal to the vertical output line 222 according to the voltage of the charge / voltage conversion unit 207.

  That is, by setting the control signal PTS to the high level during the period T4 including the period T3, the transfer capacitor CTS227 is connected to the vertical output line 222, and the optical signal is transferred to the transfer capacitor CTS227.

  At timing TM10 after the elapse of period T3 from timing TM9, the vertical scanning circuit 10 supplies a non-active control signal PTX to pixels in a predetermined row. As a result, the transfer unit 203 is turned off in the pixels in the predetermined row.

  At timing TM11 after the elapse of period T4 from timing TM8, the vertical scanning circuit 10 supplies a non-active control signal PTS to the transfer switch 225. As a result, the transfer switch 224 is turned off, and the transfer capacitor CTS 227 holds the optical signal.

  As described above, the readout circuit 20 holds the noise signal and the optical signal for one row in the transfer capacitor CTN 226 and the transfer capacitor CTS 227 of each column, respectively.

  At a timing after timing TM12, the horizontal scanning circuit 30 sequentially activates the control signals PHS and PHN of each column. Thereby, the noise signal and the optical signal of each column held in the readout circuit 20 are sequentially transferred to the horizontal output line 233 and the horizontal output line 234, respectively. The output amplifier 232 generates an image signal by taking the difference between the transferred noise signal and the optical signal, and outputs the image signal to the analog signal processing circuit 104.

  FIG. 5 is a timing chart showing the operation in the detection mode of the imaging apparatus.

  In the shooting mode (still image shooting mode, moving image shooting mode), charges are transferred from the photoelectric conversion unit to the charge voltage conversion unit in each pixel in order to output an optical signal from each pixel.

  On the other hand, in the detection mode, in order to detect a defective pixel in the pixel array, no charge is transferred from the photoelectric conversion unit to the charge voltage conversion unit in each pixel. That is, as shown in FIG. 5, in the detection mode, an operation different from the shooting mode is performed in the following points.

  During the period T4 ′ during which the control signal PTS is activated, the control signal PTX is maintained at a non-active level. As a result, in the pixels in the predetermined row, the transfer unit (transfer MOS transistor) 203 remains off, and the charge of the photoelectric conversion unit 202 is not transferred to the charge-voltage conversion unit 207. In a pixel in a predetermined row, the output unit 206 outputs a noise signal corresponding to the voltage of the charge voltage conversion unit 207 to the vertical output line 222 in a state where the charge voltage conversion unit 207 is reset by the reset unit 204. The noise signal output to the vertical output line 222 is transferred to the transfer capacitor CTS 227 by the transfer switch 225 that has received the active control signal PTS.

  At the timing when the period T4 ′ ends, the vertical scanning circuit 10 supplies the transfer switch 225 with the non-active control signal PTS. Thereby, since the transfer switch 224 is turned off, the transfer capacitor CTS 227 holds the noise signal.

  Here, since the period T4 ′ during which the control signal PTS is activated is shorter than the period T4 during which the control signal PTS is activated at the driving timing in the photographing mode, the period T3 for transferring charges in the pixel is not necessary. Can be done in a short time.

  As described above, two times of noise signals for one row are accumulated in the transfer capacitor CTN 226 and the transfer capacitor CTS 227, respectively.

  Next, these two noise signals are transferred by the horizontal scanning circuit 30 from the transfer capacitor CTN226 and the transfer capacitor CTS227 to the capacitors CHN230 and CHS231, respectively. The two noise signals accumulated in the capacitors CHN 230 and CHS 231 are supplied to the output amplifier 232. The output amplifier 232 outputs the difference between the two noise signals, that is, as an image signal (first difference image signal) representing variation at each reading.

  As described above, in the present embodiment, the noise signal is output twice from the pixel without transferring the photocharge in the pixel, and the respective noise signals are transferred to the transfer capacitors CTN 226 and CTS 227 to obtain the difference between the two. . As a result, a process equivalent to taking the difference between the two frames of image signals acquired in the light-shielded state is performed, so the first difference image signal itself output from the output amplifier 232 is the same as the two frames of image signals. It shows the fluctuation of the signal level of each pixel.

  Next, a method for detecting various scratches (defective pixels) and detecting flashing scratches (flashing defective pixels) will be described with reference to FIGS.

  FIG. 6 is a flowchart showing defective pixel detection processing in the first embodiment of the present invention.

  When determining that the defective pixel detection process should be started, the system control unit 118 first sets shooting conditions for detecting defective pixels such as ISO sensitivity and shutter speed (S501). In the defective pixel detection process, the main purpose is to detect defective pixels that are amplified by dark current. For this reason, the shooting conditions set here are such that a dark current is more likely to occur, the shutter time is set to long seconds accumulation such as 1 to 30 seconds, and the environmental temperature is 40 ° C. to 60 ° C. It is desirable to set it to a high temperature.

  Next, the system control unit 118 controls each unit to perform a shooting operation under the shooting conditions set in step S501 (S502). Here, when “white scratches” caused by dark current are detected, shooting is performed in a state where the pixel array of the image sensor is shielded from light. Alternatively, for example, when detecting “black scratches” that occur due to poor transfer or the like, shooting is performed in a state where all pixels in the pixel array of the image sensor are exposed with a uniform amount of light.

  Subsequently, the digital signal processing circuit 112 detects a defective pixel based on the image signal acquired by the photographing operation in step S502 (S503). For example, a difference in signal level between the target pixel and the surrounding pixels is calculated, and when the difference value is equal to or greater than a predetermined value, the target pixel is detected as a defective pixel.

  Then, the system control unit 118 records the address of the defective pixel detected in step S503 in a memory (such as the RAM 120) (S504), and ends the defective pixel detection process.

  FIG. 7 is a flowchart showing the blinking defective pixel detection process in the first embodiment of the present invention.

  When determining that the blinking defective pixel detection process should be started, the system control unit 118 first sets shooting conditions for detecting blinking defective pixels such as ISO sensitivity and shutter speed (S601). However, the blinking defective pixel to be detected in the present embodiment is not a defective pixel due to dark current, so that it is not necessary to take a long accumulation time and is not dependent on the environmental temperature. Therefore, the shutter time may be a short time, for example, 1/500 second or the like, and the ambient temperature may be normal temperature.

  Next, the system control unit 118 controls each unit to perform a shooting operation under the shooting conditions set in step S601 (S602). Here, in order to detect a blinking flaw, photographing may be performed with the pixel array of the imaging sensor shielded from light, or photographing may be performed with the pixel array of the imaging sensor exposed. Since the level of the blinking flaw (flashing defect) to be detected does not depend on the amount of incident light, it is not necessary to make light incident on the pixel array. Further, in the detection mode, since the photoelectric charge is not transferred from the photoelectric conversion unit 202 to the charge-voltage conversion unit 207 in each pixel of the pixel array, it is not necessary to perform in a state where the pixel array is shielded from light.

  Next, the system control unit 118 determines whether the image signal acquisition by the photographing operation performed in step S602 has reached a predetermined number of times (a predetermined number of frames) (S603). If the predetermined number has not been reached (No), the system control unit 118 returns the process to step S602 and repeats the photographing operation. When the photographing operation performed in step S602 reaches the predetermined number of times (Yes), the system control unit 118 advances the process to step S604. Here, the predetermined number of times set in advance is determined by the frequency of occurrence of a defect that exceeds the detection level of the blinking defective pixel. In the present embodiment, the shooting operation is performed six times in accordance with the description of the blinking defective pixel detection performed using FIG. As the number of shots increases, the greater the number of shots, the better the detection accuracy of the blinking defective pixel.However, if the number of shots is increased, the time required for detection increases accordingly. Not performed.

  Subsequently, the digital signal processing circuit 112 detects a blinking defective pixel based on the image signals of a plurality of frames acquired by photographing in step S602 (S604). The detection method will be described later with reference to FIG.

  Then, the system control unit 118 records the address of the blinking defective pixel detected in step S604 in the memory (S605), and ends the defective pixel detection process.

  FIG. 8 is a diagram for explaining a method for detecting a blinking defective pixel according to the first embodiment of the present invention.

  FIG. 8A) shows six captured images (six-frame image signals) acquired in step S602 in FIG. FIG. 8 a) simply shows a case where the image includes two blinking defective pixels and one white defect and one black defect.

  In the blinking defective pixel detection process, first, the values (signal levels) of the obtained six images (first difference image signals) are compared with each pixel, and a maximum value image (maximum value) is extracted for each pixel. Value image signal) and a minimum value image (minimum value image signal) obtained by extracting the minimum value.

  FIG. 8b) shows the maximum value image and the minimum value image obtained at that time. For normal pixels, white scratches, and black scratches, if the shooting conditions are the same, the signal level variation between shots is small, so the value (signal level) does not change significantly between the maximum value image and the maximum value image. .

  However, since the flashing flaw (flashing defective pixel) has a large variation in signal level for each shooting, the difference in value (signal level) between the maximum value image and the minimum value image becomes large.

  FIG. 8c) is a second difference image created by subtracting the minimum value image from the maximum value image of FIG. 8b) (taking the difference). As can be seen from the image in FIG. 8c), it is possible to extract only the blinking defective pixel by taking the difference between the maximum value image and the minimum value image.

  FIG. 9 is a flowchart showing the shooting process (still image shooting process, moving image shooting process) in the first embodiment of the present invention.

  The system control unit 118 determines whether or not a shutter button (not shown) is half-pressed and SW1 is turned on (S801). If the system control unit 118 determines that SW1 is not turned on (No), the process proceeds to step S801. If the system control unit 118 determines that SW1 is on (Yes), the system control unit 118 measures subject brightness, subject distance, and the like, and sets shooting conditions based on the results (S802).

  Thereafter, the system control unit 118 determines whether or not the shutter button is fully pressed and SW2 is turned on (S803). If the system control unit 118 determines that SW2 is not turned on (No), it returns the process to step S801. If the system control unit 118 determines that SW2 is on (Yes), the system control unit 118 controls each unit to perform a photographing operation (S804).

  The digital signal processing circuit 112 performs various correction processes on the image signal obtained by the photographing operation in step S804 (S805). As one of the various correction processes performed in step S805, the “scratch correction” process including the interpolation process for interpolating the signal of the defective pixel detected by the various defective pixel detection means described with reference to FIGS. Is called. Thereby, the digital signal processing circuit 112 generates image data.

  Then, the system control unit 118 records the image data on which various correction processes have been performed in step S805 on the recording medium 114 (S806). In this way, a series of shooting processes is completed.

  As described above, according to the present embodiment, in the detection mode, the noise signal is output twice from each pixel of the pixel array PA in one frame period, and 2 is output according to the noise signal output twice. An image signal of the frame is acquired. Then, a difference image signal of 1 frame is generated by taking a difference between the image signals of 2 frames acquired during the 1 frame period. Such a differential image signal is used for 6 frames (substantially using 12 frames), and defective pixels are detected. Thereby, the detection accuracy of the pixel having the blinking defect can be improved, and the time for detecting the pixel having the blinking defect can be shortened. That is, it is possible to detect blinking defective pixels with high accuracy in a short time.

  As illustrated in FIG. 10, the imaging device 100i may include a digital signal processing circuit 112i. The digital signal processing circuit 112 includes a detection unit (detection means) 112bi.

  The detection unit 112bi includes a maximum value generation unit (maximum value generation unit) 112b1, an average value generation unit (average value generation unit) 112b2i, a third difference generation unit (third difference generation unit) 112b3i, and an extraction unit (extraction). Means) 112b4.

  The maximum value generation unit 112b1 receives the first difference image signal of a plurality of frames. The maximum value generation unit 112b1 generates a maximum value image signal by extracting the maximum value of the luminance level in the first difference image signal of a plurality of frames for each pixel.

  The average value generator 112b2i receives the first difference image signal of a plurality of frames. The average value generation unit 112b2i generates an average value image signal by extracting the average value of the luminance levels in the first difference image signals of a plurality of frames for each pixel.

  The third difference generation unit 112b3i receives the maximum value image signal from the maximum value generation unit 112b1, and receives the average value image signal from the average value generation unit 112b2i. The third difference generation unit 112b3i generates a third difference image signal by taking the difference between the maximum value image signal and the average value image signal.

  The extraction unit 112b4 receives the third difference image signal from the third difference generation unit 112b3i. The extraction unit 112b4 extracts (detects) a pixel whose luminance level in the third difference image signal is equal to or higher than the second threshold as a defective pixel.

  An imaging apparatus according to a second embodiment of the present invention will be described with reference to FIG. FIG. 11 is a diagram illustrating a configuration of the imaging sensor 103j in the imaging device 100j according to the second embodiment of the present invention. Below, it demonstrates centering on a different part from 1st Embodiment.

  The imaging device 100j includes an imaging sensor 103j. The image sensor 103j includes a pixel unit array PAj. In the pixel unit array PAj, a plurality of pixel units 901aj and 902bj are arranged in the row direction and the column direction. FIG. 11 illustrates two pixel units arranged adjacent to each other in the column direction.

  In the pixel unit 901aj, a charge voltage conversion unit 907a, a reset unit 904a, an output unit 906a, and a selection unit 905a are shared by two pixels adjacent in the column direction in the pixel array PA of the first embodiment.

  That is, the pixel unit 901aj includes a first photoelectric conversion unit 902a, a second photoelectric conversion unit 902b, a first transfer unit 903a, a second transfer unit 903b, a charge voltage conversion unit 907a, a reset unit 904a, and an output unit 906a. And a selection unit 905a.

  The first transfer unit 903a transfers the charge generated in the first photoelectric conversion unit 902a to the charge voltage conversion unit 907a. The first transfer unit 903a is, for example, a transfer MOS transistor (transfer switch). The first transfer unit 903a is turned on when an active control signal PTXa is supplied from the vertical scanning circuit 10 to the gate of the first transfer unit 903a, whereby the charge generated in the first photoelectric conversion unit 902a is transferred to the charge-voltage conversion unit 907a. Forward.

  The second transfer unit 903b transfers the charge generated in the second photoelectric conversion unit 902b to the charge voltage conversion unit 907a. The second transfer unit 903b is, for example, a transfer MOS transistor (transfer switch). The second transfer unit 903b is turned on when the active control signal PTXb is supplied from the vertical scanning circuit 10 to the gate of the second transfer unit 903b, whereby the charge generated in the second photoelectric conversion unit 902b is transferred to the charge-voltage conversion unit 907a. Forward.

  The reset unit 904a is, for example, a reset MOS transistor, and is turned on when an active control signal PRESa is supplied from the vertical scanning circuit 10 to the gate thereof, thereby bringing the charge-voltage conversion unit 907a to a level corresponding to the power supply SVDD. Reset.

  The selection unit 905a is, for example, a selection MOS transistor (selection switch), and is turned on when an active control signal PSELa is supplied from the vertical scanning circuit 10 to its gate, thereby bringing the pixel unit 901aj into a selected state. The selection unit 905a is turned off when the non-active control signal PSELa is supplied to the gate from the vertical scanning circuit 10, thereby bringing the pixel unit 901aj into a non-selected state.

  In the pixel unit 901bj, a charge voltage conversion unit 907b, a reset unit 904b, an output unit 906b, and a selection unit 905b are shared with respect to two pixels arranged in the column direction in the pixel array PA of the first embodiment. .

  That is, the pixel unit 901bj includes a first photoelectric conversion unit 902c, a second photoelectric conversion unit 902d, a first transfer unit 903c, a second transfer unit 903d, a charge-voltage conversion unit 907b, a reset unit 904b, and an output unit 906b. And a selection unit 905b.

  The first transfer unit 903c transfers the charge generated in the first photoelectric conversion unit 902c to the charge voltage conversion unit 907b. The first transfer unit 903c is, for example, a transfer MOS transistor (transfer switch). The first transfer unit 903c is turned on when the active control signal PTXc is supplied from the vertical scanning circuit 10 to the gate thereof, whereby the charge generated in the first photoelectric conversion unit 902c is transferred to the charge-voltage conversion unit 907b. Forward.

  The second transfer unit 903d transfers the charge generated by the second photoelectric conversion unit 902d to the charge voltage conversion unit 907b. The second transfer unit 903d is, for example, a transfer MOS transistor (transfer switch). The second transfer unit 903d is turned on when the active control signal PTXd is supplied from the vertical scanning circuit 10 to the gate of the second transfer unit 903d, whereby the charge generated in the second photoelectric conversion unit 902d is transferred to the charge-voltage conversion unit 907b. Forward.

  The reset unit 904b is, for example, a reset MOS transistor, and is turned on when an active control signal PRESb is supplied from the vertical scanning circuit 10 to the gate thereof, whereby the charge-voltage conversion unit 907b is set to a level corresponding to the power supply SVDD. Reset.

  The selection unit 905b is, for example, a selection MOS transistor (selection switch). The selection unit 905b is turned on when an active control signal PSELb is supplied from the vertical scanning circuit 10 to the gate thereof, thereby bringing the pixel unit 901bj into a selected state. The selection unit 905b turns off when the non-active control signal PSELa is supplied from the vertical scanning circuit 10 to the gate thereof, thereby bringing the pixel unit 901bj into a non-selected state.

  Further, as shown in FIG. 12, the operation of the imaging device in the shooting mode (still image shooting mode, moving image shooting mode) differs from the first embodiment (see FIG. 4) in the following points. FIG. 12 is a timing chart showing an operation in the shooting mode (still image shooting mode, moving image shooting mode) of the imaging apparatus according to the second embodiment. In the timing chart of FIG. 12, signals accumulated by the first photoelectric conversion unit 902a, the second photoelectric conversion unit 902b, the first photoelectric conversion unit 902c, and the second photoelectric conversion unit 902d may be sequentially read. It is shown.

  In the periods T1a and T1b, the control signal PRESa is activated. Accordingly, the reset unit 904a of the pixel unit 901aj resets the charge / voltage conversion unit 907a to the predetermined potential SVDD.

  In the periods T2a and T2b, the control signal PSELa is activated. Accordingly, the selection unit 905a of the pixel unit 901aj puts the pixel unit 901aj into a selected state.

  As described above, the HBLKa + HSRa period for reading the signal accumulated by the first photoelectric conversion unit 902a and the HBLKb + HSRb period for reading the signal accumulated by the second photoelectric conversion unit 902b are the same pixel unit. 901aj is selected.

  In the period T3a, the control signal PTXa is activated. Accordingly, the first transfer unit 903a of the pixel unit 901aj transfers the charge of the first photoelectric conversion unit 902a to the charge / voltage conversion unit 907a. Note that the transfer capacitor CTS 227 is connected to the vertical output line 222 by setting the control signal PTS to the high level during the period T4a including the period T3a, and the optical signal is transferred to the transfer capacitor CTS 227. This is the same as in the first embodiment.

  In the period T3b, the control signal PTXb is activated. Accordingly, the second transfer unit 903b of the pixel unit 901aj transfers the charge of the second photoelectric conversion unit 902b to the charge / voltage conversion unit 907a. Note that the transfer capacitor CTS 227 is connected to the vertical output line 222 by setting the control signal PTS to the high level during the period T4b including the period T3b, and the optical signal is transferred to the transfer capacitor CTS 227. This is the same as in the first embodiment.

  As described above, the HBLKa + HSRa period for reading the signal accumulated by the first photoelectric conversion unit 902a and the HBLKb + HSRb period for reading the signal accumulated by the second photoelectric conversion unit 902b are different. (Transistor) is turned on.

  In the periods T1c and T1d, the control signal PRESb is activated. Accordingly, the reset unit 904b of the pixel unit 901bj resets the charge / voltage conversion unit 907b to the predetermined potential SVDD.

  In the periods T2c and T2d, the control signal PSELb is activated. Accordingly, the selection unit 905b of the pixel unit 901bj puts the pixel unit 901bj into a selected state.

  As described above, the HBLKc + HSRc period for reading the signal accumulated by the first photoelectric conversion unit 902c and the HBLKd + HSRd period for reading the signal accumulated by the second photoelectric conversion unit 902d are the same pixel unit. 901bj is selected.

  In the period T3c, the control signal PTXc is activated. Accordingly, the first transfer unit 903c of the pixel unit 901bj transfers the charge of the first photoelectric conversion unit 902c to the charge-voltage conversion unit 907b.

  In the period T3d, the control signal PTXd is activated. Thereby, the second transfer unit 903d of the pixel unit 901bj transfers the charge of the second photoelectric conversion unit 902d to the charge-voltage conversion unit 907b.

  As described above, the HBLKc + HSRc period for reading the signal accumulated by the first photoelectric conversion unit 902c and the HBLKd + HSRd period for reading the signal accumulated by the second photoelectric conversion unit 902d are different. (Transistor) is turned on.

  FIG. 13 is a timing chart showing the operation in the detection mode of the imaging apparatus according to the second embodiment. This detection mode is a mode for detecting defective pixel units in the pixel unit array.

  During the period T4a ′ during which the control signal PTS is activated, the control signal PTXa is maintained at a non-active level. Accordingly, in the pixel unit 901aj, the first transfer unit (transfer MOS transistor) 903a remains off, and the charge of the first photoelectric conversion unit 902a is not transferred to the charge-voltage conversion unit 907a. In the pixel unit 901aj, the output unit 906a outputs a noise signal corresponding to the voltage of the charge voltage conversion unit 907a to the vertical output line 222 in a state where the charge voltage conversion unit 907a is reset by the reset unit 904a. The noise signal output to the vertical output line 222 is transferred to the transfer capacitor CTS 227 by the transfer switch 225 that has received the active control signal PTS.

  At the timing when the period T4a ′ ends, the vertical scanning circuit 10 supplies the non-active control signal PTS to the transfer switch 225. Thereby, since the transfer switch 224 is turned off, the transfer capacitor CTS 227 holds the noise signal.

  Here, the period T4a ′ during which the control signal PTS is activated is not necessary as the period T3a for transferring charges in the pixel unit, compared with the period T4a during which the control signal PTS is activated at the driving timing in the photographing mode. Can be in a short time.

  During the period T4b ′ during which the control signal PTS is activated, the control signal PTXb is maintained at a non-active level. Accordingly, in the pixel unit 901aj, the second transfer unit (transfer MOS transistor) 903b remains off, and the charge of the second photoelectric conversion unit 902b is not transferred to the charge-voltage conversion unit 907a. In the pixel unit 901aj, the output unit 906a outputs a noise signal corresponding to the voltage of the charge voltage conversion unit 907a to the vertical output line 222 in a state where the charge voltage conversion unit 907a is reset by the reset unit 904a. The noise signal output to the vertical output line 222 is transferred to the transfer capacitor CTS 227 by the transfer switch 225 that has received the active control signal PTS.

  At the timing when the period T4b ′ ends, the vertical scanning circuit 10 supplies the non-active control signal PTS to the transfer switch 225. Thereby, since the transfer switch 224 is turned off, the transfer capacitor CTS 227 holds the noise signal.

  Here, the period T4b ′ during which the control signal PTS is activated is not necessary as the period T3b for transferring charges within the pixel unit, compared with the period T4b during which the control signal PTS is activated at the driving timing in the photographing mode. Can be in a short time.

  During the period T4c ′ during which the control signal PTS is active, the control signal PTXc is maintained at a non-active level. As a result, in the pixel unit 901bj, the first transfer unit (transfer MOS transistor) 903c remains off, and the charge of the first photoelectric conversion unit 902c is not transferred to the charge-voltage conversion unit 907b. In the pixel unit 901bj, the output unit 906b outputs a noise signal corresponding to the voltage of the charge voltage conversion unit 907b to the vertical output line 222 in a state where the charge voltage conversion unit 907b is reset by the reset unit 904b. The noise signal output to the vertical output line 222 is transferred to the transfer capacitor CTS 227 by the transfer switch 225 that has received the active control signal PTS.

  At the timing when the period T4c ′ ends, the vertical scanning circuit 10 supplies the non-active control signal PTS to the transfer switch 225. Thereby, since the transfer switch 224 is turned off, the transfer capacitor CTS 227 holds the noise signal.

  Here, the period T4c ′ during which the control signal PTS is activated is not necessary as the period T3c for transferring charges in the pixel unit, compared with the period T4c during which the control signal PTS is activated at the driving timing in the photographing mode. Can be in a short time.

  During the period T4d ′ in which the control signal PTS is active, the control signal PTXd is maintained at a non-active level. Accordingly, in the pixel unit 901bj, the second transfer unit (transfer MOS transistor) 903d remains off, and the charge of the second photoelectric conversion unit 902d is not transferred to the charge-voltage conversion unit 907b. In the pixel unit 901bj, the output unit 906b outputs a noise signal corresponding to the voltage of the charge voltage conversion unit 907b to the vertical output line 222 in a state where the charge voltage conversion unit 907b is reset by the reset unit 904b. The noise signal output to the vertical output line 222 is transferred to the transfer capacitor CTS 227 by the transfer switch 225 that has received the active control signal PTS.

  At the timing when the period T4d ′ ends, the vertical scanning circuit 10 supplies the transfer switch 225 with the non-active control signal PTS. Thereby, since the transfer switch 224 is turned off, the transfer capacitor CTS 227 holds the noise signal.

  Here, since the period T4d ′ during which the control signal PTS is activated is shorter than the period T4d during which the control signal PTS is activated at the driving timing in the photographing mode, the period T3d for transferring charges in the pixel unit is not necessary. Can be in a short time.

  Note that when the image signal for detecting the blinking defective pixel unit is read using the above-described drive timing, it is considered that the defect factor of the blinking defective pixel unit is mainly in the output unit (amplification MOS transistor) 906. It is done. It can be said that the image signal generated during the period of HBLKa + HSRA and the image signal generated during the period of HBLKb + HSRb are equivalent image signals.

  Specifically, the image signal corresponding to the first photoelectric conversion unit 902a and the image signal corresponding to the second photoelectric conversion unit 902b both determine whether the output unit 906a can cause a blinking defective pixel unit. The image signals have the same meaning for determination. Similarly, the image signal corresponding to the first photoelectric conversion unit 902c and the image signal corresponding to the second photoelectric conversion unit 902d are both used to determine whether the output unit 906b can be a factor of the blinking defective pixel unit. The image signals have the same meaning.

  In the blinking defective pixel unit detection process, the image signal corresponding to the first photoelectric conversion unit 902a and the image signal corresponding to the second photoelectric conversion unit 902b can be processed as pixel signals for two shootings.

  Therefore, as illustrated in FIG. 14, the operation in the HBLKb + HSRb period and the operation in the HBLKd + HSRd period may be omitted in the operation in the detection mode of the imaging apparatus according to the modification of the second embodiment. Thereby, compared to the first embodiment, the number of frames of the image signal to be acquired by the photographing operation can be halved, and the time required for detection can be further shortened.

  In addition, although embodiment of the imaging device has been described, the present invention is not limited to this and can take various forms.

  For example, as illustrated in FIG. 15, the pixel unit 1301 includes a charge voltage conversion unit 1307, a reset unit 1304, an output unit 1306, and a selection unit for four pixels adjacent in the column direction in the pixel array PA of the first embodiment. The unit 1305 may be shared. In this case, the first transfer unit 1303a transfers the charge generated in the first photoelectric conversion unit 1302a to the charge-voltage conversion unit 1307 according to the active control signal PTXa. The second transfer unit 1303b transfers the charge generated by the second photoelectric conversion unit 1302b to the charge-voltage conversion unit 1307 according to the active control signal PTXb. The third transfer unit 1303c transfers the charge generated by the third photoelectric conversion unit 1302c to the charge-voltage conversion unit 1307 according to the active control signal PTXc. The fourth transfer unit 1303d transfers the charge generated by the fourth photoelectric conversion unit 1302d to the charge-voltage conversion unit 1307 according to the active control signal PTXd.

  As described above, it is considered that a simple configuration such as one column of pixels to be shared is better for forming a pixel layout.

  For example, as illustrated in FIG. 16, the pixel unit 1401 includes a charge-voltage conversion unit 1407, a reset unit 1404, and an output unit for four pixels adjacent in the column direction every two rows in the pixel array PA of the first embodiment. 1406 and the selection unit 1405 may be shared. In this case, the first transfer unit 1403a transfers the charge generated in the first photoelectric conversion unit 1402a to the charge-voltage conversion unit 1407 according to the active control signal PTXa. The second transfer unit 1403b transfers the charge generated by the second photoelectric conversion unit 1402b to the charge-voltage conversion unit 1307 according to the active control signal PTXb. The third transfer unit 1403c transfers the charge generated by the third photoelectric conversion unit 1402c to the charge-voltage conversion unit 1407 according to the active control signal PTXc. The fourth transfer unit 1403d transfers the charge generated by the fourth photoelectric conversion unit 1402d to the charge-voltage conversion unit 1407 according to the active control signal PTXd.

  Here, in order to interpolate defective pixels, signals of adjacent pixels of the same color, that is, one pixel above, below, left, and right from one pixel to be corrected are often used. It is also considered effective to use a configuration in which pixels are shared.

1 is a diagram illustrating a configuration of an imaging apparatus 100 according to a first embodiment of the present invention. FIG. 3 is a diagram illustrating a configuration of an imaging sensor 103. FIG. 3 is a diagram illustrating a configuration of each pixel 201 and a configuration for one column in a readout circuit 20. 3 is a timing chart illustrating an operation in a still image shooting mode or an operation shooting mode of the imaging apparatus according to the first embodiment of the present invention. 3 is a timing chart showing an operation in a detection mode of the imaging apparatus according to the first embodiment of the present invention. The flowchart which shows the defective pixel detection process in 1st Embodiment of this invention. The flowchart which shows the blinking defect pixel detection process in 1st Embodiment of this invention. The figure explaining the method of detecting the blinking defect pixel in 1st Embodiment of this invention. 5 is a flowchart showing shooting processing (still image shooting processing, moving image shooting processing) in the first embodiment of the present invention. The figure which shows the structure of the imaging device 100i which concerns on the modification of 1st Embodiment of this invention. The figure which shows the structure of the imaging sensor 103j in the imaging device 100j which concerns on 2nd Embodiment of this invention. 9 is a timing chart showing an operation in a shooting mode (still image shooting mode, moving image shooting mode) of the imaging apparatus according to the second embodiment of the present invention. 9 is a timing chart illustrating an operation in a detection mode of an imaging apparatus according to a second embodiment of the present invention. The timing chart which shows the operation | movement in the detection mode of the imaging device which concerns on the modification of 2nd Embodiment of this invention. The figure which shows the structure of the image sensor 103k in the imaging device 100k which concerns on the modification of 2nd Embodiment of this invention. The figure which shows the structure of the imaging sensor 103n in the imaging device 100n which concerns on the modification of 2nd Embodiment of this invention.

Explanation of symbols

100, 100i, 100j, 100k, 100n

Claims (5)

A first photoelectric conversion unit, and a second photoelectric conversion portion, a charge-voltage conversion unit, a first transfer unit for transferring the first charges generated in the photoelectric conversion unit to the charge-voltage converter, the A second transfer unit that transfers the charge generated in the second photoelectric conversion unit to the charge voltage conversion unit; a reset unit that resets the charge voltage conversion unit; and a signal corresponding to the voltage of the charge voltage conversion unit. A pixel arrangement in which a plurality of pixel units each including an output unit to be output are arranged in a row direction and a column direction;
A drive unit for driving the pixel array;
Detecting means for detecting a defective pixel unit in the pixel array in accordance with a signal output from the pixel array;
And correcting means for correcting the signal of the defective pixel units detected by using the signal of the peripheral pixel units of said detected defect pixel unit by the detection unit,
With
In the detection mode for detecting the defective pixel unit by the detection unit, the drive unit converts the charge of the first photoelectric conversion unit into the charge voltage conversion unit during one frame period. So that the second transfer unit does not transfer the charge of the second photoelectric conversion unit to the charge-voltage conversion unit, and the charge-voltage conversion unit is reset by the reset unit. a signal the output unit corresponding to the voltage of the charge-voltage converter to output a plurality of times in a state, the imaging apparatus characterized by driving each pixel unit of the pixel array. During the one frame period, the charge voltage conversion unit is reset by the reset unit, and then the difference between the signals output a plurality of times from each pixel unit of the pixel array with the transfer unit turned off is obtained. The imaging apparatus according to claim 1, further comprising difference means for generating a first difference image signal. The detection means includes
Maximum value generating means for generating a maximum value image signal of one frame by extracting a maximum value of a signal level in the first difference image signal of a plurality of frames for each pixel unit ;
A minimum value generating means for generating a minimum value image signal of one frame by extracting a minimum value of a signal level in the first difference image signal of a plurality of frames for each pixel unit ;
Second difference generating means for generating a second difference image signal by taking a difference between the maximum value image signal and the minimum value image signal;
Extracting means for extracting, as a defective pixel unit , a pixel unit having a signal level in the second difference image signal equal to or higher than a first threshold;
The imaging apparatus according to claim 2, comprising: The detection means includes
Maximum value generating means for generating a maximum value image signal of one frame by extracting a maximum value of a signal level in the first difference image signal of a plurality of frames for each pixel unit ;
An average value generating means for generating an average value image signal of one frame by extracting an average value of signal levels in the first difference image signal of a plurality of frames for each pixel unit ;
A third difference generating means for generating a third difference image signal by taking a difference between the maximum value image signal and the average value image signal;
Extraction means for extracting, as a defective pixel unit , a pixel unit whose signal level in the third difference image signal is equal to or higher than a second threshold;
The imaging apparatus according to claim 2, comprising: A first photoelectric conversion unit, and a second photoelectric conversion portion, a charge-voltage conversion unit, a first transfer unit for transferring the first charges generated in the photoelectric conversion unit to the charge-voltage converter, the A second transfer unit that transfers the charge generated in the second photoelectric conversion unit to the charge voltage conversion unit; a reset unit that resets the charge voltage conversion unit; and a signal corresponding to the voltage of the charge voltage conversion unit. In accordance with a pixel array in which a plurality of pixel units each including an output unit to be output are arranged in a row direction and a column direction, a driving unit that drives the pixel array, and a signal output from the pixel array, a detecting means for detecting a defective pixel unit in the pixel array, the signal of the defective pixel units detected by the detecting means, and correcting means for correcting using the signal of the peripheral pixel units of said detected defective pixel units A method for controlling an image device,
Setting the operation mode to a detection mode for detecting a defective pixel unit by the detection means;
In the detection mode, during one frame period, the first transfer unit does not transfer the charge of the first photoelectric conversion unit to the charge voltage conversion unit, and the second transfer unit The output unit responds to the voltage of the charge-voltage conversion unit in a state where the charge-voltage conversion unit is not transferred to the charge-voltage conversion unit and the charge-voltage conversion unit is reset by the reset unit. The drive unit driving each pixel unit of the pixel array so as to output a signal multiple times;
An image pickup apparatus control method comprising:

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