JP5441282B2 - CHANNEL ENCODING METHOD AND DECODING METHOD IN THE SYSTEM USING LOW DENSITY PARITY CHECK CODE AND DEVICE THEREOF - Google Patents

Abstract

A METHOD FOR A CHANNEL ENCODING IN A SYSTEM USING A LOW-DENSITY PARITY-CHECK, LDPC, CODE. THE METHOD INCLUDES DIVIDING INFORMATION BITS INTO A PLURALITY OF BIT GROUPS, DETERMINING (603) A NUMBER OF INFORMATION BITS TO BE SHORTENED, DETERMINING (605, 607) A NUMBER OF BIT GROUPS TO BE SHORTENED BASED ON THE DETERMINED NUMBER OF INFORMATION BITS TO BE SHORTENED, SHORTENING (609) INFORMATION BITS IN THE DETERMINED NUMBER OF BIT GROUPS ACCORDING TO A PREDETERMINED ORDER, AND LDPC ENCODING (609) SHORTENED INFORMATION BIT.

Description

  The present invention relates to a communication system using a low-density parity-check (hereinafter referred to as “LDPC”) code, and more particularly, to a length of various codewords from a given LDPC code. The present invention relates to a channel coding and decoding method and apparatus for generating an LDPC code having a length and a code rate.

  In a wireless communication system, link performance is significantly degraded due to various channel noises, fading phenomena, and inter-symbol interference (hereinafter referred to as “ISI”). Therefore, in order to realize high-speed digital communication systems that require high data throughput and reliability, such as next-generation mobile communication, digital broadcast, and mobile Internet, a technology that eliminates noise, fading, and ISI is developed. There is a need to. In recent years, research on error correction codes has been actively conducted as a method for improving communication reliability by efficiently restoring distorted information.

  The LDPC code, first introduced by Gallager in the 1960s, has long been forgotten due to the complexity of implementation that far surpassed the technology at that time. However, since the turbo codes discovered by 1993 Berrou, Glavieux, and Thiimajshima show performance close to Shannon's channel limit, channel code based on iterative decoding and graphs, with much analysis on the performance and characteristics of turbo codes. A lot of research has been carried out on computerization.

  With such research, LDPC codes are re-researched in the late 1990s, applying iterative decoding based on sum-product algorithm on Tanner graphs (a special case of factor graphs) corresponding to LDPC codes Thus, performing the decoding proved to have performance close to Shannon's channel limit.

  LDPC codes are usually shown using graph representation techniques, and many properties can be analyzed through methods based on graph theory, algebra, and probability theory. In general, a graph model of a channel code is useful for describing the code, mapping information about the encoded bits to vertices in the graph, and mapping the relationship between each bit to an edge in the graph By doing so, each vertex can be regarded as a communication network in which a predetermined message is exchanged via each edge. Therefore, a natural decoding algorithm can be derived. For example, decoding algorithms derived from trellis that can be regarded as a kind of graph include the well-known Viterbi algorithm and the Bahl, Cocke, Jelinek, and Raviv (BCJR) algorithms Can do.

  An LDPC code is generally defined by a parity check matrix and can be expressed using a bipartite graph called a Tanner graph. This bipartite graph means that the vertices constituting the graph are divided into two different types, and the LDPC code is represented by a bipartite graph made up of vertices called variable nodes and check nodes. This variable node has a one-to-one correspondence with the encoded bits.

With reference to FIG.1 and FIG.2, the graph representation method of a LDPC code is demonstrated.
FIG. 1 shows an example of a parity check matrix H ₁ of an LDPC code configured with 4 rows and 8 columns.
Referring to FIG. 1, since the number of columns is 8, the parity check matrix H ₁ means an LDPC code that generates a codeword having a length of 8, and this column is mapped to encoded 8 bits. Is done.

FIG. 2 is a diagram illustrating a Tanner graph corresponding to H ₁ in FIG.
Referring to FIG. 2, a Tanner graph of an LDPC code includes eight variable nodes x ₁ (202), x ₂ (204), x ₃ (206), x ₄ (208), x ₅ (210, x ₆ ( _{212), x 7 (214)} , and _x 8 are formed from the 4 check nodes (218, 220, 222, 224) and (216).

Here, the i th column and the j th row of the parity check matrix H ₁ of the LDPC code are mapped to the variable node x _i and the j th check node. Also, a value of 1 at a point where the i-th column and j-th row of the parity check matrix H ₁ of the LDPC code intersect each other, that is, a value other than 0, is a variable node x _i on the Tanner graph of FIG. And an edge exists between the j-th check nodes.

  In a Tanner graph of an LDPC code, the degree of a variable node and a check node means the number of edges connected to each node, which is a column corresponding to a related node in the parity check matrix of the LDPC code. Or it is the same as the number of non-zero entries in the row.

For example, in FIG. 2, variable nodes x ₁ (202), x ₂ (204), x ₃ (206), x ₄ (208), x ₅ (210, x ₆ (212), x ₇ (214), and The orders of x ₈ (216) are 4, 3, 3, 3, 2, 2, 2, and 2, respectively, and check nodes 218, 220, 222, and 224 are 6, 5, 5, and 5 respectively. It is.

Also, the number of non-zero entries in each column of the parity check matrix H ₁ of FIG. 1 corresponding to the variable node of FIG. 2 is the above-described orders 4, 3, 3, 3, 2, 2, 2, and 2. The number of entries that match and are not 0 in each row of the parity check matrix H ₁ of FIG. 1 corresponding to the check node of FIG. 2 matches the above-described orders 6, 5, 5, and 5.

To demonstrate the degree distribution (degree distribution) for a node of the LDPC code, defines the ratio of the total number of the number and variable nodes of the variable node degree is i as _{f i,} and the number of check nodes degree-j The ratio with the total number of check nodes is defined as g _j .
For example, for the LDPC code corresponding to FIGS. 1 and _{2, f 2 = 4/8,} f 3 = 3/8, f 4 = 1/8, f i with respect to i ≠ 2, 3, 4 = 0, g ₅ = 3/4, g ₆ = 1/4, j ≠ 5, 6 for g _j = 0.

When the length of the LDPC code is defined as N, that is, the number of columns is defined as N and the number of rows is defined as n / 2, the density of entries that are not 0 in the above-described parity distribution of all parity check matrices is as follows. It is calculated like the following formula (1).

  In Equation (1), as N increases, the density of ‘1’ in the parity check matrix decreases. In general, for an LDPC code, an LDPC code with a large N has a very low density because the code length N is inversely proportional to the density of entries that are not zero. The term 'low-density' in the name of the LDPC code is derived from the relationship described above.

Next, the characteristics of the parity check matrix of the structured LDPC code applied in the present invention will be described with reference to FIG.
FIG. 3 schematically shows an LDPC code adopted as a standard technique in DVB-S2, which is one of the European digital broadcast standards.

In FIG. 3, N ₁ indicates the length of the LDPC codeword, K ₁ provides the length of the information word, and (N ₁ -K ₁ ) provides the parity length. Further, M ₁ and q are determined so as to satisfy q = (N ₁ −K ₁ / M ₁ ). Preferably K ₁ / M ₁ should be an integer. For convenience of description, the parity check matrix of FIG. 3 is called a first parity-check matrix H _1.

Referring further to FIG. 3, the configuration of the parity part, that is, the K _1st column to the (N ₁ −1) th column in the parity check matrix has a dual diagonal configuration. Thus, for the distribution of the order of the columns corresponding to the parity part, all the columns have the order '2' except for the last column having the order '1'.

In the parity check matrix, the information word part, that is, the configuration from the 0th column to the (K ₁ −1) th column is made using the following rules.

By grouping [Rule 1] K ₁ piece corresponding to the information word in the parity-check matrix of the column into a plurality of groups composed of M ₁ single row, generating a total K _{1 /} M ₁ column groups To do. The method of forming columns belonging to each column group follows the rule 2 below.

と仮定すると、‘１’を有する行の位置

は、ｉ番目の列グループ内のｊ（ここで、ｊ＝１、２、．．．、Ｍ_１−１）番目の列で下記の数式（２）のように定義される。

[Rule 2] First, the position of '1' in each 0th column in the i (where i = 1,..., K ₁ / M ₁ ) th column group is determined. When the order of the 0th column in each i-th column group is denoted by D _i , the position of the row having '1' is

Assuming that the position of the row with '1'

Is defined by the following equation (2) in the j-th column (where j = 1, 2,..., M ₁ −1) in the i-th column group.

According to the above rules, the order of the columns belonging to the i-th column group is understood to be all equal to D _i. In order to easily understand the configuration of the DVB-S2 LDPC code storing information related to the parity check matrix in accordance with the rules described above, the following specific example will be described.

As a specific example, N ₁ = 30, K ₁ = 15, M ₁ = 5, and q = 3, and '1' for the 0th column in the three column groups (hereinafter, for convenience of explanation) This sequence is referred to as a “weight-1 position sequence.”) The three sequences of information regarding the position of the row with can be expressed as follows:

For the convenience of explanation, only the position sequence corresponding to each column group can be expressed as follows for the position sequence of the row having “1” in the 0th column in each column group. For example,
0 1 2
0 11 13
0 10 14
In other words, the i-th “weight-1 position sequence” in the i-th line sequentially indicates information regarding the position of the row for the i-th column group.

An LDPC code having the same concept as the DVB-S2 LDPC code of FIG. 4 can be generated by configuring a parity check matrix using information corresponding to the above specific example and rules 1 and 2.
It is known that DVB-S2 LDPC codes designed according to rules 1 and 2 can be efficiently encoded using structural shapes. The process of executing LDPC encoding using DVB-S2 based on the parity check matrix will be described with reference to the following example.

In the following, an encoding process using a DVB-S2 LDPC code having N ₁ = 16200, K ₁ = 10800, M ₁ = 360, and q = 15 will be described as a specific example. For convenience of explanation, an information word bit having a length K ₁ is denoted as (i ₀ , i ₁ ,..., I _{K− 1} ) and a parity having a length (N ₁ −K ₁ ). The bits are expressed as (p ₀ , p ₁ ,..., P _N1-K1-1 ).

[Step 1] The encoder initializes parity bits as follows.
p ₀ = p ₁ =. . . = P _N1-K1-1 = 0

[Step 2] The encoder reads information on the row where '1' is located in the first column group of the information word from the 0th “weight-1 position sequence” of the 0th stored parity check matrix. .
0 2084 1613 1548 1286 1460 3196 4297
2481 3369 3451 4620 2622

の値を意味する。

The encoder updates particular parity bits p _x in accordance with the following equation (3) using the information and the first information bits i ₀ read above. Where x is

Means the value of

は、

として表現することもでき、

は、２進加算を意味する。 In Equation (3) above,

Is

Can also be expressed as

Means binary addition.

の値を意味する。上述した数式（４）は、上述した数式（２）と同一の概念を有することに留意しなければならない。 [Step 3] Next, the encoder performs the following equation (3) for the next 359 information word bits i _m after i ₀ (where m = 1, 2,..., 359). Find the value of 4).

{X + (m mod M ₁ ) × q} mod (N ₁ −K ₁ )
M ₁ = 360 m = 1, 2,. . . , 359 (4)

In the above equation (4), x is

Means the value of It should be noted that the above formula (4) has the same concept as the above formula (2).

上述した数式（５）において、ｑ＝１５であることに留意しなければならない。符号化器は、ｍ＝１、２、．．．、３５９に対して上記のような工程を同様に実行する。 Next, the encoder performs an operation similar to Equation (3) using the value obtained in Equation (4) described above. That is, the encoder updates the _{p {x + (m mod M1} ) × q} mod (N1-K1) against _{i m.}

For example, for m = 1, i.e., i ₁ , the encoder updates the parity bits p _{(x + q) mod (N1−K1)} as defined by Equation (5) below.

It should be noted that q = 15 in Equation (5) above. The encoder has m = 1, 2,. . . 359, the above process is performed in the same manner.

の情報を読み出し、特定のｐ_ｘをアップデートする。ここで、ｘは、

を意味する。符号化器は、ｉ_３６０の後の次の３５９個の情報語ビットｉ_３６１、ｉ_３６２、．．．、ｉ_７１９に数式（４）を同様に適用することにより、
ｐ_{｛ｘ＋（ｍ ｍｏｄ Ｍ１）×ｑ｝ ｍｏｄ （Ｎ１−Ｋ１）} ｍ＝３６１，３６２，．．．，７１９

をアップデートする。 [Step 4] Similar to step 2, the encoder performs the operation on the 361st information word bit i ₃₆₀ .

It reads the information, updates the particular p _x. Where x is

Means. _Encoder, the next 359 information bits _{i 361, i 362} after _{i 360,.} . . , I ₇₁₉ by applying Equation (4) in the same way,
p _{{x + (m mod M1) × q} mod (N1-K1)} m = 361,362,. . . 719

Update.

上述した数式（６）のパリティビットｐ_ｉは、ＬＤＰＣ符号化が完了したパリティビットである。
上述したように、ＤＶＢ−Ｓ２は、ステップ１からステップ６までの過程を介して符号化を行う。 [Step 5] The encoder repeats Steps 2, 3, and 4 for all groups having 360 information word bits respectively.
[Step 6] The encoder finally determines parity bits using Equation (6).

The parity bit p _i in the above equation (6) is a parity bit for which LDPC encoding has been completed.
As described above, DVB-S2 performs encoding through the process from step 1 to step 6.

  In order to apply the LDPC code to an actual communication system, the LDPC code must be designed to match the amount of data transmission required in the communication system. In particular, communication that supports various broadcast services as well as an adaptive communication system that applies a Hybrid Automatic Retransmission Request (HARQ) method and an adaptive modulation and coding (AMC) method. The system also requires LDPC codes with different codeword lengths to support different data transmissions according to system requirements.

However, as described above, the LDPC code used in the DVB-S2 system has only two types of codeword lengths due to its limited use, and each type of LDPC code has an independent parity check matrix. Need. For this reason, there is a need for a method that supports various codeword lengths to increase system scalability and flexibility.
In particular, in the DVB-S2 system, data transmission of hundreds to thousands of bits is necessary for transmission of signaling information. However, since only 16200 and 64800 are available for the length of DVB-S2 LDPC codes, there is a problem that it is necessary to support various codeword lengths.

  Also, storing an independent parity check matrix for each codeword length of the LDPC code is given without designing a new parity check matrix to reduce overall memory efficiency. There is a problem that a method capable of efficiently supporting various codeword lengths from an existing parity check matrix is required.

Therefore, the present invention has been made in view of the above problems in the conventional LDPC code, and an object of the present invention is to provide an LDPC code given by using shortening or puncturing in a communication system using the LDPC code. To provide a channel coding and decoding method and apparatus for generating LDPC codes having different codeword lengths.
Another object of the present invention is to provide a channel coding and decoding method and apparatus for guaranteeing optimum performance in consideration of the DVB-S2 architecture in a communication system using an LDPC code.

であることを特徴とする。 To achieve the above object, according to an aspect of the present invention, there is provided a channel coding method in a system using a low density parity check code (LDPC), wherein information bits are divided into a plurality of bit groups. Determining the number of information bits to be shortened, determining the number of bit groups to be shortened based on the determined number of information bits to be shortened, and according to a predetermined order A step of shortening information bits of the determined bit group and a step of encoding the shortened information bits, obtained by shortening to determine the number of information bits to be shortened. further comprising the step of determining information bits number _{(K 2),} the length of the codeword is 16200, the length of the information bits 7200 In some cases, the predetermined order is 18, 17, 16, 15, 14, 13, 12, 11, 4, 10, 9, 8, 3, 2, 7, 6, 5, 1, 19, and If 0, the bit group length is 360, and the information bit length is 7200, the bits from the 0th bit group to the (m−1) th bit group according to the predetermined order A step of shortening the information bits of the group and a step of shortening (7200-K ₂ -360m) information bits in the m-th bit group according to the predetermined order, wherein K ₂ is obtained by the shortening (7200-K ₂ ) is the number of information bits to be shortened,

It is characterized by being.

であることを特徴とする。 According to another aspect of the present invention, a channel coding apparatus in a system using a low density parity check (LDPC) code, wherein information bits are divided into a plurality of bit groups, and the number of information bits to be shortened is determined. A shortening pattern application unit that determines the number of bit groups to be shortened based on the determined number of information bits to be shortened, and shortens the information bits of the determined bit group according to a predetermined order And an encoder that encodes the shortened information bits, wherein the shortening pattern application unit determines the number of information bits to be shortened in order to determine the number of information bits to be shortened ( K ₂₎ determines the length of the codeword is 16200, if the length of the information bits is 7200, the order said predetermined, 18,17,16 15, 14, 13, 12, 11, 4, 10, 9, 8, 3, 2, 7, 6, 5, 1, 19, and 0, the bit group length is 360, and the information bits When the length is 7200, the shortening pattern application unit shortens the information bits of the bit groups from the 0th bit group to the (m−1) th bit group according to the predetermined order, and The (7200-K ₂ -360m) information bits in the mth bit group are shortened according to a defined order, where K ₂ is the number of information bits acquired by the shortening and (7200-K ₂ ) Is the number of information bits to be shortened,

It is characterized by being.

であることを特徴とする。 According to yet another aspect of the present invention, a channel decoding method in a system using a low density parity check (LDPC) code, the step of demodulating a received signal, and a position of a shortened information bit. Determining the position of the shortened information bit, and decoding the demodulated signal in consideration of the determined position of the shortened information bit. Determining a number of determined information bits; determining a number of shortened bit groups based on the determined number of shortened information bits; and obtaining a predetermined order of bit groups and a step, the step of determining the number of information bits to be obtained by shortening (K ₂₎ to determine the number of the shortened information bits And the code word length is 16200 and the information bit length is 7200, the predetermined order is 18, 17, 16, 15, 14, 13, 12, 11, 4, 10, 9, 8, 3, 2, 7, 6, 5, 1, 19, and 0, the bit group length is 360, and the information bit length is 7200, Determining that the information bits of the bit groups from the 0th bit group to the (m−1) th bit group have been shortened according to the determined order of the bit groups, and the order of the predetermined bit groups Determining that (7200-K ₂ -360m) information bits in the mth bit group have been shortened according to: K ₂ is the number of information bits acquired by the shortening (7200-K ₂ ) is the number of shortened information bits,

It is characterized by being.

であることを特徴とする。 According to yet another aspect of the present invention, a channel decoding apparatus in a system using a low density parity check (LDPC) code, the demodulator for demodulating a received signal, and the position of a shortened information bit A shortening pattern determining unit for determining the position of the shortened information bit, and a decoder for decoding the demodulated signal in consideration of the determined position of the shortened information bit. Determining the number of shortened information bits, determining the number of shortened bit groups based on the determined number of shortened information bits, and obtaining a predetermined order of the bit groups is determined, the shortening pattern determination unit determines the number of information bits (K ₂₎ which is obtained by reducing to determine the number of the shortened information bits, the length of the codeword 6200 and the length of the information bits is 7200, the predetermined order is 18, 17, 16, 15, 14, 13, 12, 11, 4, 10, 9, 8, 3, 2, 7, 6, 5, 1, 19, and 0, the bit group length is 360, and the information bit length is 7200, the shortening pattern determination unit determines the predetermined bits It is determined that the information bits of the bit groups from the 0th bit group to the (m−1) th bit group are shortened according to the group order, and the mth bit group according to the predetermined bit group order. decided to _(7200-K 2 -360m) information bits of the inner is shortened, _{K 2} is the number of information bits to be obtained by shortening, _{(7200-K 2)} is shortened Is the number of information bits,

It is characterized by being.

  The present invention has an effect that some columns can be substantially not used by proposing a shortening pattern. In addition, the present invention has an effect that individual LDPC codes having different codeword lengths can be generated using information on a parity check matrix given in a communication system using an LDPC code.

It is a figure which shows an example of the parity check matrix of LDPC code whose length is 8. It is a figure which shows the Tanner graph of an example of the parity check matrix of LDPC code whose length is 8. It is a figure which shows the schematic structure of a DVB-S2 LDPC code. It is a figure which shows an example of the parity check matrix of a DVB-S2 LDPC code. It is a block diagram which shows the structure of the transmitter / receiver of the communication system which uses a LDPC code. 4 is a flowchart illustrating a process of generating LDPC codes having different codeword lengths from stored parity check matrices of LDPC codes according to an embodiment of the present invention. FIG. 3 is a block diagram illustrating a configuration of a transmission apparatus using a shortened LDPC code according to an embodiment of the present invention. FIG. 3 is a block diagram illustrating a configuration of a transmission apparatus using a shortened / punctured LDPC code according to an embodiment of the present invention. It is a block diagram which shows the structure of the receiver which uses the LDPC code to which the shortening by embodiment of this invention is applied. It is a block diagram which shows the structure of the receiver which uses the LDPC code to which both shortening and puncturing are applied according to an embodiment of the present invention. It is a flowchart which shows the reception operation | movement in the receiver by embodiment of this invention.

  DESCRIPTION OF EXEMPLARY EMBODIMENTS Hereinafter, a preferred embodiment of the invention will be described in detail with reference to the accompanying drawings. In the following description, from the viewpoint of clarity and conciseness, if it is determined that a specific description related to a known function or configuration related to the present invention obscures the gist of the present invention, a detailed description thereof will be given. Is omitted.

  The present invention proposes a method for supporting LDPC codes having various codeword lengths using a parity check matrix of an LDPC code having a specific structural shape. The present invention also proposes an apparatus and a control method for supporting various codeword lengths in a communication system using an LDPC code having a specific structure. In particular, the present invention proposes a method and apparatus for generating an LDPC code shorter than a given LDPC code using a parity check matrix of the given LDPC code.

を推定する。 FIG. 5 is a block diagram illustrating a configuration of a transceiver of a communication system using an LDPC code.
Referring to FIG. 5, the message u is input to the LDPC encoder 511 in the transmitter 510 before being transmitted to the receiver 530. The LDPC encoder 511 encodes the input message u and outputs the encoded signal to the modulator 513. The modulator 513 modulates the encoded signal and then transmits the modulated signal to the receiver 530 via the wireless channel 520. The demodulator 531 in the receiver 530 demodulates the signal transmitted by the transmitter 510 and then outputs the demodulated signal to the LDPC decoder 533. The LDPC decoder 533 may estimate the message based on data received via the wireless channel 520.

Is estimated.

  The LDPC encoder 511 generates a parity check matrix according to a codeword length required by the communication system using a preset scheme. In particular, according to the present invention, the LDPC encoder 511 can support various codeword lengths using the LDPC code without the need for additional storage information. A specific operation method of the LDPC encoder for supporting various codeword lengths will be described in detail with reference to FIG.

FIG. 6 is a flowchart illustrating an encoding operation of the LDPC encoder according to the embodiment of the present invention.
Specifically, FIG. 6 shows a method for generating LDPC codes having different codeword lengths from a parity check matrix of LDPC codes stored in advance.
Here, as a method for supporting various codeword lengths, a shortening technique and a puncturing technique are used.
As used herein, 'shortening method' means a method that does not substantially use a particular part of a given particular parity check matrix. In order to help further understanding of the shortening method, a detailed description will be given using a parity check matrix of the DVB-S2 LDPC code shown in FIG.

Referring to a DVB-S2 LDPC code; FIG parity-check matrix shown in FIG. 3, the entire length is _{N 1,} the top portion length is _{K 1} information bits _{(i 0,} i _1, .. ., I _K1-1 )

The rear part has parity bits (p ₀ , p ₁ ,..., P _N1-K1-1 ) having a length of (N ₁ −K ₁ ).

Corresponding to Usually, the information word bits have a value of “0” or “1” freely, and the shortening method limits the value of the information word bits of a specific part to be shortened.
For example, shortening Ns information word bits from i ₀ to i _Ns−1 is usually i ₀ = i ₁ =. . . = I _Ns-1 = 0.

In other words, by limiting the value for the Ns information word bits from i ₀ to i _Ns−1 to 0, the shortening method uses the parity check matrix of the DVB-S2 LDPC code shown in FIG. It is possible to obtain the same effect as that using substantially no leading row. The term 'shortening method' comes from the limiting action described above. Therefore, applying the shortening in the present invention means that the value of the shortened information word bit is regarded as 0.

  For this shortening method, when the system is set up, the transmitter and receiver can share or generate the same location information regarding the shortened information word bits. Therefore, even if the transmitter does not transmit the shortened bit, the receiver recognizes that the information word bit at the position corresponding to the shortened bit has a value of '0'. Decrypt.

In the shortening method, since the length of the code word actually transmitted by the transmitter is N ₁ −Ns and the length of the information word is also K ₁ −N _s , the code rate is (K ₁ −Ns) / ( N ₁ −Ns), which is always smaller than the code rate K ₁ / N ₁ given first.

  Next, the puncturing method will be described in detail. In general, this puncturing method can be applied to all information word bits and parity bits. Unlike the shortening method described above, the puncturing method and the shortening method have the concept of limiting the value of a specific bit. do not do. The puncturing method does not transmit specific information word bits or specific parts of the generated parity bits, which allows the receiver to perform erasure processing of the corresponding bits.

In other words, by not transmitting bits to N _p predefined positions in the generated LDPC codeword with length N ₁ , LDPC with length (N ₁ −N _p ). The same effect as the code word can be obtained. This puncturing method is different from the shortening method because all the columns corresponding to the bits punctured by the parity check matrix are used as they are in the decoding process.

  According to the invention, when the system is set up, the position information about this punctured bit can be shared or estimated equally to the transmitter and receiver so that the receiver Decoding is performed after erasing processing of the punctured bits.

In this puncturing method, since the length of the code word that the transmitter actually transmits is N ₁ −N _p and the length of the information word is constant K ₁ , the code rate is K ₁ / ( N ₁ −N _p ), which is always greater than the code rate K ₁ / N ₁ given initially.

  A shortening method and a puncturing method suitable for the DVB-S2 LDPC code will be described. As described above, the DVB-S2 LDPC code is a kind of LDPC code having a specific configuration. Therefore, compared with a general LDPC code, the DVB-S2 LDPC code can be subjected to more efficient shortening and puncturing.

For convenience of explanation, the codeword length and the information word length are N ₁ and K ₁ , respectively, and are finally obtained from the DVB-S2 LDPC code using the shortening method and the puncturing method. Assume that the codeword length and the information word length of the LDPC code are N ₂ and K ₂ , respectively.

が一般的にＤＶＢ−Ｓ２ ＬＤＰＣ符号の符号率Ｋ_１／Ｎ_１とは異なるので、その代数的特性は変わる。
ここで、Ｎ_Δ＝Ｋ_Δである場合には、ＬＤＰＣ符号は、短縮及びパンクチャーリングのいずれも適用しないか又は短縮だけを行うことにより生成される。 When N ₁ −N ₂ = N _Δ and K ₁ −K ₂ = K _Δ , the parity check matrix of the DVB-S2 LDPC code is shortened by K _Δ bits, and (N _Δ −K _Δ ) By performing puncturing of only bits, it is possible to generate an LDPC code whose codeword length and information word length are N ₂ and K ₂ , respectively. When the LDPC code generated in this way is N _Δ > 0 or K _Δ > 0, its code rate

Is generally different from the code rate K ₁ / N ₁ of the DVB-S2 LDPC code, so its algebraic characteristics change.
Here, when N _Δ = K _Δ , the LDPC code is generated by applying neither shortening nor puncturing, or performing only shortening.

値がＭ_１個の列に対応し、トータルＫ_１／Ｎ_１個の列グループのそれぞれが構造形状を有する。したがって、ＤＶＢ−Ｓ２ ＬＤＰＣ符号は、１つの

値を使用しない場合、Ｍ_１個の列を使用しないＬＤＰＣ符号と同一である。次のような短縮工程は、このような特徴を考慮して提案される。 However, for the DVB-S2 LDPC code, as explained in rule 1 and rule 2 above,

The value corresponds to M ₁ columns, and each of the total K ₁ / N ₁ column groups has a structural shape. Therefore, the DVB-S2 LDPC code is one

If no value is used, it is the same as an LDPC code that does not use M ₁ columns. The following shortening process is proposed in consideration of such characteristics.

First, in step 601, the LDPC encoder 511 reads column group information of the DVB-S2 LDPC code to be shortened. That is, the LDPC encoder 511 reads the stored parity check matrix information.
Thereafter, at step 603, LDPC encoder 511 determines the length _{K 2} of length _{N 2} and an information word shortened LDPC codeword actually transmitted after shortening.

を決定し、ここで、

は、ｘより小さいか又は同一の最大整数を意味する。 After this, the LDPC encoder 511 performs a shortening corresponding to the length of the information word of the LDPC code requested based on the read information of the stored parity check matrix, and the steps 605 to 611 are performed. The shortening process is performed.
[Shortening Step 1] In step 605, the LDPC encoder 511

Where

Means the largest integer less than or equal to x.

の中で（Ａ＋１）個の列グループに対するシーケンスを選択し、この選択されたシーケンスを

として定義する。ＬＤＰＣ符号化器５１１は、残りのＫ_１／Ｍ_１−Ａ−１個の列グループに対するシーケンス

が存在しないと見なす。 [Shortening Step 2] In step 607, the LDPC encoder 511

Select a sequence for (A + 1) column groups in and select this selected sequence

Define as LDPC encoder 511, the sequence for the remaining _K 1 _/ M 1 -A-1 column groups

Is considered nonexistent.

値から短縮されたＤＶＢ−Ｓ２ ＬＤＰＣ符号を生成する。この時、この短縮されたＬＤＰＣ符号が情報語の長さ（Ａ＋１）Ｍ_１を有し、これは、常にＫ_２より大きいか又は同一であることに留意しなければならない。 [Shortening Step 3] In Step 609, A + 1 pieces selected in Shortening Step 2 using Rules 1 and 2 are used.

A DVB-S2 LDPC code shortened from the value is generated. It has to be noted here that this shortened LDPC code has an information word length (A + 1) M ₁ , which is always greater than or equal to K ₂ .

[Shortening Step 4] In step 611, the LDPC encoder 511 additionally shortens (A + 1) M ₁ -K ₂ columns from the shortened LDPC code generated in the shortening step 3.
To illustrate a specific example, 12150 bits of information word bits using a DVB-S2 LDPC code with the characteristics of N ₁ = 16200, K ₁ = 13320, M ₁ = 360, and q = 9 The process of generating a new LDPC code in which the length of the code word is N ₂ = 4050 and the length of the information word is K ₂ = 1170 will be described in detail.

を決定する。 Example of shortening step 1: LDPC encoder 511

To decide.

の中で４個の列グループに対するシーケンスを選択する。このような特定の例では、ＬＤＰＣ符号化器５１１が次のシーケンスを選択する。

Example of shortening step 2: The LDPC encoder 511 has a total of 37

Select a sequence for four column groups. In such a specific example, the LDPC encoder 511 selects the next sequence.

の値から短縮されたＤＶＢ−Ｓ２ ＬＤＰＣ符号を生成する。短縮されたＬＤＰＣ符号の場合に、その情報語の長さは、４×３６０＝１４４０となる。 Example of shortening step 3: The LDPC encoder 511 uses four rules selected in the example of shortening step 2 using rule 1 and rule 2.

A DVB-S2 LDPC code shortened from the value of is generated. In the case of a shortened LDPC code, the length of the information word is 4 × 360 = 1440.

の中でＫ_１／Ｍ_１−Ａ−１＝１３３２０／３６０−４＝３３個の列グループに関するシーケンス情報を使用しないので、短縮ステップ２の例では、トータル３３×３６０＝１１８８０ビットを短縮するものと同一である。また、短縮ステップ３の例及び短縮ステップ４の例を介して２７０個の情報語ビットを付加的に短縮したので、最終的に１２１５０ビットの情報語ビットを短縮するものと同一である。したがって、この実施形態の結果は、符号語の長さＮ_２＝４０５０及び情報語の長さＫ_２＝１１７０を有する短縮されたＬＤＰＣ符号を提供する。 Example of shortening step 4: The LDPC encoder 511 additionally shortens 1440-1170 = 270 columns from the shortened LDPC code generated in the example of shortening step 3. The LDPC encoder 511 performs encoding based on the shortened LDPC code.
According to this embodiment,

In the example of the shortening step 2, the total of 33 × 360 = 111880 bits is shortened because the sequence information regarding K ₁ / M ₁ −A−1 = 13320 / 360−4 = 33 column groups is not used. Is the same. Further, since 270 information word bits are additionally shortened through the example of the shortening step 3 and the example of the shortening step 4, it is the same as that of finally shortening the information word bits of 12150 bits. Thus, the results of this embodiment provide a shortened LDPC code with codeword length N ₂ = 4050 and information word length K ₂ = 1170.

  As described above, the present invention differs from the arbitrary bitwise shortening method normally used for shortening the DVB-S2 LDPC code, based on the structural characteristics of the DVB-S2 LDPC code. An efficient shortening method can be applied using a method that does not use information related to a sequence group of LDPC codes.

The sequence selection criteria for the column group in the shortening step 2 of the DVB-S2 LDPC code can be briefly summarized as follows.
[Criteria 1] The LDPC encoder 511 has a codeword length for an optimum degree distribution of a general LDPC code in which the codeword length is N ₂ and the information word length is K _2. Is N ₁ , and the length of the code word obtained by shortening with the DVB-S2 LDPC code whose information word length is K ₁ is N ₂ , and the length of the information word is K ₂ A code having a similar degree distribution of a shortened LDPC code is selected.

[Criteria 2] The LDPC encoder 511 selects a code having good cycle characteristics on the Tanner graph among the shortened codes selected in the criterion 1. In the present invention, as a criterion for cycle characteristics, the LDPC encoder 511 selects the case where the minimum length cycle in the Tanner graph is the largest and the number of the minimum length cycles is the smallest.
In criterion 1, the optimal degree distribution of a general LDPC code can be obtained using a density evolution analysis method, but since it is irrelevant to the gist of the present invention, the detailed content is omitted. To do.

  When the number of “weight-1 position sequence” selections for the column group is not large, the LDPC encoder 511 examines all cases regardless of the two types of conditions such as criterion 1 and criterion 2. By doing so, the sequence for the column group having the best performance may be selected. However, the selection criterion for the column group applied in the shortening step 2 of the DVB-S2 LDPC code is to select an LDPC code that satisfies these two conditions when the number of sequence selections for this column group is too large. The efficiency can be improved.

To illustrate an example of a good sequence obtained by applying the “weight-1 position sequence” selection criteria for this column group, first N ₁ = 16200, K ₁ = 3240, M ₁ = 360, And a DVB-S2 code with q = 36.
The DVB-S2 LDPC code has a “weight-1 position sequence” for the following column groups.

This i-th “weight-1 position sequence” in the i-th line sequentially indicates information about the position of the row having “1” for the i-th column group. Therefore, it can be seen that the DVB-S2 LDPC code is composed of nine column groups, and the length of the information word is 9 × 360 = 3240. When the length of the code word and the length of the information word to be acquired by performing the shortening are N ₂ and K ₂ , respectively, the optimized shortening pattern is searched using the shortening step 1 to the shortening step 4 be able to.

However, if the N ₂ and K ₂ values required by the system are very variable, the optimized shortening pattern may not be correlated according to the value of N ₂ . For example, assuming that two column groups have to be shortened from the DVB-S2 LDPC code, it is assumed that the optimal selection does not use information about the row where '1' is located in the fourth and eighth column groups. Then, when three column groups are selected, the selection and shortening of the first, fifth, and sixth column groups can be optimal, so they are not correlated with each other. Therefore, if the N ₂ and K ₂ values required by the system are very variable, all shortened patterns optimized according to the K ₂ value must be stored for optimized performance. There is a disadvantage of not being

Therefore, if the N ₂ and K ₂ values required by the system are very variable, use the following method to search for a suboptimal shortening pattern for the efficiency of the system. Can do.
First, assume that one column group needs to be selected for shortening. In this case, since the number of selectable column groups is only one, the column group having the highest performance can be selected.

  Next, when two column groups need to be selected for shortening, the LDPC encoder 511 includes the selected one column group, and performs the best performance among the remaining column groups. Select the column group that indicates In a similar manner, if i column groups need to be selected for shortening, the LDPC encoder 511 includes (i−1) column groups selected in the previous step for shortening. , Select one column group having the best performance among the remaining column groups.

This method of shortening, it is not possible to guarantee the selection of the optimum, it is possible to have a stable performance from independent one shortening pattern to changes in the value of K _2.
As a specific example, when the values of N ₂ and K ₂ required by the system are very variable, the quasi-like cases of nine types shown in Table 1 below according to N ₂ and K ₂ are used. An optimal shortening pattern can be obtained.
Here, since the puncturing method was not considered, N ₂ = N ₁ −K ₂ .

The shortening order of <Table 1> described above is determined by the above-described criteria 1 and 2 after dividing the length of the information word into nine intervals.
Referring to Table 1, all the sequences corresponding to the eighth, fourth, seventh, sixth, third, fifth, second, ninth, and first sequences included in this column group are referred to. It can be seen that the sequence is sequentially shortened according to the length of the information word for the required LDPC code.

  That is, a value of “0” corresponds to the eighth, fourth, seventh, sixth, third, fifth, second, ninth, and first rows according to the length of the requested information word. Maps to information word bits that are subject to shortening in column order. Also, meaningful information word bits that are not fixed to '0' are assigned to the first, ninth, second, fifth, third, sixth, seventh, fourth, and eighth sequences according to the length of the information word. It can also be assumed that the corresponding columns are mapped sequentially. The column order '8, 4, 7, 6, 3, 5, 2, 9, 1' represents' 7, 3, 6, 5, 2, 4 by representing the first column as the 0th block. , 1, 8, 0 ′.

In 8) and 9) of <Table 1> above, the last part corresponding to the information word bits of the DVB-S2 LDPC code having N ₁ = 16200, K ₁ = 3240, M ₁ = 360, and q = 36 Since the last 168 bits of the ninth column group, which is a column group, are mapped to the Bose-Chudhuri-Hocquenhem (BCH) parity bit, they cannot be shortened. In practice, a DVB-S2 LDPC code with N ₁ = 16200 is designed so that 168 BCH parity bits are always included in LDPC information word bits with lengths K ₁ and K ₂ .

The shortening order information shown in <Table 1> can be simply expressed as <Table 2> below.

To describe another specific embodiment, a DVB-S2 code with N ₁ = 16200, K ₁ = 7200, M ₁ = 360, and q = 25 will be described.
The DVB-S2 LDPC code has the following "weight value-1 position sequence".

20 712 2386 6354 4061 1062 5045 5158
21 2543 5748 4822 2348 3089 6328 5876
22 926 5701 269 3693 2438 3190 3507
23 2802 4520 3577 5324 1091 4667 4449
24 5140 2003 1263 4742 6497 1185 6202
0 4046 6934
1 2855 66
2 6694 212
3 3439 1158
4 3850 4422
5 5924 290
6 1467 4049
7 7820 2242
8 4606 3080
9 4633 7877
10 3884 6868
11 8935 4996
12 3028 764
13 5988 1057
14 7411 3450

This i-th sequence sequentially represents information about the position of the row with '1' for the i-th column group. Therefore, it can be seen that the DVB-S2 LDPC code is composed of 20 column groups, and that the length of the information word is 20 × 360 = 7200. When the length of the code word and the length of the information word to be acquired by performing the shortening are N ₂ and K ₂ , respectively, search for a sub-optimal shortening pattern as defined in Table 3 below. Can do.

In this shortening step, additional shortening can be easily realized if this step is performed sequentially after or before the column group where the additional shortening is made.
If puncturing is necessary after step 611 in FIG. 6, the LDPC encoder 511 applies puncturing in the LDPC encoding process in step 613. In the following, this puncturing method will be briefly described.

Length and information of the codeword of an LDPC code to be finally obtained using shortening technique from DVB-S2 LDPC code with a length N ₁ and a length K ₁ information word of the code word and puncturing If we define the word lengths as N ₂ and K ₂ , respectively, and define N ₁ −N ₂ = N _Δ and K ₁ −K ₂ = K _Δ , then K _Δ bits from the parity check matrix of the DVB-S2 LDPC code shortened, by (N Δ -K _Δ) puncturing bits, it is possible to obtain an LDPC code having a length N ₂ and an information word length K ₂ codewords.

For convenience of explanation, assuming that only the parity part applies the puncturing method, the length of the parity is N ₁ −K ₁ , so (N ₁ −K ₁ ) / (N _Δ −K _Δ ). There is a method of puncturing one bit at a time from the parity part for each bit. However, various other methods can also be applied as the puncturing method.
When N _Δ -K _Δ = 0, it is not necessary to apply the puncturing method. In such a specific case, a high-performance shortened DVB-S2 LDPC code can be obtained by applying a similar DVB-S2 LDPC code generation method using the shortening pattern shown in Table 1. it can.

FIG. 7 shows an example more specifically showing a transmission apparatus for realizing the DVB-S2 LDPC code shortening process.
FIG. 7 is a block diagram illustrating a configuration of a transmission apparatus using a shortened LDPC code according to an embodiment of the present invention.
The transmission apparatus includes a control unit 710, a shortened pattern application unit 720, an LDPC code parity check matrix extraction unit 740, and an LDPC encoder 760.

The LDPC code parity check matrix extraction unit 740 extracts a shortened LDPC code parity check matrix. The LDPC code parity check matrix can be extracted from the memory, can be provided from the transmission device, or can be generated by the transmission device.
The control unit 710 performs control so that the shortening pattern application unit 720 can determine the shortening pattern according to the length of the information word.

  The shortening pattern application unit 720 inserts a bit having a value of '0' at a position corresponding to the shortened bit, or removes a column corresponding to the shortened bit from the parity check matrix of the given LDPC code. To do. The method for determining the shortening pattern uses a shortening pattern stored in a memory, generates a shortening pattern using a sequence generator (not shown), or a parity check matrix and a given information word. For example, a density evolution analysis algorithm may be used for the length.

The control unit 710 performs control so that the shortening pattern application unit 720 can shorten a part of the information bits of the LDPC code with the patterns shown in <Table 1> to <Table 3>.
The LDPC encoder 760 performs encoding based on the LDPC code shortened by the control unit 710 and the shortening pattern application unit 720.

8 and 9 are block diagrams illustrating configurations of a DVB-S2 LDPC code transmitting apparatus and receiving apparatus that simultaneously apply shortening and puncturing.
FIG. 8 is a block diagram illustrating a configuration of a transmission apparatus that uses a shortened / punctured LDPC code according to an embodiment of the present invention.

The transmission apparatus in FIG. 8 further includes a puncturing pattern application unit 880 added to the transmission apparatus in FIG. Referring to FIG. 8, it can be seen that the shortening is performed before the LDPC encoder 760 and the puncturing is performed at the output stage of the LDPC encoder 760.
The puncturing pattern application unit 880 applies puncturing to the output of the LDPC encoder 760. The method of applying puncturing has been described in detail in step 613 of FIG.

FIG. 9 is a block diagram illustrating a configuration of a receiving apparatus using an LDPC code to which a shortening according to an embodiment of the present invention is applied.
FIG. 9 shows a case where a signal transmitted from a communication system using the shortened DVB-S2 LDPC code is received, and the length of the shortened DVB-S2 LDPC code is determined from the received signal. Fig. 5 shows an example of a receiving apparatus that restores data desired by the user from the received signal.

The receiving apparatus includes a control unit 910, a shortened pattern determination / estimation unit 920, a demodulator 930, and an LDPC decoder 940.
The demodulator 930 receives and demodulates the shortened LDPC code, and provides the demodulated signal to the shortened pattern determination / estimation unit 920 and the LDPC decoder 940.

  Under the control of the control unit 910, the shortened pattern determination / estimation unit 920 estimates or determines information on the shortened pattern of the LDPC code from the demodulated signal, and performs LDPC decoding on the position information of the shortened bit. To the generator 940. The method of determining or estimating the shortening pattern by the shortening pattern determination or estimation unit 920 uses a shortening pattern stored in the memory or generates a shortening pattern using a sequence generator (not shown). Alternatively, a density evolution analysis algorithm can be used for the parity check matrix and the length of a given information word.

Since the probability that the shortened bit value is zero (0) in the LDPC decoder 940 is 1 (that is, 100%), the controller 910 shortens the LDPC decoder 940 using the probability value 1. It is determined whether to decode the generated bits.
When the LDPC decoder 940 knows the length of the DVB-S2 LDPC code shortened by the shortened pattern determination / estimation unit 920, the LDPC decoder 940 restores the data desired by the user from the received signal.

FIG. 10 is a block diagram illustrating a configuration of a receiving apparatus using an LDPC code to which shortening and puncturing are applied according to an embodiment of the present invention.
In the receiving apparatus in FIG. 10, the shortening pattern determination / estimation unit 920 in FIG. 9 is replaced with a shortening and puncturing pattern determination / estimation unit 1020.
When the transmission apparatus applies all the shortening and puncturing, the shortening and puncturing pattern determination / estimation unit 1020 in the reception apparatus first performs pattern determination or estimation for the shortening, or pattern determination for the puncturing. Alternatively, estimation can be performed first, or pattern determination or estimation for shortening and pattern determination or estimation for puncturing can be performed simultaneously.
The LDPC decoder 940 cannot decode without knowing information about all of the shortening and puncturing.

FIG. 11 is a flowchart showing a receiving operation in the receiving apparatus according to the embodiment of the present invention.
The demodulator 930 receives and demodulates the LDPC code shortened in step 1101. Thereafter, the shortening pattern determination / estimation unit 920 determines or estimates the shortening / puncturing pattern from the signal demodulated in step 1103.

  In step 1105, the shortening pattern determination / estimation unit 920 determines whether there is a bit that has been arbitrarily shortened or punctured. If there are no bits that have been shortened or punctured, the LDPC decoder 940 performs decoding at step 1111. However, if there is a bit that has been shortened or punctured, the shortening and puncturing pattern determination / estimation unit 1020 performs LDPC coding on the position information of the bit that has been shortened or punctured in step 1107. To the device 940.

  In step 1109, based on the position information of the shortened or punctured bit, the LDPC decoder 940 determines that the probability that the value of the shortened bit is 0 is 1, and the puncture is performed. It is determined that the ringed bit is the lost bit. Thereafter, the LDPC decoder 940 proceeds to step 1111 and performs LDPC decoding.

The above-described method according to the present invention is a hardware or software that can be stored in a recording medium such as a CD ROM, RAM, floppy disk, hard disk, or magneto-optical disk, or downloaded over a network. Or a computer code, whereby the method described herein is a general purpose computer such as an ASIC or FPGA, or a specific processor, or programmable or designated hardware It can be executed by software using
As understood in the art, a computer, processor, or programmable hardware includes memory components, such as RAM, ROM, flash, etc., and is accessed and executed by the computer, processor, or hardware. The processing method described here is realized.

  Although the present invention has been described in detail with reference to specific embodiments, it will be apparent to those skilled in the art that various modifications can be made without departing from the scope and spirit of the invention. The scope of the present invention should not be limited to the above-described embodiments, but should be defined within the scope of the appended claims and their equivalents.

510 transmitter 511 LDPC encoder 513 modulator 520 radio channel 530 receiver 531 demodulator 533 LDPC decoder 710 control unit 720 shortened pattern application unit 740 LDPC code parity check matrix extraction unit 760 LDPC encoder 880 puncturing Pattern application unit 910 control unit 920 shortened pattern determination / estimation unit 930 demodulator 940 LDPC decoder 1020 shortening and puncturing pattern determination / estimation unit

Claims (4)

A channel coding method in a system using a low density parity check code (LDPC), comprising:
Partitioning information bits into a plurality of bit groups;
Determining the number of information bits to be shortened;
Determining a number of bit groups to be shortened based on the determined number of shortened information bits;
Shortening the information bits of the determined bit group according to a predetermined order;
Encoding the shortened information bits,
Determining the number of information bits (K ₂ ) obtained by shortening to determine the number of information bits to be shortened;
If the codeword length is 16200 and the information bit length is 7200, the predetermined order is 18, 17, 16, 15, 14, 13, 12, 11, 4, 10, 9 , 8, 3, 2, 7, 6, 5, 1, 19, and 0,
If the bit group length is 360 and the information bit length is 7200,
Shortening information bits of bit groups from the 0th bit group to the (m−1) th bit group according to the predetermined order;
And a step of reducing the _(7200-K 2 -360m) information bits in the m-th bit groups in the order in which the predetermined
K ₂ is the number of information bits acquired by shortening, (7200−K ₂ ) is the number of information bits shortened,

A channel encoding method characterized by the above. A channel encoder in a system using a low density parity check (LDPC) code, comprising:
The information bits are divided into a plurality of bit groups, the number of information bits to be shortened is determined, and the number of bit groups to be shortened is determined based on the determined number of information bits to be shortened. A shortening pattern application unit that shortens the information bits of the determined bit group according to the determined order;
An encoder that encodes the shortened information bits;
The shortening pattern application unit determines the number of information bits (K ₂ ) acquired by shortening to determine the number of information bits to be shortened;
If the codeword length is 16200 and the information bit length is 7200, the predetermined order is 18, 17, 16, 15, 14, 13, 12, 11, 4, 10, 9 , 8, 3, 2, 7, 6, 5, 1, 19, and 0,
If the bit group length is 360 and the information bit length is 7200,
The shortening pattern application unit shortens the information bits of the bit groups from the 0th bit group to the (m−1) th bit group according to the predetermined order, and the mth bit according to the predetermined order. shortened _(7200-K 2 -360m) information bits in the bit group,
Here, K ₂ is the number of information bits acquired by shortening, (7200−K ₂ ) is the number of information bits to be shortened,

A channel coding apparatus characterized by the above. A channel decoding method in a system using a low density parity check (LDPC) code comprising:
Demodulating the received signal; and
Determining the location of the shortened information bits;
Decoding the demodulated signal taking into account the determined shortened information bit positions;
Determining the position of the shortened information bits, determining the number of shortened information bits;
Determining a number of shortened bit groups based on the determined number of shortened information bits;
Obtaining a predetermined order of bit groups;
Determining the number of information bits (K ₂ ) obtained by shortening to determine the number of shortened information bits;
If the codeword length is 16200 and the information bit length is 7200, the predetermined order is 18, 17, 16, 15, 14, 13, 12, 11, 4, 10, 9 , 8, 3, 2, 7, 6, 5, 1, 19, and 0,
If the bit group length is 360 and the information bit length is 7200,
Determining that the information bits of the bit groups from the 0th bit group to the (m−1) th bit group are shortened according to the predetermined order of the bit groups;
Determining that (7200-K ₂ -360m) information bits in the m th bit group have been shortened according to the predetermined bit group order;
K ₂ is the number of information bits acquired by shortening, (7200−K ₂ ) is the number of shortened information bits,

A channel decoding method characterized by the above. A channel decoding apparatus in a system using a low density parity check (LDPC) code, comprising:
A demodulator that demodulates the received signal;
A shortened pattern determination unit that determines the position of the shortened information bits;
A decoder for decoding the demodulated signal in consideration of the position of the determined shortened information bits;
The position of the shortened information bits determines the number of shortened information bits;
Determining a number of shortened bit groups based on the determined number of shortened information bits;
Determined by obtaining a predetermined order of bit groups,
The shortening pattern determining unit determines the number of information bits (K ₂ ) acquired by shortening to determine the number of shortened information bits;
If the codeword length is 16200 and the information bit length is 7200, the predetermined order is 18, 17, 16, 15, 14, 13, 12, 11, 4, 10, 9 , 8, 3, 2, 7, 6, 5, 1, 19, and 0,
If the bit group length is 360 and the information bit length is 7200,
The shortening pattern determination unit determines that the information bits of the bit groups from the 0th bit group to the (m−1) th bit group are shortened according to the predetermined order of the bit groups, Determining that the (7200-K ₂ -360m) information bits in the mth bit group have been shortened according to a defined bit group order;
K ₂ is the number of information bits acquired by shortening, (7200−K ₂ ) is the number of information bits shortened,

A channel decoding apparatus characterized by the above.

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