JP5429153B2 - Gallium nitride semiconductor light emitting device - Google Patents

Description

  The present invention relates to a gallium nitride based semiconductor light emitting device.

  Conventionally, a semiconductor light emitting device is known in which an n-type cladding layer, an n-type light guide layer, an active layer, an electron block layer, a p-type light guide layer, and a p-type cladding layer are stacked in this order on a semiconductor substrate ( For example, see Non-Patent Document 1 below). In the semiconductor light emitting device described in Non-Patent Document 1, the n-type light guide layer and the p-type light guide layer have the same composition.

Journal of Applied physics, 107, 023101 (2010)

  Incidentally, in recent years, for gallium nitride based semiconductor light emitting devices, from the viewpoint of improving the optical confinement efficiency and reducing the threshold current, the In composition and Al composition of the cladding layer can be increased to reduce the refractive index, It has been studied to increase the refractive index by increasing the In composition of the light guide layer. However, in these cases, as the In composition and Al composition increase, the lattice mismatch between the semiconductor substrate made of GaN or the like and each semiconductor layer increases and the mobility of holes and electrons decreases. The specific resistance increases and the operating voltage increases. Therefore, it is required for gallium nitride based semiconductor light-emitting elements to reduce the threshold current while suppressing an increase in operating voltage.

  An object of the present invention is to provide a gallium nitride based semiconductor light emitting device capable of reducing the threshold current while suppressing an increase in operating voltage.

  As a result of intensive studies to solve the above problems, the present inventors have found the following findings. That is, in a gallium nitride based semiconductor light-emitting device having a stacked structure in which an active layer is sandwiched between an upper InGaN semiconductor layer and a lower InGaN semiconductor layer on a semiconductor substrate, in the upper InGaN semiconductor layer located on the active layer, movement of holes Due to the low degree, the specific resistance tends to increase as the In composition increases as compared to the lower InGaN semiconductor layer located below the active layer. Therefore, in the upper InGaN semiconductor layer, when the In composition is increased from the viewpoint of improving the optical confinement efficiency and reducing the threshold current, the specific resistance is remarkably increased and the operating voltage is increased.

  On the other hand, in the lower InGaN semiconductor layer, the specific resistance is less likely to increase as the In composition increases compared to the upper InGaN semiconductor layer, and even if the In composition is increased, the increase in specific resistance is small and the operating voltage is low. It can suppress becoming high. Such a phenomenon is remarkably confirmed when the conductivity type of the lower InGaN semiconductor layer is n-type. Therefore, in such an n-type lower InGaN semiconductor layer, by increasing the In composition, the threshold current can be reduced while suppressing an increase in operating voltage.

That is, the gallium nitride based semiconductor light-emitting device according to the present invention includes a semiconductor substrate and a n-type In _x Ga _1-x N semiconductor (0.04 ≦ x ≦ 0.06) disposed on the semiconductor substrate. A first light guide layer, an active layer disposed on the first light guide layer, a first layer made of In _y Ga _1-y N semiconductor (0.01 ≦ y ≦ 0.03) and disposed on the active layer. Two light guide layers.

In the gallium nitride based semiconductor light emitting device according to the present invention, the specific resistance of the second light guide layer made of In _y Ga _1-y N semiconductor is the same as that of the first light guide layer made of n-type In _x Ga _1-x N semiconductor. Compared to the second light guide layer, the resistivity of the first light guide layer is less likely to increase as the In composition increases. In the gallium nitride based semiconductor light emitting device according to the present invention, the In composition x of the first light guide layer is adjusted while lowering the In composition y of the second light guide layer so as to be in the range of 0.01 ≦ y ≦ 0.03. Is adjusted to a range of 0.04 ≦ x ≦ 0.06. Thus, by adjusting the In composition of each semiconductor layer in accordance with the degree of increase in specific resistance accompanying the increase in In composition, light confinement efficiency can be improved while suppressing increase in specific resistance. Therefore, in the gallium nitride based semiconductor light emitting device according to the present invention, the threshold current can be reduced while suppressing an increase in operating voltage.

  The main surface of the semiconductor substrate may be a semipolar main surface, and the semipolar main surface extends from a surface (c surface ({0001} surface)) perpendicular to the c-axis of the gallium nitride semiconductor to the gallium nitride semiconductor. It is preferable to incline in the m-axis direction. In this case, the threshold current can be further reduced while suppressing an increase in operating voltage.

  The inclination angle of the semipolar main surface in the m-axis direction is preferably 63 ° or more and less than 80 °. In this case, the threshold current can be further reduced while suppressing an increase in operating voltage.

  The active layer may have a quantum well structure capable of generating light of 510 to 550 nm.

  The number of well layers in the active layer may be 3 or less.

  The film thickness of the first light guide layer is preferably 30 to 200 nm. In this case, the threshold current can be further reduced while suppressing an increase in operating voltage.

  The film thickness of the second light guide layer is preferably 30 to 200 nm. In this case, the threshold current can be further reduced while suppressing an increase in operating voltage.

  According to the present invention, it is possible to provide a gallium nitride based semiconductor light emitting device capable of reducing the threshold current while suppressing an increase in operating voltage.

1 is a schematic cross-sectional view showing a gallium nitride based semiconductor light emitting device according to an embodiment of the present invention. It is drawing which shows the relationship between specific resistance and In composition. It is drawing which shows the relationship between the internal loss and In composition of a gallium nitride semiconductor light-emitting device. It is drawing which shows the relationship between an operating voltage and In composition. It is drawing which shows the relationship between the vertical divergence angle of a laser, and In composition. It is drawing which shows the relationship between a threshold current and In composition, and the relationship between slope efficiency and In composition.

  DESCRIPTION OF EMBODIMENTS Hereinafter, preferred embodiments of a gallium nitride based semiconductor light emitting device according to the present invention will be described in detail with reference to the drawings.

  FIG. 1 is a schematic cross-sectional view showing a gallium nitride based semiconductor light emitting device according to this embodiment. A semiconductor laser (gallium nitride based semiconductor light emitting device) 1 according to this embodiment includes a semiconductor substrate 10, a semiconductor region 20, an active layer 30, and a semiconductor region 40.

  The semiconductor substrate 10 is a gallium nitride based semiconductor substrate such as a GaN substrate, for example. The semiconductor substrate 10 has a front surface 10a and a back surface 10b facing each other. The surface 10a of the semiconductor substrate 10 is, for example, a semipolar main surface that is inclined in the m-axis direction of the gallium nitride semiconductor from the plane orthogonal to the c-axis of the gallium nitride semiconductor. The inclination angle of the surface 10a in the m-axis direction is preferably 63 ° or more and less than 80 °, more preferably 70 ° or more and less than 80 °, more preferably 71 ° from the viewpoint of further reducing the threshold current while suppressing an increase in operating voltage. More preferably, it is 79 ° or less.

  The semiconductor laser 1 is formed by epitaxially growing the semiconductor region 20, the active layer 30, and the semiconductor region 40 on the surface 10a of the semiconductor substrate 10 in the normal direction of the surface 10a. The main surface of each constituent layer of the semiconductor region (semiconductor region 20, active layer 30, semiconductor region 40) epitaxially grown on the surface 10a of the semiconductor substrate 10 tends to inherit the crystal orientation of the surface 10a.

The semiconductor region 20 is composed of one or a plurality of gallium nitride based semiconductor layers, and has one or a plurality of In _x Ga _1-x N semiconductor layers. The In composition x of at least one In _x Ga _1-x N semiconductor layer in the semiconductor region 20 is 0.04 ≦ x ≦ 0.06, and preferably 0.04 ≦ x ≦ 0.05. In addition, the In composition x of all In _x Ga _1-x N semiconductor layers in the semiconductor region 20 is preferably 0.04 ≦ x ≦ 0.06. When the In composition x of all In _x Ga _1-x N semiconductor layers in the semiconductor region 20 is less than 0.04, the optical confinement efficiency is not sufficiently improved, and the threshold current is not reduced. When the In composition x of all In _x Ga _1-x N semiconductor layers in the semiconductor region 20 exceeds 0.06, lattice mismatch with the semiconductor substrate 10 increases, and the operating voltage increases.

The thickness of the at least one _In x _{Ga 1-x} N semiconductor layer in the semiconductor region 20 is preferably 30 to 200 nm, 100 to 150 nm is more preferable. Further, it is preferable that the thickness of all the _In x _{Ga 1-x} N semiconductor layer in the semiconductor region 20 is 30 to 200 nm. When the film thicknesses of all In _x Ga _1-x N semiconductor layers in the semiconductor region 20 are less than 30 nm, the threshold current tends to increase. When the film thickness of all In _x Ga _1-x N semiconductor layers in the semiconductor region 20 exceeds 200 nm, the threshold current tends to increase.

  The semiconductor region 20 includes, for example, a buffer layer 20a, a lower cladding layer 20b, a lower light guide layer 20c, and a lower light guide layer 20d, and a lower light guide layer (first light guide layer) 22 that is an InGaN semiconductor layer. The lower light guide layer 20d is included.

The buffer layer 20a is disposed on the surface 10a of the semiconductor substrate 10, and is, for example, an n-type gallium nitride semiconductor layer (GaN layer or the like) containing Si or the like as an n-type dopant. The n-type dopant concentration of the buffer layer 20a is, for example, 3 × 10 ¹⁸ / cm ³ . The film thickness of the buffer layer 20a is, for example, 1.1 μm.

The lower cladding layer 20b is disposed on the buffer layer 20a. For example, an n-type gallium nitride based semiconductor layer (In _0.03 Al _0.14 Ga _0.83 N layer or the like) containing Si or the like as an n-type dopant is used. ). The n-type dopant concentration of the lower cladding layer 20b is, for example, 1 × 10 ^{18 to} 5 × 10 ¹⁸ / cm ³ . The film thickness of the lower cladding layer 20b is, for example, 1.2 μm.

The lower light guide layer 20c is disposed on the lower cladding layer 20b and is, for example, an n-type gallium nitride based semiconductor layer (GaN layer or the like) containing Si or the like as an n-type dopant. The n-type dopant concentration of the lower light guide layer 20c is, for example, 1 × 10 ^{18 to} 3 × 10 ¹⁸ / cm ³ . The film thickness of the lower light guide layer 20c is, for example, 0.250 μm.

The lower light guide layer 20d is disposed on the semiconductor substrate 10 via the buffer layer 20a, the lower cladding layer 20b, and the lower light guide layer 20c. The lower light guide layer 20d is an n-type In _x Ga _1-x N semiconductor layer (In _0.025 Ga _0.975 N semiconductor layer or the like) containing Si or the like as an n-type dopant. The film thickness of the lower light guide layer 20d is, for example, 0.115 μm.

The n-type dopant concentration of the lower light guide layer 20d is preferably 1 × 10 ^{17 to} 3 × 10 ¹⁸ / cm ^{3, and} more preferably 2 × 10 ¹⁷ to 1 × 10 ¹⁸ / cm ³ . When the n-type dopant concentration of the lower light guide layer 20d is less than 1 × 10 ¹⁷ / cm ³ , the operating voltage tends to increase. When the n-type dopant concentration of the lower light guide layer 20d exceeds 3 × 10 ¹⁸ / cm ³ , the threshold current tends to increase.

The active layer 30 is disposed on the lower light guide layer 20d and joined to the main surface 20s of the lower light guide layer 20d. The active layer 30 has, for example, a single quantum well structure (SQW structure) or a multiple quantum well structure (MQW structure). The active layer 30 has a quantum well structure capable of generating light of, for example, 510 to 550 nm. The number of well layers in the active layer 30 is, for example, 3 or less, and may be 2 or less. In the present embodiment, the active layer 30 is composed of a single well layer. The active layer 30 is a gallium nitride based semiconductor layer such as In _0.30 Ga _0.70 N, and is non-doped, for example. The film thickness of the well layer constituting the active layer 30 is, for example, 3 nm.

The semiconductor region 40 is composed of one or a plurality of gallium nitride based semiconductor layers, and the semiconductor region 40 includes one or a plurality of In _y Ga _1-y N semiconductor layers. The In composition y of at least one In _y Ga _1-y N semiconductor layer in the semiconductor region 40 is 0.01 ≦ y ≦ 0.03, and preferably 0.02 ≦ y ≦ 0.03. In addition, the In composition y of all In _y Ga _1-y N semiconductor layers in the semiconductor region 40 is preferably 0.01 ≦ y ≦ 0.03. If the In composition y of all In _y Ga _1-y N semiconductor layers in the semiconductor region 40 is less than 0.01, the optical confinement efficiency is not sufficiently improved, and the threshold current is not reduced. If the In composition y of all In _y Ga _1-y N semiconductor layers in the semiconductor region 40 exceeds 0.03, lattice mismatch with the semiconductor substrate 10 increases, and the operating voltage increases.

The thickness of the at least one _In y _{Ga 1-y} N semiconductor layer in the semiconductor region 40 is preferably 30 to 200 nm, 100 to 150 nm is more preferable. In addition, the thickness of all In _y Ga _1-y N semiconductor layers in the semiconductor region 40 is preferably 30 to 200 nm. When the film thickness of all In _y Ga _1-y N semiconductor layers in the semiconductor region 40 is less than 30 nm, the threshold current tends to increase. When the film thickness of all In _y Ga _1-y N semiconductor layers in the semiconductor region 40 exceeds 200 nm, the threshold current tends to increase.

The semiconductor region 40 includes, for example, an upper light guide layer 40a, an electron block layer 40b, an upper light guide layer 40c, an upper light guide layer 40d, an upper cladding layer 40e, and a contact layer 40f, and is an upper portion that is an InGaN semiconductor layer. As the light guide layer (second light guide layer) 42, an upper light guide layer 40a and an upper light guide layer 40c are provided. When the upper light guide layer 40a is an In _y1 Ga _1-y1 N semiconductor layer and the upper light guide layer 40c is an In _y2 Ga _1-y2 N semiconductor layer, in this embodiment, the upper light guide layer 40a is used. Or at least one In composition (y1, y2) of the upper light guide layer 40c should just be 0.01-0.03.

The upper light guide layer 40 a is disposed on the active layer 30 and joined to the main surface 30 s of the active layer 30. The upper light guide layer 40a is, for example, a non-doped In _y1 Ga _1-y1 N semiconductor layer (such as In _0.025 Ga _0.975 N semiconductor layer). The film thickness of the upper light guide layer 40a is, for example, 0.075 μm.

The electron block layer 40b is disposed on the upper light guide layer 40a and is, for example, a p-type gallium nitride based semiconductor layer (GaN layer or the like) containing Mg or the like as a p-type dopant. The electron block layer 40b has a p-type dopant concentration of, for example, 1 × 10 ¹⁹ / cm ³ . The film thickness of the electron block layer 40b is, for example, 20 nm.

The upper light guide layer 40c is disposed on the electron block layer 40b. The upper light guide layer 40c is, for example, a p-type In _y2 Ga _1-y2 N semiconductor layer (In _0.025 Ga _0.975 N semiconductor layer or the like) containing Mg or the like as a p-type dopant. The film thickness of the upper light guide layer 40c is, for example, 0.050 μm.

The p-type dopant concentration of the upper light guide layer 40c is preferably 1 × 10 ¹⁸ to 1 × 10 ¹⁹ / cm ^{3 and} more preferably 2 × 10 ^{18 to} 7 × 10 ¹⁸ / cm ³ . When the p-type dopant concentration of the upper light guide layer 40c is less than 1 × 10 ¹⁸ / cm ³ , the operating voltage tends to increase. When the p-type dopant concentration of the upper light guide layer 40c exceeds 1 × 10 ¹⁹ / cm ³ , the threshold current tends to increase.

Here, the measurement result of the relationship between the specific resistance of the p-type In _y Ga _1-y N semiconductor layer and the In composition y is shown in FIG. The vertical axis represents the specific resistance (Ω · cm) of the In _y Ga _1-y N semiconductor layer, and the horizontal axis represents the In composition y. Measurement was performed using Mg as the p-type dopant and adjusting the p-type dopant concentration to 3 × 10 ¹⁸ / cm ³ .

Referring to FIG. 2, it is confirmed that the specific resistance increases remarkably as the In composition y increases. As the In composition y increases, the lattice mismatch with the semiconductor substrate 10 in the In _y Ga _1-y N semiconductor layer increases, and therefore it is presumed that the specific resistance has increased.

The upper light guide layer 40d is disposed on the upper light guide layer 40c and is, for example, a p-type gallium nitride based semiconductor layer (GaN layer or the like) containing Mg or the like as a p-type dopant. The p-type dopant concentration of the upper light guide layer 40d is, for example, 2 × 10 ¹⁸ to 2 × 10 ¹⁹ / cm ³ . The film thickness of the upper light guide layer 40d is, for example, 0.250 μm.

The upper clad layer 40e is disposed on the upper light guide layer 40d, and for example, a p-type gallium nitride based semiconductor layer (In _0.03 Al _0.14 Ga _0.83 N containing Mg or the like as a p-type dopant). Layer). The p-type dopant concentration of the upper cladding layer 40e is, for example, 5 × 10 ^{18 to} 3 × 10 ¹⁹ / cm ³ . The film thickness of the upper cladding layer 40e is, for example, 0.40 μm.

The contact layer 40f is disposed on the upper cladding layer 40e, and is, for example, a p ⁺ -type gallium nitride based semiconductor layer (GaN layer or the like) containing Mg or the like as a p-type dopant. The contact layer 40f has a p-type dopant concentration of 3 × 10 ¹⁹ / cm ³ , for example. The film thickness of the contact layer 40f is, for example, 0.050 μm.

  According to the knowledge of the present inventors, in the semiconductor laser 1 having the stacked structure in which the active layer 30 is sandwiched between the lower light guide layer 22 and the upper light guide layer 42 which are InGaN semiconductor layers on the semiconductor substrate 10, the active layer 30 In the upper light guide layer 42 located above, the hole mobility is low, and when the upper light guide layer 42 is a p-type semiconductor, the acceptor level of the dopant (for example, Mg) is high. As a result, the specific resistance is likely to increase as the In composition increases as compared with the lower light guide layer 22 located under the active layer 30. Therefore, in the upper light guide layer 42, when the In composition is increased from the viewpoint of improving the light confinement efficiency and reducing the threshold current, the specific resistance is remarkably increased and the operating voltage is increased.

  On the other hand, in the lower light guide layer 22, the specific resistance is less likely to increase as the In composition increases as compared to the upper light guide layer 42. An increase in voltage can be suppressed. Such a phenomenon is remarkably confirmed when the conductivity type of the lower light guide layer 22 is n-type. Therefore, in such a lower light guide layer 22, by increasing the In composition, the threshold current can be reduced while suppressing an increase in operating voltage.

  In the upper light guide layer 42, the dopant concentration tends to be higher than that of the lower light guide layer 22 from the viewpoint of reducing the specific resistance. However, when the dopant concentration is increased in this way, light absorption (internal loss) increases, and the threshold current increases. Therefore, when the In composition of the upper light guide layer 42 is increased to increase the refractive index, the light is likely to be concentrated on the upper light guide layer 42 and absorbed, and the threshold current is further increased.

  On the other hand, since the specific resistance of the lower light guide layer 22 tends to be lower than that of the upper light guide layer 42, the dopant concentration can be kept low. Therefore, in such a lower light guide layer 22, even when the In composition is increased to increase the refractive index and the light is concentrated on the lower light guide layer 22, the light absorption (internal loss) increases. While suppressing, it is possible to improve the optical confinement efficiency and reduce the threshold current.

In the semiconductor laser 1 as described above, while the In composition y of the upper light guide layer 42 (In _y Ga _1-y N semiconductor layer) is lowered and adjusted to a range of 0.01 ≦ y ≦ 0.03, The In composition x of the light guide layer 22 (In _x Ga _1-x N semiconductor layer) is increased and adjusted to a range of 0.04 ≦ x ≦ 0.06. Thus, in the semiconductor laser 1 adjusted so that the In compositions of the lower light guide layer 22 and the upper light guide layer 42 are asymmetric with respect to the active layer 30, the specific resistance increases as the In composition increases. Accordingly, by adjusting the In composition of each semiconductor layer, the optical confinement efficiency can be improved while suppressing an increase in specific resistance. Therefore, in the semiconductor laser 1, the threshold current can be reduced while suppressing an increase in operating voltage.

  The present invention is not limited to the above-described embodiment, and various modifications can be made. For example, in the above-described embodiment, the surface 10a of the semiconductor substrate 10 is inclined in the direction of the m-axis of the gallium nitride semiconductor from the plane orthogonal to the c-axis of the gallium nitride semiconductor. The surface may be perpendicular to the surface of the gallium nitride semiconductor, and may be inclined in the direction of the a axis of the gallium nitride semiconductor from the surface orthogonal to the c axis of the gallium nitride semiconductor. Also in these cases, the optical confinement efficiency is suppressed while suppressing the increase in specific resistance by adjusting the In composition of each semiconductor layer according to the degree of increase in specific resistance accompanying the increase in In composition as in the semiconductor laser 1. The threshold current can be reduced while suppressing an increase in operating voltage.

  Further, a ridge portion extending in the optical waveguide direction of the semiconductor light emitting element may be formed on the surface side of the semiconductor region 40. In this case, since the current is squeezed in the semiconductor region 40, the voltage drop in the semiconductor region 40 is likely to increase due to a large resistance due to lattice mismatch. However, also in the semiconductor light emitting device having the ridge portion, the specific resistance can be increased by adjusting the In composition of each semiconductor layer in accordance with the degree of increase in the specific resistance accompanying the increase in In composition as in the semiconductor laser 1. It is possible to improve the optical confinement efficiency while suppressing, and the threshold current can be reduced while suppressing an increase in the operating voltage.

  In the semiconductor laser 1, the upper light guide layer 40a is non-doped, but may be a p-type gallium nitride based semiconductor layer containing Mg or the like as a p-type dopant. In the semiconductor laser 1, the electron block layer 40b is disposed between the upper light guide layer 40a and the upper light guide layer 40c. However, the single upper light guide layer is not disposed without the electron block layer 40b. May be formed.

  Next, a result of device simulation using a semiconductor light emitting element model having the same configuration as that of the semiconductor laser 1 will be described. Specifically, the following model was used as the semiconductor light emitting device model.

(Semiconductor light emitting device model)
Semiconductor substrate 10 (non-doped GaN substrate, main surface: {20-21} plane (inclination angle from c-plane to m-axis direction: 75 °)
Buffer layer 20a (n-type GaN layer, dopant: Si, dopant concentration: 3 × 10 ¹⁸ / cm ³ , film thickness: 1.1 μm)
Lower cladding layer 20b (n-type In _0.03 Al _0.14 Ga _0.83 N layer, dopant: Si, dopant concentration: 2 × 10 ¹⁸ / cm ³ , film thickness: 1.2 μm)
Lower light guide layer 20c (n-type GaN layer, dopant: Si, dopant concentration: 2 × 10 ¹⁸ / cm ³ , film thickness: 0.250 μm)
Lower light guide layer 20d (n-type In _x Ga _1-x N semiconductor layer, In composition x: 0.025 ≦ x ≦ 0.06, dopant: Si, dopant concentration: 6 × 10 ¹⁷ / cm ³ , film thickness: 0.115 μm)
Active layer 30 (non-doped In _0.30 Ga _0.70 N layer, film thickness: 3 nm)
Upper light guide layer 40a (non-doped In _0.025 Ga _0.975 N semiconductor layer, film thickness: 0.075 μm)
Electron blocking layer 40b (p-type GaN layer, dopant: Mg, dopant concentration: 1 × 10 ¹⁹ / cm ³ , film thickness: 20 nm)
Upper light guide layer 40c (p-type In _0.025 Ga _0.975 N layer, dopant: Mg, dopant concentration: 3 × 10 ¹⁸ / cm ³ , film thickness: 0.050 μm)
Upper light guide layer 40d (p-type GaN layer, dopant: Mg, dopant concentration: 3 × 10 ¹⁸ / cm ³ , film thickness: 0.250 μm)
Upper cladding layer 40e (p-type In _0.03 Al _0.14 Ga _0.83 N layer, dopant: Mg, dopant concentration: 7 × 10 ¹⁸ / cm ³ , film thickness: 0.40 μm)
Contact layer 40f (p ⁺ type GaN layer, dopant: Mg, dopant concentration: 3 × 10 ¹⁹ / cm ³ , film thickness: 0.050 μm)

FIG. 3 is a drawing showing the relationship between the internal loss and In composition of a semiconductor light emitting device provided by simulation. The vertical axis represents the internal loss (cm ⁻¹ ) of the semiconductor light emitting device, and the horizontal axis represents the In composition of the lower light guide layer 20d.

  Referring to FIG. 3, it is confirmed that the internal loss is reduced as the In composition increases. Such a phenomenon is assumed to be caused by the following factors. That is, as the In composition of the lower light guide layer 20d increases, the refractive index of the lower light guide layer 20d increases, and light concentrates on the lower light guide layer 20d. As a result, the concentration of light on the semiconductor layer having a higher dopant concentration than the lower light guide layer 20d, such as the lower cladding layer 20b, is suppressed, and it is estimated that the internal loss is reduced.

  FIG. 4 is a drawing showing the relationship between operating voltage and In composition provided by simulation. The vertical axis represents the operating voltage Vf (V) for flowing a current of 200 mA, and the horizontal axis represents the In composition of the lower light guide layer 20d.

  Referring to FIG. 4, it is confirmed that the operating voltage does not fluctuate greatly as the In composition changes. From this result, it is confirmed that when the In composition is in the range of 0.025 to 0.06, the specific resistance of the lower light guide layer 20d does not vary greatly as the In composition changes.

  FIG. 5 is a drawing showing the relationship between the longitudinal divergence angle of the laser and the In composition provided by simulation. The vertical axis represents the vertical spread angle (°) of the laser, and the horizontal axis represents the In composition of the lower light guide layer 20d.

  Referring to FIG. 5, it is confirmed that the longitudinal spread angle of the laser increases as the In composition increases. In addition, it is confirmed that the longitudinal spread angle of the laser is small at the In composition of 0.025. Such a phenomenon is presumed to be due to the fact that the optical confinement efficiency is not sufficiently improved because the difference in refractive index between the lower cladding layer 20b and the lower light guide layer 20d is small. On the other hand, when the In composition is 0.04 to 0.06, it is confirmed that the longitudinal spread angle of the laser is large. Such a phenomenon is assumed to be due to the fact that the optical confinement efficiency is sufficiently improved because the difference in refractive index between the lower cladding layer 20b and the lower light guide layer 20d is large.

  FIG. 6 is a diagram showing the relationship between the threshold current and the In composition provided by the simulation, and the relationship between the slope efficiency and the In composition. The vertical axis (left axis) represents the threshold current Ith (mA), the vertical axis (right axis) represents the slope efficiency Se (W / A), and the horizontal axis represents the In composition of the lower light guide layer 20d.

  Referring to FIG. 6, it is confirmed that the threshold current is low and the slope efficiency is low in the In composition 0.025, while the threshold current is low and the slope efficiency is high in the In composition 0.04 to 0.06. The When the In composition is 0.04 to 0.06, the optical confinement efficiency is improved as compared with the In composition 0.025, and the ratio of light passing through the lower light guide layer 20d and the active layer 30 is increased. It is presumed that the slope efficiency is improved while the threshold current is lowered due to the easy release.

  DESCRIPTION OF SYMBOLS 1 ... Semiconductor laser (gallium nitride based semiconductor light emitting device), 10 ... Semiconductor substrate, 10a ... Main surface, 22 ... Lower light guide layer (first light guide layer), 30 ... Active layer, 42 ... Upper light guide layer (first) 2 light guide layer).

Claims (10)

A semiconductor substrate;
A first light guide layer disposed on the semiconductor substrate and made of an n-type In _x Ga _1-x N semiconductor (0.04 ≦ x ≦ 0.06);
An active layer disposed on the first light guide layer;
A gallium nitride based semiconductor light emitting device, comprising: a second light guide layer disposed on the active layer and made of an In _y Ga _1-y N semiconductor (0.01 ≦ y ≦ 0.03). The second light guide layer is In _y Ga _1-y The gallium nitride based semiconductor light-emitting element according to claim 1, comprising an N semiconductor (0.01 ≦ y ≦ 0.025). The gallium nitride based semiconductor light-emitting element according to claim 1, wherein a conductivity type of the second light guide layer is p-type. The gallium nitride based semiconductor light-emitting element according to any one of claims 1 to 3 , wherein a main surface of the semiconductor substrate is a semipolar main surface. The gallium nitride based semiconductor light-emitting element according to claim 4 , wherein the semipolar principal surface is inclined in a m-axis direction of the gallium nitride based semiconductor from a surface perpendicular to the c-axis of the gallium nitride based semiconductor. The gallium nitride based semiconductor light-emitting device according to claim 5 , wherein an inclination angle of the semipolar main surface in the m-axis direction is not less than 63 ° and less than 80 °. The active layer has a possible quantum well structure generates light of 510 to 550 nm, gallium nitride-based semiconductor light-emitting device according to any one of claims 1-6. Is the number of well layers is 3 or less in the active layer, the gallium nitride-based semiconductor light-emitting device according to any one of claims 1-7. The thickness of the first optical guide layer is 30 to 200 nm, gallium nitride-based semiconductor light-emitting device according to any one of claims 1-8. The thickness of the second optical guide layer is 30 to 200 nm, gallium nitride-based semiconductor light-emitting device according to any one of claims 1-9.

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