JP5426540B2 - 公開行列に基づき、誤り訂正符号の復号を用いて認証を行う方法 - Google Patents

公開行列に基づき、誤り訂正符号の復号を用いて認証を行う方法 Download PDF

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JP5426540B2
JP5426540B2 JP2010512742A JP2010512742A JP5426540B2 JP 5426540 B2 JP5426540 B2 JP 5426540B2 JP 2010512742 A JP2010512742 A JP 2010512742A JP 2010512742 A JP2010512742 A JP 2010512742A JP 5426540 B2 JP5426540 B2 JP 5426540B2
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matrix
public
block
vector
cyclic
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Japanese (ja)
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JP2010530990A (ja
JP2010530990A5 (cg-RX-API-DMAC7.html
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ガボリ，フィリップ
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サントル ナシオナル ドゥ ラ ルシェルシェサイアンティフィク（セエヌエールエス）
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/30—Public key, i.e. encryption algorithm being computationally infeasible to invert or user's encryption keys not requiring secrecy
    • H04L9/304—Public key, i.e. encryption algorithm being computationally infeasible to invert or user's encryption keys not requiring secrecy based on error correction codes, e.g. McEliece
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/30—Public key, i.e. encryption algorithm being computationally infeasible to invert or user's encryption keys not requiring secrecy
    • H04L9/3006—Public key, i.e. encryption algorithm being computationally infeasible to invert or user's encryption keys not requiring secrecy underlying computational problems or public-key parameters
    • H04L9/3033—Public key, i.e. encryption algorithm being computationally infeasible to invert or user's encryption keys not requiring secrecy underlying computational problems or public-key parameters details relating to pseudo-prime or prime number generation, e.g. primality test
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/32—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols including means for verifying the identity or authority of a user of the system or for message authentication, e.g. authorization, entity authentication, data integrity or data verification, non-repudiation, key authentication or verification of credentials
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/0202—Channel estimation
    • H04L25/024—Channel estimation channel estimation algorithms
    • H04L25/0242—Channel estimation channel estimation algorithms using matrix methods
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/0202—Channel estimation
    • H04L25/024—Channel estimation channel estimation algorithms
    • H04L25/0242—Channel estimation channel estimation algorithms using matrix methods
    • H04L25/0244—Channel estimation channel estimation algorithms using matrix methods with inversion

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  • Engineering & Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Computing Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Error Detection And Correction (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)
  • Storage Device Security (AREA)
JP2010512742A 2007-06-22 2008-06-20 公開行列に基づき、誤り訂正符号の復号を用いて認証を行う方法 Active JP5426540B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
FR0704518A FR2917920B1 (fr) 2007-06-22 2007-06-22 Procede d'authentification utilisant un decodage de code correcteur d'erreurs a partir d'une matrice publique
FR0704518 2007-06-22
PCT/FR2008/000871 WO2009016272A1 (fr) 2007-06-22 2008-06-20 Procédé d'authentification utilisant un décodage de code correcteur d'erreurs à partir d'une matrice publique

Publications (3)

Publication Number Publication Date
JP2010530990A JP2010530990A (ja) 2010-09-16
JP2010530990A5 JP2010530990A5 (cg-RX-API-DMAC7.html) 2011-08-04
JP5426540B2 true JP5426540B2 (ja) 2014-02-26

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JP2010512742A Active JP5426540B2 (ja) 2007-06-22 2008-06-20 公開行列に基づき、誤り訂正符号の復号を用いて認証を行う方法

Country Status (5)

Country Link
US (1) US8817972B2 (cg-RX-API-DMAC7.html)
EP (1) EP2158720B1 (cg-RX-API-DMAC7.html)
JP (1) JP5426540B2 (cg-RX-API-DMAC7.html)
FR (1) FR2917920B1 (cg-RX-API-DMAC7.html)
WO (1) WO2009016272A1 (cg-RX-API-DMAC7.html)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
BRPI0907183A8 (pt) * 2008-01-11 2015-09-29 France Telecom método e entidade para encriptação simétrica probabilística
FR2956541B1 (fr) * 2010-02-18 2012-03-23 Centre Nat Rech Scient Procede cryptographique de communication d'une information confidentielle.
GB2522836A (en) * 2013-12-02 2015-08-12 Neul Ltd Interference mitigation
US20160028419A1 (en) * 2014-07-22 2016-01-28 Lsi Corporation Systems and Methods for Rank Independent Cyclic Data Encoding
KR101913644B1 (ko) 2017-03-13 2018-10-31 동국대학교 산학협력단 메시지 인증이 가능한 부호 기반 암호화 장치 및 방법
JP7328969B2 (ja) * 2018-12-21 2023-08-17 ０１ コミュニーク ラボラトリー インコーポレイテッド 暗号システムおよび方法
US11961420B2 (en) * 2019-01-07 2024-04-16 Cryptography Research, Inc. Efficient squaring with loop equalization in arithmetic logic units
US11342044B2 (en) 2019-05-28 2022-05-24 Nuvoton Technology Corporation System and method for prioritization of bit error correction attempts
US11475170B2 (en) * 2019-05-28 2022-10-18 Nuvoton Technology Corporation System and method for correction of memory errors
US12197558B2 (en) 2022-05-09 2025-01-14 Nxp B.V. Method for authenticating an electronic device

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2714780B1 (fr) * 1993-12-30 1996-01-26 Stern Jacques Procédé d'authentification d'au moins un dispositif d'identification par un dispositif de vérification.
AU716797B2 (en) * 1996-08-19 2000-03-09 Ntru Cryptosystems, Inc. Public key cryptosystem method and apparatus
US6567465B2 (en) * 2001-05-21 2003-05-20 Pc Tel Inc. DSL modem utilizing low density parity check codes
AU2002312175A1 (en) * 2002-01-29 2003-09-02 Seagate Technology Llc A method and decoding apparatus using linear code with parity check matrices composed from circulants
US20040258240A1 (en) * 2003-05-02 2004-12-23 Singh Mukesh K. Cryptosystems
JP2006133380A (ja) * 2004-11-04 2006-05-25 Murata Mach Ltd 復号装置と復号プログラム及び暗号通信システム
US7805652B1 (en) * 2006-02-10 2010-09-28 Marvell International Ltd. Methods for generating and implementing quasi-cyclic irregular low-density parity check codes

Also Published As

Publication number Publication date
FR2917920B1 (fr) 2009-10-09
JP2010530990A (ja) 2010-09-16
US20110019815A1 (en) 2011-01-27
WO2009016272A1 (fr) 2009-02-05
EP2158720A1 (fr) 2010-03-03
FR2917920A1 (fr) 2008-12-26
US8817972B2 (en) 2014-08-26
EP2158720B1 (fr) 2018-11-28

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