JP5421538B2 - Insulation withstand voltage test method and apparatus - Google Patents

Insulation withstand voltage test method and apparatus Download PDF

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JP5421538B2
JP5421538B2 JP2008003752A JP2008003752A JP5421538B2 JP 5421538 B2 JP5421538 B2 JP 5421538B2 JP 2008003752 A JP2008003752 A JP 2008003752A JP 2008003752 A JP2008003752 A JP 2008003752A JP 5421538 B2 JP5421538 B2 JP 5421538B2
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JP2009168474A (en
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三郎 小島
和男 大石
日出夫 村上
啓義 大倉
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株式会社日本テクナート
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本発明は絶縁耐電圧試験方法及び装置に関する。本発明は、リチウムイオン二次電池等の薄膜成層物の絶縁特性を非破壊で検査する絶縁耐電圧試験方法及び装置に適用して好適である。   The present invention relates to an insulation withstand voltage test method and apparatus. The present invention is suitable for application to an insulation withstand voltage test method and apparatus for non-destructively inspecting the insulation characteristics of a thin film layered product such as a lithium ion secondary battery.

この種の薄膜成層物では絶縁層に潜在する欠陥部(ピンホール、金属片等)で発生する放電が問題となっている。放電とは、絶縁体が強い電場のもとで絶縁性を失う現象を言い、放電が生じる電場の大きさは、気体(火花放電)の場合は1cmにつき3万V程度であり、固体や液体の場合は1mmにつき5万V以上となる。一般に、放電の過程は極めて複雑であるが、概ね、以下の様子で起こることが知られている。   In this type of thin film layered product, there is a problem of electric discharge generated at a defective portion (pinhole, metal piece, etc.) latent in the insulating layer. Discharge refers to a phenomenon in which an insulator loses its insulating properties under a strong electric field. The magnitude of the electric field at which discharge occurs is about 30,000 V per cm in the case of gas (spark discharge), and is solid or liquid. In this case, it becomes 50,000 V or more per 1 mm. In general, the discharge process is extremely complicated, but it is generally known that it occurs in the following manner.

気体中に正負電極を置いて、その間の電圧を徐々に上げていくと、初めは自然界の電離作用で生じた少数の電子やイオンにより、微弱な電流(暗電流)が流れる。更に、電圧を上げると、電場で加速された電子の衝突による電離作用が繰り返され、増加した電子が正の電極(陽極)に吸収されるようになる。更に、電圧を上げると、電離作用で生じた陽イオンも加速されて負の電極(陰極)に達するようになり、陰極から多数の2次電子がたたき出され、こうして持続放電が起こり、電流が流れる。   When positive and negative electrodes are placed in a gas and the voltage between them is gradually increased, a weak current (dark current) flows due to a small number of electrons and ions generated by the natural ionization. Further, when the voltage is increased, the ionization action due to the collision of the electrons accelerated by the electric field is repeated, and the increased electrons are absorbed by the positive electrode (anode). Further, when the voltage is increased, the positive ions generated by the ionization action are accelerated and reach the negative electrode (cathode), and a large number of secondary electrons are knocked out from the cathode. Flowing.

上記、暗電流から持続放電が起こるまでの過渡的現象としては、火花放電やコロナ放電(局部破壊放電)が起こる場合もあり、また電極間に絶縁物が存在する場合は、その表面に沿って樹枝状のコロナ放電(沿面放電)が生ずる場合もある。こうして、放電が更に進むと、最終的にはアーク放電が起こり、大電流が流れて装置を破損する。   As a transient phenomenon from the dark current to the sustained discharge, spark discharge and corona discharge (local breakdown discharge) may occur, and if there is an insulator between the electrodes, along the surface Dendritic corona discharge (creeping discharge) may occur. Thus, when the discharge further proceeds, an arc discharge finally occurs, and a large current flows to damage the device.

従来は、被測定物に単一の高電圧インパルスを印加すると共に、被測定物に加わる電圧波形を観測することでピンホール等の絶縁不良を検出していた(特許文献1)。
特開平6−230071
Conventionally, insulation failure such as pinholes has been detected by applying a single high voltage impulse to the device under test and observing the voltage waveform applied to the device under test (Patent Document 1).
JP-A-6-230071

しかし、上記被測定物に単一の高電圧インパルスを加える方法であると、高電圧(波高値)の制御が難しいばかりか、欠陥の有/無を極端な状態でしか発見できない。また、大きな高電圧インパルスを加えることで、被測定物の絶縁特性を劣化させしまう場合も少なく無い。   However, the method of applying a single high voltage impulse to the object to be measured not only makes it difficult to control a high voltage (crest value), but also can detect the presence / absence of defects only in an extreme state. Moreover, there are many cases where the insulation characteristics of the object to be measured are deteriorated by applying a large high-voltage impulse.

また、金属板に貼られた絶縁シートに存在する欠陥(ピンホール、キズ等)を検出する場合は、静電容量がpFのオーダと非常に小さいため、比較的容易に高電圧インパルスを生成できるが、例えばリチウムイオン二次電池のセパレータは、もともとリチウムイオン(Li)を透過させるための多孔膜構造を有すると共に、静電容量もnFオーダと大きいため、高電圧インパルスの発生手段(コイルやトランス)に大きなエネルギーを蓄える必要があり、装置が大型化する問題があった。 In addition, when detecting defects (pinholes, scratches, etc.) present in the insulating sheet attached to the metal plate, the electrostatic capacity is very small on the order of pF, so a high voltage impulse can be generated relatively easily. However, for example, a separator of a lithium ion secondary battery originally has a porous film structure for transmitting lithium ions (Li + ) and has a large capacitance on the order of nF. It was necessary to store a large amount of energy in the transformer), and there was a problem that the apparatus was enlarged.

本発明は上記従来技術の問題点に鑑みなされたもので、その目的は、例えばリチウムイオン二次電池等の薄膜成層物に潜在する欠陥(ピンホール、金属片等)を、高い信頼性で検出可能な絶縁耐電圧試験方法及び装置を提供することにある。   The present invention has been made in view of the above-mentioned problems of the prior art, and its purpose is to detect defects (pinholes, metal pieces, etc.) latent in a thin film layered product such as a lithium ion secondary battery with high reliability. It is an object of the present invention to provide a method and apparatus for testing a dielectric withstand voltage.

本発明の第1の態様による絶縁耐電圧試験方法は、所定周期で発生した高電圧インパルスを整流して自装置及び又は被測定物のもつ静電容量を繰り返し充電することにより階段状に変化するステップ状高電圧を生成して該被測定物に印加し、該印加されたステップ状高電圧の推移を観測することで前記被測定物の絶縁耐電圧特性を検査するものである。
The dielectric withstand voltage test method according to the first aspect of the present invention changes stepwise by rectifying a high-voltage impulse generated at a predetermined cycle and repeatedly charging the capacitance of the apparatus and the device under test. A stepped high voltage is generated and applied to the device under test, and the insulation withstand voltage characteristic of the device under test is inspected by observing the transition of the applied stepped high voltage.

本発明では、試験電圧を小刻みに上げることにより、様々な放電条件(電圧)下における絶縁特性を観測できるため、被測定物の欠陥を検出し易い。即ち、絶縁破壊には至らないような僅かな放電現象でも的確に発見でき、従って、多様な欠陥を発見できる。    In the present invention, since the insulation characteristics under various discharge conditions (voltages) can be observed by increasing the test voltage in small increments, it is easy to detect defects in the object to be measured. That is, even a slight discharge phenomenon that does not cause dielectric breakdown can be found accurately, and thus various defects can be found.

本発明の第2の態様では、正極性のステップ状高電圧と負極性のステップ状高電圧とを交互に生成して前記被測定物に印加する。   In the second aspect of the present invention, a positive stepped high voltage and a negative stepped high voltage are alternately generated and applied to the object to be measured.

本発明では、被測定物に正極性と負極性のステップ状高電界を交互に印加することで、電界の向きに応じて偏在するような欠陥を容易に発見可能となる。即ち、一方向の電界では現れ難かったが、反対方向の電界では現れ易い様な種類の欠陥を容易に発見できる。   In the present invention, by alternately applying positive and negative step-like high electric fields to the object to be measured, it becomes possible to easily find defects that are unevenly distributed according to the direction of the electric field. In other words, it is possible to easily find a type of defect that hardly appears in an electric field in one direction but tends to appear in an electric field in the opposite direction.

本発明の第3の態様では、前記生成したステップ状高電圧の極性端子を互いに入れ替えて前記被測定物に印加する。
In the third aspect of the present invention, the generated stepped high voltage polarity terminals are interchanged and applied to the object to be measured.

本発明では、ステップ状高電圧の端子(例えば、高電圧側端子とGND側端子)を入れ替えて被測定物に印加するため、被測定物に対して幾何学的にも対称となるような電界を印加できる。   In the present invention, since the stepped high voltage terminals (for example, the high voltage side terminal and the GND side terminal) are switched and applied to the object to be measured, an electric field that is geometrically symmetrical with respect to the object to be measured. Can be applied.

なお、本発明と上記請求項1に係る発明とを組み合わせた場合は、被測定物の1方向からステップ状高電圧とGNDを加え、次に被測定物の逆方向からステップ状高電圧とGNDを印加することになる。従って、被測定物に対して幾何学的にも対称となるような電界を印加できることになり、欠陥を検出できる可能性が向上する。   When the present invention and the invention according to claim 1 are combined, a stepped high voltage and GND are applied from one direction of the object to be measured, and then the stepped high voltage and GND are reversed from the opposite direction of the object to be measured. Will be applied. Therefore, an electric field that is geometrically symmetrical to the object to be measured can be applied, and the possibility that a defect can be detected is improved.

また、本発明と上記請求項2に係る発明とを組み合わせた場合は、被測定物の1方向から正極性と負極性のステップ状高電圧とGND電圧を印加し、次に被測定物の逆方向から正極性と負極性のステップ状高電圧とGNDを印加することになる。従って、被測定物に対して電界の向きについても幾何学的にも対称となるような電界を印加できることになり、欠陥を検出できる可能性が更に向上する。   When the present invention and the invention according to claim 2 are combined, positive and negative stepped high voltages and GND voltages are applied from one direction of the object to be measured, and then the reverse of the object to be measured. From the direction, positive and negative stepped high voltages and GND are applied. Therefore, an electric field that is geometrically symmetrical with respect to the object to be measured can be applied, and the possibility of detecting a defect is further improved.

本発明の第4の態様による絶縁耐電圧試験装置は、所定周期で高電圧インパルスを発生するインパルス発生手段と、前記発生された高電圧インパルスを整流して自装置及び又は被測定物のもつ静電容量を繰り返し充電することにより階段状に変化するステップ状高電圧を生成し、前記被測定物に印加するステップ状高電圧生成手段と、前記被測定物に印加したステップ状高電圧の推移を観測することで該被測定物の絶縁耐電圧特性を検査する検査手段とを備えるものである。 An insulation withstand voltage test apparatus according to a fourth aspect of the present invention includes an impulse generating means for generating a high voltage impulse at a predetermined period, and a static voltage possessed by the apparatus and / or the device under test by rectifying the generated high voltage impulse. generating a stepped high voltage changes stepwise by charging repeatedly capacitance, the steps like high voltage generating means for applying to the object to be measured, the changes in step-like high voltage is applied to the object to be measured And observing means for inspecting the dielectric strength characteristics of the object to be measured.

本発明では、自装置及び又は被測定物のもつ静電容量を複数回に分けて充電できるため、1回当たりの充電エネルギーを小さくすることが可能となり、インパルス発生手段には比較的小さいインダクタンスのコイルやトランスを使用可能となる。従って、この種の装置を小型かつ低コストで実現できる。   In the present invention, since the electrostatic capacity of the device and / or the device under test can be charged in a plurality of times, the charging energy per time can be reduced, and the impulse generating means has a relatively small inductance. Coils and transformers can be used. Therefore, this type of device can be realized in a small size and at a low cost.

本発明の第5の態様では、前記ステップ状高電圧生成手段は、正極性のステップ状高電圧と負極性のステップ状高電圧とを交互に生成する。   In the fifth aspect of the present invention, the stepped high voltage generating means alternately generates a positive stepped high voltage and a negative stepped high voltage.

本発明の第6の態様では、前記ステップ状高電圧生成手段は、前記生成したステップ状高電圧の極性端子を互いに入れ替えて前記被測定物に印加する。






In the sixth aspect of the present invention, the stepped high voltage generating means replaces the generated stepped high voltage polarity terminals with each other and applies them to the object to be measured.






以下、添付図面に従って本発明の実施の形態を詳細に説明する。なお、全図を通して同一符号は同一又は相当部分を示すものとする。   Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. Note that the same reference numerals denote the same or corresponding parts throughout the drawings.

図1は第1の実施の形態による絶縁耐電圧試験装置の構成を示す図で、図において、Q1はMOSFET等からなる半導体スイッチ、T1は昇圧用のトランス、SW1〜SW3はリレーや半導体素子等からなるスイッチ、D1,D2は整流用のダイオード、11は残留印加電圧のリセット(放電)回路、12は、自ら単独で、又は被測定物20のもつ静電容量と共にインパルス状高電圧を繰り返し充電することにより階段状に変化するようなステップ状高電圧を生成するための静電容量(ステップ状高電圧生成部)で、且つC1,C2,R3,R4によって高電圧を分圧(Vm)し、測定部に送る回路である。P1,P2は被測定物20に高電圧を印加するための電極(プローブ)、20は被測定物(例えば、リチウムイオン二次電池)、15は絶縁耐電圧試験の制御を行う制御部、16は印加電圧(分圧電圧Vm)の測定部である。   FIG. 1 is a diagram showing the configuration of an insulation withstand voltage test apparatus according to the first embodiment. In the figure, Q1 is a semiconductor switch made of a MOSFET or the like, T1 is a step-up transformer, SW1 to SW3 are relays, semiconductor elements, etc. D1, D2 are rectifying diodes, 11 is a reset (discharge) circuit for residual applied voltage, and 12 is charged by itself or repeatedly with an impulse-like high voltage together with the capacitance of the device under test 20. Capacitance (stepped high voltage generator) for generating a stepped high voltage that changes stepwise by dividing the high voltage by C1, C2, R3, and R4 (Vm) , A circuit to be sent to the measurement unit. P1 and P2 are electrodes (probes) for applying a high voltage to the object 20 to be measured, 20 is an object to be measured (for example, a lithium ion secondary battery), 15 is a control unit for controlling an insulation withstand voltage test, 16 Is a measuring unit for applied voltage (divided voltage Vm).

ここで、半導体スイッチQ1及びトランスT1からなる回路は本発明のインパルス発生手段に相当し、ダイオードD1,D2及び静電容量C1,C2等からなる回路は本発明のステップ状高電圧生成手段に相当する。   Here, the circuit comprising the semiconductor switch Q1 and the transformer T1 corresponds to the impulse generating means of the present invention, and the circuit comprising the diodes D1, D2 and the capacitances C1, C2 etc. corresponds to the stepped high voltage generating means of the present invention. To do.

図2に実施の形態による半導体スイッチの回路図を示す。図において、スイッチ回路SW2はFETQ2とQ3とから構成され、正極性の高電圧を発生するときはFETQ2がONとなり、FETQ3はOFFとなる。逆に負極性の高電圧を発生するときは、FETQ3がONとなり、FETQ2がOFFに維持される。例えば、FETQ2のゲート・ソース間にはバイアス抵抗が接続され、該抵抗と並列にフォトダイオード(太陽電池)が接続されている。係る構成により、フォトダイオードに光が入射すると、アノード側がカソード側に対して正にバイアスされることで、FETQ2が導通する。また、光が入射しない時は、ゲート側が正にバイアスされないためFETQ2はOFFになる。FETQ3についても同様である。こうして、低圧側の制御部15と、トランス2次側の高電圧回路とをアイソレーションしている。スイッチ回路SW3は、FETQ4とFETQ5が逆直列(ソース同士が接続されている回路)に接続されているので、導通時は,FETQ4,FETQ5の両方とも導通する。遮断時は、ドレイン・ソース間の電圧が逆方向となる側のFETは内部の寄生ダイオードにより導通するが、順方向とる側のFETは遮断する。従って、スイッチ回路SW3は、正負両方の電圧をスイッチすることができ、抵抗R2を介して残留電荷をリセット(放電)する。   FIG. 2 shows a circuit diagram of the semiconductor switch according to the embodiment. In the figure, the switch circuit SW2 is composed of FETs Q2 and Q3. When a positive high voltage is generated, the FET Q2 is turned on and the FET Q3 is turned off. Conversely, when a negative high voltage is generated, the FET Q3 is turned on and the FET Q2 is kept off. For example, a bias resistor is connected between the gate and source of the FET Q2, and a photodiode (solar cell) is connected in parallel with the resistor. With this configuration, when light is incident on the photodiode, the anode side is positively biased with respect to the cathode side, so that the FET Q2 becomes conductive. When no light is incident, the FET Q2 is turned off because the gate side is not positively biased. The same applies to the FET Q3. Thus, the control unit 15 on the low voltage side is isolated from the high voltage circuit on the secondary side of the transformer. In the switch circuit SW3, the FET Q4 and the FET Q5 are connected in anti-series (a circuit in which the sources are connected), so that both the FET Q4 and the FET Q5 are conductive when conducting. At the time of blocking, the FET on the side where the drain-source voltage is in the reverse direction is conducted by the internal parasitic diode, but the FET on the side taking the forward direction is blocked. Therefore, the switch circuit SW3 can switch both positive and negative voltages, and resets (discharges) the residual charge via the resistor R2.

図3は実施の形態による絶縁耐電圧試験装置の動作説明図である。制御部15が時刻t0で給電制御信号TGをONにすると、トランスT1の一次巻線には電流Iが、 FIG. 3 is a diagram for explaining the operation of the dielectric strength test apparatus according to the embodiment. When the control unit 15 turns ON the power supply control signal TG at the time t0, the current I 1 in the primary winding of the transformer T1,

Figure 0005421538
Figure 0005421538

但し、R:電流制限抵抗
r:電源部の内部抵抗
:トランスT1のインダクタンス
の形で流れ、この電流は例えば時刻t1には所定値Icに達する。トランスT1は、フライバックで動作しているためt0からt1の間、二次側には電流は流れない。
Where R 1 : current limiting resistor
r: Internal resistance of power supply
L 1 : Flows in the form of inductance of the transformer T1, and this current reaches a predetermined value Ic, for example, at time t1. Since the transformer T1 operates by flyback, no current flows on the secondary side from t0 to t1.

次いで制御部15が時刻t1で給電制御信号TGをOFFにすると、FETスイッチQ1はOFFとなり所定電流Icは遮断される。この電流遮断によりトランスT1(2次側)には高電圧Vが誘起され、これがダイオードD1、ステップ状高電圧生成部12を介して被測定物20に印加される。 Next, when the control unit 15 turns off the power supply control signal TG at time t1, the FET switch Q1 is turned off and the predetermined current Ic is cut off. By this current interruption, a high voltage V 2 is induced in the transformer T 1 (secondary side), and this is applied to the DUT 20 via the diode D 1 and the stepped high voltage generator 12.

被測定物20が正常な場合は、その絶縁抵抗Rsは十分に大きいため、被測定物に流れる電流Isは殆ど被測定物20の容量Csの側に、   When the device under test 20 is normal, the insulation resistance Rs is sufficiently large, so that the current Is flowing through the device under test is almost on the capacity Cs side of the device under test 20.

Figure 0005421538
Figure 0005421538

但し、L:トランスT1のインダクタンス(2次側)
:2次電流
の形で流れ込む。但し、C,Cは無いか又はCsに比べて充分に小さいとする。これにより容量Csはチャージされ、被測定物20の両端にかかる電圧Vsは、
Where L 2 : inductance of the transformer T1 (secondary side)
I 2 : flows in the form of a secondary current. However, it is assumed that C 1 and C 2 do not exist or are sufficiently smaller than Cs. As a result, the capacitor Cs is charged, and the voltage Vs applied to both ends of the DUT 20 is

Figure 0005421538
Figure 0005421538

の形で立ち上がる。 Stand up in the form of.

この状態で、最初にI=0になる時刻t2を経過すると、ダイオードD1はカットオフに転じるため、容量Csに注入された静電エネルギーはトランスT1の側には逆戻りしないから、抵抗(R+R)および抵抗Rsを介して徐々に放電される。そして、再度、高電圧インパルスが発生すると、その時点の放電電圧から更に充電され、こうして、最終的には、略高電圧インパルスの波高値付近まで充電される。 In this state, when the time t2 when I 2 = 0 first elapses, the diode D1 turns to cut-off, so that the electrostatic energy injected into the capacitor Cs does not return to the transformer T1 side, so that the resistance (R 3 + R 4 ) and the resistor Rs is gradually discharged. Then, when the high voltage impulse is generated again, the battery is further charged from the discharge voltage at that time, and finally charged to the vicinity of the peak value of the high voltage impulse.

係る構成では、もし被測定物20の絶縁特性(Rs,Cs)が正常(標準)なら、容量Csの充電電圧Vsについて所定の立ち上がり特性(例えば、図の特性b)が得られる。しかし、標準よりCsが大又はRsが小など、絶縁特性が劣化していると、Vsの立ち上がり特性は図のcの様になり、もし、途中で絶縁破壊が生じた場合は、その時点で急降下する。また逆に標準よりCsが小又はRsが大であると、Vsの立ち上がり特性は図のaの様になる。何れの場合も正常(標準)な範囲から外れている場合は絶縁異常と判断できる。測定部16では、印加電圧の分圧電圧Vmを計測かつプロットすることで被測定物20の絶縁特性を総合的に評価する。そして、測定の終了時にはスイッチ回路SW3にリセット信号RSが加えられ、被測定物20の残留電荷を0に放電する。   In such a configuration, if the insulation characteristics (Rs, Cs) of the DUT 20 are normal (standard), a predetermined rising characteristic (for example, characteristic b in the figure) can be obtained for the charging voltage Vs of the capacitor Cs. However, if the insulation characteristics are degraded, such as Cs is larger than standard or Rs is small, the rise characteristic of Vs will be as shown in c in the figure. If dielectric breakdown occurs in the middle, at that time Suddenly descend. On the other hand, when Cs is smaller than the standard or Rs is larger than the standard, the rising characteristic of Vs is as shown in FIG. In any case, if it is out of the normal (standard) range, it can be determined that the insulation is abnormal. The measurement unit 16 comprehensively evaluates the insulation characteristics of the DUT 20 by measuring and plotting the divided voltage Vm of the applied voltage. At the end of measurement, a reset signal RS is applied to the switch circuit SW3, and the residual charge of the device under test 20 is discharged to zero.

以上は、被測定物20に正極性のステップ状高電圧Vsを加える場合を述べたが、負極性のステッップ状高電圧Vsを加える場合も同様である。負極性への切替は、スイッチ回路SW1とSW2に加える制御信号P/Nにより行われる。   The above describes the case where the positive step-like high voltage Vs is applied to the object to be measured 20, but the same applies to the case where the negative step-like high voltage Vs is applied. Switching to the negative polarity is performed by a control signal P / N applied to the switch circuits SW1 and SW2.

図4に一例のリチウムイオン二次電池の構造を示す。黒鉛等による負極22と、コバルト酸リチウム(LiCoO)等からなる正極21との間にポリエチレンやポリプロピレン等のポリオレフィン系微多孔膜からなるセパレータ23a,23bを挟み込む。更に正極21と負極22に正極タブ21tと負極タブ22tとをそれぞれ溶接し、これらの膜をスパイラル状に巻き上げることで、電池本体部が得られる。 FIG. 4 shows a structure of an example lithium ion secondary battery. Separators 23 a and 23 b made of a polyolefin microporous film such as polyethylene or polypropylene are sandwiched between a negative electrode 22 made of graphite or the like and a positive electrode 21 made of lithium cobalt oxide (LiCoO 2 ) or the like. Further, the positive electrode tab 21t and the negative electrode tab 22t are welded to the positive electrode 21 and the negative electrode 22, respectively, and these films are wound up in a spiral shape to obtain a battery body.

正負電極21,22の厚みは百数十μm程度、セパレータ23の厚みは25μm程度であり、正負電極の反応面積を大きくした薄型の膜構造とすることで、大出力が得られるようになっている。セパレータ23a,23bは、正負電極間を離隔して内部短絡を防止すると共に、電池実装時に封入された電解液を保持して正負電極間のイオンを通過させるスペーサとして用いる。   The positive and negative electrodes 21 and 22 have a thickness of about a few tens of μm, the separator 23 has a thickness of about 25 μm, and a thin film structure in which the reaction area of the positive and negative electrodes is increased can provide a large output. Yes. The separators 23a and 23b are used as spacers that separate the positive and negative electrodes to prevent an internal short circuit, hold the electrolytic solution sealed when the battery is mounted, and pass ions between the positive and negative electrodes.

この様に、セパレータ23a,23bの厚みは非常に薄いものであるが、金属片が挟まった程度では容易には破れないようになっている。しかし、金属片が存在すると、セパレータ23を介する正負電極間の電界は局部的に影響を受けることになる。挿入図(a)は正極21とセパレータ23aとの間に金属片25aが存在する場合を示しており、この場合の局部電界は、板状の負極22の上側表面にセパレータ23aを挟んで正のピン電極25aが近づいた状態に等価だと模式化できる。また、挿入図(b)は負極22とセパレータ23aとの間に金属片25bが存在する場合を示しており、この場合の局部電界は、板状の正極21の下側表面にセパレータ23aを挟んで負のピン電極25bが近づいた状態と等価だと模式化できる。   As described above, the separators 23a and 23b are very thin. However, the separators 23a and 23b are not easily broken as long as the metal pieces are sandwiched. However, when a metal piece is present, the electric field between the positive and negative electrodes via the separator 23 is locally affected. The inset (a) shows a case where a metal piece 25a exists between the positive electrode 21 and the separator 23a, and the local electric field in this case is positive with the separator 23a sandwiched between the upper surface of the plate-like negative electrode 22. It can be modeled as equivalent to a state in which the pin electrode 25a is approaching. Further, the inset (b) shows a case where a metal piece 25b exists between the negative electrode 22 and the separator 23a, and the local electric field in this case sandwiches the separator 23a on the lower surface of the plate-like positive electrode 21. Thus, it can be modeled as equivalent to a state in which the negative pin electrode 25b is approaching.

図5は第1の実施の形態による絶縁耐電圧試験結果のグラフ図で、図5(a)は接地した板状電極にエアギャップを介して高電圧に接続した針電極を近づけると共に、該針電極に正極性のステップ状高電圧と負極性のステップ状高電圧とを交互に印加した場合(以下、試験方法Aと称す)の概念構成を示している。図5(b)に針電極を±600Vに駆動した場合の測定結果を示す。針電極が+側ではVsが正常に立ち上がり、その後リセットされている。針電極が−側では、Vsが一旦−600Vにまで立ち下がったが、規定時間の高電圧に耐え切れず、途中で急峻な放電(短絡)が生じている。図5(c)に針電極を±600Vに駆動した場合の測定結果を示す。この場合も、針電極が+側では正常であるが、針電極が−側では途中で異常放電が発生している。本実施の形態ではこの種の過渡的なエラーも見逃さずに発見できる。図5(d),(e)は何れも典型的なエラーパターンであり、何れも針電極が−側の場合に生じている。この様に、針電極を+側と−側とに交互に駆動することで、従来方法では発見が困難であった様な異常でも発見可能となっている。図5(f)は針電極を±700Vに駆動した場合を示している。   FIG. 5 is a graph of the insulation withstand voltage test result according to the first embodiment. FIG. 5A shows the needle electrode connected to a high voltage through an air gap close to the grounded plate electrode and the needle. 2 shows a conceptual configuration in the case where a positive stepped high voltage and a negative stepped high voltage are alternately applied to an electrode (hereinafter referred to as test method A). FIG. 5B shows a measurement result when the needle electrode is driven to ± 600V. When the needle electrode is on the + side, Vs rises normally and then resets. When the needle electrode is on the-side, Vs once fell to -600 V, but it could not withstand the high voltage for a specified time, and a sharp discharge (short circuit) occurred midway. FIG. 5C shows the measurement result when the needle electrode is driven to ± 600V. Also in this case, the needle electrode is normal on the + side, but abnormal discharge occurs midway when the needle electrode is on the-side. In this embodiment, this type of transient error can be found without overlooking. 5D and 5E are both typical error patterns, and both occur when the needle electrode is on the negative side. In this way, by alternately driving the needle electrode to the + side and the − side, it is possible to detect even an abnormality that is difficult to find by the conventional method. FIG. 5F shows a case where the needle electrode is driven to ± 700V.

図6は第2の実施の形態による絶縁耐電圧試験装置の構成を示す図で、生成したステップ状高電圧の極性端子を入れ替えて被測定物に印加することが可能な場合を示している。図において、SW4は端子切替スイッチであり、該SW4がON(図示の試験方法A)の状態では、ステップ状高電圧を被測定物20の上側に、かつGNDを被測定物20の下側に印加し、該SW4がOFF(以下、試験方法Bと称す)の状態では、GNDを被測定物20の上側に、かつステップ状高電圧を被測定物20の下側に印加する。これにより、被測定物20の両面から対称にステップ状高電圧を印加できることとなり、リチウムイオン二次電池等の薄膜成層物に潜在する絶縁エラーを検出できる確率が向上する。その他の構成については、上記図1の絶縁耐電圧試験装置と同様でよい。   FIG. 6 is a diagram showing a configuration of an insulation withstand voltage test apparatus according to the second embodiment, and shows a case where the generated stepped high voltage polarity terminals can be exchanged and applied to the object to be measured. In the figure, SW4 is a terminal changeover switch. When the SW4 is ON (test method A shown), the stepped high voltage is on the upper side of the device under test 20 and the GND is on the lower side of the device under test 20. When the SW4 is OFF (hereinafter referred to as test method B), GND is applied to the upper side of the device under test 20 and a stepped high voltage is applied to the lower side of the device under test 20. Thereby, a stepped high voltage can be applied symmetrically from both surfaces of the device under test 20, and the probability that an insulation error latent in a thin film layered product such as a lithium ion secondary battery can be detected is improved. About another structure, it may be the same as that of the said insulation withstand voltage test apparatus of the said FIG.

図7は第2の実施の形態による絶縁耐電圧試験結果のグラフ図で、図7(a)は高電圧に接続した板状電極にエアギャップを介して接地した針電極を近づけると共に、前記板状電極に正極性のステップ状高電圧と負極性のステップ状高電圧とを交互に印加した場合(試験方法B)の概念構成を示している。図7(b)に板電極を±800Vに駆動した場合
の測定結果を示す。板電極が+側ではVsが一旦+800Vにまで立ち下がったが、規定時間の高電圧に耐え切れず、途中で急峻な放電(短絡)が生じている。これは、上記図5(f)の測定条件(板電極が高電位側)に類似しており、図5(f)と同様の測定結果が得られている。なお、この例では板電極が正の半サイクルでエラーが出たため、板電極が負の半サイクルの測定を行っていない。図7(c)に板電極を±600Vに駆動した場合の測定結果を示す。この場合も、板電極が+側で異常放電が発生している。更に、図7(d)〜(f)では、何れも板電極が+側の場合に絶縁エラーが生じているが、これらのケースでは引き続き、板電極が−側の試験も行っている。板電極が−側の試験は何れも放電が生じていない状態であり、これらは上記図5(d)〜(f)の測定条件及び測定結果に類似している。この様に、ステップ状高電圧の極性端子を入れ替えて被測定物20に印加することで、従来方法では発見が困難であった様な異常でも発見及びエラーの再確認が可能となっている。
FIG. 7 is a graph of the insulation withstand voltage test result according to the second embodiment. FIG. 7A is a diagram illustrating a state in which a grounded needle electrode is brought close to a plate electrode connected to a high voltage via an air gap and the plate. 2 shows a conceptual configuration when a positive step-like high voltage and a negative step-like high voltage are alternately applied to the electrode (test method B). FIG. 7B shows a measurement result when the plate electrode is driven to ± 800V. When the plate electrode is on the + side, Vs once fell to +800 V, but it could not withstand the high voltage for a specified time, and a sharp discharge (short circuit) occurred midway. This is similar to the measurement conditions in FIG. 5F (plate electrode is on the high potential side), and the same measurement results as in FIG. 5F are obtained. In this example, since an error occurs in the positive half cycle of the plate electrode, the measurement of the negative half cycle of the plate electrode is not performed. FIG. 7C shows the measurement result when the plate electrode is driven to ± 600V. Also in this case, abnormal discharge occurs on the positive side of the plate electrode. Further, in each of FIGS. 7D to 7F, an insulation error occurs when the plate electrode is on the + side. In these cases, the plate electrode is continuously tested on the − side. The tests on the negative side of the plate electrode are in a state where no discharge occurs, and these are similar to the measurement conditions and measurement results of FIGS. 5 (d) to (f). In this way, by replacing the polarity terminal of the stepped high voltage and applying it to the device under test 20, it is possible to detect and reconfirm the error even if the abnormality is difficult to find by the conventional method.

なお、上記第2の実施の形態では、被測定物20の上面から正極性と負極性のステップ状高電圧、次に被測定物20の下面から正極性と負極性のステップ状高電圧をそれぞれ印加したが、これに限らない。他にも、被測定物20の上面から正極性、次に下面から正極性のステップ状高電圧をそれぞれ印加し、又は被測定物20の上面から負極性、次に下面から負極性のステップ状高電圧をそれぞれ印加しても良い。この場合も、被測定物20の両面から対称にステップ状高電圧を印加したことになる。本第2の実施の形態によれば、被測定物20の物性や形状、構造等の非対称性の中に隠れているような欠陥でも確実に発見できる。   In the second embodiment, positive and negative stepped high voltages are measured from the upper surface of the measured object 20, and then positive and negative stepped high voltages are measured from the lower surface of the measured object 20, respectively. Although applied, it is not restricted to this. In addition, a stepped high voltage having a positive polarity from the upper surface of the object to be measured 20 and then a positive polarity from the lower surface, or a negative step from the upper surface of the object to be measured 20, and a negative step from the lower surface is then applied. A high voltage may be applied to each. Also in this case, the stepped high voltage is applied symmetrically from both surfaces of the DUT 20. According to the second embodiment, even a defect hidden in the asymmetry of the physical property, shape, structure, etc. of the object to be measured 20 can be reliably detected.

図8は第3の実施の形態による絶縁耐電圧試験装置の構成を示す図で、図1のインパルス電圧発生部のトランスT1に代えて、コイルLlを使用した場合を示している。これにより測定回路の小型・軽量化が図れる。   FIG. 8 is a diagram showing the configuration of an insulation withstand voltage test apparatus according to the third embodiment, and shows a case where a coil Ll is used in place of the transformer T1 of the impulse voltage generator of FIG. As a result, the measurement circuit can be reduced in size and weight.

なお、上記各実施の形態ではトランスT1の2次側に接続した整流回路で直接高電圧を発生したが、これに限らない。トランスT1の2次側に公知の倍電圧整流回路(ビラード回路)やn倍電圧整流回路(コッククロフト−ウォルトン回路)等を接続することで、被測定物20に対して更なる高電圧を印加できるように構成しても良い。   In each of the above embodiments, the high voltage is directly generated by the rectifier circuit connected to the secondary side of the transformer T1, but the present invention is not limited to this. By connecting a known voltage doubler rectifier circuit (Billard circuit), n voltage doubler rectifier circuit (Cockcroft-Walton circuit) or the like to the secondary side of the transformer T1, a higher voltage can be applied to the device under test 20. You may comprise as follows.

また、上記本発明に好適なる複数の実施の形態を述べたが、本発明の思想を逸脱しない範囲内で各部の構成、制御、処理及びこれらの組み合わせの様々な変更が行えることは言うまでも無い。   In addition, although a plurality of embodiments suitable for the present invention have been described, it goes without saying that various changes in the configuration, control, processing, and combination of each part can be made without departing from the spirit of the present invention. No.

第1の実施の形態による絶縁耐電圧試験装置の構成を示す図である。It is a figure which shows the structure of the insulation withstand voltage test apparatus by 1st Embodiment. 実施の形態による半導体スイッチの回路図である。It is a circuit diagram of the semiconductor switch by embodiment. 実施の形態による絶縁耐電圧試験装置の動作説明図である。It is operation | movement explanatory drawing of the insulation withstand voltage test apparatus by embodiment. 一例のリチウムイオン二次電池の構造を示す図である。It is a figure which shows the structure of an example lithium ion secondary battery. 第1の実施の形態による絶縁耐電圧試験結果のグラフ図である。It is a graph of the insulation withstand voltage test result by 1st Embodiment. 第2の実施の形態による絶縁耐電圧試験装置の構成を示す図である。It is a figure which shows the structure of the insulation withstand voltage test apparatus by 2nd Embodiment. 第2の実施の形態による絶縁耐電圧試験結果のグラフ図である。It is a graph of the insulation withstand voltage test result by 2nd Embodiment. 第3の実施の形態による絶縁耐電圧試験装置の構成を示す図である。It is a figure which shows the structure of the insulation withstand voltage test apparatus by 3rd Embodiment.

符号の説明Explanation of symbols

Q1 半導体スイッチ
T1 トランス
SW1〜SW3 スイッチ
D1,D2 ダイオード
11 リセット回路
12 静電容量(ステップ状高電圧生成部)
P1,P2 電極(プローブ)
15 制御部
16 測定部
20 被測定物
Q1 Semiconductor switch T1 transformer SW1 to SW3 switch D1, D2 Diode 11 Reset circuit 12 Capacitance (stepped high voltage generator)
P1, P2 electrodes (probes)
15 Control Unit 16 Measurement Unit 20 Measured Object

Claims (6)

所定周期で発生した高電圧インパルスを整流して自装置及び又は被測定物のもつ静電容量を繰り返し充電することにより階段状に変化するステップ状高電圧を生成して該被測定物に印加し、該印加されたステップ状高電圧の推移を観測することで前記被測定物の絶縁耐電圧特性を検査することを特徴とする絶縁耐電圧試験方法。 A stepped high voltage that changes stepwise is generated by rectifying the high-voltage impulse generated at a predetermined period and repeatedly charging the capacitance of the device and / or the device under test, and then applied to the device under test. An insulation withstand voltage test method for examining the insulation withstand voltage characteristics of the object to be measured by observing the transition of the applied stepped high voltage. 正極性のステップ状高電圧と負極性のステップ状高電圧とを交互に生成して前記被測定物に印加することを特徴とする請求項1記載の絶縁耐電圧試験方法。 2. The insulation withstand voltage test method according to claim 1, wherein a positive stepped high voltage and a negative stepped high voltage are alternately generated and applied to the object to be measured. 前記生成したステップ状高電圧の極性端子を互いに入れ替えて前記被測定物に印加することを特徴とする請求項1又は2記載の絶縁耐電圧試験方法。 3. The insulation withstand voltage test method according to claim 1, wherein the generated stepped high voltage polarity terminals are exchanged with each other and applied to the object to be measured. 所定周期で高電圧インパルスを発生するインパルス発生手段と、
前記発生された高電圧インパルスを整流して自装置及び又は被測定物のもつ静電容量を繰り返し充電することにより階段状に変化するステップ状高電圧を生成し、前記被測定物に印加するステップ状高電圧生成手段と、
前記被測定物に印加したステップ状高電圧の推移を観測することで該被測定物の絶縁耐電圧特性を検査する検査手段とを備えることを特徴とする絶縁耐電圧試験装置。
Impulse generating means for generating a high voltage impulse at a predetermined period;
Step of generating a stepped high voltage that changes stepwise by rectifying the generated high voltage impulse and repeatedly charging the capacitance of the device and / or the device under test, and applying the stepped high voltage to the device under test High voltage generating means,
An insulation withstand voltage test apparatus comprising: inspection means for inspecting the insulation withstand voltage characteristics of the object to be measured by observing the transition of the stepped high voltage applied to the object to be measured.
前記ステップ状高電圧生成手段は、正極性のステップ状高電圧と負極性のステップ状高電圧とを交互に生成することを特徴とする請求項4記載の絶縁耐電圧試験装置。 5. The insulation withstand voltage test apparatus according to claim 4, wherein the stepped high voltage generating means alternately generates a positive stepped high voltage and a negative stepped high voltage. 前記ステップ状高電圧生成手段は、前記生成したステップ状高電圧の極性端子を互いに入れ替えて前記被測定物に印加することを特徴とする請求項4又は5記載の絶縁耐電圧試験装置。 6. The insulation withstand voltage test apparatus according to claim 4 or 5, wherein the stepped high voltage generating means applies the generated stepped high voltage polarity terminals to the device under test while replacing the polarity terminals of the generated stepped high voltage.
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