JP5421446B2 - Short circuit protection circuit - Google Patents

Description

  The present invention relates to a short-circuit protection circuit suitably applied to a relay provided in an in-vehicle electronic device mounted on a vehicle.

  In a relay drive output circuit that is provided in an in-vehicle electronic device mounted on a vehicle and outputs a drive current to a relay (load) based on an input control signal, if a short circuit occurs on the output side, the circuit is It is possible that a short circuit current flows and is damaged.

  Therefore, when such a short circuit occurs, a large current fuse inserted between the power supply and the relay drive output circuit is blown, or the current flowing through the relay drive output circuit is monitored to limit the amount of current. Therefore, a short circuit protection circuit that protects the relay drive output circuit from damage due to a short circuit is provided (for example, see Patent Document 1).

  Further, the short circuit protection circuit forcibly stops the output operation of the relay drive output circuit when a short circuit occurs, prevents a short circuit current flowing through the relay drive output circuit, and at a predetermined time from when the short circuit occurs. Some devices return a return signal at a predetermined time interval to the relay drive output circuit after the lapse to restore the output operation.

  In such a short circuit protection circuit, as shown in the timing chart of FIG. 7, T1 to Tn (ΔT = Tk + 1−Tk) after a predetermined time ΔTc3 has elapsed since a short circuit occurred at a predetermined time interval ΔT. K is a natural number, 1 ≦ k ≦ n; n is a natural number), and the relay drive output circuit is returned to the output operation state by return signals Re1 to Ren (n is a natural number).

JP 2001-25150 A

  However, in such a case, if the transmission frequency of the return signals Re1 to Ren (the frequency of the return operation of the relay drive output circuit) increases excessively, the operation of the relay drive output circuit is temporarily returned by the return signals Re1 to Ren. When this occurs, an excessive short circuit current flows through the circuit. For this reason, heat due to this short-circuit current accumulates over time, and there is a risk of damaging the circuit (such as a transistor). On the other hand, in order to prevent such damage, if the transmission frequency of the return signals Re1 to Ren is reduced, in the relay drive output circuit, the return from the short-circuit state where the short-circuit continues is delayed, and the output stop state is It will continue for a long time.

  In FIG. 7, the output operation is restored at the time (T2) when the return signal Re2 is transmitted to the relay drive output circuit at the timing of the second T2 from T1, and the short circuit with respect to the short circuit time [min]. The time ratio of the required time [min] from cancellation to output restoration is 50%. In this case, the transmission frequency (the number of transmissions) of the return signals Re1 to Ren is as low as 2 and the relay drive output circuit is not damaged, but the time ratio is as long as 50%, which is an unsatisfactory result. . In this background art, as shown in FIG. 7, it is assumed that the return signal is transmitted to the relay drive output circuit six times or more, thereby damaging the circuit due to heat accumulation due to a short-circuit current.

  In addition, a method of returning from the short-circuit state to the output operation state in a short time while preventing damage to the relay drive output circuit by manual operation by a vehicle user (driver or the like) is also conceivable. Will be damaged.

  The present invention has been made to solve the above problems, and its purpose is to quickly return to the output operation state without damaging the circuit after the short circuit generated in the relay drive output circuit is resolved. An object of the present invention is to provide a short-circuit protection circuit that can be made to operate.

  In order to solve the above problems, the invention according to claim 1 is directed to a relay drive output circuit that outputs a drive current to a load based on an input control signal, and whether or not a short circuit occurs on the output side of the circuit. When the short circuit occurs, the output operation of the relay drive output circuit is stopped, and a return signal is transmitted to the relay drive output circuit after a predetermined time from the occurrence of the short circuit. In a short-circuit protection circuit comprising a short-circuit detection circuit that restores its output operation, the relay drive output circuit and the short-circuit detection circuit are provided with a plurality of sets, a return signal from one set of short-circuit detection circuits, The gist is that the return signals from the other sets of short circuit detection circuits are alternately output to the corresponding relay drive output circuits.

  According to this configuration, a return signal from one set of short-circuit detection circuits and a return signal from another set of short-circuit detection circuits are alternately transmitted to the corresponding relay drive output circuits. For this reason, compared with a case where only a single relay drive output circuit and short circuit detection circuit set are provided, the return signal transmission frequency to the relay drive output circuit (return signal transmission frequency viewed from the load) is higher. As the overall increase, the relay drive output circuit can be returned from the output stop state to the output operation state in a short time after the short-circuit state is naturally resolved, and the return signal transmitted to each relay drive output circuit Since the transmission frequency (recovery operation frequency) is less than half that amount, the amount of heat accumulated in the relay drive output circuit due to the short-circuit current can be suppressed, and damage to the circuit can be effectively prevented.

  According to the short circuit protection circuit of the present invention, after the short circuit generated in the relay drive output circuit is resolved, it is possible to quickly return to the output operation state without damaging the circuit.

1 is a circuit diagram showing an electrical configuration including an ECU (short circuit protection circuit) and a relay according to a first embodiment of the present invention. The circuit diagram which shows further in detail the electrical structure which consists of ECU and relay which concern on 1st Embodiment of this invention. The flowchart figure which shows operation | movement of ECU which concerns on this invention. The timing chart figure which shows the characteristic operation | movement of ECU which concerns on 1st Embodiment of this invention. The circuit diagram which shows the electric constitution which consists of ECU and the relay which concern on 2nd Embodiment of this invention. The timing chart figure which shows the characteristic operation | movement of ECU which concerns on 2nd Embodiment of this invention. The timing chart figure which shows the characteristic operation | movement of ECU which concerns on a prior art example.

DESCRIPTION OF EXEMPLARY EMBODIMENTS Hereinafter, embodiments of the invention will be described with reference to the drawings.
[First Embodiment]
As shown in FIG. 1, in this embodiment (reference example), an ECU (controller) 1 that functions as a short-circuit protection circuit is provided in an in-vehicle electronic device mounted on a vehicle, and is relay-driven as an input control signal. A relay drive output circuit 11 that outputs a drive current to the relay 2 based on the signal A, a short circuit detection circuit 12 that detects the presence or absence of a short circuit S (short circuit current I0) that occurs on the output side of the circuit 11, and the relay drive output In order to control the circuit 11 and the short-circuit detection circuit 12, a CPU (microcomputer) 13 is provided as control means connected to the circuits 11 and 12.

  Specifically, as shown in FIG. 2, the relay drive output circuit 11 includes an npn transistor TR1 having a base terminal connected to the CPU 13 and a grounded emitter terminal via resistors R1 and R2 arranged in series. The collector terminal of the transistor TR1 is connected to the base terminal via the resistor R3, the emitter terminal is connected to the DC power source (+ B), the collector terminal is connected to the relay 2, and the resistors R7 and R8 are used. And a pnp transistor TR2 grounded. The relay 2 is connected to the collector terminal of the transistor TR2 and is driven by a relay coil 3 that is excited by a drive current flowing from the relay drive output circuit 11, and is driven by the relay coil 3, so that an in-vehicle electronic device ( The external contact) 5 and the relay contact 4 for turning on / off the connection between the on-vehicle DC power source (+ B).

  The short circuit detection circuit 12 has a base terminal connected to the CPU 13 via a series resistor R4, an npn transistor TR3 whose emitter terminal is grounded, and a base terminal connected to the collector terminal of the transistor TR3 via a resistor R5. And a pnp transistor TR4 whose emitter terminal is connected between the CPU 13 and the resistors R1 and R2 and whose collector terminal is grounded via the resistor R6. Here, the collector terminal of the transistor TR3 is connected to the base terminal of the transistor TR4 via the resistor R5.

  The short-circuit detection circuit 12 further includes a potential between the resistors R7 and R8, one end of which is grounded and the other end connected between the collector terminal of the transistor TR2 and the relay coil 3, and a reference voltage Vref. A comparator CMP1 is provided that compares the potential and outputs two kinds of voltages, high (VH) and low (VL), according to the result.

  Specifically, a short circuit occurs at the output side of the relay drive output circuit 11, that is, at the connection point between the collector terminal of the transistor TR2 and the relay coil 3, and the potential between the resistors R7 and R8 (the input terminal voltage Vi of the comparator CMP1). ) Becomes less than the reference voltage Vref, the comparator CMP1 outputs a low (VL) voltage between the transistor TR4 and the resistor R6 as an output terminal voltage Vo (Vo = VL). On the other hand, when the short circuit is eliminated at the connection point between the collector terminal of the transistor TR2 and the relay coil 3, and the potential between the resistors R7 and R8 (the input terminal voltage Vi of the comparator CMP1) becomes equal to or higher than the reference voltage Vref. The comparator CMP1 outputs a high (VH) voltage as the output terminal voltage Vo (Vo = VH).

  The short circuit detection circuit 12 of the present embodiment uses the comparator CMP1 to determine whether or not there is a short circuit at the connection point between the collector terminal of the transistor TR2 and the relay coil 3, that is, whether or not a short circuit occurs on the output side of the relay drive output circuit 11. It is configured to detect and use and to control transmission / stop of the relay drive signal A as a control signal transmitted from the CPU 13 to the relay drive output circuit 11 based on the detection result. Here, the relay drive signal A is amplified by the transistors TR1 and TR2 and becomes a drive current for driving the relay 2.

  Specifically, when the output terminal voltage Vo of the comparator CMP1 is the low voltage VL (Vo = VL), the low voltage VL is detected as being short-circuited (short-circuited) by the short-circuit detection circuit 12 under a predetermined condition. In this case, the output of the drive current of the relay drive output circuit 11 is transmitted to the CPU 13 between the resistors R1 and R2 (base terminal of the transistor TR1) and the forced stop signal D for forcibly stopping the output.

  When the forced stop signal D is transmitted to the CPU 13, the CPU 13 can control the transmission of the stop permission signal C transmitted to the short circuit detection circuit 12 (transistor TR3) in order to permit the stop of the relay drive signal A. It becomes a state. That is, for example, the transmission of the stop permission signal C is controlled by the CPU 13 and is transmitted / stopped at predetermined time intervals.

  When the stop permission signal C of the relay drive signal A (hereinafter, simply referred to as “stop permission signal C”) is transmitted from the CPU 13 to the short circuit detection circuit 12, the output terminal voltage Vo of the comparator CMP1. (Forced stop signal D) can be applied to the base terminal of transistor TR1 through transistor TR4. In this case, when the short circuit occurs in the relay drive output circuit 11 and the short circuit is detected by the short circuit detection circuit 12, Vo = VL, so that the low voltage VL functions as the forced stop signal D. The voltage between the resistors R1 and R2 becomes a low voltage, and the relay drive signal A is cut off (forced stop). On the other hand, in the relay drive output circuit 11, in the normal state where the short circuit is naturally resolved and the short circuit is not detected by the short circuit detection circuit 12, Vo = VH, so the forced stop signal D disappears and the resistors R1, R1 The voltage is high during R2, and the relay drive signal A is transmitted from the CPU 13.

  On the other hand, when the transmission of the stop permission signal C from the CPU 13 to the short circuit detection circuit 12 is stopped (when the stop permission signal C is not transmitted), the output terminal voltage Vo of the comparator CMP1 is the base terminal of the transistor TR1. The relay drive signal A is transmitted from the CPU 13 to the relay drive output circuit 11 regardless of whether the output terminal voltage Vo is high or low (regardless of the presence or absence of the forced stop signal D).

Hereinafter, the operation of the ECU 1 (short circuit protection circuit) of the present embodiment will be described more specifically with reference to the flowchart of FIG. 3 and the timing chart of FIG.
First, referring to FIG. 3, in order to operate vehicle-mounted electronic device 5 (see FIG. 2) in a state where transmission of relay drive signal A is stopped (transmission of stop permission signal C is also stopped) When the switch operation of the user (driver or the like) is performed, the relay drive output condition is established in the CPU 13.

  Then, in step S1, a relay drive signal A is transmitted from the CPU 13 to the relay drive output circuit 11, and the signal A is amplified to a predetermined level by the transistors TR1 and TR2 to become a drive current, and the relay 2 (relay coil 3). Is output.

Next, in step S2, a stop permission signal C is transmitted from the CPU 13 to the short circuit detection circuit 12, and the short circuit detection circuit 12 starts its operation.
Subsequently, in step S3, the short circuit detection circuit 12 determines the presence or absence of the short circuit. That is, the comparator CMP1 continuously determines the magnitude relationship between the input terminal voltage Vi and the reference voltage Vref (for example, Vref = 3 [V]). When the short-circuit state continues and the relay drive output circuit 11 is in the short-circuit state, as described above, Vi <Vref (the output terminal voltage Vo = VL of the comparator CMP1), so that the forced stop signal D is relayed. The voltage is transmitted to the drive output circuit 11, the voltage between the resistors R1 and R2 becomes low, and the relay drive signal A is cut off (forced stop). In this case (in the case of YES), the process proceeds to step S4. On the other hand, when the short circuit is naturally resolved and the relay drive output circuit 11 is in a normal state, Vi ≧ Vref (the output terminal voltage Vo = VH of the comparator CMP1), and therefore the forced stop signal D disappears. The relay drive signal A is transmitted again from the CPU 13 to the relay drive output circuit 11, and the output operation of the circuit 11 is restored. In this case (in the case of No), the process proceeds to step S5.

  In step S4, the low voltage VL is also transmitted to the CPU 13 as the forced stop signal D, and the transmission of the stop permission signal C is controlled by the CPU 13 with the reception of the forced stop signal D as a trigger. When the transmission of the stop permission signal C is temporarily stopped, as described above, the output terminal voltage Vo of the comparator CMP1 is not applied between the resistors R1 and R2, and the short circuit state continues. However, the relay drive signal A is transmitted from the CPU 13 to the relay drive output circuit 11, and the operation of the circuit 11 is temporarily restored.

  That is, when the forced stop signal D is transmitted to the CPU 13, the trigger is used as a trigger to stop the transmission of the stop permission signal C to the short circuit detection circuit 12 temporarily (instantly) at a predetermined time interval. As a result, the operation of the relay drive output circuit 11 is temporarily restored, so that the return operation of the circuit 11 is performed. That is, in the short-circuit detection circuit 12, a return signal (a return signal Re1 to be described later) for temporarily returning the operation from the CPU 13 to the relay drive output circuit 11 by temporarily stopping the transmission of the stop permission signal C from the CPU 13. ~ Ren) is transmitted, and the same circuit 12 transmits the return signal to the relay drive output circuit 11. In addition, when the return signal is transmitted to the relay drive output circuit 11, a current flows from the DC power supply (+ B) to the relay drive output circuit 11 (see FIG. 2), and a short circuit occurs on the output side of the relay drive output circuit 11. It is also determined whether or not it has occurred.

  Therefore, in the relay drive output circuit 11, when the return operation is performed when the short-circuit state continues, the transistor TR2 of the circuit 11 has an excessive short-circuit current I0 from the DC power source (+ B) toward the short-circuit point. (See FIG. 1) flows and the transistor TR2 generates heat. By repeating this return operation, heat is accumulated in the transistor TR2 due to the short-circuit current I0, and the circuit 11 is damaged. In the present embodiment, as shown in FIG. 4, as in the background art, the return signal is transmitted to the relay drive output circuit 11 six times or more, so that the circuit 11 is damaged due to heat accumulation due to the short-circuit current I0. Assumes that

Here, with reference to the timing chart of FIG. 4, a characteristic operation in the ECU 1 of the present embodiment will be described in detail.
That is, when the relay drive output circuit 11 changes from a normal state to a short circuit state, the forced stop signal D is transmitted from the comparator CMP1 to the resistors R1 and R2 (relay drive output circuit 11) and the CPU 13 via the transistor TR4. .

  Then, the relay drive signal A is stopped by the CPU 13, the output of the drive current to the relay 2 is stopped, and the transmission of the stop permission signal C to the short-circuit detection circuit 12 is controlled by the CPU 13, and the time when the short-circuit occurs. Starting from time T1 after a predetermined time lapse ΔTc1 from T0 (time when the forced stop signal D is received by the CPU 13), from the short circuit detection circuit 12 at a certain time interval ΔTn (n is a natural number), T1 to Tn The return signals Re1 to Ren (n is a natural number) are transmitted to the relay drive output circuit 11 at the timing (the CPU 13 temporarily stops the transmission of the stop permission signal C at the timings T1 to Tn). It becomes like). Here, the time between the time when the short circuit is canceled and the time when the output operation of the relay drive output circuit 11 is restored with respect to the time when the short circuit has occurred (the time [min] of the short circuit state). The time intervals ΔT1 to ΔTn (ΔTk = Tk + 1−Tk) at which the return signals Re1 to Ren are transmitted so that the time ratio of the required time [min] from the cancellation of the short circuit to the output recovery is 10% (predetermined value) or less. , ΔTk + 1−ΔTk> 0; k is a natural number, 1 ≦ k ≦ n) is set so as to gradually increase as time elapses. Here, for example, ΔTk + 1 = a · ΔTk (a is a constant and a> 1) can be set so that the time ratio is 10% or less. Note that ΔTc1, ΔT1, and the constant a can be appropriately determined according to the expected short-circuit time.

  Then, as shown in FIG. 4, after the short circuit is naturally resolved and the relay drive output circuit 11 returns from the short circuit state to the normal state, the return signal Re4 is output from the short circuit detection circuit 12 at the timing of the fourth T4 from T1. It is transmitted to the relay drive output circuit 11, and the output operation of the circuit 11 is restored at the time (T4). Here, the frequency of the return operation of the relay drive output circuit 11 is less than four times and less than six times, the circuit 11 is not damaged, and the short circuit state time [min] is from the short circuit cancellation to the output recovery. The time ratio of the required time [min] is 10% or less and is short, and satisfactory results are obtained.

  Returning to FIG. 3, in step S <b> 5 thereafter, the relay drive signal A and the stop permission signal C are transmitted from the CPU 13, and the relay 2 is driven by the relay drive output circuit 11. When the switch operation of the user of the vehicle is performed to stop the operation of (see), the relay drive stop condition is satisfied in the CPU 13. In this step S5, when the relay drive stop condition is not satisfied, the process returns to step S3, and the determination of the presence or absence of the short circuit is continued by the short circuit detection circuit 12 while the relay 2 is driven by the relay drive output circuit 11. Is done. On the other hand, if the relay drive stop condition is satisfied in step S5, the transmission of the relay drive signal A is stopped by the CPU 13 in step S6, and further, the stop permission signal C of the relay drive signal A is transmitted in step S7. It stops and a series of operation | movement of ECU1 is complete | finished.

According to the ECU 1 (short circuit protection circuit) of the present embodiment, the following operations and effects can be obtained.
(1) The time intervals ΔT1 to ΔTn (n is a natural number) of the return signals Re1 to Ren (n is a natural number) transmitted to the relay drive output circuit 11 after a predetermined time ΔTc1 has elapsed since the occurrence of the short circuit. The time ratio of the required time [min] from the short-circuit elimination to the output restoration with respect to the short-circuit state time [min] is gradually increased as time passes. Thereby, at the beginning of the occurrence of the short circuit, the transmission frequency of the return signals Re1 to Ren increases, and the relay drive output circuit 11 can be returned from the output stop state to the output operation state in a short time. The transmission frequency of Re1 to Ren gradually decreases. For this reason, the amount of heat accumulated in the relay drive output circuit 11 by the short-circuit current I0 is also suppressed, and damage to the circuit 11 can be effectively prevented.

  (2) With a simple hardware configuration composed of the relay drive output circuit 11 and the short circuit detection circuit 12, it is possible to detect the short circuit of the relay drive output circuit 11 and to detect the short circuit state without relying on software stored in the memory of the CPU 13 or the like. Is quickly, reliably and automatically returned to the output operation state. Thereby, the convenience of the user (driver | operator etc.) of a vehicle is improved.

[Second Embodiment]
As shown in FIG. 5, in this embodiment, an ECU (controller) 1 a that functions as a short circuit protection circuit is provided in an in-vehicle electronic device mounted on a vehicle, and a drive current is supplied to the relay 2 based on an input control signal. A pair of relay drive output circuit 11a and relay drive output circuit 11b, and a pair of short circuit detection circuit 12a and short circuit detection for detecting the presence or absence of a short circuit S (short circuit current I0) occurring on the output side of each circuit 11a, 11b A circuit 12b and a CPU (microcomputer) 113 as control means connected to the circuits 11a, 12a, 11b, and 12b to control the relay drive output circuits 11a and 11b and the short circuit detection circuits 12a and 12b are provided. ing. That is, the ECU 1a according to this embodiment includes two sets (a plurality of sets) of the relay drive output circuits 11a and 11b and the short circuit detection circuits 12b and 12b.

  Hereinafter, in the ECU 1a of the present embodiment, the configurations and basic operations of the circuits 11a, 12a, 11b, and 12b are the same as those of the relay drive output circuit 11 and the short circuit detection circuit 12 of the first embodiment. The corresponding electric elements such as transistors and resistors are denoted by the same or corresponding reference numerals, and the description thereof is omitted.

With reference to the timing chart of FIG. 6, the characteristic operation in the ECU 1a of the present embodiment will be described in detail.
That is, when the relay drive output circuits 11a and 11b are short-circuited from the normal state, the forced stop signal D is sent from the comparators CMP1a and CMP1b provided in the short-circuit detection circuits 12a and 12b to the transistors TR4a and TR4b, respectively. It is transmitted between the resistors R1 and R2 (relay drive output circuits 11a and 11b) and the CPU 113.

  Then, each relay drive signal A is stopped by the CPU 113, the output of the drive current to the relay 2 is stopped, and the transmission of the stop permission signal C to the short circuit detection circuits 12a and 12b is controlled by the CPU 113, and the short circuit is prevented. Starting from the time Ta1 after a predetermined time lapse ΔTc2 from the time T0 that has occurred (the time at which the forced stop signal D is received by the CPU 113), Ta1 to Tan, at a constant time interval ΔTab from each short-circuit detection circuit 12a, 12b. Return signals Ra1 to Ran and Rb1 to Rbn (n is a natural number) are alternately transmitted to the relay drive output circuits 11a and 11b at the timings Tb1 to Tbn (the CPU 113 transmits the stop permission signal C). Temporary stop is performed at the timing of Ta1 to Tan and Tb1 to Tbn). Here, the CPU 113 controls the time interval ΔTab at which the return signals Ra1 to Ran and Rb1 to Rbn are alternately transmitted to be constant regardless of the passage of time. That is, the return signals Ra1 to Ran and Rb1 to Rbn are set so that ΔTab = ΔTa / 2 = ΔTb / 2 when compared with the time intervals ΔTa and ΔTb when each of the return signals Ra1 to Ran and Rb1 to Rbn is independently transmitted from the CPU 113 .

  Then, as shown in FIG. 6, after the short circuit is naturally eliminated and the relay drive output circuits 11a and 11b are restored from the short circuit state to the normal state, the return signal Ra2 is detected at the timing of the second Ta2 from Ta1. 12a is transmitted to the relay drive output circuit 11a, and the output operation of the circuit 11a is restored at the time (Ta2). Here, the frequency of the return operation of the relay drive output circuit 11a is less than two times and less than six times, the circuit 11a is not damaged, and from the short-circuit elimination to the output return for the short-circuit time [min]. The time ratio of the required time [min] is 10% or less and is short, and satisfactory results are obtained.

  The output operation of the relay drive output circuit 11b also returns at the time (Tb2) when the return signal Rb2 is transmitted to the circuit 11b at the timing of the second Tb2 from Tb1, and the return operation of the circuit 11b The frequency is less than 2 and 6 times, and the circuit 11b is not damaged, and the short-circuit state has already been recovered as described above, which is a satisfactory result. In this embodiment, as shown in FIG. 6, as in the first embodiment, each of the circuits 11a and 11b is short-circuited by transmitting a return signal to the relay drive output circuit 11a or 11b at least six times. It is assumed that damage is caused by heat accumulation due to the current I0.

According to the ECU 1a (short circuit protection circuit) of the present embodiment, the following operations and effects can be obtained.
(1) Relay drive output circuit in which return signals Ra1 to Ran from one set of short circuit detection circuits 12a and return signals Rb1 to Rbn (n is a natural number) from another set of short circuit detection circuits 12b alternately correspond Sent to. Thereby, compared with the case where only the set of the single relay drive output circuit 11 and the short circuit detection circuit 12 is provided like 1st Embodiment, return signal Ra1- to relay drive output circuit 11a, 11b is provided. The transmission frequency of Ran, Rb1 to Rbn (n is a natural number), in other words, the transmission frequency of the return signals Ra1 to Ran and Rb1 to Rbn viewed from the relay coil 3 increases as a whole. For this reason, the relay drive output circuit 11a (or 11b) can be returned from the output stop state to the output operation state in a short time after the short-circuit state is naturally resolved, and transmitted to the relay drive output circuits 11a and 11b. The frequency of transmission of the return signals Ra1 to Ran and Rb1 to Rbn (the frequency of the return operation) is less than half of that, so the amount of heat accumulated in the relay drive output circuits 11a and 11b by the short circuit current I0 is also suppressed, and each relay Damage to the drive output circuits 11a and 11b can be effectively prevented.

  (2) Based on software stored in the memory or the like of the CPU 113 with a simple hardware configuration including two sets of the relay drive output circuit 11a and the short circuit detection circuit 12a, and the relay drive output circuit 11b and the short circuit detection circuit 12b. Therefore, the detection of the short circuit of the relay drive output circuits 11a and 11b and the return from the short circuit state to the output operation state are performed quickly, reliably and automatically. Thereby, the convenience of the user (driver | operator etc.) of a vehicle is improved.

The above embodiment may be modified as follows.
In the second embodiment, the time interval ΔTab at which the return signals Ra1 to Ran and Rb1 to Rbn are alternately transmitted is set to be constant regardless of the passage of time. However, the technical idea of the present invention is not limited to this. For example, as in the first embodiment, the time interval ΔTab is set to the time [min] at which the short circuit is eliminated and the relay driving with respect to the time when the short circuit has occurred. The time ratio between the times [min] at which the output operation of the output circuit 11a (or 11b) is restored may be gradually increased with the passage of time so as to be a predetermined value or less (for example, 10% or less). .

  According to this, the return signals Ra1 to Ran from one set of short circuit detection circuits 12a and the return signals Rb1 to Rbn (n is a natural number) from the other set of short circuit detection circuits 12b alternately correspond to each other. It is transmitted to the output circuit. Thereby, compared with the case where only the set of the single relay drive output circuit 11 and the short circuit detection circuit 12 is provided like 1st Embodiment, return signal Ra1- to relay drive output circuit 11a, 11b is provided. The transmission frequency of Ran, Rb1 to Rbn (n is a natural number), in other words, the transmission frequency of the return signals Ra1 to Ran and Rb1 to Rbn viewed from the relay coil 3 increases as a whole. For this reason, the relay drive output circuit 11a (or 11b) can be returned from the output stop state to the output operation state in a short time after the short-circuit state is naturally resolved, and transmitted to the relay drive output circuits 11a and 11b. The frequency of transmission of the return signals Ra1 to Ran and Rb1 to Rbn (the frequency of the return operation) is less than half of that, so the amount of heat accumulated in the relay drive output circuits 11a and 11b by the short circuit current I0 is also suppressed, and each relay Damage to the drive output circuits 11a and 11b can be effectively prevented. In addition, in each set, the time intervals ΔTab of the return signals Ra1 to Ran and Rb1 to Rbn transmitted to the relay drive output circuits 11a and 11b at a certain time interval after the elapse of a predetermined time from the occurrence of the short circuit have elapsed. It is gradually increased according to. For this reason, since the frequency of transmission of the return signals Ra1 to Ran and Rb1 to Rbn increases at the beginning of the occurrence of the short circuit, the relay drive output circuits 11a and 11b can be moved from the output stop state in a shorter time after the short circuit state has been naturally resolved. In addition to being able to return to the output operation state, the transmission frequency of the return signals Ra1 to Ran and Rb1 to Rbn gradually decreases with the passage of time, so that the amount of heat accumulated in the relay drive output circuits 11a and 11b by the short circuit current I0 is also increased. It is suppressed more effectively.

  In the second embodiment, the transmission timing of the return signals Ra1 to Ran and Rb1 to Rbn is set to 1: 1. However, the transmission timing is not limited to this, and the transmission timing is, for example, 1: 2 or 1: 3. It is good also as a ratio.

In the second embodiment, two sets of the relay drive output circuits 11a and 11b and the short circuit detection circuits 12a and 12b are used. However, the present invention is not limited to this, and the set may be three or more sets.
In the second embodiment, the pair of short circuit detection circuits 12a and 12b is used. However, the circuit portion (transistor TR3 and transistor TR4 that directly transmits the return signals Ra1 to Ran and Rb1 to Rbn to the relay drive output circuits 11a and 11b. As long as each of them is configured individually, the circuit portion (comparator CMP1) that directly detects the short-circuit state can be shared.

Further, technical ideas that can be grasped from the above-described embodiments and modifications will be described below.
○ In the short-circuit protection circuit, the time ratio is set to 10% or less. According to the same configuration, after the short-circuit state is naturally resolved, the relay drive output circuit is set between the time when the short-circuit is eliminated and the time when the output operation of the relay drive output circuit is restored with respect to the time when the short-circuit has occurred. The output operation state can be restored in a short time when the time ratio is 10% or less.

  ○ In the short circuit protection circuit, two sets of the relay drive output circuit and the short circuit detection circuit are provided. According to this configuration, a simple configuration including only two sets of the relay drive output circuit and the short circuit detection circuit can be performed in a short time without damaging the circuit after the short circuit generated in the relay drive output circuit is resolved. The output operation state can be restored.

  DESCRIPTION OF SYMBOLS 1 ... ECU (short circuit protection circuit), 11 ... Relay drive output circuit, 12 ... Short circuit detection circuit, 13 ... CPU (microcomputer), 2 ... Relay, 3 ... Relay coil, 5 ... In-vehicle electronic device, CMP1 ... Comparator, Vref ... reference voltage.

Claims (1)

A relay drive output circuit that outputs a drive current to the load based on the input control signal, and detects the presence or absence of a short circuit that occurs on the output side of the circuit, and when the short circuit occurs, the relay drive output circuit A short-circuit protection circuit comprising: a short-circuit detection circuit that stops an output operation, and transmits a return signal to the relay drive output circuit at a certain time interval after a predetermined time has elapsed since the occurrence of the short-circuit, thereby returning the output operation. In
A plurality of sets comprising the relay drive output circuit and the short circuit detection circuit are provided,
A short circuit protection circuit, wherein a return signal from one set of short circuit detection circuits and a return signal from another set of short circuit detection circuits are alternately output to corresponding relay drive output circuits.