JP5418910B2 - DC-DC converter - Google Patents

Description

  The present invention is used, for example, in a DC power supply circuit incorporated in the power conditioner in a distributed power supply system such as a solar power generation system in which a solar cell that is a DC generation source is connected to a commercial system by a power conditioner. The present invention relates to a DC-DC converter that converts a DC power supply voltage into a different DC voltage by stepping up or down.

  For example, FIG. 14 shows an example of a DC-DC converter used in a DC power supply circuit of a power conditioner in a distributed power supply system. This is a high-efficiency DC-DC converter previously proposed by the present applicant in order to reduce switching loss and facilitate zero current switching (ZCS) (see Patent Document 1). (See FIG. 6).

This DC-DC converter includes two pairs of switching elements Q ₁ , Q ₂ and Q ₃ , Q ₄ and two pairs of switching elements Q ₅ , Q ₆ and Q ₇ , Q ₈ connected in a full bridge configuration. The conversion circuit units 110 and 120 are connected in parallel to the DC power source E, and series capacitors C ₁ and C ₂ are inserted and connected between the conversion circuit units 110 and 120 and the output transformers T ₁ and T ₂ . A rectifier circuit comprising two pairs of diodes D ₁ , D ₂ and D ₃ , D ₄ and two pairs of diodes D ₅ , D ₆ and D ₇ , D _{8 is connected} to the secondary output of the output transformers T ₁ and T _2. The parts 210 and 220 are connected to each other, and the smoothing reactor L and the smoothing capacitor C are provided at the output stage of the rectifier circuit parts 210 and 220.

In this DC-DC converter, switching elements Q ₁ , Q ₄ and Q ₂ , Q ₃ and switching elements Q ₅ , Q ₈ and Q ₆ , Q ₇ of the conversion circuit units 110 and 120 are alternately turned on and off to output an AC waveform. Get. Smoothing inductor L with the AC waveform output of the conversion circuit 110, 120 and modified by the output transformer T _1, T _2, is rectified by the rectifier circuit 210 and 220 of the secondary side output of the output transformer T _1, T ₂ Then, smoothing with the smoothing capacitor C generates a desired DC voltage.

In each of the conversion circuit units 110 and 120, a pair of switching elements Q ₁ , Q ₂ and Q ₃ , Q ₄ and a pair of switching elements Q ₅ , Q ₆ and Q ₇ , Q ₈ out of the two pairs. The switching phases of the pair of switching elements Q ₃ and Q ₄ and the pair of switching elements Q ₇ and Q ₈ are shifted from each other by 1/6 period with respect to ₁ and Q ₂ and the pair of switching elements Q ₅ and Q ₆ . The switching elements Q ₁ and Q ₅ , Q ₂ and Q ₆ , Q ₃ and Q ₇ , Q ₄ and Q ₈ corresponding to each other between the sections 110 and 120 are shifted by a quarter period.

In this way, the series capacitors C ₁ and C ₂ are inserted and connected between the conversion circuit units 110 and 120 and the output transformers T ₁ and T ₂ , and two pairs of switching elements Q are connected in each conversion circuit unit 110 and 120. ₁ , Q ₂ and Q ₃ , Q ₄ and two pairs of switching elements Q ₅ , Q ₆ and Q ₇ , Q ₈ out of the pair of switching elements Q ₁ , Q ₂ and the pair of switching elements Q ₅ , Q ₆ On the other hand, the switching phases of the pair of switching elements Q ₃ and Q ₄ and the pair of switching elements Q ₇ and Q ₈ are shifted by 1/6 period, and the corresponding switching elements Q ₁ and Q ₅ between the conversion circuit units 110 and 120 are also shifted. , Q ₂ and Q ₆ , Q ₃ and Q ₇ , and Q ₄ and Q ₈ are shifted by ¼ period to add a droop (gradient) to the flat part of the output voltage of the conversion circuit units 110 and 120, High voltage wave at the rising edge With reliably perform commutation operation to increase the voltage difference before and after the commutation timing, because the current of the switching element _{Q 1 ~Q 4, Q 5 ~Q} 8 is controlled by the commutation Since no voltage is applied while the switching current flows, no switching loss occurs.

By the above means, switching efficiency of switching elements Q _{1 to} Q ₄ , Q _{5 to} Q ₈ is reduced, and high efficiency conversion is performed by zero current switching (ZCS) that turns on and off when the switching current is zero. Is realized.

Japanese Patent No. 3463807

By the way, when the DC power source E such as a solar battery is connected to the input side of the DC-DC converter, the load voltage V _L changes as it is due to the fluctuation of the input voltage by the solar battery, and the load voltage V _L is stabilized. Therefore, it is necessary to control the load voltage V _L.

The load voltage V _L is controlled by changing the ON / OFF time ratio of the switching elements Q _{1 to} Q ₄ and Q _{5 to} Q ₈ (pulse width control), or switching elements Q ₁ , Q ₂ and Q ₃ , It is applied to the output transformers T ₁ and T ₂ by shifting the on / off timing (switching phase) of Q _{4 and} the on / off timing (switching phase) of the switching elements Q ₅ and Q ₆ and Q ₇ and Q ₈ (phase shift control). This can be realized by varying the pulse widths of the output voltages V _T1 and V _T2 of the conversion circuit units 110 and 120.

However, in the conventional DC-DC converter disclosed in Patent Document 1, the pulse widths of the output voltages V _T1 and V _T2 of the conversion circuit units 11 and 12 are controlled by pulse width control or phase shift control in order to lower the load voltage V _L. Is narrowed, a period in which the output voltages V _T1 and V _{T2 of the} conversion circuit units 110 and 120 both become zero appears, and the ripple (variation) of the output voltage V _A of the rectifier circuit units 210 and 220 appears. And the ripple (variation) of the output current I _A of the rectifier circuit sections 210 and 220 also increases. As described above, when a period in which the output voltages V _T1 and V _T2 of the conversion circuit units 110 and 120 both become zero appears, the overvoltage due to the fluctuation of the output current I _A of the rectifier circuit units 210 and 220 becomes the smoothing reactor L. Occurs at both ends.

When such an overvoltage occurs, the overvoltage is added to the load voltage V _L and applied to the rectifier circuit units 210 and 220. If it exceeds the breakdown voltage of the diode _{D 1 ~D 4, D 5 ~D} 8 of the overvoltage rectifier circuit 210 and 220, since the diode _{D 1 ~D 4, D 5 ~D} 8 is to destroy the diode D _{1 to} D ₄ and D _{5 to} D ₈ must be selected to have a high breakdown voltage, or an overvoltage absorption / suppression circuit such as a snubber circuit must be provided.

  However, high withstand voltage diodes have high loss of on-voltage when conducting, and loss also occurs in snubber circuits composed of capacitors and resistors. It was the current situation. Further, the overvoltage generated in a surge state causes noise and causes malfunction of peripheral devices.

Furthermore, as described above, when pulse width control or phase shift control is performed for controlling the load voltage V _L , it is difficult to realize zero current switching of the switching elements Q _{1 to} Q ₄ and Q _{5 to} Q _8. It becomes. Further, a circulating current that does not contribute to power supply to the load is generated between the primary side circuit and the secondary side circuit of the output transformers T ₁ and T ₂ , and the generation of the circulating current causes power conversion of the DC-DC converter. Efficiency is significantly reduced.

Here, the circulating current, the output transformer T _1, T ₂ of the residual energy conversion leakage inductance circuit unit 110 and 120, an output transformer T _1, T _2, output through the rectifying circuit 210 and 220 transformer T _1, T ₂ circulates between the primary circuit (conversion circuit units 110 and 120) and the secondary circuit (rectifier circuit units 210 and 220).

  Therefore, the present invention is an improvement of the DC-DC converter disclosed in the patent document previously proposed by the present applicant. The object of the present invention is to suppress the occurrence of overvoltage and the circulating current. Another object of the present invention is to provide a DC-DC converter capable of controlling a load voltage without reducing power conversion efficiency.

  As technical means for achieving the above-described object, the present invention provides n groups of conversion circuit units for converting the power supply voltage of the DC power supply to AC using a pair of switching elements, and the n groups In a DC-DC converter in which a rectifier circuit unit is provided on the output side of each converter circuit unit via a series capacitor and an output transformer, and each of these n groups of rectifier circuit units is connected in parallel, a voltage clamp is provided at the output stage of the rectifier circuit unit. The voltage clamp circuit unit includes a clamping transformer connected to the rectifier circuit unit, and connects the first series circuit including the first diode and the first capacitor to the rectifier circuit unit. A second series circuit consisting of a first diode and a second capacitor is connected between the connection point of the first diode and the first capacitor and the clamping transformer, and a third diode is connected. The features were connection configuration and the possible between the second diode and a second connection point between the rectifying circuit portion of the capacitor.

  In the present invention, a clamping transformer, a first series circuit composed of a first diode and a first capacitor, a second series circuit composed of a second diode and a second capacitor, a third diode, Is provided at the output stage of the rectifier circuit unit, so that the voltage clamp circuit unit can be converted into a converter circuit unit, an output transformer even if pulse width control or phase shift control is performed during load voltage control. The circulating current that circulates between the primary circuit (conversion circuit unit) of the output transformer and the secondary circuit (rectifier circuit unit) through the rectifier circuit unit and the primary circuit (conversion circuit unit) of the output transformer Separated into the secondary circuit (rectifier circuit section), the circulating current is attenuated rapidly.

  As a result, the circulating current abruptly attenuates in the primary circuit (conversion circuit unit) of the output transformer, and the circulating current flows back only in the secondary circuit (voltage clamp circuit unit) of the output transformer. As a result, the circulating current can be suppressed, and the occurrence of overvoltage can also be suppressed by circulating the circulating current in the voltage clamp circuit section, so that the load voltage can be controlled without reducing the power conversion efficiency. Become.

The following circuit configuration can be applied as the conversion circuit unit in the present invention.
A circuit configuration in which two pairs of switching elements are connected in a full bridge configuration, and the series capacitor is connected to the primary side of the output transformer.
A circuit configuration in which two pairs of switching elements are connected in a full bridge configuration, and the series capacitor is connected to the secondary side of the output transformer.
A circuit configuration in which, of the two pairs of switching elements, the pair of switching elements is replaced with a capacitor to form a half bridge configuration, and the series capacitor is connected to the primary side of the output transformer.
A circuit configuration in which a pair of switching elements is replaced with a capacitor to form a half bridge configuration, and the series capacitor is connected to the secondary side of the output transformer.
-A circuit configuration composed of push-pull inverters, in which the series capacitor is connected to the secondary side of the output transformer.

  According to the present invention, a clamping transformer, a first series circuit composed of a first diode and a first capacitor, a second series circuit composed of a second diode and a second capacitor, By providing a voltage clamp circuit unit composed of a diode at the output stage of the rectifier circuit unit, circulating current can be suppressed. In addition, since the circulating current recirculates in the voltage clamp circuit unit, it is possible to suppress the occurrence of overvoltage, so that the load voltage can be controlled without reducing the power conversion efficiency. In this way, it is possible to provide a highly efficient DC-DC converter that can control the load voltage by suppressing the circulating current.

In the DC-DC converter in the embodiment of the present invention, it is a circuit diagram when the clamping transformer of the voltage clamp circuit unit is provided on the positive electrode side of the rectifier circuit unit. It is a timing chart which shows the gate signal of each switching element at the time of 1/6 period phase shift (dead time is omitted at the time of maximum load voltage). It is a waveform diagram of the output voltage of the rectifier circuit unit, the output voltage of the conversion circuit unit, the drain-source voltage and the drain current of each switching element (see FIG. 2 for the gate signal at the maximum load voltage). 4 is a table showing the on / off state of each switching element in one cycle of the output voltage waveform of the conversion circuit section of FIG. 3 (see FIG. 2 for the gate signal at the maximum load voltage). 6 is a timing chart showing the gate signal of each switching element at the time of 1/3 period phase shift (dead time is omitted when controlling the load voltage). It is a wave form diagram which shows the voltage and electric current in each part of the voltage clamp circuit part in the DC-DC converter of this invention (at the time of 1/3 period phase shift at the time of control of load voltage). (A) is a waveform diagram showing the gate signal in the conventional and DC-DC converter of the present invention (when controlling the load voltage), and (B) shows the output voltage and output current of the conversion circuit section in the conventional DC-DC converter. Waveform diagrams (when controlling the load voltage) and (C) are waveform diagrams showing the output voltage and output current of the conversion circuit section in the DC-DC converter of the present invention (when controlling the load voltage). 6 is a timing chart showing the gate signal of each switching element during a half-cycle phase shift (dead time is omitted when controlling the load voltage). FIG. 6 is a circuit diagram in a case where a clamping transformer of a voltage clamp circuit unit is provided on the negative electrode side of a rectifier circuit unit in another embodiment of the present invention. It is a circuit diagram which shows the structure which made the conversion circuit part into full bridge | bridging structure and inserted the series capacitor | condenser in the output transformer secondary side in other embodiment of this invention. It is a circuit diagram which shows the structure which made the conversion circuit part into a half bridge structure, and inserted the series capacitor | condenser in the output transformer primary side in other embodiment of this invention. In other embodiment of this invention, it is a circuit diagram which shows the structure which made the conversion circuit part into a half bridge structure and inserted the series capacitor in the output transformer secondary side. It is a circuit diagram which shows the structure which uses the push pull inverter for the conversion circuit part in other embodiment of this invention. It is a circuit diagram which shows the conventional DC-DC converter.

  Embodiments of the DC-DC converter according to the present invention will be described in detail below.

The DC-DC converter of the embodiment shown in FIG. 1 includes two pairs of switching elements Q ₁ , Q ₂ and Q ₃ , Q ₄ and two pairs of switching elements Q ₅ , Q ₆ and Q ₇ , Q ₈ (for example, MOS -FET, bipolar transistor, or IGBT) connected in a full bridge configuration, for example, two groups of conversion circuit units 11 and 12, and two output transformers T ₁ connected to the output side of the conversion circuit units 11 and 12 , T ₂ and the secondary outputs of its output transformers T ₁ , T ₂ , two pairs of diodes D ₁ , D ₂ and D ₃ , D ₄ and two pairs of diodes D ₅ , D ₆ and D ₇ , D ₈ and two voltage rectifier circuit units 21 and 22 and a voltage clamp circuit unit 30 provided at the output stage of the rectifier circuit units 21 and 22. A smoothing capacitor C is provided at the output stage of the voltage clamp circuit unit 30. In this DC-DC converter, the two groups of conversion circuit units 11 and 12 are connected in parallel to the DC power source E.

FIG. 2 is a timing chart of gate signals for turning on / off the switching elements Q _{1 to} Q ₈ of the DC-DC converter at the maximum load voltage of this embodiment, and FIG. 3 shows output voltages V ₁ , V ₂ , output voltages V _T1 and V _{T2 of} the conversion circuit units 11 and 12 applied to the primary side of the output transformers T ₁ and T ₂ , drain-source voltages V _ds and drains of the switching elements Q _{1 to} Q ₈ it is a waveform diagram of the current I _d.

In this DC-DC converter, as shown in the timing chart of FIG. 2, switching elements Q ₁ , Q ₄ and Q ₂ , Q ₃ and switching elements Q ₅ , Q ₈ and Q ₆ , Q ₇ of the conversion circuit units 11 and 12 are used. Are alternately turned on and off to obtain an AC waveform output. By this AC waveform output of the conversion circuit 11, 12 is modified by the output transformer T _1, T _2, is rectified by the rectifier circuit 21, 22 of the secondary side output of the output transformer T _1, T _2, desired DC voltage is generated.

In the two groups of conversion circuit units 11 and 12, as shown in the timing chart of FIG. 2, one conversion circuit unit 11 includes a pair of switching elements Q ₁ , Q ₂ and Q ₃ , Q _4. The switching phase of a pair of switching elements Q ₃ and Q ₄ (switching element Q ₃ is an inversion of switching element Q ₄ ) is set to 1 / 3n with respect to Q ₁ and Q ₂ (switching element Q ₂ is an inversion of switching element Q ₁ ). Delay the cycle, for example, 1/6 cycle. Further, the switching elements Q _1, Q _5, Q ₂ and Q _6, Q ₃ and Q _7, Q ₄ and Q ₈ corresponding between converting circuit section 11 and 12, the switching element Q ₅ of the other converter section 12 ˜Q ₈ (switching elements Q ₆ , Q ₈ are the inversion of switching elements Q ₅ , Q ₇ ) are delayed by ½n period, for example, ¼ period, with respect to switching elements Q ₁ -Q ₄ . Furthermore, among the other converter unit 12 in two pairs of switching elements Q _5, Q ₆ and Q _7, Q _8, a pair of switching elements Q _5, Q ₆ (the switching element Q ₆ is inverted switching element Q ₅₎ In contrast, the switching phase of the pair of switching elements Q ₇ and Q ₈ (switching element Q ₇ is an inversion of switching element Q ₈ ) is delayed by 1/6 period.

The switching elements Q _{1 to} Q ₄ and Q _{5 to} Q ₈ of the conversion circuit units 11 and 12 perform switching operation with the drain-source voltage V _ds and the drain current I _d as shown in FIG. 3 (table of FIG. 4). reference). Here, the table of FIG. 4 shows changes and transitions of the current values of the switching elements Q _{1 to} Q ₄ and Q _{5 to} Q ₈ . Since constant power is supplied to the load, that is, constant current is supplied under a constant voltage output, the total output current from the switching elements Q _{1 to} Q ₄ and Q _{5 to} Q ₈ is the current value at any timing. 1 pu. That is, if the output current from the switching elements Q _{1 to} Q _{4 of one} conversion circuit unit 11 changes from 0 to ₁ pu at any timing, the switching elements Q _{5 to} Q _{8 of the} other conversion circuit unit 12 are changed. The output current from 1 changes from 1 to 0 pu. If the output current from the switching elements Q _{1 to} Q _{4 of one} conversion circuit unit 11 is ₁ pu at another timing, the output current from the switching elements Q _{5 to} Q _{8 of} the other conversion circuit unit 12 is 0 pu. It is.

The intervals t _{1 to} t ₈ are 0 <t ₁ ≦ 1/4 · T, 0 ≦ t ₂ <1/4 · T, 0 <t ₃ ≦ 1/4 · T, 0 ≦ t ₄ <1 / 4 · T, 0 <t ₅ ≦ 1/4 · T, 0 ≦ t ₆ <1/4 · T, 0 <t ₇ ≦ 1/4 · T, 0 ≦ t ₈ <1/4 · T It can be changed freely within the range. These eight conditions are or conditions, but it is necessary to satisfy t ₁ + t ₂ + t ₃ + t ₄ + t ₅ + t ₆ + t ₇ + t ₈ = T. The sections t ₁ , t ₃ , t ₅ , and t _{7 in which the} current increases and decreases vary depending on the circuit constants, and thus are actually limited to a range in which no switching loss occurs.

By the switching operation of each of the switching elements Q _{1 to} Q ₄ and Q _{5 to} Q ₈ , the output transformers T ₁ and T T are output to the output voltages V _T1 and V _T2 (second from the top in FIG. 3) of the conversion circuit units 11 and 12. _A value obtained by multiplying the transformation ratio of ₂ and taking the absolute value thereof, that is, the waveform of the output voltages V _T1 and V _T2 folded at the zero point (the uppermost stage in FIG. 3) is the output transformer T ₁ , T ₂ . Output voltages V ₁ and V ₂ obtained as a result of rectifying the secondary voltage by the rectifier circuit units 21 and 22 are obtained. The load voltage V _L is generated by tracing the output voltages V ₁ and V ₂ of the rectifier circuit units 21 and 22 at the highest voltage value by commutation. This commutation is performed at the timing indicated by the arrows in FIG. 3, and switching elements Q ₁ and Q ₄ → switching elements Q ₅ and Q ₈ → switching elements Q ₂ and Q ₃ → switching elements Q ₆ and Q ₇ → switching element Q ₁ and Q ₄ are repeated in this order.

In the conversion circuit units 11 and 12, the switching elements Q ₃ and Q ₄ are turned on and off at a timing delayed by 1/6 period with respect to the switching elements Q ₁ and Q ₂ , and the switching elements Q ₅ and Q ₆ are switched on and off. Q _1, turns on and off at a timing which is delayed by 1/4 period with respect to Q _2, further turning on and off the switching element Q _7, Q ₈ at a timing which is delayed 1/6 period with respect to the switching element Q _5, Q _6.

In this embodiment, series capacitors C ₁ and C ₂ are inserted and connected between the output sides of the conversion circuit units 11 and 12 and the primary sides of the output transformers T ₁ and T ₂ . As a result, a droop (slope) is applied to the flat portions of the output voltages V _T1 and V _T2 of the conversion circuit units 11 and 12 to form a high voltage waveform at the rising portion, thereby increasing the voltage difference before and after the commutation timing. To ensure commutation. Further, by shifting the on / off timings of the switching elements Q _{1 to} Q ₄ and Q _{5 to} Q ₈ as described above, the output voltages V ₁ and V ₂ of the rectifier circuit units 21 and 22 as described above due to the voltage difference. commutation current of the switching element Q ₁ to Q ₈ is controlled to occur. Therefore, since there is no state where the drain-source voltage V _ds is applied at the same time as the drain current I _d flows, switching loss does not occur and ideal zero current switching (ZCS) is realized. doing.

The commutation timing is determined by the switching elements Q ₃ , Q ₄ , Q ₇ , and Q ₈ that are triggers for commutation. These switching elements Q ₃ , Q ₄ , Q ₇ , Q _8, rather than reaching the peak current instantaneously after commutation to the drain current I _d is the output transformer T _1, T ₂ of the leakage inductance turns on the gate signal G is applied, the rise of the current Therefore, turn-on switching loss does not occur.

This DC-DC converter is generated in the load voltage control in addition to the conventional DC-DC converter component circuit (see FIG. 14), and does not contribute to the power supply to the load in the output transformers T ₁ and T ₂ . A voltage clamp circuit unit 30 for suppressing current is provided at the output stage of the rectifier circuit units 21 and 22. As shown in FIG. 1, the voltage clamp circuit unit 30 includes a clamping transformer T _X , a first series circuit 31 including a first diode D _X1 and a first capacitor C _X1, and a second diode D. _A second series circuit 32 including _X2 and a second capacitor _CX2 and a third diode _DX3 are included.

The clamping transformer T _X is provided on the positive side of the rectifier circuit units 21 and 22, and a current flows even if a voltage is generated in the secondary side circuits (rectifier circuit units 21 and 22) of the output transformers T ₁ and T _2. If not, the exciting inductance functions as a smoothing reactor. The first series circuit 31 is provided between the positive electrode side and the negative electrode side of the rectifier circuit units 21 and 22, the cathode of the first diode D _X1 is connected to the positive electrode side of the rectifier circuit units 21 and 22, One capacitor C _X1 is connected to the negative side of the rectifier circuit units 21 and 22. The second series circuit 32 is provided between the connection point M of the first diode D _X1 and the first capacitor C _X1 and the clamping transformer T _X, and the cathode of the second diode D _X2 is connected as described above. The second capacitor C _X2 is connected to the point M, and is connected to the secondary side of the clamping transformer T _X. The third diode D _X3 is provided between the connection point N of the second diode D _X2 and the second capacitor C _X2 and the negative side of the rectifier circuit units 21 and 22, and the cathode is connected to the connection point N described above. It is connected.

By the way, when the DC power source E such as a solar battery is connected to the input side of the DC-DC converter, the load voltage V _L changes as it is due to the fluctuation of the input voltage by the solar battery, and the load voltage V _L is stabilized. Therefore, it is necessary to control the load voltage V _L. Therefore, the load voltage V _L is reduced by shifting the switching phases of the switching elements Q ₁ , Q ₂ and Q ₃ , Q _{4 and} the switching phases of the switching elements Q ₅ , Q ₆ and Q ₇ , Q ₈ (phase shift control). The case of controlling will be described below.

Figure 5 is a timing chart of the gate signal for turning on and off the switching elements Q ₁ to Q _8, a switching phase of the switching element _{Q 1 ~Q 4, Q 5 ~Q} 8 1/6 period (see Fig. 2) 1 / A case of shifting to 3 periods (1/3 period phase shift) is shown. In FIG. 6, the output voltages V _T1 and V _{T2 of} the conversion circuit units 11 and 12, the output voltage V _A and output current I _{A of} the rectifier circuit units 21 and 22, the load voltage V _L , and the primary voltage of the clamping transformer T _X. V _TX1 and secondary side voltage V _TX2 , currents I _DX1 , I _CX1 , I _CX2 , I flowing through the first diode D _X1 , the first capacitor C _X1 , the second capacitor C _X2 and the third diode D _X3 FIG. 4 is a waveform diagram of voltages V _CX1 and V _CX2 applied to _DX3 , the first capacitor C _X1 and the second capacitor C _X2 , and the operation of the voltage clamp circuit unit 30 is divided into sections S _{1 to} S ₄ in the figure. I will explain.
[Section S ₁ ]

In order to lower the load voltage V _L , the output voltage V _T1 , V _{T2 of the} conversion circuit units 11, 12 is shifted by shifting the switching phase of the switching elements Q ₁ -Q ₄ , Q ₅ -Q ₈ to 1/3 period by phase shift control. When the pulse width of N is narrowed, a period in which the output voltages V _T1 and V _{T2 of the} conversion circuit units 11 and 12 both become zero appears. In the section S ₁ , the output voltages V _T1 and V _{T2 of} the conversion circuit units 11 and 12 both become zero, and the output current I _A of the rectifier circuit units 21 and 22 starts to decrease. Then, a primary side voltage V _TX1 having a polarity opposite to the arrow direction in FIG. 1 is generated on the primary side of the clamping transformer T _X , and the output voltage V _A of the rectifier circuit units 21 and 22 also decreases. When this output voltage V _A becomes lower than the voltage V _{CX1 of} the first capacitor C _X1 , the first diode D _X1 becomes conductive and the charge of the first capacitor C _X1 passes through the first diode D _X1 . Discharged. It becomes the primary current of the transformer T _X clamp discharge current of the first capacitor C _X1 on behalf of the output current I _A, the first capacitor C _X1 - primary of the transformer T _X clamp - the first diode D _X1 A closed loop is formed through the side winding-smoothing capacitor C, and the output current I _A is rapidly attenuated.

By circulating the circulating current in the closed loop formed by the voltage clamp circuit unit 30, the primary side circuits (conversion circuit units 11 and 12) and secondary side circuits (conversion circuit units 11 and 12) of the output transformers T ₁ and T ₂ are controlled when the load voltage is controlled. By rapidly attenuating the circulating current flowing back to and from the rectifier circuit portions 21 and 22), the circulating currents of the conversion circuit portions 11 and 12 are also rapidly attenuated. Thereby, circulating current can be suppressed. Moreover, since the occurrence of overvoltage can be suppressed by circulating the circulating current in the voltage clamp circuit unit 30, the load voltage _VL can be controlled without reducing the power conversion efficiency.

FIG. 7 shows a comparison between a conventional DC-DC converter (without a voltage clamp circuit portion) and a DC-DC converter according to the present invention (with a voltage clamp circuit portion). FIG. 7A shows a conventional DC-DC converter according to the present invention and the present invention. Gate signals of switching elements Q _{1 to} Q _{4 in} the converter, (B) shows the output voltage V _T1 of the conversion circuit unit 110 and the output current I _A of the rectification circuit unit 210 in the conventional DC-DC converter (see FIG. 13). . (C) shows the output voltage V _T1 of the conversion circuit unit 11 and the output current I _A of the rectification circuit unit 21 in the DC-DC converter of the present invention. The gate signal shown in FIG. 7A is the same between the conventional case and the case of the present invention, and the switching phase of the switching elements Q _{1 to} Q ₄ is shifted to 1/3 period (1/3 period). (Phase shift).

As shown in FIG. 7B, in the conventional DC-DC converter, when the output voltage V _T1 of the conversion circuit unit 110 becomes zero, the output current I _A of the rectification circuit unit 210 decreases only slowly. At that time, a circulating current (shaded area in the figure) flows. On the other hand, as shown in FIG. 7D, in the DC-DC converter of the present invention, when the output voltage V _T1 of the conversion circuit unit 11 becomes zero, the output current I _A of the rectifier circuit unit 21 is abrupt. By starting to decrease, the circulating current is suppressed (there is no hatched portion in FIG. 7B). As the discharge current of the first capacitor C _X1 decays, the voltage V _{CX1 of} the first capacitor C _X1 decreases and the amplitude of the primary voltage V _TX1 of the clamping transformer T _X increases (the polarity is shown in FIG. 1). At the same time, the amplitude of the secondary side voltage V _TX2 of the clamping transformer T _X also increases (the polarity is the arrow direction in FIG. 1).
[Section S ₂ ]

When the total voltage of the secondary voltage V _TX2 of the clamping transformer T _X and the voltage V _CX2 of the second capacitor C _X2 exceeds the load voltage V _L (V _TX2 + V _CX2 > V _L ), the third The diode D _X3 becomes conductive, and the second capacitor C _X2 is discharged through the path of the third diode D _{X3 -second} capacitor C _X2 -secondary winding of the clamping transformer T _X -smoothing capacitor C. If sufficiently large selection of capacity of the second capacitor C _X2, since the voltage V _CX2 of the second capacitor C _X2 is also substantially constant during the discharge, the voltage of the second capacitor C _X2 during discharge the load It is clamped at a substantially constant voltage determined by the voltage V _L.
[Section S ₃ ]

The output voltage V _T1, V _T2 interval S _1, S ₂ in the converter circuit unit 11 and 12 described above is zero, the output voltage V _T1 or V _T2 (FIG. 6 V _T2 of the converter unit 11, 12 ) Occurs, the voltage V _TX1 having the same polarity as the arrow direction in FIG. 1 is applied to the primary side of the clamping transformer T _X , and the voltage V _TX2 having the opposite polarity to the arrow direction in FIG. 1 appears on the secondary side. . When the total voltage of the secondary side voltage V _TX2 of the clamping transformer T _X , the voltage V _{CX2 of} the second capacitor C _X2 and the voltage V _CX1 of the first capacitor C _X1 falls below the load voltage V _L (V _TX2 + V _CX2 + V _CX1 <V _L ), the second diode D _X2 becomes conductive, and the primary winding of the clamping transformer T _X -secondary winding _-second capacitor C _{X2 -second} diode D _X2 - charging the first capacitor C _X1 a second capacitor C _X2 in the path of the first capacitor C _X1. That is, the output current I _A of the rectifier circuit 21 and 22, the load side of the clamping transformer T _X, and the current to the load, the first capacitor flows around to the secondary winding of the clamping transformer T _X The current is _divided into C _X1 and a charging current for charging the second capacitor C _X2 .

At this time, the voltage V _TX1 generated on the primary side of the clamping transformer _TX is added to the load voltage V _L and applied to the diodes D _{1 to} D ₄ and D _{5 to} D ₈ of the rectifier circuit units 21 and 22. Therefore, it is necessary to suppress the occurrence of overvoltage. In the voltage clamp circuit 30, an overvoltage on the primary side of the clamping transformer T _X is about to occur, the charging current of the first capacitor C _X1 on the secondary side of the clamping transformer T _X second capacitor C _X2 It flows, so that the total voltage of the voltage V _CX1 voltage V _CX2 a first capacitor C _X1 of the secondary-side voltage V _TX2 clamping transformer T _X and the second capacitor C _X2 does not exceed the load voltage V _L Clamped. As a result, the primary voltage V _TX1 of the clamping transformer T _X is also clamped, and the occurrence of overvoltage in the rectifying circuit units 21 and 22 is suppressed. Note that the suppression level of the overvoltage can be determined by the transformation ratio of the clamping transformer T _X.

During the operation of the voltage clamp circuit unit 30, that is, during the charging of the first capacitor C _X1 and the second capacitor C _X2 , the secondary according to the transformation ratio with respect to the primary side current of the clamping transformer T _X Since the side current flows, the clamping transformer T _X does not function as a reactor, so the series capacitors C ₁ and C ₂ , the leakage inductance of the output transformers T ₁ and T ₂ , the first capacitor C _X1, and the second capacitor A sine wave (half wave) current determined by the resonance of C _X2 flows as a charging current. Since the currents I _C1 and I _C2 begin to flow after the output voltages V _T1 and V _{T2 of} the conversion circuit units 11 and 12 are applied to the primary sides of the output transformers T ₁ and T ₂ , the conversion circuit units 11 and 12 It can be seen that an ideal zero-current switching ZCS is realized when the switching elements Q _{1 to} Q ₄ and Q _{5 to} Q ₈ are turned on.
[Section S ₄ ]

When the charging of the first capacitor C _X1 and the second capacitor C _X2 is completed in the section S ₃ and the secondary current of the clamping transformer T _X is stopped, the operation of the voltage clamp circuit unit 30 is also stopped. The exciting inductance of the clamping transformer T _X functions as the smoothing reactor L. After the elapse of this section S ₄ , the output voltages V _T1 and V _{T2 of} the conversion circuit units 11 and 12 both become zero and the process returns to the section S ₁ .

In the above, when the switching phase of the switching elements Q _{1 to} Q ₄ and Q _{5 to} Q ₈ is shifted to 1/3 period (1/3 period phase shift), the operation of the voltage clamp circuit unit 30 is changed to the sections S ₁ to S ₁ . Although described for each S ₄ , as shown in FIG. 2, when the switching phase is shifted to 1/6 period (1/6 period phase shift), the voltages V _T1 and V of the conversion circuit units 11 and 12 are changed. _{Since T2} is continuously applied to the primary side of the output transformers T ₁ and T ₂ , the voltage clamp circuit unit 30 does not operate, and the operation and effect of the conventional DC-DC converter appear. That is, no current flows through the first and second capacitors C _X1 and C _X2 and the first to third diodes D _{X1 to} D _X3 .

Further, when the switching phase is decreased from the 1/3 period, the ratio of the section S ₄ at the time of the 1/3 period phase shift is further increased, and the ratios of the sections S ₁ , S ₂ , S ₃ are relatively decreased. Finally, the operation is performed at the time of 1/6 period phase shift (conventional DC-DC converter).

Further, when the switching phase is increased from the 1/3 period, the ratio of the section S ₄ at the time of the 1/3 period phase shift decreases and finally disappears, and only the sections S ₁ , S ₂ , S ₃ are obtained. Since the operation of the voltage clamp circuit unit 30 is performed in the sections S ₁ , S ₂ , and S ₃ , the operation is finally maintained until the half period phase shift is performed as shown in FIG.

In the embodiment described above has described the case of providing the transformer T _X clamp the voltage clamp circuit 30 to the positive side of the rectifier circuit 21 and 22, a transformer T _X clamp as shown in FIG. 9 It can also be provided on the negative electrode side of the rectifier circuit portions 21 and 22. In each embodiment, the conversion circuit units 11 and 12 are connected to two pairs of switching elements Q ₁ , Q ₂ and Q ₃ , Q ₄ and two pairs of switching elements Q ₅ , Q ₆ and Q ₇ , Q _8. The circuit configuration in which the series capacitors C ₁ and C ₂ are inserted and connected between the output sides of the conversion circuit units 11 and 12 and the primary sides of the output transformers T ₁ and T ₂ is exemplified. It is also possible to apply to this circuit configuration. In the following circuit configuration, a case where the clamping transformer T _X is provided on the positive side of the rectifying circuit units 21 and 22 is illustrated. However, as described above, the clamping transformer T _X is provided on the negative side of the rectifying circuit units 21 and 22. It can also be provided on the side.

As shown in FIG. 10, the conversion circuit units 11 and 12 are connected to two pairs of switching elements Q ₁ , Q ₂ and Q ₃ , Q ₄ and two pairs of switching elements Q ₅ , Q ₆ and Q ₇ , Q _8. A circuit configuration in which series capacitors C ₁ and C ₂ are inserted and connected between the secondary sides of the output transformers T ₁ and T ₂ and the input sides of the rectifier circuit units 21 and 22 is possible.

As shown in FIG. 11, in the two groups of conversion circuit units 11 and 12, in order to determine the commutation timing, the commutation trigger is a pair of switching elements Q ₃ and Q ₄ and a pair of switching elements. Since the elements are Q ₇ and Q ₈ , the pair of switching elements Q ₁ and Q ₂ and the pair of switching elements Q ₅ and Q ₆ are replaced with capacitors C ₁₁ , C ₁₂ and C ₁₅ , C _16. It is also possible to adopt a circuit configuration in which the conversion circuit units 11 ′ and 12 ′ have a bridge configuration, and series capacitors C ₁ and C ₂ are provided on the primary side of the output transformers T ₁ and T ₂ . The series capacitors C ₁ and C ₂ are connected between the midpoint of the pair of capacitors C ₁₁ and C ₁₂ and the primary side of the output transformers T ₁ and T ₂ , but the pair of switching elements Q ₃ and Q ₄ are connected. It is also possible to connect between the middle point and the primary side of the output transformers T ₁ and T ₂ .

As shown in FIG. 12, in the two groups of conversion circuit units 11 and 12, a pair of switching elements Q ₁ and Q ₂ and a pair of switching elements Q ₅ and Q ₆ are connected to capacitors C ₁₁ and C ₁₂ and C ₁₅ and C _16. It is also possible to adopt a circuit configuration in which the conversion circuit units 11 ′ and 12 ′ having a half bridge configuration are provided and the series capacitors C ₁ and C ₂ are provided on the secondary side of the output transformers T ₁ and T ₂ .

Further, since the series capacitors C ₁ and C ₂ can be connected to the secondary side of the output transformers Tr ₁ and Tr ₂ , the conversion circuit units 11 ″ and 12 ″ are connected as shown in FIG. You may make it comprise with a push pull inverter.

As shown in the figure, the conversion circuit units 11 ″ and 12 ″ configured by the push-pull inverter include a pair of switching elements Q ₁₁ between one end of the DC power source E and the transformers T ₁₁ and T _12. Q ₁₂ , Q ₁₃ and Q ₁₄ are connected, and a circuit configuration is provided in which the other end of the DC power supply E and the intermediate taps of the transformers T ₁₁ and T ₁₂ are connected. The series capacitors C ₁ and C ₂ are connected to the secondary side of the transformers T ₁₁ and T ₁₂ . As described above, by using the push-pull inverter for each of the conversion circuit units 11 ″ and 12 ″, it is possible to simplify the circuit and reduce the cost by reducing the number of components.

  In the above embodiment, the configuration in which the two groups of conversion circuit units 11 and 12 are connected in parallel to the DC power source E is illustrated. However, these two groups of conversion circuit units 11 and 12 are connected to the DC power source E. It is also possible to connect them in series.

  The present invention is not limited to the above-described embodiments, and can of course be implemented in various forms without departing from the gist of the present invention. It includes the equivalent meanings recited in the claims and the equivalents recited in the claims, and all modifications within the scope.

11,12 converter circuit unit 21, 22 a rectifier circuit section 30 voltage clamp circuit 31 first series circuit 32 second series circuit C _1, C ₂ series capacitor C _X1 first capacitor C _X2 second capacitor D _X1 the first diode D _X2 second diode D _X3 third diode E DC power source Q ₁ to Q ₈ switching elements T _1, T ₂ output transformer T _X clamp transformer

Claims (6)

There are provided n groups of conversion circuit units for converting the power supply voltage of the DC power source into AC by a pair of switching elements with respect to the DC power source, and a series capacitor and an output transformer are provided on the output side of each of the n group conversion circuit units. In a DC-DC converter provided with a rectifier circuit unit and connecting the rectifier circuit units of the n groups in parallel,
A voltage clamp circuit unit is provided at an output stage of the rectifier circuit unit, and the voltage clamp circuit unit includes a clamp transformer connected to the rectifier circuit unit, and includes a first diode and a first capacitor. A series circuit is connected to the rectifier circuit section, and a second series circuit composed of a second diode and a second capacitor is connected between the connection point of the first diode and the first capacitor and the clamping transformer. A DC-DC converter characterized in that a third diode is connected between the connection point of the second diode and the second capacitor and the rectifier circuit section.   2. The DC-DC converter according to claim 1, wherein the conversion circuit unit connects two pairs of switching elements in a full bridge configuration, and the series capacitor is connected to a primary side of an output transformer.   2. The DC-DC converter according to claim 1, wherein the conversion circuit unit connects two pairs of switching elements in a full-bridge configuration, and connects the series capacitor to a secondary side of an output transformer.   2. The DC-DC according to claim 1, wherein the conversion circuit unit has a half-bridge configuration by replacing a pair of switching elements of two pairs of switching elements with a capacitor, and the series capacitor is connected to a primary side of an output transformer. converter.   2. The DC− according to claim 1, wherein the conversion circuit unit has a half-bridge configuration by replacing a pair of switching elements of two pairs of switching elements with a capacitor, and the series capacitor is connected to a secondary side of an output transformer. DC converter.   2. The DC-DC converter according to claim 1, wherein each of the conversion circuit units includes a push-pull inverter, and the series capacitor is connected to a secondary side of an output transformer.

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