JP5412274B2 - サイドチャネル攻撃からの保護 - Google Patents

サイドチャネル攻撃からの保護 Download PDF

Info

Publication number
JP5412274B2
JP5412274B2 JP2009502237A JP2009502237A JP5412274B2 JP 5412274 B2 JP5412274 B2 JP 5412274B2 JP 2009502237 A JP2009502237 A JP 2009502237A JP 2009502237 A JP2009502237 A JP 2009502237A JP 5412274 B2 JP5412274 B2 JP 5412274B2
Authority
JP
Japan
Prior art keywords
msk
masked
output
var
random
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2009502237A
Other languages
English (en)
Japanese (ja)
Other versions
JP2009537025A (ja
JP2009537025A5 (enExample
Inventor
ビジラント，ダビド
ヒユマロリ，ギヨーム
Original Assignee
ジエマルト・エス・アー
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ジエマルト・エス・アー filed Critical ジエマルト・エス・アー
Publication of JP2009537025A publication Critical patent/JP2009537025A/ja
Publication of JP2009537025A5 publication Critical patent/JP2009537025A5/ja
Application granted granted Critical
Publication of JP5412274B2 publication Critical patent/JP5412274B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/60—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers
    • G06F7/72—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers using residue arithmetic
    • G06F7/723—Modular exponentiation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/002—Countermeasures against attacks on cryptographic mechanisms
    • H04L9/003—Countermeasures against attacks on cryptographic mechanisms for power analysis, e.g. differential power analysis [DPA] or simple power analysis [SPA]
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/72—Indexing scheme relating to groups G06F7/72 - G06F7/729
    • G06F2207/7219—Countermeasures against side channel or fault attacks
    • G06F2207/7223—Randomisation as countermeasure against side channel attacks
    • G06F2207/7233—Masking, e.g. (A**e)+r mod n
    • G06F2207/7238—Operand masking, i.e. message blinding, e.g. (A+r)**e mod n; k.(P+R)
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L2209/00—Additional information or applications relating to cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
    • H04L2209/04—Masking or blinding

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Pure & Applied Mathematics (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Computer Security & Cryptography (AREA)
  • Theoretical Computer Science (AREA)
  • Signal Processing (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Computing Systems (AREA)
  • Mathematical Physics (AREA)
  • General Engineering & Computer Science (AREA)
  • Storage Device Security (AREA)
JP2009502237A 2006-03-31 2007-03-23 サイドチャネル攻撃からの保護 Expired - Fee Related JP5412274B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
EP06300320A EP1840732A1 (en) 2006-03-31 2006-03-31 Protection against side channel attacks
EP06300320.6 2006-03-31
PCT/IB2007/000728 WO2007116262A1 (en) 2006-03-31 2007-03-23 Protection against side channel attacks

Publications (3)

Publication Number Publication Date
JP2009537025A JP2009537025A (ja) 2009-10-22
JP2009537025A5 JP2009537025A5 (enExample) 2010-05-06
JP5412274B2 true JP5412274B2 (ja) 2014-02-12

Family

ID=36688104

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2009502237A Expired - Fee Related JP5412274B2 (ja) 2006-03-31 2007-03-23 サイドチャネル攻撃からの保護

Country Status (4)

Country Link
US (1) US8402287B2 (enExample)
EP (2) EP1840732A1 (enExample)
JP (1) JP5412274B2 (enExample)
WO (1) WO2007116262A1 (enExample)

Families Citing this family (38)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2895609A1 (fr) * 2005-12-26 2007-06-29 Gemplus Sa Procede cryptographique comprenant une exponentiation modulaire securisee contre les attaques a canaux caches, cryptoprocesseur pour la mise en oeuvre du procede et carte a puce associee
US8091139B2 (en) * 2007-11-01 2012-01-03 Discretix Technologies Ltd. System and method for masking arbitrary Boolean functions
FR2926652B1 (fr) * 2008-01-23 2010-06-18 Inside Contactless Procede et dispositifs de contre-mesure pour cryptographie asymetrique a schema de signature
FR2972064B1 (fr) * 2011-02-25 2013-03-15 Inside Secure Procede de cryptographie comprenant une operation d'exponentiation
EP2523096A1 (en) * 2011-05-11 2012-11-14 Thomson Licensing Modular exponentiation and device resistant against side-channel attacks
FR2977952A1 (fr) * 2011-07-13 2013-01-18 St Microelectronics Rousset Protection d'un calcul d'exponentiation modulaire par multiplication par une quantite aleatoire
FR2977953A1 (fr) * 2011-07-13 2013-01-18 St Microelectronics Rousset Protection d'un calcul d'exponentiation modulaire par addition d'une quantite aleatoire
US8799343B2 (en) 2011-09-22 2014-08-05 Intel Corporation Modular exponentiation with partitioned and scattered storage of Montgomery Multiplication results
WO2013172913A2 (en) 2012-03-07 2013-11-21 The Trustees Of Columbia University In The City Of New York Systems and methods to counter side channels attacks
US8459545B1 (en) * 2012-03-29 2013-06-11 Cisco Technology, Inc. Image-based point-of-sale mobile settlement system
US8972715B2 (en) * 2012-07-13 2015-03-03 Securerf Corporation Cryptographic hash function
US10148285B1 (en) 2012-07-25 2018-12-04 Erich Schmitt Abstraction and de-abstraction of a digital data stream
CN103138917B (zh) * 2013-01-25 2016-03-09 国家密码管理局商用密码检测中心 以s盒输入为基础的汉明距离模型进行sm4密码算法侧信道能量分析方法
CN103166752B (zh) * 2013-01-25 2016-04-27 国家密码管理局商用密码检测中心 选择轮函数为攻击对象进行sm4密码算法侧信道能量分析的应用
US9959429B2 (en) 2013-03-15 2018-05-01 Cryptography Research, Inc. Asymmetrically masked multiplication
FR3010210B1 (fr) * 2013-08-29 2017-01-13 Stmicroelectronics Rousset Protection d'un calcul contre des attaques par canaux caches
CN103546277B (zh) * 2013-09-25 2016-08-31 北京握奇数据系统有限公司 一种智能卡sm4算法的dpa攻击与密钥还原方法及系统
EP2884387B1 (en) * 2013-12-13 2016-09-14 Thomson Licensing Efficient modular addition resistant to side-channel attacks
US10795858B1 (en) 2014-02-18 2020-10-06 Erich Schmitt Universal abstraction and de-abstraction of a digital data stream
US9871651B2 (en) * 2014-06-16 2018-01-16 Cisco Technology, Inc. Differential power analysis countermeasures
US9590805B1 (en) * 2014-12-23 2017-03-07 EMC IP Holding Company LLC Ladder-based cryptographic techniques using pre-computed points
CN104753665B (zh) * 2015-03-19 2018-04-06 成都信息工程学院 一种针对sm4密码轮函数输出的侧信道能量攻击方法
CN104753668B (zh) * 2015-03-19 2018-04-13 成都信息工程学院 一种针对sm4密码线性变换输出的侧信道能量攻击方法
US10063569B2 (en) * 2015-03-24 2018-08-28 Intel Corporation Custom protection against side channel attacks
EP3217307B1 (en) * 2016-02-22 2018-11-07 Eshard Method of testing the resistance of a circuit to a side channel analysis of second order or more
FR3055436A1 (fr) 2016-08-23 2018-03-02 Stmicroelectronics (Rousset) Sas Protection d'un calcul modulaire
FR3055437A1 (fr) 2016-08-23 2018-03-02 Stmicroelectronics (Rousset) Sas Protection d'un calcul d'exponentiation modulaire
US10153035B2 (en) * 2016-10-07 2018-12-11 Taiwan Semiconductor Manufacturing Co., Ltd. SRAM-based authentication circuit
DE102017002153A1 (de) * 2017-03-06 2018-09-06 Giesecke+Devrient Mobile Security Gmbh Übergang von einer booleschen Maskierung zu einer arithmetischen Maskierung
FR3069671A1 (fr) * 2017-07-25 2019-02-01 Stmicroelectronics (Rousset) Sas Protection d'un calcul iteratif contre des attaques horizontales
WO2019079048A1 (en) 2017-10-18 2019-04-25 Cryptography Research, Inc. PROTECTION OF A MODULAR INVERSION OPERATION AGAINST EXTERNAL SURVEILLANCE ATTACKS
EP3579493A1 (fr) * 2018-06-08 2019-12-11 STMicroelectronics (Rousset) SAS Protection d'un calcul itératif
EP3579492A1 (fr) 2018-06-08 2019-12-11 STMicroelectronics (Rousset) SAS Protection d'un calcul itératif
KR102653018B1 (ko) 2019-01-16 2024-03-29 삼성전자주식회사 랜덤 넘버를 이용하여 나머지 연산을 수행하는 보안 프로세서 및 이의 동작 방법
FR3094522B1 (fr) 2019-03-29 2021-11-19 St Microelectronics Rousset Protection d’un calcul itératif
CN111062064B (zh) * 2019-12-24 2021-11-02 飞天诚信科技股份有限公司 一种加密u盘系统的实现方法及系统
US12483429B2 (en) * 2021-06-01 2025-11-25 Attopsemi Technology Co., Ltd Physically unclonable function produced using OTP memory
FR3134909B1 (fr) * 2022-04-25 2024-06-21 Commissariat Energie Atomique Protection contre les attaques par canal auxiliaire a l’aide d’un masquage carre

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA2252078C (en) * 1998-10-28 2009-02-17 Certicom Corp. Power signature attack resistant cryptographic system
JP4317607B2 (ja) * 1998-12-14 2009-08-19 株式会社日立製作所 情報処理装置、耐タンパ処理装置
JP2000305453A (ja) * 1999-04-21 2000-11-02 Nec Corp 暗号化装置，復号装置，および暗号化・復号装置
JP2002247025A (ja) * 2001-02-22 2002-08-30 Hitachi Ltd 情報処理装置
JP4596686B2 (ja) * 2001-06-13 2010-12-08 富士通株式会社 Ｄｐａに対して安全な暗号化
DE10151129B4 (de) * 2001-10-17 2004-07-29 Infineon Technologies Ag Verfahren und Vorrichtung zum Berechnen eines Ergebnisses einer Exponentiation in einer Kryptographieschaltung
JP2003216026A (ja) * 2002-01-18 2003-07-30 Sony Corp 楕円曲線暗号処理方法および楕円曲線暗号処理装置、並びにコンピュータ・プログラム
JP2003241659A (ja) * 2002-02-22 2003-08-29 Hitachi Ltd 情報処理方法
JP2004163687A (ja) * 2002-11-13 2004-06-10 Fujitsu Ltd 楕円曲線暗号装置、楕円曲線暗号プログラム
JP4789468B2 (ja) * 2002-12-18 2011-10-12 富士通株式会社 秘密鍵を用いた耐タンパ楕円曲線暗号処理
DE10304451B3 (de) * 2003-02-04 2004-09-02 Infineon Technologies Ag Modulare Exponentiation mit randomisiertem Exponenten
AU2003304629A1 (en) * 2003-07-22 2005-02-04 Fujitsu Limited Tamper-resistant encryption using individual key
EP1653428B1 (en) * 2003-08-06 2012-08-15 Fujitsu Limited Elliptic curve encrypting device, elliptic curve encrypting method, elliptic curve encrypting program and computer-readable recording medium recording that program
US7739521B2 (en) * 2003-09-18 2010-06-15 Intel Corporation Method of obscuring cryptographic computations
JP4271077B2 (ja) * 2004-04-30 2009-06-03 株式会社東芝 マスク論理回路及び暗号装置
US20070150530A1 (en) * 2005-12-13 2007-06-28 Intel Corporation Resisting cache timing based attacks
KR100874909B1 (ko) * 2006-01-14 2008-12-19 삼성전자주식회사 Ｄｆａ에 대항하는 몽고메리 전력 래더 알고리즘을 사용하는 암호화 방법

Also Published As

Publication number Publication date
JP2009537025A (ja) 2009-10-22
EP2002331A1 (en) 2008-12-17
WO2007116262A1 (en) 2007-10-18
EP1840732A1 (en) 2007-10-03
US8402287B2 (en) 2013-03-19
US20090092245A1 (en) 2009-04-09

Similar Documents

Publication Publication Date Title
JP5412274B2 (ja) サイドチャネル攻撃からの保護
CN107040362B (zh) 模乘设备和方法
US20210256165A1 (en) Protecting parallel multiplication operations from external monitoring attacks
US10374790B2 (en) Countermeasure method for an electronic component implementing an elliptic curve cryptography algorithm
JP2001337599A (ja) 楕円曲線暗号におけるスカラー倍計算方法及び装置、並びに記憶媒体
EP2005291A2 (en) Decryption method
KR20100113130A (ko) 비대칭 암호화를 위한 대응조치 방법 및 디바이스
JP2011510579A (ja) 署名ダイアグラムを用いた非対称暗号方式のための対策方法およびデバイス
EP3452897A1 (en) Countermeasure to safe-error fault injection attacks on cryptographic exponentiation algorithms
JP4668931B2 (ja) 電力解析攻撃に対する耐タンパ性を持った暗号化処理装置
JP2010164904A (ja) 楕円曲線演算処理装置、楕円曲線演算処理プログラム及び方法
JP5573964B2 (ja) 暗号処理装置および方法
EP0952697B1 (en) Elliptic curve encryption method and system
TWI512610B (zh) 利用模數的特殊形式之模組約化
US8014520B2 (en) Exponentiation ladder for cryptography
Kim et al. Message blinding method requiring no multiplicative inversion for RSA
JP2003216026A (ja) 楕円曲線暗号処理方法および楕円曲線暗号処理装置、並びにコンピュータ・プログラム
KR20080012634A (ko) 고속 몽고메리 전력 래더 알고리즘에서 사용되는 폴트 검출동작을 구현하기 위한 이진 유한 영역에서의 포인트 덧셈방법 및 덧셈 연산 장치
Walter et al. Data dependent power use in multipliers
Janani et al. A secured key management scheme for mobile ad hoc networks with modified montgomery modular arithmetic
Navarro-Torrero et al. A Side-Channel Protected and High-Performance Hardware Implementation for EdDSA25519
Yan Side-channel attacks
Negre Address-bit Differential Power Analysis on Boolean Split Exponent Counter-measure.
KR20250054325A (ko) 타원곡선암호 장치 및 그 처리 방법
Zode et al. Novel fault attack resistant Elliptic Curve processor architecture

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20100317

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20100317

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20120821

A601 Written request for extension of time

Free format text: JAPANESE INTERMEDIATE CODE: A601

Effective date: 20121119

A602 Written permission of extension of time

Free format text: JAPANESE INTERMEDIATE CODE: A602

Effective date: 20121127

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20130220

RD04 Notification of resignation of power of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7424

Effective date: 20130321

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20130611

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20130909

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20131105

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20131111

LAPS Cancellation because of no payment of annual fees