JP5403999B2 - トンネリング及びスライシング・ベースのbmc分解のためのシステム及び方法 - Google Patents

トンネリング及びスライシング・ベースのbmc分解のためのシステム及び方法 Download PDF

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JP5403999B2
JP5403999B2 JP2008280758A JP2008280758A JP5403999B2 JP 5403999 B2 JP5403999 B2 JP 5403999B2 JP 2008280758 A JP2008280758 A JP 2008280758A JP 2008280758 A JP2008280758 A JP 2008280758A JP 5403999 B2 JP5403999 B2 JP 5403999B2
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bmc
tunnel
subproblem
control
program
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JP2009123204A (ja
JP2009123204A5 (enExample
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ケー. ガナイ マレー
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NEC Laboratories America Inc
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    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/36Prevention of errors by analysis, debugging or testing of software
    • G06F11/3604Analysis of software for verifying properties of programs
    • G06F11/3608Analysis of software for verifying properties of programs using formal methods, e.g. model checking, abstract interpretation

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Debugging And Monitoring (AREA)
JP2008280758A 2007-11-12 2008-10-31 トンネリング及びスライシング・ベースのbmc分解のためのシステム及び方法 Expired - Fee Related JP5403999B2 (ja)

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US98720307P 2007-11-12 2007-11-12
US60/987,203 2007-11-12
US12/183,387 US7949511B2 (en) 2007-11-12 2008-07-31 System and method for tunneling and slicing based BMC decomposition
US12/183,387 2008-07-31

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JP2009123204A JP2009123204A (ja) 2009-06-04
JP2009123204A5 JP2009123204A5 (enExample) 2011-10-06
JP5403999B2 true JP5403999B2 (ja) 2014-01-29

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Families Citing this family (8)

* Cited by examiner, † Cited by third party
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JP5218299B2 (ja) * 2009-06-30 2013-06-26 富士通株式会社 レコード長決定プログラムおよびレコード長決定装置
US8612954B2 (en) * 2009-08-17 2013-12-17 International Business Machines Corporation Fine slicing: generating an executable bounded slice for program
US8532971B2 (en) * 2010-01-26 2013-09-10 Nec Laboratories America, Inc. DPLL-based SAT solver using with application-aware branching
JP5744078B2 (ja) * 2013-01-31 2015-07-01 Necプラットフォームズ株式会社 組み込み機器制御システム、組み込み機器制御装置、及び組み込み機器制御装置の制御方法
US9483380B2 (en) * 2014-04-15 2016-11-01 Fujitsu Limited Parameterized states in symbolic execution for software testing
EP3012762A1 (en) 2014-10-24 2016-04-27 Thomson Licensing Control flow graph flattening device and method
EP3012764A1 (en) 2014-10-24 2016-04-27 Thomson Licensing Control flow graph flattening device and method
US10877870B2 (en) * 2018-06-11 2020-12-29 Tata Consultancy Services Limited Method and system for verifying properties of source code

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Publication number Priority date Publication date Assignee Title
US7711525B2 (en) * 2002-05-30 2010-05-04 Nec Corporation Efficient approaches for bounded model checking
US7346486B2 (en) * 2004-01-22 2008-03-18 Nec Laboratories America, Inc. System and method for modeling, abstraction, and analysis of software
EP1836579A2 (en) * 2004-11-02 2007-09-26 Furtek Automatically deriving logical, arithmetic and timing dependencies
JP2006178835A (ja) * 2004-12-24 2006-07-06 Internatl Business Mach Corp <Ibm> プログラム解析装置、その解析方法及びプログラム
WO2008005102A2 (en) * 2006-05-13 2008-01-10 Sap Ag Consistent set of interfaces derived from a business object model

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US7949511B2 (en) 2011-05-24
JP2009123204A (ja) 2009-06-04

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