JP5402598B2 - Authentication processing apparatus, authentication processing method, authentication processing program, processing system, and automatic teller machine - Google Patents

Description

  The present invention relates to an authentication processing microcontroller mounted on an electronic device.

  This type of authentication processing microcontroller (hereinafter referred to as SAM (Secure Application Module)) is mounted on, for example, a payment processing terminal. When the payment processing terminal verifies, for example, information recorded in an IC (Integrated Circuit) card with a check code or the like, the SAM performs an authentication process for confirming the validity of the check code. (For example, refer to Patent Document 1).

  Also, for example, it authenticates an IC cash card, communicates with a host computer connected to the network, displays predetermined information on an LED (Light Emitting Diode), LCD (Liquid Crystal Display), printed matter, etc. A SAM is also installed in an automated teller machine (hereinafter referred to as ATM (Automated Teller Machine)). In addition to the SAM, the ATM includes various peripheral devices such as an LED, a monitoring camera, a cash payment mechanism, a printer, and an LCD, and a central control device that controls the operation of the peripheral device. The various peripheral devices are connected to the central controller by input / output ports. The central controller includes a control program for each peripheral device, and appropriately controls the operation of the peripheral device.

  In such an ATM, the peripheral device is operated according to the authentication result by the SAM (for example, the LED is turned on after “IC card validity check by ATM” is finished, and after “transaction approval by the host computer” is finished, “ In the case of “operating the motor of the cash payment mechanism”, conventionally, the SAM connected to the central control unit determines the authentication result, and the central control unit that has received the determination information from the SAM operates the peripheral device. It was.

JP-A-10-307899

  By the way, conventionally, a central processing unit is camouflaged by a malicious attacker (for example, the program of the central control unit is altered or the flash ROM storing the program is replaced), and the manipulation instruction is altered. Is transmitted to the peripheral device, there is a possibility that the peripheral device malfunctions due to a falsified operation command. In order to avoid this, it is conceivable that the peripheral device directly acquires the determination information of the authentication result output from the SAM.

  However, the conventional control program necessary for controlling the input / output port is configured by conditional branching (so-called if-then rules), and is not always an effective means when implemented in a storage area with a small number of SAMs.

  In addition, if the state of the input / output port controlled by the SAM is illegally changed by a malicious attacker, the peripheral device may malfunction.

  In addition, in the SAM, it is difficult to realize a process for controlling a single or a plurality of input / output ports by combining a plurality of authentication results.

  Therefore, the present invention has been made in view of the above points, and prevents malfunction of peripheral devices even when the central processing unit is camouflaged or the SAM input / output port state is illegally changed. An object is to provide an authentication processing device, an authentication processing method, an authentication processing program, a processing system, and an automatic teller machine that can be used.

  In order to solve the above-mentioned problem, the invention described in claim 1 is an authentication processing device that executes authentication processing in response to an authentication command from the central control device and outputs the authentication result to the central control device. An authentication processing input / output port, a plurality of peripheral device input / output ports connected to each of the plurality of peripheral devices, storage means for storing a key identifier and encryption key data in association with each other, a key identifier, An acquisition means for acquiring, from the storage means, encryption key data corresponding to a key identifier included in the authentication command when an authentication command including authentication data is input via the authentication processing input / output port; An authentication unit that executes an authentication process using the acquired encryption key data and the authentication data included in the authentication command, and if the authentication process is successful, relates to the authentication process. Characterized in that it comprises a control means for outputting an operation signal for operating the peripheral device from the input and output ports for the peripheral device.

  According to a second aspect of the present invention, in the authentication processing device according to the first aspect, an input / output port identifier indicating each of the peripheral device input / output ports is stored in the storage unit. The key identifier is associated with the input / output port identifier associated with the key identifier corresponding to the encryption key data used in the authentication process when the authentication process is successful. An operation signal for operating the peripheral device is output from the peripheral device input / output port shown in FIG.

  According to a third aspect of the present invention, in the authentication processing device according to the first aspect, the storage means stores an input / output port identifier indicating each of the peripheral device input / output ports, and further the input / output port Authentication state comparison condition information is stored in association with each identifier, the authentication unit executes the authentication process a plurality of times, and the control unit corresponds to an authentication result by the authentication process a plurality of times. An operation signal for operating the peripheral device is output from the peripheral device input / output port indicated by the input / output port identifier associated with the authentication state comparison condition information.

  According to a fourth aspect of the present invention, in the authentication processing device according to any one of the first to third aspects, the control unit changes state information of a register of the peripheral device input / output port, The operation signal is output from the peripheral device input / output port.

  According to a fifth aspect of the present invention, in the authentication processing device according to the fourth aspect, status information corresponding to each of the peripheral device input / output ports and error detection information generated based on the status information are stored. Further comprising status storage means, and when the authentication process is successful, the control means outputs the status information and the error detection information without changing the status information of the register of the peripheral device input / output port. When interrupt processing is started that is stored in the state storage means and executed at predetermined intervals, the state information stored in the state storage means is stored in the corresponding registers of the peripheral device input / output ports. It is characterized in that the state information of the register is changed by outputting.

  According to a sixth aspect of the present invention, in the authentication processing device according to the fifth aspect, the control means stores each of the status storage means when interrupt processing executed at a predetermined interval is started. Error detection information is generated based on the status information, and when the generated error detection information matches the error detection information stored in the status storage means, each stored in the status storage means The status information is output to the corresponding register of each peripheral device input / output port to change the status information of the register.

  The invention according to claim 7 includes the authentication processing device according to any one of claims 1 to 6 and the peripheral device whose input / output port is opened and closed by driving a motor. The operation is controlled by an authentication processing device.

  The invention according to claim 8 is the authentication processing device according to any one of claims 1 to 6, a central control device that outputs an authentication command to the authentication processing device, the authentication processing device, or the central processing device. And a plurality of peripheral devices whose operations are controlled by the control device.

  The invention according to claim 9 stores the authentication processing input / output port, the plurality of peripheral device input / output ports connected to each of the plurality of peripheral devices, the key identifier, and the encryption key data in association with each other. An authentication processing method executed by a computer for executing authentication processing in response to an authentication command from a central control device and outputting the authentication result to the central control device, comprising: a key identifier; When an authentication command including authentication data is input via the authentication processing input / output port, obtaining encryption key data corresponding to a key identifier included in the authentication command from the storage unit; Executing the authentication process using the acquired encryption key data and the authentication data included in the authentication command; and if the authentication process is successful, the authentication process Characterized in that it comprises the steps of: outputting the operation signal for operating the peripheral device from the input and output ports for said peripheral device associated with.

  According to a tenth aspect of the present invention, a computer is caused to execute the authentication processing method according to the ninth aspect.

  According to the present invention, the operation signal for operating the peripheral device is output from the peripheral device input / output port corresponding to the encryption key data used for the authentication processing. Even in such a case, it is possible to transmit an operation signal with high security to the peripheral device with a small storage area of the authentication processing device, and as a result, it is possible to prevent the peripheral device from malfunctioning.

  If the authentication process is successful, the status information and the error detection information are stored in the status storage means without changing the status information of the peripheral device I / O port register, and the interrupt process is started. In addition, if each status information stored in the status storage means is output to a corresponding register of each peripheral device input / output port to change the status information of the register, the peripheral device of the authentication processing device Even when the status of the input / output port is illegally changed, it is possible to prevent malfunction of the peripheral device.

  Further, if the configuration is made so that an operation signal for operating the peripheral device is output from the input / output port for the peripheral device associated with the authentication state comparison condition information corresponding to the authentication result by the authentication processing of a plurality of times, a plurality of authentications are performed. Depending on the combination of results, a single or a plurality of peripheral device input / output ports can be controlled, and an operation signal with higher security can be transmitted in a storage area with a small number of authentication processing devices.

It is a figure which shows the outline | summary structural example of ATM which concerns on this embodiment. It is a block diagram which shows the example of an outline structure of SAM2. It is a figure which shows the structural example of the power supply terminal and input / output port of SAM2. It is a figure which shows an example of the storage format of an encryption key. It is a figure which shows an example of the message format of the command for authentication. It is a flowchart which shows the command processing in CPU21 of SAM2 which concerns on 1st Embodiment. It is a figure which shows an example of the storage format of the status information and error detection information corresponding to each input / output port for peripheral devices. It is a flowchart which shows the interruption process in CPU21 of SAM2 which concerns on 2nd Embodiment. It is a figure which shows an example of the storage format of authentication status information. It is a figure which shows an example of the storage format of the encryption key in 3rd Embodiment. It is a figure which shows an example of the storage format of the authentication status comparison condition information in 3rd Embodiment. It is a flowchart which shows the command processing in CPU21 of SAM2 which concerns on 3rd Embodiment.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. In addition, embodiment described below is embodiment at the time of applying this invention with respect to ATM.

  First, the structure of ATM which concerns on one Embodiment of this invention is demonstrated using FIG.

  FIG. 1 is a diagram illustrating a schematic configuration example of an ATM according to the present embodiment.

  As shown in FIG. 1, the ATM includes a central control device 1, an SAM 2 as an example of an authentication processing device, an LED 3, a monitoring camera 4, a cash payment mechanism 5, a printer 6, an LCD 7, and an IC card reader 8. It is configured.

  Here, the LED 3, the monitoring camera 4, the cash payment mechanism 5, the printer 6, and the LCD 7 are examples of peripheral devices. For these peripheral devices (peripheral devices), a device that requires only an operation signal (trigger signal) from the SAM 2 and information from the central control device 1 in addition to the operation signal from the SAM 2 are required for operation. There are two types of devices, each connected as shown in FIG. For example, the LED 3, the monitoring camera 4, and the cash payment mechanism 5 are connected to the SAM 2 through respective controllers. On the other hand, the printer 6 and the LCD 7 are connected to the central control device 1 and the SAM 2 via respective controllers.

  Further, the central control device 1 is connected to the SAM 2 via the SAM controller, and to the IC card reading device 8 via the IC card controller. Further, a host computer is connected to the central controller 1 via a network controller and a network.

  The central controller 1 includes a CPU (Central Processing Unit), a working RAM (Random Access Memory), a flash ROM (Read Only Memory) in which programs and data are stored, and the like, and performs overall control of the entire ATM. For such control, the central control device 1 outputs various commands to the SAM 2.

  The details of the SAM 2 having a characteristic configuration and function in the ATM configured as described above will be described separately for the first to third embodiments.

(First embodiment)
First, details of the SAM 2 according to the first embodiment will be described.

  FIG. 2 is a block diagram illustrating a schematic configuration example of the SAM2. FIG. 3 is a diagram illustrating a configuration example of the power supply terminal and the input / output port of the SAM2.

  As shown in FIG. 2, the SAM 2 includes a CPU 21, a volatile memory 22 such as a RAM, a non-volatile memory 23 such as a flash ROM, an input / output port 24, and the like, and according to an authentication command from the central controller 2. An authentication process is executed, and the authentication result is output to the central controller 2.

  In the example of FIG. 3, a plurality of input / output ports 24 from I / O1 to I / O12 are provided. One of the plurality of input / output ports (for example, I / O 8) is used as an input / output port for authentication processing (for data exchange of authentication processing), and the other plurality of input / output ports (for example, I / O 1 to I / O 1). I / O 7) is used as a peripheral device input / output port connected to each of a plurality of peripheral devices (controllers).

  The non-volatile memory 23 (an example of a storage unit) stores (stores) a plurality of encryption key data (hereinafter referred to as “encryption key”) used for authentication processing.

  FIG. 4 is a diagram illustrating an example of an encryption key storage format. As shown in FIG. 4, each encryption key is used to identify the encryption key that is the target of the authentication command (authentication processing execution command) received (input) from the outside via the authentication processing input / output port. A key identifier and an input / output port identifier indicating a peripheral device input / output port whose state is to be changed when authentication processing is successful are stored in association with each other. That is, in this example, the encryption key and the peripheral device input / output port are associated one-to-one.

  Here, “changing the state” means changing the state information stored in the register of the peripheral device input / output port. As an example of the status information, “High (1)”, “Low (0)”, or a combination thereof (serial data including a plurality of bits) may be used.

  When the authentication command is received (input) via the authentication processing input / output port, the CPU 21 (an example of an acquisition unit) stores the encryption key corresponding to the key identifier included in the authentication command in the nonvolatile memory 23. Get from.

  FIG. 5 is a diagram illustrating an example of a message format of the authentication command. As shown in FIG. 5, the authentication command includes an instruction code indicating an authentication process execution instruction, a key identifier to be authenticated, and authentication data.

  Next, the CPU 21 (an example of an authentication unit) performs an authentication process (for example, decrypts the authentication data with the encryption key) using the encryption key acquired from the nonvolatile memory 23 and the authentication data included in the authentication command. Run. When the authentication process is successful, the CPU 21 (an example of a control unit) outputs an operation signal for operating the peripheral device from the peripheral device input / output port related to the authentication process. That is, the CPU 21 changes the state information of the register of the peripheral device input / output port (Low → High) to output an operation signal from the peripheral device input / output port. As a result, the peripheral device starts to operate according to the operation signal. In other words, the peripheral device uses a change in the input / output port for the peripheral device as an operation trigger.

  Here, the above-mentioned “input / output port for peripheral device related to authentication processing” refers to the input / output port identifier associated with the key identifier corresponding to the encryption key used in the authentication processing in the first embodiment. (The input / output port identifier associated with the key identifier is specified from the nonvolatile memory 23).

  FIG. 6 is a flowchart showing command processing in the CPU 21 of the SAM 2 according to the first embodiment.

  When the processing shown in FIG. 6 is started, the CPU 21 waits for command reception (step S1). Next, when the CPU 21 receives a command from the central control device 1 via the authentication processing input / output port (step S2: YES), the CPU 21 determines whether or not the received command is an authentication command. It discriminate | determines by the instruction code contained in a command (step S3). If the received command is not an authentication command (step S3: NO), the CPU 21 proceeds to step S4. If the received command is an authentication command (step S3: YES), the CPU 21 proceeds to step S5.

  In step S4, the CPU 21 executes command processing according to the received command, and returns to step S1.

  In step S5, the CPU 21 acquires an encryption key (an encryption key specified by the key identifier) corresponding to the key identifier included in the authentication command, and obtains the encryption key and authentication data included in the authentication command. To execute the authentication process.

  Next, the CPU 21 determines whether or not the authentication process is successful (step S6). If the authentication process is not successful (step S6: NO), the authentication process input / output is performed as a response to the central controller 1. An error message is transmitted (output) through the port (step S7), and the process returns to step S1.

  On the other hand, if the authentication process is successful (step S6: YES), the CPU 21 obtains the status information of the register of the peripheral device input / output port specified by the key identifier corresponding to the encryption key used for the authentication process. Set to High (step S8). As a result, an operation signal is transmitted to the peripheral device connected to the peripheral device input / output port.

  Next, as a response to the central controller 1, the CPU 21 transmits (outputs) a normal end message via the authentication processing input / output port (step S9), and returns to step S1.

  As described above, according to the first embodiment, the encryption key and the peripheral device input / output port are associated with each other, and the peripheral device input / output port register corresponding to the encryption key used for the authentication process is registered. Since the operation information for operating the peripheral device is output from the peripheral device input / output port by changing the state information of the peripheral device, even if the central processing unit 1 is camouflaged, the SAM2 is small. An operation signal with high security can be transmitted to the peripheral device in the storage area, and as a result, malfunction of the peripheral device can be prevented. In particular, by setting the register status information to 1-bit information of “1” or “0”, the peripheral device input / output port can be efficiently controlled in a storage area with a small amount of SAM2.

(Second Embodiment)
Next, details of the SAM 2 according to the second embodiment will be described. Note that the SAM 2 according to the second embodiment includes a timer in addition to the configuration shown in FIG. Further, the power supply terminal and the input / output port of the SAM 2 according to the second embodiment are configured as shown in FIG. Also in the second embodiment, the encryption key storage format is as shown in FIG. Also in the second embodiment, the message format of the authentication command is as shown in FIG. Also in the second embodiment, command processing in the CPU 21 is as shown in FIG. 6 except for step S8. Note that a description of the same parts as those in the first embodiment is omitted.

  In the second embodiment, status information corresponding to each peripheral device input / output port and error detection information generated based on each status information are stored in the volatile memory 22 (an example of status storage means). It has become.

  FIG. 7 is a diagram illustrating an example of a storage format of status information and error detection information corresponding to each peripheral device input / output port. In the example of FIG. 7, the volatile memory 22 has a storage area for storing status information corresponding to the I / O 1 to I / O 7 peripheral device input / output ports and a storage area for storing error detection information. Assigned. The storage area for storing the status information corresponding to the peripheral device input / output ports of I / O1 to I / O7 may be duplicated.

  Here, the error detection information is, for example, a value (check sum) obtained by adding status information (for example, 1 or 0) corresponding to all peripheral device input / output ports, and the like. Used to detect that the register status information has been altered (tampered).

  When the authentication process is successful, the CPU 21 according to the second embodiment does not change the state information of the peripheral device input / output port register (does not update immediately), and displays the state information and the generated error detection information. Store (update) in the volatile memory 22. That is, in step S8 shown in FIG. 6, the CPU 21 does not set the status information of the register of the peripheral device input / output port to High, but stores the storage area corresponding to the peripheral device input / output port (of the volatile memory 22). The status information indicating High is stored in the storage area), and the generated error detection information is stored in the corresponding storage area.

  Then, the CPU 21 generates error detection information based on each state information stored in the volatile memory 22 when an interrupt process executed at a predetermined interval is started. Here, the interrupt processing is generated at a constant cycle (for example, every 0.5 seconds) by a timer such as an interval timer or a watchdog timer.

  Then, when the generated error detection information matches the error detection information stored in the volatile memory 22, the CPU 21 converts each status information stored in the volatile memory 22 to the corresponding peripheral information. Output to the register of the device input / output port (that is, copy to the register) to change the status information of the register.

  FIG. 8 is a flowchart showing an interrupt process in the CPU 21 of the SAM 2 according to the second embodiment.

  When the processing shown in FIG. 8 is started, the CPU 21 generates error detection information based on state information corresponding to each peripheral device input / output port stored in the volatile memory 22 (step S11).

  Next, the CPU 21 determines whether or not the generated error detection information matches the error detection information stored in the volatile memory 22 (step S12). If they do not match (step S12: NO) ), The process proceeds to step S13. If they match (step S12: YES), the process proceeds to step S14.

  In step S13, the CPU 21 sets all the registers of all the peripheral device input / output ports to Low and shifts to an infinite loop.

  On the other hand, in step S14, the CPU 21 copies each status information stored in the volatile memory 22 to the register of each corresponding peripheral device input / output port, and ends the processing.

  As described above, according to the second embodiment, when the authentication process is successful, the status information of the peripheral device input / output port register is not immediately updated, but the status information and the generated error detection are detected. When information is stored in the volatile memory 22 and subsequent interrupt processing is started, each status information stored in the volatile memory 22 is reflected in the register of each corresponding peripheral device input / output port. Therefore, even if the state of the peripheral device I / O port of the SAM2 is illegally changed, it is possible to prevent the peripheral device from malfunctioning (the peripheral device may malfunction for a moment). Yes, it will be restored immediately by reflecting the status information).

(Third embodiment)
Next, details of the SAM 2 according to the third embodiment will be described. Note that the SAM 2 according to the third embodiment has the configuration shown in FIG. Further, the power supply terminal and the input / output port of the SAM 2 according to the third embodiment are configured as shown in FIG. Also in the third embodiment, the message format of the authentication command is as shown in FIG. Note that a description of the same parts as those in the first embodiment is omitted.

  In the third embodiment, authentication processing is executed a plurality of times, and authentication status information indicating an authentication result (success / failure or not executed) is stored in the volatile memory 22 for each encryption key to be authenticated. ing.

  FIG. 9 is a diagram illustrating an example of a storage format of authentication status information. In the example of FIG. 9, a storage area for storing authentication state information corresponding to the encryption keys a to h is allocated to the volatile memory 22.

  Also in the third embodiment, the nonvolatile memory 23 stores a plurality of encryption keys used for authentication processing.

  FIG. 10 is a diagram illustrating an example of an encryption key storage format in the third embodiment. As shown in FIG. 10, a key identifier for identifying the encryption key is stored in association with each encryption key, but an input / output port identifier is not associated with each encryption key. Instead, in the third embodiment, authentication state comparison condition information is associated with each input / output port identifier and stored in the nonvolatile memory 23. That is, in this example, a combination of authentication results using a plurality of encryption keys is associated with the peripheral device input / output port.

  FIG. 11 is a diagram illustrating an example of a storage format of authentication state comparison condition information in the third embodiment. As shown in FIG. 11, authentication state comparison information and authentication state comparison condition information are stored in association with the input / output port identifiers indicating the peripheral device input / output ports.

  Here, the authentication state comparison information defines, for example, what state the authentication state information should be. For example, the authentication status comparison information defines that the authentication result is successful. Also, the authentication condition comparison condition information defines a comparison condition indicating whether all the encryption keys must satisfy the state indicated in the authentication condition comparison information or some of the encryption keys must be satisfied. Is done. For example, in the authentication state comparison condition information, an AND condition of the encryption key a and the encryption key b is defined.

  The CPU 21 according to the third embodiment specifies an input / output port identifier associated with authentication state comparison condition information corresponding to an authentication result obtained by a plurality of authentication processes. For example, in the case where the authentication result of a plurality of authentication processes indicates that the encryption key a and the encryption key b are successful, the corresponding authentication state comparison condition information is identified from the nonvolatile memory 23 and is identified. The input / output port identifier associated with the authentication state comparison condition information is identified. Then, the CPU 21 outputs an operation signal for operating the peripheral device from the peripheral device input / output port indicated by the specified input / output port identifier, as in the first embodiment.

  FIG. 12 is a flowchart showing command processing in the CPU 21 of the SAM 2 according to the third embodiment. Note that the processing of steps S21 to S27 shown in FIG. 12 is the same as the processing of steps S1 to S7 shown in FIG.

  In step S28 shown in FIG. 12, the CPU 21 stores authentication state information indicating that the authentication process using the encryption key is successful in the storage area corresponding to the encryption key used for the successful authentication process.

  Next, the CPU 21 determines whether or not there is authentication state comparison information and authentication state comparison condition information that matches (corresponds) the authentication state information (including updated authentication state information) corresponding to each encryption key (step). S29) If there is (step S29: YES), the process proceeds to step S30. If not (step S29: NO), the process proceeds to step S31.

  In step S30, the CPU 21 sets the status information of the peripheral device input / output port register indicated by the input / output port identifier associated with the authentication status comparison information and the authentication status comparison condition information to be high. Then, the process proceeds to step S31. As a result, an operation signal is transmitted to the peripheral device connected to the peripheral device input / output port.

  In step S31, the CPU 21 transmits (outputs) a normal end message via the authentication processing input / output port as a response to the central control device 1, and returns to step S21.

  As described above, according to the third embodiment, a combination of authentication results using a plurality of encryption keys is associated with an input / output port for a peripheral device, and an authentication corresponding to an authentication result by a plurality of authentication processes. Since the operation signal for operating the peripheral device is output from the peripheral device input / output port associated with the state comparison condition information, depending on the combination of a plurality of authentication results, the peripheral device can be used. The input / output port can be controlled, and an operation signal with higher security can be transmitted in a storage area with a small amount of SAM2.

  In addition, although the case where this invention was applied with respect to ATM was demonstrated in the said embodiment, it is not limited to this, It is applicable with respect to another processing system.

1 Central controller 2 SAM
21 CPU
22 Volatile memory 23 Nonvolatile memory 24 I / O port

Claims (10)

An authentication processing device that executes authentication processing in response to an authentication command from the central control device and outputs the authentication result to the central control device,
I / O port for authentication processing,
A plurality of peripheral device input / output ports connected to each of the plurality of peripheral devices;
Storage means for storing the key identifier and the encryption key data in association with each other;
Obtaining encryption key data corresponding to a key identifier included in the authentication command from the storage means when an authentication command including a key identifier and authentication data is input via the authentication processing input / output port Means,
Authentication means for executing an authentication process using the acquired encryption key data and authentication data included in the authentication command;
When the authentication process is successful, control means for outputting an operation signal for operating the peripheral device from the peripheral device input / output port related to the authentication processing;
An authentication processing device comprising: The authentication processing device according to claim 1,
In the storage means, an input / output port identifier indicating each peripheral device input / output port is stored, and the key identifier is associated with each input / output port identifier,
When the authentication process is successful, the control means uses the peripheral device input / output port indicated by the input / output port identifier associated with the key identifier corresponding to the encryption key data used for the authentication process. An authentication processing device that outputs an operation signal for operating the peripheral device. The authentication processing device according to claim 1,
The storage means stores input / output port identifiers indicating the peripheral device input / output ports, and further stores authentication state comparison condition information associated with each input / output port identifier.
The authentication unit executes the authentication process a plurality of times,
The control means operates the peripheral device from the peripheral device input / output port indicated by the input / output port identifier associated with the authentication state comparison condition information corresponding to the authentication result by the authentication processing a plurality of times. An authentication processing apparatus characterized by outputting an operation signal. In the authentication processing device according to any one of claims 1 to 3,
The authentication processing apparatus, wherein the control means outputs the operation signal from the peripheral device input / output port by changing state information of a register of the peripheral device input / output port. The authentication processing device according to claim 4,
It further comprises status storage means for storing status information corresponding to each of the peripheral device input / output ports and error detection information generated based on each status information,
The control means includes
If the authentication process is successful, the status information and the error detection information are stored in the status storage means without changing the status information of the register of the peripheral device input / output port,
When the interrupt process executed at a predetermined interval is started, the status information stored in the status storage means is output to the corresponding register of each peripheral device input / output port to output the status of the register An authentication processing apparatus characterized by changing information. The authentication processing device according to claim 5,
The control means includes
When an interrupt process executed at a predetermined interval is started, error detection information is generated based on each state information stored in the state storage unit,
When the generated error detection information matches the error detection information stored in the state storage unit, the state information stored in the state storage unit is used for each corresponding peripheral device. An authentication processing apparatus characterized in that the status information of the register is changed by outputting to the register of the input / output port. The authentication processing device according to any one of claims 1 to 6, and the peripheral device whose input / output port is opened and closed by driving a motor,
The processing system is characterized in that the peripheral device is controlled by the authentication processing device.   7. The authentication processing device according to claim 1, a central control device that outputs an authentication command to the authentication processing device, and a plurality of operations controlled by the authentication processing device or the central control device. And an automatic teller machine comprising a peripheral device. An authentication processing input / output port; a plurality of peripheral device input / output ports connected to each of the plurality of peripheral devices; An authentication processing method executed by a computer that executes authentication processing in response to an authentication command from the device and outputs the authentication result to the central control device,
When an authentication command including a key identifier and authentication data is input via the authentication processing input / output port, obtaining encryption key data corresponding to the key identifier included in the authentication command from the storage unit When,
Executing an authentication process using the acquired encryption key data and authentication data included in the authentication command;
If the authentication processing is successful, outputting an operation signal for operating the peripheral device from the peripheral device input / output port related to the authentication processing;
An authentication processing method comprising:   An authentication processing program for causing a computer to execute the authentication processing method according to claim 9.

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