JP5388002B2 - Analog-digital conversion element - Google Patents

Description

  The present invention relates to an analog-digital conversion element, and is particularly applicable to an electronic circuit member using a Coulomb blockade operation of a single electron transistor.

As an electronic circuit member using this type of single-electron transistor, the one described in Patent Document 1 has been proposed.
JP 2000-207881 A

  The single-electron transistor has a first and second junction part formed by joining a pair of conductive layers with a minute insulating layer interposed therebetween, and one conductive layer of the first and second junction parts is provided. Connected to each other to form a conductive island, and the other conductive layer of the first and second junctions is connected to a bias power source as a drain electrode and a source electrode, respectively, and the gate signal source is connected to the conductive island through the gate side capacitor. Connect to.

  In this way, the tunnel charge can be controlled by the gate signal by tunneling one tunnel charge at each of the first and second junctions in accordance with the amount of charge given to the conduction island from the gate signal source. A single electron transistor is formed.

This single electron transistor can inject or extract electrons one by one by tunneling the first junction constituting the drain electrode or the second junction constituting the source electrode from the bias power source. It is possible to detect a minute change amount of charge up to 10 ⁻⁶ e in correspondence with the gate signal.

  However, a single-electron transistor basically has a continuous change in the amount of charge blocked on the conduction island when the gate signal changes in an analog manner. When it is desired to obtain a digitally discrete signal with respect to the signal, the function as an electronic circuit member is insufficient.

  The present invention has been made in consideration of the above points, and intends to propose an analog-to-digital conversion element which can output an analog input signal as a digital signal when given.

In order to solve such a problem, in the present invention, the single electron transistor portion 2 formed by forming the first conductive island 13 in the connection portion between the drain electrode side junction portion 11 and the source electrode side junction portion 12, and the minute insulation a gate electrode side joining portion 21 engaged against a pair of conductive layers 21B and 21C so as to sandwich the layer 21A, the second conductive island and the other with receiving an input voltage Vin to the one of the pair of conductive layers 21B and 21C And a coupling capacitor 23 for coupling the second conductive island 24 of the quantizer unit 3 and the first conductive island 13 of the single electron transistor unit 2 to each other. In addition, the capacitance value of the input-side capacitance formed by the stray capacitance of the second conductive island 24 of the quantizer unit 3 and the capacitance value of the coupling capacitor 23 are selected to be equal.

According to the present invention, the conduction island of the gate electrode side junction portion, in which a pair of conductive layers are joined via the coupling capacitor, is connected to the conduction island of the gate side of the single electron transistor portion. the charge on the coupling capacitor via a conductive island by generating tunneling partitioned fine insulating layer of the gate electrode side joining portion in response to a change in the input voltage, based on a change in the charge amount of the coupling capacitors The tunneling operation of the single-electron transistor portion is performed , and in particular, the capacitance value of the input-side capacitance formed by the stray capacitance of the conduction island of the quantizer portion and the capacitance value of the coupling capacitor are selected to be equal. As a result, an analog-to-digital conversion element capable of obtaining a digital output having a discrete level change from the analog input voltage can be realized.

  Hereinafter, an embodiment of the present invention will be described in detail with reference to the drawings.

(1) Overall Configuration In FIG. 1, reference numeral 1 denotes an analog-digital conversion element as a whole, and includes a single electron transistor unit 2 and a quantizer unit 3.

  The single electron transistor unit 2 has a drain electrode side junction 11 and a source electrode side junction 12, and the drain side junction 11 is joined so that the minute insulating layer 11A is sandwiched between a pair of conductive layers 11B and 11C. The source electrode side bonding portion 12 has a configuration in which the micro insulating layer 12A is similarly bonded so as to be sandwiched between the pair of conductive layers 12B and 12C.

  The conductive layers 11C and 12C of the drain electrode side junction 11 and the source electrode side junction 12 are connected to each other to form a conductive island 13, and the drain electrode side junction 11 and the source electrode side junction 12 are respectively biased. The power supply is connected to 14 + 1/2 V [V] and 15-1 / 2 V [V].

  Thus, a bias voltage of + V / 2 [V] is applied to the conductive layer 11B of the drain electrode side junction 11 with respect to the ground GND, and a bias power source 15 is applied to the conductive layer 12B of the source electrode side junction 12. Thus, a bias voltage of −V / 2 [V] is applied to the ground GND.

Thus, the drain electrode side junction 11 functions as a tunnel element having the tunnel resistance R ₂ and the tunnel capacitance C ₂ by the micro insulation layer 11 A, and the tunnel resistance R ₃ and the tunnel by the micro insulation layer 12 A of the source side electrode side junction 12. functions as a tunnel element having a capacitance C _3.

Between the conductive island 13 and the ground GND, is a gate-side capacitance C _T made of stray capacitance formed, thereby injecting the tunneling from the drain electrode side joining portion 11 or the source electrode side joining portion 12 was Withdrawal A charge is held on the conductive island 13.

  The quantizer unit 3 has a gate electrode side junction 21.

Similar to the drain electrode side junction 11 or the source electrode side junction 12 of the single electron transistor unit 2, the gate electrode side junction 21 is joined so that the minute insulating layer 21A is sandwiched between the pair of conductive layers 21B and 21C. A conductive island 24 is formed by connecting one of the conductive layers 21C to the conductive island 13 of the single-electron transistor section 2 via a coupling capacitor 23 (capacitance C _K ).

The other conductive layer 21 </ b> B of the gate electrode side junction 21 is connected to the signal input terminal 25, and thereby the gate electrode side junction 21 according to the input signal of the input voltage V _in [V] applied to the input signal terminal 25. by the input side capacitor C _B to a minute insulating layer 21A of it is based on stray capacitance between the electron conducting islands 24 injected by the tunneling through the tunnel resistance R ₁ and the tunnel capacitor C ₁ and the ground GND, conducting island 24.

  In the configuration of FIG. 1, the quantizer unit 3 operates as an equivalent circuit as shown in FIG.

In Figure 2, when given a positive input voltage V _in to the signal input terminal 25, the gate electrode side joining portions 21, respectively on the capacitance value C _K capacitance values C _K and the coupling capacitor 23 of the input side capacitor 25 Charges in the direction shown in FIG. 2 are stored.

When you enter the input voltage V _in, where the charge to Q ₁ across the micro tunnel junction formed by the gate electrode side joining portion 21, (1)

As shown in FIG. 3, the micro tunnel junction performs a Coulomb blockage (ie, Coulomb blockade) operation as shown in FIG.

  In this state, the gate electrode side junction 21 can be regarded as equivalent to a capacitance.

At this time, the charge Q ₁ is distributed to the coupling capacitor 23 and the input-side capacitor 25 according to the law of conservation of charge at a ratio of the capacitance values C _K and C _B. Therefore, the charge Q _K of the coupling capacitor 23 is expressed by the following equation (2).

It becomes.

When the voltage across the gate electrode side joining portion 21 exceeds e / 2 by increasing the input voltage V _in this state, the gate electrode side joining portion 21 by the tunneling, the signal input terminal from the conductive island 24 As one electron tunnels to the 25 side, the charge on the conductive island 24 decreases by e.

The change that occurs in the charge Q _K of the coupling capacitor 23 due to the decrease in the charge is expressed by the following equation (3):

Thus, the gate electrode side junction 21 is again in the Coulomb closing operation state.

Thereafter, when the input voltage V _in the charge across the gate electrode side joining portion 21 increases exceeds 3e / 2, electrons in the conduction islands 24 happening again tunneling to the gate electrode side joining portion 21 is 1 Tunneling to the signal input terminal 25 side, and as a result, the charge Q _K of the coupling capacitor 23 changes by the amount expressed by the above-described equation (3).

In the same way, every time the voltage of the input voltage _{V in} is in excess of 5e / 2,7e / 2 ...... (2n -1) e / 2, conductive islands by gate electrode side joining portion 21 is the tunneling 24 One of the electrons tunnels to the signal input terminal 25 side.

Thus, the charge amount Q _K of the coupling capacitor 23 is the charge generated in the coupling capacitor 23 each time one electron is tunneled from the conduction island 24 to the signal input terminal 25 side by the tunnel operation of the gate electrode side junction 21. As the total change in quantity,

It becomes.

  Here, n indicates the number of electrons tunneled from the conductive island 24 to the gate electrode side junction 21.

Similarly, for the charge Q _B distributed to the capacitance value C _B of the input side capacitance 25 of the conductive island 24, the charge amount of the charge Q _B changes every time the gate electrode side junction 21 performs a tunnel operation. Thus, the amount of charge is given by equation (5),

It becomes.

(4) and (5) As is clear from the equation, the charge amount Q _B of the charge amount Q _K and stray capacitance 25 of coupling capacitor 23, a variation corresponding to the variation of the input voltage V _in, and the tunnel Change in accordance with the change in the input voltage Vin, and change corresponding to the number n of electrons tunneled by the tunnel operation of the gate electrode side junction 21. become.

  And the ratio of the change in the charge amount of the coupling capacitor 23 and the input side capacitor 25 is the equation (6):

Thus, it is determined by the ratio between the capacitance value C _K of the coupling capacitor 23 and the capacitance value C _B of the stray capacitance 25.

Although in Figure 2 describes the case the power supply voltage V _in a positive voltage, as shown in FIG. 4, the case where the power supply voltage V _in is negative also stored in the coupling capacitor 23 and the input side capacitor 25 also the charge amount Q _K and Q _B that can be obtained in the same manner.

From the equations (4) and (5), the charge amount Q _K of the coupling capacitor 23 and the charge amount Q _B of the input side capacitor 25 are the number of electrons tunneled from the gate electrode side junction 21 to the signal input terminal 25 side. When n is n = 0, 1, 2,... n, the gate electrode side junction 21 is tunneled while it continuously changes _in proportion to the input voltage Vin during the coulomb closing operation. at the time the electrons are tunnel to the signal input terminal 25 side one by one to the value of the charge amount Q _K and Q _B changes discretely.

For example, the charge amount Q _K of the coupling capacitor 23 is selected as C ₁ = 1 [aF], C _B = C _K = 1 [aF], the horizontal axis represents the input voltage V _in [V], and the vertical axis when taking the amount of charge Q _K [C], the change in charge quantity Q _K, as shown in FIG. 5, the charge amount Q _K is found to vary discretely each time electrons tunnel one (N = ......- 2, -1, 0, 1, 2,...).

(2) The capacitance C _K of the coupling capacitor 23 for coupling the quantizer section 3 of the operation such a configuration of the analog / digital converter and the single-electron transistor unit 2, a tunnel gate electrode side joining portion 21 based on the operation, by the amount of charge Q _K having discrete values in response to changes in the input voltage V _in applied to the signal input terminal 25 is accumulated, the discrete accumulated in the electrostatic capacitance C _K depending on the Do charge amount Q _K, the drain electrode side joining portion 11 and the source electrode side joining portion 12 of the single-electron transistor unit 2 in relation to the bias voltage V of the input voltage V _in and the bias power source 14 and 15, By generating the coulomb blockade region CKE shown in FIG. 6, an operation that exhibits the input / output characteristics as shown in FIG. 7 is performed.

That is, the gate electrode side joining portion 21 of the quantizer 3 is a tunneling once in response to a change in the input voltage _{V in (n = ...... -1,0,1 ......} ), the conductive island 24 The amount of charge e increased in FIG. 5 increases by the amount of charge of e / 2 in the input side capacitance 25 and the coupling capacitor 23 (by selecting the relationship of input side capacitance C _B = coupling capacitance C _K ).

  The increase e / 2 in the amount of charge of the coupling capacitor 23 causes the same change in the amount of charge to occur in the conduction island 13 of the single transistor unit 2, thereby causing a gate input charge signal to the single electron transistor unit 2. Will be given as.

  Here, when the input gate charge of the single electron transistor unit 2 is near “0”, the Coulomb blockade voltage of the single electron transistor unit 2 becomes a value near the maximum value as shown in FIG.

  On the other hand, when the gate input charge signal is in the vicinity of e / 2, the Coulomb blockade voltage of the single electron transistor unit 2 is a value in the vicinity of “0”.

  As a result, the value of the Coulomb blockade voltage in the Coulomb blockade region CKE varies greatly with the electron tunneling operation of the gate electrode side junction 21 of the quantizer unit 3.

In the case of the embodiment of FIG. 6, the value of the input side capacitance C _{B and} the value of the coupling capacitance C _K are selected to be equal to each other, and as a result, the number of tunneled electrons (n = ......− 1, 0, 1), the value of the Coulomb blockade region CKE has such a characteristic that the gate input charge falls sharply in the vicinity of... -E / 2, e / 2, 3e / 2.

Therefore, by using the characteristics of the Coulomb blockade region CKE, the set voltage (that is, the operating point voltage) V ₀ of the bias power supplies 14 and 15 of the single electron transistor unit 2 is set as shown by the broken line in FIG. It is selected to a value across the region CKE, as shown from the point a in the Coulomb blockade region CKE an arrow a, if we the value of the input voltage V _in increases to the point B in the direction of arrow a, the input voltage input and output characteristics of the output current Iout for V _in, as shown in FIG. 7, Coulomb in the value of the input voltage _{V in} between Cade region CKE whereas the output current Iout becomes a maximum value, the input voltage V _{When in} becomes the value _{in the} coulomb blockade region CKE, the input / output characteristic is obtained in which the output current Iout suddenly falls from the maximum value to the value “0”. It is done.

Thus, the input-output characteristic of the whole of the analog / digital converter device 1, when the input voltage V _in is became larger from the value "0", tunneling in the gate electrode side joining portion 21 of the quantizer 3 each time occurs, not linear with respect to changes in the input voltage V _in, the discrete output current Iout can be obtained, an output signal obtained by converting the value of the result input voltage V _in into discrete digital values It can be obtained as an output of the analog / digital conversion element 1.

In the case of this embodiment, the input / output characteristics of FIG. 7 are such that the gate electrode selects the junction capacitance C ₁ of the junction 21 to C ₁ = 1 [aF] and is coupled to the input side capacitance C _B of the stray capacitance 25. a coupling capacitance _{C K} of use capacitor 23 _C B _{= C} K ₌ 1 [aF], the bias voltage V V = 30 [mV], the gate electrode side joining portion 21, the drain electrode side joining portion 11 and the source electrode side junction the tunneling resistance R _{1, R} 2, _{R 3} parts 12 shows the calculation result of the output current when selected _{R 1 = R 2 = R 3} = 100 [kΩ].

  As a comparative example with respect to the input / output characteristics of the analog / digital conversion element 1 of FIG. 7, the output characteristic waveform W1 shows the input / output characteristics of only the single electron transistor section 2 without providing the quantizer section 3. Thus, by providing the drain electrode side junction 21, the Coulomb blockade region CKE is formed as a steep Coulomb blockade region boundary voltage based on the tunnel operation, which is effective as an analog / digital conversion output characteristic. It can be seen that steep input / output characteristics can be obtained.

  According to the above configuration, the quantizer unit 3 having the gate electrode side junction 21 is provided on the input side of the single electron transistor unit 2 and is coupled by the coupling capacitor 23. Thus, it is possible to easily realize the analog / digital conversion element 1 that can convert an analog input voltage that changes into a digital output signal that changes discretely with high accuracy.

(3) Second Embodiment FIG. 8 shows an analog / digital conversion element 1X according to the second embodiment. As shown in FIG. As the quantizer unit 3X connected to the transistor unit 2 via the coupling capacitor 23, a unit having an equivalent circuit shown in FIG. 9 is used.

  In this case, the quantizer unit 3X is provided between the signal input terminal 25 and the conductive layer 21B on the side receiving the input signal among the conductive layers 21B and 21C sandwiching the minute insulating layer 21A constituting the gate electrode side junction 21. A gate capacitor 31 is connected, and thus a conductive island 24B connecting the conductive layer 21B on the input side and the gate capacitor 31 is formed.

In the case of this embodiment, a stray capacitance 25B is generated between the input-side conductive island 24B and the ground GND, and this is used as the input-side upstream capacitor C _B1 .

The conductive layer 21C on the output side of the gate electrode side junction 21 forms a conductive island 24A by connecting to the coupling capacitor 23 in the same manner as in FIG. 1, and the floating between the conductive island 24A and the ground GND. The input side rear stage capacitor C _B2 is generated by the capacitor 25A.

8 and 9, in the state where the gate electrode side junction 21 does not perform the tunnel operation, the gate electrode side junction 21 operates in the same manner as the capacitor of the tunnel capacitance C ₁ , thereby input charge -Q _G corresponding to _{V in} of the input voltage of the input terminal 25 is generated in the electrodes of the conductive island 24B side, and the charge + _{Q 1} which is for the tunnel capacitance _{C 1} of the gate-side electrode junction 21, conducting island 24B Is distributed as the charge Q _B1 of the input-side upstream capacitor C _B1 formed by the floating capacitor 25B.

Thus, as a charge + Q ₁ occurring in conductive islands 24A side of the gate-side electrode junction 21 is distributed to the coupling capacitance C _K of the coupling capacitor 23 and the input side subsequent capacitance C _B2 of the stray capacitance 25A of conductive islands 24A Accumulated in.

In the above configuration, as long as the charge with respect to the change of the input voltage V _in is accumulated in the tunnel capacitor C ₁ of the gate electrode side joining portion 21 does not produce a tunneling, a tunnel of the gate-side electrode junction 21 by capacitance C ₁ charge Q _K accumulated in the coupling capacitance C _K of the coupling capacitor 23 is changed by changing in response to changes in the input voltage V _in, the output current Iout single-electron transistor unit 2 It changes according to the change of the input voltage Vin.

From this state, when the gate electrode side junction 21 performs a tunnel operation based on the change in the charge amount −Q ₁ of the gate electrode side junction 21 in accordance with the change _in the input voltage Vin, the conductive island 24B is responded accordingly. with electrons tunneling through the gate electrode side joining portion 21 to the conductive island 24A side, thereby the charge accumulated in the coupling capacitance C _K of the coupling capacitor 23 is changed discretely generated.

Consequently 8 and quantizer unit 3X configuration of FIG. 9, the coupling capacitance C _K Similarly the input voltage and the charge amount Q _K is described above with reference to FIG. 5 of the same coupling capacitor 23 and described above with reference to FIG. 5 the gate electrode side joining portion 21 acts like discretely changed each time the tunnel operation in response to changes in V _in.

When the single electron transistor unit 2 is controlled by the change in the charge amount Q _K of the coupling capacitor C _K , the output current Iout also exhibits the same change as the discrete change in FIG.

Therefore by construction of FIGS. 8 and 9, it is possible to input voltage V _in and outputs the converted to discrete changes in the single-electron transistor unit 2 when the continuous change.

Thus, the coupling capacitance _{C K} of the coupling capacitor 23, (7)

Along with the charge of the charge amount Q _K are accumulated as to the input side subsequent capacitance C _B2, (8) formula

Change in the amount of charge Q _B2 of.

The ratio of change in charge quantity _{Q B2} of the charge amount _{Q K} and the input side subsequent capacitance _{C B2} of the coupling capacitance _{C K} is (9)

Thus, the ratio of the input side rear stage capacitance C _B2 and the coupling capacitance C _K is obtained.

(4) Other Embodiments In the embodiments of FIGS. 1 and 8, the output current Iout is used as the output of the single electron transistor unit 2, but the output current Iout flows instead. An output resistor may be inserted into the circuit, and the voltage between both ends may be sent out as the output of the single electron transistor unit 2.

(5) Embodiment FIG. 10 shows an analog-digital conversion circuit 30 using the above-described analog-digital conversion element 1 or 1X. The analog input V ₁ is divided into three divided voltage inputs V _1A by an input voltage divider circuit 31. V _1B and V _1C are input to the input terminals 25 of the conversion elements 1A, 1B, and 1C constituted by the analog-digital conversion element 1 or 1X.

Input divider 31 is input to the serial partial pressure condenser 33A-33B-33C which is connected to ground GND at one end through an input capacitor 32 to the analog input voltage _{V 1.}

The first-stage voltage dividing capacitor 33A has a capacitance value 2C, is connected to a first-stage parallel voltage dividing capacitor 34A having a capacitance value C and connected to the ground GND, and a divided voltage input V obtained at this connection end. _1A is input to the signal input terminal 25 of the first stage conversion element 1A.

The second-stage series voltage dividing capacitor 33B has a capacitance value of 2C, and the second-stage parallel voltage divider having the capacitance C and connected to the ground GND is connected to the first-stage series voltage dividing capacitor 33A. Connected to the capacitor 34B, the divided input V _1B obtained at the connection end is applied to the signal input terminal 25 of the second stage conversion element 1B.

The third-stage series voltage dividing capacitor 33C has a capacitance C, and a third-stage parallel voltage division having the capacitance C at the connection end to the second-stage voltage dividing capacitor 33B and connected to the ground GND. The voltage input V _1C obtained at the connection end is applied to the signal input terminal 25 of the third stage conversion element 1C.

The first-stage, second-stage and third-stage conversion elements 1A, 1B and 1C are output bits V _2A , V _2B and V _{2C obtained} by converting the discrete output current Iout into 3 bits of the digital output Dout. Send as output.

In the configuration of FIG. 10, the analog input V ₁ input via the input capacitor 32 is directly input to the first stage conversion element 1A as the voltage input V _1A . As a result, as shown in FIG. 7, the output current Iout rises to a logic “1” level in the range of V _{11 to} V ₁₃ , V _{15 to} V ₁₇ ... Of the input voltage V ₁ through which the output current Iout flows in the single electron transistor unit. An output voltage V _2A that rises to a logic “0” level is obtained in the range V _{10 to} V ₁₁ , V _{13 to} V ₁₅ , V _{17 to} V ₁₈ ... Of the input voltage V _{1 that} does not flow.

By the charge stored on input capacitor 32 by the analog input V ₁ it is being distributed in accordance with the ratio to the capacitance value C of the capacitance values 2C and dividing capacitors 34A series partial pressure capacitor 33A, in series partial pressure condenser 33A Obtains a divided input V _{1B that} is ½ of the analog input voltage V ₁ , and supplies this to the conversion element 1B.

Thus since minute pressure input transducer 1B is inputted to the signal input terminal 25 will have a voltage value of 1/2 of the analog input V _1, as shown in FIG. 11 (B), the output current 7 range _V 10 input voltages _{V 1} to range _{V 12} ~V 16 _...... and the output current of the input voltage _{V 1} is not flow flowing _{~V 12, V 16 ~V} 18 _...... and twice the analog input voltages _{V 1} Will respond to changes.

Therefore, the output voltage V _2B (FIG. 11B) of the second stage conversion element 1B is twice as large as the change width of the analog input V ₁ compared to the first stage output voltage V _2A (FIG. 11A). To generate logical “1” and “0” intervals.

The second stage of press-fitting force V _1B to share charge amount at a ratio of the capacitance values 2C and C to the series partial pressure condenser 33B and the second-stage parallel partial pressure condenser 34B.

As a result, the third stage divided input V _1C is applied to the signal input terminal 25 of the third stage conversion element 1C as a voltage value that is ½ of the divided input V _1B (thus, ¼ of the analog input voltage V ₁ ).

As a result, as shown in FIG. 11C, the third stage conversion element 1C causes the input voltage V _1C to become ¼ compared to the input voltage V _{1A of} the first stage conversion element 1A, thereby The input voltage V ₁ range V _{14 to} V ₁₈ ... In which the output current flows and the voltage range V _{10 to} V ₁₄ ... In which the output voltage does not flow are quadrupled compared to the case of the first stage conversion element 1A. Will spread.

  Thus, a digital output Vout composed of a combination of logic levels of the output voltages V2A, V2B and V2C of the conversion elements 1A, 1B and 1C is obtained as a 3-bit gray output as shown in FIG.

According to the above configuration, the single-electron transistor unit 2 that operates based on the behavior of one electron generates a discrete output based on the tunneling operation of the quantizer unit 3, thereby providing an analog input. analog can accurately convert V ₁ to a digital output Vout - digital conversion circuit 30 can be realized.

  Although FIG. 10 shows an example in which a flash type analog-digital conversion circuit is realized with a capacitive ladder using the analog-digital conversion element 1 or 1X, it can also be realized with a resistance ladder.

  The present invention can be applied to an electronic circuit element that obtains a discrete electrical output based on the behavior of one electron.

1 is an electrical connection diagram showing an embodiment of an analog-digital conversion element according to the present invention. FIG. 2 is an electrical connection diagram illustrating an equivalent circuit of the quantizer unit of FIG. 1. It is a characteristic curve figure with which it uses for description of the Coulomb obstruction | occlusion operation | movement of a gate electrode side junction part. It is an electrical connection diagram which shows the modification of FIG. It is a characteristic curve diagram showing the change of the charge amount Q _K for the input voltage V _in of the coupling capacitor in FIG. It is a characteristic curve figure with which it uses for description of the Coulomb blockade area | region of the gate side electrode junction part of a quantizer part. It is a characteristic curve figure which shows the input-output characteristic of an analog-digital conversion element. It is an electrical connection diagram which shows the analog-digital conversion element of 2nd Embodiment. FIG. 9 is an electrical connection diagram illustrating an equivalent circuit of the quantizer unit 3X of FIG. It is a block diagram which shows the analog-digital conversion circuit using the analog-digital conversion element by this invention. (A) ~ (E) is a signal waveform diagram showing a digital output Dout corresponding to the analog input _{V 1.}

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1, 1A-1C ... Analog-digital conversion element, 2 ... Single electron transistor part, 3 ... Quantizer part, 11 ... Drain electrode side junction part, 11A ... Micro insulation layer, 11B, 11C ... ... conductive layer, 12 ... source electrode side junction, 12A ... micro-insulating layer, 12B, 12C ... conductive layer, 13 ... conduction island, 14, 15 ... bias power supply, 21 ... gate electrode side junction , 21A: Micro insulating layer, 21B, 21C: Conductive layer, 23: Coupling capacitor, 24: Conduction island, 25: Input side capacitance, 25: Signal input terminal, 31: Capacitor for gate, 32... Input capacitor, 33 A, 33 B, 33 C... First stage, second stage, third stage series voltage dividing capacitor, 34 A, 34 B, 34 C. Parallel voltage dividing capacitor, 30.

Claims (1)

A single-electron transistor portion formed by forming a first conductive island at a connection portion between the drain electrode side junction and the source electrode side junction;
Quantization comprising a gate electrode side junction where a pair of conductive layers are joined so as to sandwich a minute insulating layer, one of the pair of conductive layers receiving an input voltage and the other connected to a second conductive island The vessel,
A coupling capacitor for coupling the second conduction island of the quantizer section and the first conduction island of the single-electron transistor section ;
An analog-digital conversion characterized in that the capacitance value of the input-side capacitance formed by the stray capacitance of the second conduction island of the quantizer section and the capacitance value of the coupling capacitor are selected to be equal. element.