JP5331670B2 - Magnetic disk drive and refresh / write method thereof - Google Patents

Description

  The present invention relates to a magnetic disk drive and a refresh / write method thereof, and more particularly, to magnetic data protection from repeated data writing.

  As a disk drive, an apparatus using a disk of various modes such as an optical disk, a magneto-optical disk, or a flexible magnetic disk is known. Among them, a hard disk drive (one of magnetic disk drives) ( HDD) is used in many electronic devices such as a moving image recording / reproducing apparatus and a car navigation system in addition to a computer system.

  A magnetic disk used in the HDD has a plurality of data tracks and a plurality of servo tracks formed concentrically. Each servo track is composed of a plurality of servo sectors having address information. Each data track is composed of a plurality of data sectors including user data. Data sectors are recorded between servo sectors spaced apart in the circumferential direction. The head element portion of the head slider supported by the oscillating actuator accesses the desired data sector according to the address information in the servo sector, thereby writing data to the data sector and data from the data sector. Reading can be performed.

  The HDD repeats data writing and reading on the recording surface of the magnetic disk. Due to the recent increase in the density of magnetic recording, it is known that when writing data to a selected data track, the leakage magnetic field from the head slider affects the magnetic data in the track adjacent to that track. Yes. It is also known that repetitive magnetization changes on data tracks affect the magnetization of adjacent data tracks. Such an influence on the adjacent data track is referred to as ATI (Adjacent Track Interference).

  When data writing to a data track is repeated, interference with the adjacent data track due to the leakage magnetic field from the head slider and the magnetization change of the data track is repeated, and the user data of the adjacent data track changes. Data loss (read hard error) may occur.

  In order to prevent such a read hard error, a technique for counting the number of times of writing to the data track and rewriting the data of the adjacent data track when the number of times of writing reaches a threshold value is proposed in Patent Document 1. Has been. In this technique, a recording area is divided into sub areas, and when the cumulative number of recording operations in the sub area exceeds a limit value, data in the sub area is re-recorded. When the HDD is not busy, it re-records data in the sub area as a background task.

JP 2006-294231 A

  As described above, continuous writing to the same data track affects the magnetization state of the adjacent data track, and the data in the data track may be deteriorated or lost. In order to prevent this, as disclosed in the above-mentioned prior document, the HDD counts the number of times data is written to a track bundle of data tracks or a plurality of data tracks, and rewrites the data track when the specified number is reached. (Referred to as a refresh / write function in this specification) is implemented. The refresh write performs reading of the target data track and writing of the same data to the target data track.

  With the increase in data recording density, the above functions have become essential for HDDs. However, at the same time, the number of times of writing, which serves as a reference for refresh writing of the data track, also decreases as the data recording density increases. For example, in the past HDD data refresh / write was performed for 10,000 writes, but recent HDDs are required to perform data refresh / write for 2,000 writes. ing.

  This data track refresh write affects the performance of the HDD. An increase in the frequency of activation of the above functions due to an increase in data recording density cannot be ignored due to an adverse effect on performance. Therefore, there is a demand for a technique that can prevent data loss in other data tracks due to data writing to the data track while suppressing a decrease in HDD performance.

  A magnetic disk drive according to an aspect of the present invention includes a magnetic disk having a plurality of data tracks, a head for accessing the magnetic disk, a moving mechanism for moving the head in a radial direction on the magnetic disk, A moving mechanism and a controller for controlling the head. The controller uses the number of writes to the write area corresponding to the refresh / write area to determine the priority of the refresh / write area. When the priority reaches the first threshold value, the refresh / write area is included in the refresh / write processing target during idling. When the priority reaches a second threshold value that is higher than the first threshold value, the refresh / write area is subjected to the refresh / write process at the time of idling and the refresh / write process accompanying the command corresponding process. Include in With this configuration, it is possible to prevent data loss of other data tracks due to data writing to the data track while suppressing deterioration of the performance of the magnetic disk drive.

  Preferably, the controller executes a refresh write from a refresh write area having a high priority in the refresh write process during idling. Thereby, data loss can be prevented more reliably.

  Preferably, the controller executes the idle refresh write process in a power save mode. Thereby, the possibility of receiving a command during the refresh / write process can be reduced.

  In a preferred configuration, the command corresponding process is a process corresponding to a write command, a write cache function corresponding to the write command is ON, and the controller performs the write command before notifying the completion of the write command. A refresh / write process associated with the command handling process is executed. As a result, it is possible to avoid receiving a new command during the refresh / write process while minimizing the performance degradation seen from the host.

  In a preferred configuration, the refresh / write process associated with the command corresponding process refreshes and writes only a part of the refresh / write area corresponding to one command, and the controller reaches the second threshold value. The frequency of the refresh / write process associated with the command corresponding process is changed according to the number of refresh / write areas having a certain priority. As a result, data loss can be more reliably prevented while reducing performance degradation.

  In a preferred configuration, the refresh write area includes a proximity area including the write area, and a remote area on the inner and / or outer peripheral side of the proximity area, and the controller In the processing, refresh / write of a part of the far area is executed. As a result, it is possible to efficiently perform the refresh write while reducing the influence on the performance of the remote area refresh write.

  In a preferred configuration, the controller includes a counter that counts the number of writes to the write area, and when the counter value reaches a first threshold, the refresh write area is set to the refresh write at idle time. When the counter value reaches a second threshold value that is larger than the first threshold value, the refresh / write area is updated from the first list with a command corresponding process. Move to the second list, which is a list of write processes, refer to the second list, determine an area for the refresh / write process associated with the command corresponding process, and refer to the second list and the first list Then, an area for performing the refresh / write process at the time of idling is determined, and the area of the second list is determined. And perform a fresh write ahead region of the first list. Thereby, the execution control of the refresh / write process can be appropriately performed by a simple method.

  Another aspect of the present invention is a method for refreshing and writing data on a magnetic disk in a magnetic disk drive. In this method, the priority of the refresh / write area is determined using the number of times of writing to the write area corresponding to the refresh / write area. When the priority reaches the first threshold, the refresh / write area is included in the refresh / write processing target at the idle time. When the priority reaches a second threshold value that is higher than the first threshold value, the refresh / write area is subjected to the refresh / write process at the time of idling and the refresh / write process accompanying the command corresponding process. Include in As a result, it is possible to prevent the data loss of other data tracks due to the data writing to the data track while suppressing the deterioration of the performance of the magnetic disk drive.

  According to the present invention, it is possible to prevent data loss of other data tracks due to data writing to the data track while suppressing a decrease in performance of the magnetic disk drive.

1 is a block diagram schematically showing an overall configuration of an HDD according to an embodiment. In this embodiment, it is a figure which shows typically the preferable example of the object area | region which counts the frequency | count of writing, and the refresh write area | region corresponding to the object area | region. In the present embodiment, examples of a forced refresh write list and an idle refresh write list are schematically shown. 6 is a flowchart showing a flow of a preferred example of refresh / write processing in the present embodiment. 6 is a flowchart showing a flow of a preferred example of refresh / write processing in the present embodiment. 6 is a flowchart showing a flow of a preferred example of refresh / write processing in the present embodiment. In this embodiment, it is a figure which shows typically the data track bundle which is a count unit of the frequency | count of writing, and another preferable example of the refresh write area | region corresponding to it. In this embodiment, it is a figure which shows typically the method of refreshing and writing a part of section which divided | segmented FTI area | region with the ATI area | region. It is data indicating the refresh / write times and performance test results of HDDs to which the present invention is applied and HDDs to which the present invention is not applied.

  Hereinafter, embodiments of the present invention will be described. For clarity of explanation, the following description and drawings are omitted and simplified as appropriate. Moreover, in each drawing, the same code | symbol is attached | subjected to the same element and the duplication description is abbreviate | omitted as needed for clarification of description. In the following, an embodiment in which the present invention is applied to a hard disk drive (HDD) which is an example of a magnetic disk drive will be described.

  The present embodiment is characterized by a technique for preventing data loss due to the influence of data writing on adjacent data tracks. The HDD according to the present embodiment performs data refresh / write according to the number of times of writing. In refresh / write, data in a target area is read, and the same data as the read data is written in the target area. The HDD according to this embodiment has at least two different thresholds for the number of times of writing, which serve as a refresh / write standard. Based on these threshold values, the HDD gives priority to an area where refresh / write is performed.

  The HDD according to the present embodiment further performs refresh / write processing with different execution timings. One refresh / write process is executed in association with a process corresponding to a command from the host. Another refresh / write process is executed during idling. The refresh / write process associated with the command handling process targets only high priority areas. On the other hand, the refresh / write process during idling covers not only the high priority area but also a low priority area.

  In this way, high-priority area refresh / write is performed in conjunction with command processing, and high-priority and low-priority area refresh / write is performed at idle, thereby suppressing performance degradation and ATI. It is possible to prevent user data from being lost due to (Adjacent Track Interference).

  Prior to detailed description of the refresh processing of the present embodiment, the overall configuration of the HDD will be described first. FIG. 1 is a block diagram schematically showing the overall configuration of the HDD 1. On a circuit board 20 fixed to the outside of the enclosure 10, a read / write channel (RW channel) 21, a motor driver unit 22, a hard disk controller (HDC) and an MPU integrated circuit (HDC / MPU) 23 are provided. Each circuit such as the RAM 24 of the semiconductor memory is mounted. Each circuit is mounted on one or a plurality of chips.

  In the enclosure 10, a spindle motor (SPM) 14 rotates a magnetic disk 11 which is a disk for storing data at a predetermined angular velocity. The head slider 12 serving as a head includes a slider that floats on the magnetic disk 11 and a head element unit that is formed on the slider and converts magnetic signals and electric signals (reads and writes data). The head slider 12 is fixed to the tip of the actuator 16.

  The actuator 16 is connected to a voice coil motor (VCM) 15 and moves in the radial direction on the magnetic disk 11 rotating the head slider 12 by swinging about a swing shaft. The actuator 16 and the VCM 15 are moving mechanisms for the head slider 12. The motor driver unit 22 drives the SPM 14 and the VCM 15 according to control data from the HDC / MPU 23.

  The arm electronic circuit (AE) 13 selects the head slider 12 that accesses (reads or writes) the magnetic disk 11 from the plurality of head sliders 12 according to the control data from the HDC / MPU 23, and outputs the read / write signal. Perform amplification. In the read process, the RW channel 21 extracts servo data and user data from the read signal acquired from the AE 13 and performs a decoding process. The decoded data is supplied to the HDC / MPU 23. In the write process, the RW channel 21 code-modulates the write data supplied from the HDC / MPU 23, converts the code-modulated data into a write signal, and supplies the write signal to the AE 13.

  In the HDC / MPU 23, the HDC is a digital circuit having various functions, and the MPU operates according to firmware. As the HDD 1 starts up, data (including programs) required for control and data processing is loaded into the RAM 24 from the magnetic disk 11 or ROM (not shown).

  The HDC / MPU 23 temporarily stores the read data from the magnetic disk 11 acquired from the RW channel 21 in a buffer in the RAM 24 and then transmits the read data to the host 51. The HDC / MPU 23 temporarily stores write data from the host 51 in a buffer in the RAM 24 and then transfers the write data to the RW channel 21 at a predetermined timing. The HDC / MPU 23 is an example of a controller, and performs overall control of the HDD 1 in addition to necessary processing relating to data processing such as head positioning control, interface control, and defect management. In particular, the HDC / MPU 23 of the present embodiment executes a refresh / write process.

  As described above, the HDC / MPU 23 according to the present embodiment has at least two different write frequency threshold values which are refresh / write standards. With these threshold values, the HDC / MPU 23 gives priority to the area where refresh / write is performed. In a preferred configuration described in detail below, the HDC / MPU 23 has two different priorities in the refresh / write process. Depending on the design, the HDD may have three or more different priorities. Also, the HDD may use factors other than the number of times of writing as conditions for determining the priority.

  From the viewpoint of processing simplicity, the HDC / MPU 23 preferably has two different priorities determined by the number of writes. The HDC / MPU 23 assigns a low priority to the refresh / write area corresponding to the area where the write count exceeds a small threshold (small threshold). Further, the HDC / MPU 23 gives a high priority to the refresh / write area corresponding to the area where the write count exceeds the threshold (large threshold).

  Further, the HDC / MPU 23 of the present embodiment executes a refresh / write process accompanying a process corresponding to a command from the host, and also executes a refresh / write process when idling. The refresh / write process associated with the command handling process targets only the high priority area. On the other hand, the refresh / write processing during idling covers both the high priority area and the low priority area. In a configuration in which three or more priorities are set, all or a part of them may be subjected to refresh / write processing during idling.

  The HDC / MPU 23 having a preferable configuration performs a refresh / write process accompanying a write process (a process corresponding to a write command), and a refresh / write process accompanying another command (mainly a read command). Do not do. When the write cache function is enabled, the HDC / MPU 23 can return the completion of the write process to the host earlier than the read process. Compared with the refresh / write process associated with the read process, the refresh / write process associated with the write process can reduce the influence on the performance. Depending on the design, the HDC / MPU 23 may perform a refresh / write process in association with a process for a command other than the ride command.

  The idle mode is a standby mode in which processing corresponding to a command from the host is completed and waiting for the next command. The HDD 1 of this embodiment has three different idle modes. Two of them are power save modes. One power save mode turns off unnecessary circuit portions while maintaining the rotation of the magnetic disk. In another power save mode, in addition to the circuit OFF, the rotation of the SPM 14 is stopped, and a larger power save is performed. The other idle mode is a normal standby mode, which is prepared to immediately respond to a command from the host without performing a power save.

  In a preferred configuration described below, the HDC / MPU 23 performs a refresh write in the two power save modes and does not perform a refresh write in the normal standby mode. This reduces the possibility of receiving a new command during the refresh / write process and avoids processing complexity. Depending on the design, the HDC / MPU 23 may perform refresh write even in all idle modes, or may perform refresh write only in one power save mode. The type and number of idle modes vary depending on the design of the HDD 1, and the present invention can be applied to any configuration.

  The HDC / MPU 23 backs up existing data in the refresh / write process. Specifically, the HDC / MPU 23 reads the data to be rewritten by the head slider 12 and writes the data to another predetermined data track. Thereafter, the same data is again written in the read data sector by the head slider 12. In the refresh write, it is preferable to rewrite the entire one data track in one process, but only a part of the data sectors of the data track may be rewritten in one process. These points are the same in the following other configurations.

  In a preferred configuration, the HDC / MPU 23 counts the number of writes for each track bundle composed of a plurality of continuous data tracks, and performs refresh / write processing when the count value reaches a threshold value. FIG. 2 schematically shows a target area for counting the number of times of writing and a refresh / write area corresponding to the target area in one preferred configuration.

  The lower side in FIG. 2 is the inner peripheral side, and the upper side is the outer peripheral side. An area 111 from the data track Tr_k to the data track Tr_k + 1 is a unit area for counting the number of times of writing. The region 111 is formed by a plurality of data tracks, and is a bundle of data tracks. The areas 111, 112a, and 112b of the data track Tr_k-m to the data track Tr_k + 1 + m are refresh write areas.

  The HDC / MPU 23 counts up (or counts down) the associated counter each time a data track in the data track bundle 111 is written. When the counter value reaches a predetermined threshold value, the HDC / MPU 23 rewrites the data in the rewrite areas 111, 112a, and 112b. Typically, the counter is a variable in the program.

  As shown in FIG. 2, the refresh / write area includes adjacent areas 112a and 112b on both sides in addition to the data track bundle 111 for counting the number of times of writing. In FIG. 2, the adjacent areas 112 a and 112 b are configured by the same number of data tracks, but may be different depending on the configuration of the HDD 1. This point is the same in the following other configurations.

  The magnetic disk recording surface is divided into a plurality of data track bundles, and each data track bundle is continuously arranged. The HDC / MPU 23 counts the number of times each data / track bundle is written. As described above, when the count value reaches the threshold value, the refresh write is executed in the area corresponding to the data track bundle.

  Rather than counting the number of data writes for each data track, the memory area and arithmetic processing required for refresh / write processing are counted by counting the number of data writes using a bundle of multiple data tracks as a unit. Can be reduced. Further, since the refresh write area includes the adjacent areas on both sides in addition to the data track bundle, data loss due to data writing can be prevented more reliably. The present invention can also be applied to a configuration in which the number of writes is counted for each data track, or a configuration in which only the data track bundle 111 that counts the number of writes is rewritten. These points are the same in other preferable configurations described below.

  As described above, the HDC / MPU 23 of the present embodiment executes the refresh / write process associated with the write command handling process and the refresh / write process at idle. In the following, the former is called forced refresh / write processing, and the latter is called idle refresh / write processing. The condition threshold value corresponding to each refresh / write process is different, and the threshold value of the forced refresh / write process is larger than the threshold value of the idle refresh / write process. For example, the small threshold is 1,000 and the large threshold is 2,000.

  As described above, the HDC / MPU 23 gives two thresholds to the data track bundle 111. The HDC / MPU 23 further has a forced refresh / write process list and an idle refresh / write process list. FIG. 3 schematically shows a forced refresh write list and an idle refresh write list.

  When the number of writes to the data track bundle reaches the small threshold, the data track bundle is registered in the idle refresh write list. When the number of writes to the data track bundle reaches a large threshold value, the data track bundle is registered in the forced refresh write list. In the example of FIG. 3, the head number and the head cylinder number are registered as the ID information of the data / track bundle.

  When the HDC / MPU 23 receives the write command, the HDC / MPU 23 refreshes the data track bundle registered in the forced refresh write list before returning a completion notification to the host 51. When a plurality of data track bundles are registered, it is preferable to perform refresh / write processing for one selected data track bundle in order to prevent performance degradation. For example, the HDC / MPU 23 selects the data track bundle in the registration order. When the data track bundle is not registered in the forced refresh write list, the HDC / MPU 23 does not perform the refresh write process associated with the write process.

  When the HDC / MPU 23 enters the power save mode, it refers to the forced refresh write list and the idle refresh write list. The HDC / MPU 23 performs the refresh write process with priority from the data track bundle registered in the forced refresh write list. In one list, typically, refresh / write processing is executed in the order of registration. The HDC / MPU 23 sequentially executes refresh / write processing of registered data track bundles until a new command is received from the host 51.

  When the HDC / MPU 23 executes the refresh / write processing of the data track bundle, the HDC / MPU 23 restarts the count of the number of times of writing to the data track bundle from the initial value. Typically, the HDC / MPU 23 has a counter corresponding to each data track bundle, and when the refresh / write process is executed, the counter value is cleared.

  A more specific example of the refresh / write process by the HDC / MPU 23 will be described with reference to the flowcharts of FIGS. A method for registering in the refresh write list will be described with reference to the flowchart of FIG. The HDC / MPU 23 has a counter corresponding to each data track bundle, and changes the counter value of the corresponding counter every time data is written to the data track bundle (S11). This is repeated until the value of one of the counters reaches the small threshold value (N processing in S12). When the value of any counter reaches the small threshold (Y in S12), the HDC / MPU 23 registers the ID information of the data track bundle corresponding to the counter in the idle refresh write list (S13).

  When the HDC / MPU 23 registers the first data track bundle in the idle refresh write list, the HDC / MPU 23 sets a reski flag (S14). The risky flag is maintained while the data track bundle of one of the two refresh write lists is registered. If the counter value of any counter has not reached the large threshold value (N in S15), the process returns to step S11. When the counter value of a specific counter reaches the large threshold (Y in S15), the HDC / MPU 23 registers the ID information of the data track bundle of the counter in the forced refresh write list, and further, the ID information is stored. Delete from the idle refresh write list (S16).

  Next, a processing example of the HDC / MPU 23 that has received a write command from the host 51 will be described with reference to the flowchart of FIG. When the HDC / MPU 23 receives a write command from the host 51 (S21), the HDC / MPU 23 refers to the risk flag before starting the processing corresponding to the write command (S22). When the riski flag indicates that there is no list registration data track (N in S22), the HDC / MPU 23 notifies the host 51 of the completion of the write command (S24), and then the write command handling process (write Process) is started (S25).

  When the riski flag indicates that the list registration data track is present (Y in S22), the HDC / MPU 23 refers to the forced refresh write list (S23). If there is no registration item in the forced refresh write list (N in S23), the HDC / MPU 23 notifies the host 51 of the completion of the write command (S24), and then performs a write command handling process (write process). Start (S25). Thus, it is preferable that the write cache function is ON and the HDC / MPU 23 starts writing user data to the magnetic disk 11 after returning a write completion notification to the host 51.

  When a data track bundle is registered in the forced refresh write list (Y in S23), the HDC / MPU 23 performs a write command corresponding process (write process) (S26), and then the registered data -Refresh / write the area corresponding to the track bundle (S27). In consideration of unexpected power shutdown or reset, it is preferable to execute the write process before the refresh write.

  After the refresh / write is completed, the HDC / MPU 23 notifies the host 51 of the completion of the write command (S28). Typically, the HDC / MPU 23 reads, backs up, and rewrites one data track at a time. This is the same in all refresh / write processes. Since the write completion is not notified, a new command is not received during the refresh / write process. The HDC / MPU 23 may perform refresh / write before the write process.

  In a preferred configuration, the HDC / MPU 23 performs a refresh write of a part of the refresh write area in response to one write command. For example, the refresh write area is composed of 12 data tracks, and the HDC / MPU 23 performs refresh write of 3 data tracks in response to one write command. Depending on the design, all data tracks in the refresh write area may be rewritten in response to one write command.

  As described above, the area is divided so as to correspond to a plurality of write commands, and one refresh write area (data track bundle) is subjected to refresh write processing corresponding to the plurality of write commands. Reduce visible performance degradation. The HDC / MPU 23 has a counter corresponding to the data track bundle in the middle of the refresh / write, and changes the counter value every time the refresh / write of the partial area is completed. Can be rewritten.

  Next, an example of the refresh / write process during idling will be described with reference to the flowchart of FIG. When the power save mode, which is one of the idle modes, is entered (S31), the HDC / MPU 23 refers to the risky flag (S32). When the risk flag indicates that there is no list registration data track (N in S32), the process ends. When the riski flag indicates that the list registration data track is present (Y in S32), the HDC / MPU 23 refers to the forced refresh write list (S33).

  When the data track bundle is registered in the forced refresh write list (Y in S33), the HDC / MPU 23 performs a refresh write of the area corresponding to the registered data track bundle (S34). When all the refresh writes of the registered data track bundle in the forced refresh write list are completed or no registered data track bundle exists from the beginning (N in S33), the HDC / MPU 23 The write list is referred to (S35).

  When the data track bundle is registered in the idle refresh write list (Y in S35), the HDC / MPU 23 performs a refresh write of the area corresponding to the registered data track bundle (S36). . When the refresh / write of the area is completed, the HDC / MPU 23 erases the data track bundle from the list.

  When all the refresh writes of the registered data track bundle in the idle refresh write list are completed, or when no registered data track bundle exists from the beginning (N in S35), the HDC / MPU 23 finishes the process. To do. When a new command is received during the refresh / write process, the HDC / MPU 23 stops the refresh / write process.

  When the HDC / MPU 23 enters the power save mode next time, the HDC / MPU 23 performs refresh write processing of the registered data track bundle from the beginning. Alternatively, the HDC / MPU 23 may have a counter indicating the progress status of the refresh / write, and may restart the refresh / write process from the interrupted data track by referring to the counter.

  In a preferred configuration, the HDC / MPU 23 uses a normal read buffer in the refresh / write process. Thereby, the capacity of the RAM 24 can be reduced. When the refresh write process uses the read buffer, the data in the read buffer is changed. The HDC / MPU 23 preferably initializes the read cache table before performing a data read for a refresh write so that an erroneous read cache hit is not determined.

  In the configuration described with reference to FIG. 2, the refresh / write area is composed of the data track bundle 111 and adjacent areas 112a and 112b in the vicinity thereof. In another preferred configuration, the HDC / MPU 23 rewrites the data track farther away in addition to the regions 112a, 112b near the data track 111. As a result, data loss due to repeated data writing can be prevented more reliably. In a configuration for performing refresh writing of a farther data track, the refresh writing area is preferably configured by a plurality of sections.

  FIG. 7 schematically shows a data track bundle, which is a count unit of the number of times of writing, and a refresh write area corresponding thereto. The lower side in FIG. 7 is the inner peripheral side, and the upper side is the outer peripheral side. The refresh / write area includes an area 113a and an area 113b in addition to the areas (ATI) 111, 112a, and 112b described with reference to FIG. The region 113a and the region 113b are referred to as FTI (Far Track Interference) regions, respectively.

  The region 113a is a region from the data track Tr_k-n to the data track Tr_k-m, and the region 113b is a region from the data track Tr_k + l + m to the data track Tr_k + l + n. The region 113a is on the outer peripheral side of the region 112a and is adjacent thereto. The region 113b is on the inner peripheral side of the region 112b and is adjacent thereto. The number of tracks in the region 113a and the region 113b is the same or different.

  In this configuration, thresholds having different count numbers are assigned to the first sections (ATI areas) 111, 112a, and 112b and the second sections (FTI areas) 113a and 113b in the refresh / write area. The influence on the FTI areas 113a and 113b by the data writing is smaller than the influence on the ATI areas 111, 112a and 112b. Therefore, the refresh frequency of the FTI areas 113a and 113b is preferably less than that of the ATI areas 111, 112a, and 112b.

  The HDC / MPU 23 assigns a large value to the FTI areas 113a and 113b and a small value to the ATI areas 111, 112a, and 112b as the refresh / write condition threshold. In a preferred configuration, the refresh / write condition threshold of the FTI regions 113a and 113b is a common multiple of the ATI regions 111, 112a, and 112b. Thereby, a process can be made simpler. For example, the ATI areas 111, 112a, and 112b are refreshed and written every 2,000 times of writing to the data track bundle 111, and the FTI areas 113a and 113b are refreshed and written every 20,000 times of writing.

  The forced refresh / write process and the idle refresh / write process of the present embodiment can also be applied to this refresh / write area configuration. For example, the HDC / MPU 23 has a small threshold and a large threshold for each of the ATI area and the FTI area, and further includes a forced refresh write list and an idle refresh write list. By referring to the four threshold values and the four lists, the forced refresh / write process and the idle refresh / write process of each of the ATI area and the FTI area can be executed.

  In a preferred configuration, the HDC / MPU 23 divides the FTI area into a plurality of sections, and includes each section as a target of each refresh / write process in the ATI area. That is, each section is refreshed and written together with the ATI area. FIG. 8 is a schematic diagram for explaining this refresh / write method. FIG. 8 schematically shows a method of forced refresh / write processing.

  In FIG. 8, each rectangle represents a data track. The one-step rectangular row shows a part of the recording surface, and all are the same part of the recording surface. Each stage indicates an area to be rewritten in each refresh / write process. In FIG. 8, a data track bundle 111 is illustrated. FIG. 8 shows an area to be refreshed / written in accordance with the number of times of data writing to the data track bundle 111. The unit of the data track bundle which is a unit for counting the number of times of writing is composed of 8 data tracks. The ATI area 115 is 14 data tracks including a data track bundle. The FTI area is indicated by 116a and 116b.

  In the example of FIG. 8, the HDC / MPU 23 performs a forced refresh / write process every 2,000 times of writing. Each refresh / write process targets the ATI area 115 and a part of the FTI areas 116a and 116b. Each refresh / write process targets a different part of the FTI areas 116a and 116b. The rewriting of all the FTI areas 116a and 116b is completed by 15 refresh / write processes.

  As described above, the threshold value of the number of write operations (large threshold value) in the forced refresh / write process is 2,000. When the number of writes to the data track bundle 111 reaches a small threshold, the HDC / MPU 23 registers the data track bundle 111 in the idle refresh write list. For example, the small threshold is 1,000.

  The HDC / MPU 23 registers the data track bundle 111 in the idle refresh write list when the number of writes (counter value) to the data track bundle 111 reaches 1,000. If the power save mode is entered before the counter value reaches 2,000, the HDC / MPU 23 refreshes and writes the area shown in the first stage. When the refresh / write processing for this area is completed, the HDC / MPU 23 deletes the data track bundle 111 from the idle refresh write list and sets the counter value to 2,000. As a result, the forced refresh / write process at the counter value of 2,000 is skipped.

  When the counter value reaches 2,000 without executing the refresh write process, the HDC / MPU 23 moves the ID information of the data track bundle 111 from the idle refresh write list to the forced refresh write list. . The HDC / MPU 23 performs a refresh / write process of the refresh / write area of the data track bundle 111 in response to the write command. The refresh / write area is a part of the ATI area 115 and the FTI areas 116a and 116b. As described above, the refresh / write process is preferably command-divided. That is, it is preferable to perform refresh / write processing only for a part of the area for each write command.

  The HDC / MPU 23 repeatedly executes the above processing until the counter indicates 30,000. When the counter value reaches 30,000 and the refresh write processing of all data tracks in the FTI areas 116a and 116b is completed, the HDC / MPU 23 initializes the counter value (sets it to the initial value).

  As described above, by dividing the FTI area into a plurality of sections and performing the refresh / write process of each section together with the ATI area, the number of thresholds (counters) and tables required for the refresh / write process can be reduced. . Further, by dividing the FTI area into a plurality of sections, it is possible to reduce the influence on the performance due to the refresh / write processing of the FTI area.

  Each section of the FTI area may have the same number of data tracks or may be configured with different numbers of data tracks. It is preferable that one refresh / write process includes a part of the inner peripheral side and a part of the outer peripheral side, but may include only a part of one area. The ATI area may be divided into a plurality of sections, and a different counter threshold value for refresh / write processing may be assigned to each.

  As described above, the HDC / MPU 23 preferably performs command division on the refresh / write area in the forced refresh / write process. That is, the HDC / MPU 23 preferably refreshes and writes only a part of the area for each write command. In order to reduce the influence on the performance, the HDC / MPU 23 preferably refreshes and writes a partial area for each of a plurality of write commands. For example, the HDC / MPU 23 executes a refresh write every 100 write commands. When the 99 write command is received, the write process is executed without performing the refresh / write process.

  However, if the frequency of refresh write processing relative to the number of write commands received is low, the risk of user data loss increases. Therefore, in a preferred configuration, the HDC / MPU 23 changes the refresh write processing frequency in accordance with the number of forced refresh write list registrations. For example, when the number of registrations reaches a prescribed threshold, the HDC / MPU 23 increases the refresh / write processing frequency. For example, the refresh write once per 100 write commands is changed to the refresh write once per 10 write commands.

  The HDC / MPU 23 may have a plurality of threshold values and set refresh / write frequencies corresponding to the respective threshold values. The HDC / MPU 23 may also refer to the number of registrations in the idle refresh write list in addition to the forced refresh write list. The setting of the refresh write frequency according to the number of refresh write list registrations can be applied to any of the configurations described with reference to FIGS.

  FIG. 9 shows data indicating the refresh / write times and performance test results of the HDD to which the present invention is applied and the HDD to which the invention is not applied. The bar graph is the number of refresh writes, and the hatched bar graph is the measurement result of the HDD to which the present invention is applied, and the measurement result of the conventional HDD to which the white bar graph is not applied. The line graph shows the measurement result of the performance, the black circle line graph shows the measurement result of the HDD to which the present invention is applied, and the white circle line graph shows the measurement result of the conventional HDD. The HDD to which the present invention was applied used four hundred times as the threshold value for idle refresh write and 1,000 times as the threshold value for forced refresh write.

  As can be understood from the measurement results of FIG. 9, in most tests, the HDD to which the present invention was applied had more refresh / write operations than the conventional HDD. However, the performance of the HDD to which the present invention was applied was superior to that of the conventional HDD. In addition, the performance of the conventional HDD decreased as the number of refresh / writes increased, but the HDD of the present invention showed a substantially constant excellent performance regardless of the number of refresh / writes. As described above, the effects of data protection and performance improvement according to the present invention could be confirmed.

  As mentioned above, although this invention was demonstrated taking preferable embodiment as an example, this invention is not limited to said embodiment. A person skilled in the art can easily change, add, and convert each element of the above-described embodiment within the scope of the present invention. For example, the control of this embodiment can be applied to a magnetic disk drive other than the HDD. The moving mechanism of the head slider is not limited to a rotary actuator, and a mechanism that linearly moves the head slider may be used. The present invention can also be applied to an HDD in which the head slider is always in contact with the magnetic disk.

  In the above preferred configuration, only the number of times of writing to the data track bundle is used in order to determine the priority of the refresh / write process (which refresh / write process is targeted). The HDD may determine the priority by adding other conditions. For example, the priority may be determined using the environmental temperature at the time of writing in addition to the number of times of writing.

  The preferred configuration has two lists, a forced refresh write list and an idle refresh write list. By having different lists in this way, it is possible to easily determine the target area for the refresh / write process. The HDD may register all data track bundles (refresh / write areas) in one list.

DESCRIPTION OF SYMBOLS 1 Hard disk drive, 10 Enclosure 11 Magnetic disk, 12 Head slider, 20 Circuit board 21 RW channel, 22 Motor driver unit 23 Hard disk controller / MPU, 24 RAM, 51 Host 111, 112a, 112b, 113a, 113b Area 115 ATI area, 116a, 116 FTI area

Claims (14)

A magnetic disk having a plurality of data tracks;
A head for accessing the magnetic disk;
A moving mechanism for moving the head in a radial direction on the magnetic disk;
A controller for controlling the moving mechanism and the head,
The controller is
In the write area where the refresh write is executed and the refresh write area including the adjacent area, the number of times of writing to the write area is used to determine the priority of the refresh write area,
When the priority reaches the first threshold value, the refresh / write area is included in the refresh / write process during idle time,
When the priority reaches a second threshold value that is higher than the first threshold value, the refresh / write area is subjected to the refresh / write process at the time of idling and the refresh / write process accompanying the command corresponding process. To include,
Magnetic disk drive. The controller executes a refresh write from a refresh write area having a high priority in the refresh write process during idle.
The magnetic disk drive according to claim 1. The controller executes the refresh-write process at the idle time in a power save mode.
The magnetic disk drive according to claim 1. The command corresponding process is a process corresponding to a write command,
The write cache function corresponding to the write command is ON,
The controller executes a refresh write process associated with the command corresponding process before the completion notification of the write command.
The magnetic disk drive according to claim 1. The refresh / write process associated with the command corresponding process refreshes / writes only a part of the refresh / write area in response to one command,
The controller changes the frequency of the refresh / write process associated with the command corresponding process according to the number of the refresh / write areas having the priority level that has reached the second threshold.
The magnetic disk drive according to claim 1. The refresh / write area includes a proximity area including the write area, and a remote area on the inner peripheral side and / or outer peripheral side of the adjacent area,
The controller executes a refresh write of a part of the far area in the refresh write process of the near area,
The magnetic disk drive according to claim 1. The controller is
A counter that counts the number of writes to the writing area;
When the counter value of the counter reaches a first threshold value, the refresh / write area is registered in a first list which is a list of refresh / write processes at idle time,
When the counter value reaches a second threshold value that is larger than the first threshold value, the refresh / write area is moved from the first list to a second list that is a list of refresh / write processes associated with command corresponding processing. ,
Referring to the second list, determine an area for performing the refresh / write process associated with the command corresponding process,
With reference to the second list and the first list, to determine the region to be refreshed write processing during the idle, the area of the second list, refresh-ahead region of the first list Run the light,
The magnetic disk drive according to claim 1. A method for refreshing and writing data on a magnetic disk in a magnetic disk drive,
In the write area where the refresh write is executed and the refresh write area including the adjacent area, the number of times of writing to the write area is used to determine the priority of the refresh write area,
When the priority reaches a first threshold value, including the refresh-write area subject to refresh write process during idle,
When the priority reaches a second threshold value that is higher than the first threshold value, the refresh / write area is subjected to the refresh / write process at the time of idling and the refresh / write process accompanying the command corresponding process. To include,
Method. In the refresh write process at the time of idling, a refresh write is executed from a refresh write area having a high priority.
The method of claim 8. Executing the idle refresh / write process in a power save mode;
The method of claim 8. The command corresponding process is a process corresponding to a write command,
The write cache function corresponding to the write command is ON,
Before the write command completion notification, execute a refresh write process associated with the command corresponding process,
The method of claim 8. The refresh / write process associated with the command corresponding process refreshes / writes only a part of the refresh / write area in response to one command,
The frequency of the refresh / write process associated with the command corresponding process is changed according to the number of priority refresh / write areas that have reached the second threshold.
The method of claim 8. The refresh / write area includes a proximity area including the write area, and a remote area on the inner peripheral side and / or outer peripheral side of the adjacent area,
In the refresh write processing of the near area, a refresh write of a part of the far area is executed.
The method of claim 8. Count the number of writes to the write area by a counter,
When the counter value reaches the first threshold value, the refresh / write area is registered in the first list which is a list of the refresh / write process at the idle time,
When the counter value reaches a second threshold value that is larger than the first threshold value, the refresh / write area is moved from the first list to a second list that is a list of refresh / write processes associated with command corresponding processing. ,
Referring to the second list, determine an area for performing the refresh / write process associated with the command corresponding process,
Referring to the second list and the first list, an area for performing the refresh / write process at the idle time is determined, and the area of the second list is refreshed / written before the area of the first list. Run the
The method of claim 8.

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