JP5327976B2 - Manufacturing method of semiconductor light emitting device - Google Patents

Description

The present invention relates to a method for manufacturing a semiconductor light emitting device including a group III compound semiconductor in a light emitting layer, and more particularly to a method for manufacturing a semiconductor light emitting device that suppresses a decrease in light extraction efficiency due to a metal electrode.

  III-V group compound semiconductors containing nitrogen as a group V element, such as gallium nitride (GaN) and gallium nitride / indium (GaInN), are used as a light emitting layer for short wavelength LEDs such as blue and blue green. .

  FIG. 9 is a schematic cross-sectional view showing an example of a conventional double heterojunction blue LED. As shown in FIG. 9, a conventional double heterojunction blue light-emitting element includes a lower clad layer 102 made of an n-type GaN layer doped with Si on a substrate 101 made of sapphire; a light-emitting layer 103 made of an InGaN layer; The upper cladding layer 104 made of p-type AlGaN doped with Mg; and the contact layer 105 are stacked in this order.

  A conductive thin film 108 is formed on the contact layer 105, and a p-type electrode 106 is provided on a part of the conductive thin film 108. On the other hand, an n-type electrode 107 is provided on a part of the lower cladding layer 102. When a current is injected from the positive p-type electrode 106, the current is diffused in the surface direction of the conductive thin film 108 and is injected into the upper cladding layer 104 and the light emitting layer 103 over a wide area, so that the light emitting layer 103 emits light.

  Light emitted upward from the light emitting layer 103 passes through the upper cladding layer 104, the contact layer 105, and the conductive thin film 108 and is extracted outside. As the conductive thin film 108, a material having high translucency such as ITO and lower resistance than the contact layer 105 is used. Thereby, the light loss when the light emitted from the light emitting layer 103 passes through the conductive thin film 108 can be reduced, and the operating current for obtaining light emission can be diffused over a wide range, and the light emitting area can be expanded. These synergistic effects can increase the light extraction efficiency of the LED.

  As disclosed in Japanese Patent Application Laid-Open No. 2007-287786 (hereinafter referred to as “Patent Document 1”), the conductive thin film 108 made of ITO is subjected to annealing twice so that its conductivity and transparency can be obtained. Increase lightness. That is, by performing first annealing at 250 ° C. or more and 600 ° C. or less in an oxygen-containing atmosphere, the light-transmitting property of the conductive thin film 108 is improved, and second annealing is performed at 200 ° C. or more and 500 ° C. or less in an atmosphere not containing oxygen. As a result, the conductivity of the conductive thin film 108 is increased.

  Incidentally, in the LED illustrated in FIG. 9, the p-type electrode 106 is formed in the light extraction direction from the light emitting layer 103. For this reason, when the light emitted from the light emitting layer 103 immediately below the p-type electrode 106 is incident on the lower surface of the p-type electrode 106, the light is absorbed and reflected by the lower surface of the p-type electrode 106, thereby reducing the light extraction efficiency of the semiconductor light emitting device. There is a problem of doing.

  In order to solve such a problem, for example, Japanese Patent Application Laid-Open No. 9-129921 (hereinafter referred to as “Patent Document 2”) proposes a semiconductor light emitting device having a structure shown in FIG. FIG. 10 is a schematic cross-sectional view of a semiconductor light emitting device disclosed in Patent Document 2. In Patent Document 2, as shown in FIG. 10, a current blocking portion 109 made of high-resistance p-type GaN is provided immediately below the p-type electrode 106 and between the conductive thin film 108 and the contact layer 105. Form. By providing the current blocking portion 109 at such a position, the ratio of light emission from the light emitting layer 103 immediately below the p-type electrode 106 can be reduced, and therefore, it is difficult for light to be absorbed and reflected below the p-type electrode 106.

JP 2007-287786 A JP-A-9-129921

  The current blocking portion 109 disclosed in Patent Document 2 is formed by providing a single GaN film on the contact layer 105 and then removing unnecessary portions as the current blocking portion 109 by etching. Etching here uses known photolithography, and in general, a portion of the GaN film necessary as the current blocking portion 109 is covered with a resist mask, and then dry etching is performed using a chlorine-based gas. Is.

  However, since both the contact layer 105 and the current blocking portion 109 are made of GaN, the etching cannot be completed when the contact layer 105 is exposed. For this reason, part of the contact layer 105 may be removed by etching, or the GaN film on the contact layer 105 may not be removed by etching. In any of these cases, the contact resistance between the conductive thin film 108 and the contact layer is increased, and the light extraction efficiency is lowered.

  By the way, both the p-type electrode 106 and the n-type electrode 107 serve as a wire bond base that is electrically connected to an external circuit when the semiconductor light emitting element is mounted on a package. For this reason, it has a layer structure of a metal layer, and Au having a thickness of about 500 nm is used for the uppermost layer for securing wire bond stability.

  FIG. 11 is a schematic view of the semiconductor light emitting element of Patent Document 2 as viewed from above. As shown in FIG. 11, a structure has been proposed in which a thin line structure electrode 106 a is extended from a p-type electrode 106 on a conductive thin film 108 to diffuse a current applied to the p-type electrode 106 in a plane direction. Yes. The electrode 106a having such a thin line structure is designed to be as small as possible so that the line width thereof becomes an area of 2 μm or more and 5 μm or less so as not to reduce the light extraction efficiency.

  Absorption and reflection of light emitted from the light emitting layer 103 are also generated below the electrode 106a having such a thin line structure, which causes a reduction in light extraction efficiency of the semiconductor light emitting element. For this reason, it is preferable to provide the current blocking portion 109 directly under the thin wire structure electrode 106a. However, it is extremely difficult in the manufacturing process to provide the current blocking portion 109 directly under the thin wire structure electrode 106a. Needless to say.

The present invention has been made in view of the above-described problems, and an object of the present invention is to provide a semiconductor light emitting device in which light extraction efficiency is improved by forming a current blocking portion directly below the first electrode. It is to provide a manufacturing method .

A semiconductor light emitting device obtained by the method for manufacturing a semiconductor light emitting device of the present invention is in contact with a substrate, a semiconductor layer including a light emitting layer made of a group III compound semiconductor formed on the substrate, and the substrate on the semiconductor layer. A conductive thin film disposed on a surface opposite to the side, a current blocking portion formed through the conductive thin film in a thickness direction, a first electrode formed on the current blocking portion, A second electrode formed on a surface of the substrate opposite to the side in contact with the semiconductor layer or an exposed surface of the semiconductor layer, and the conductive thin film transmits light emitted from the light emitting layer. The current blocking portion is made of the same material as the conductive thin film and has a higher electric resistance than the conductive thin film.

  The conductive thin film preferably contains one or both of indium tin oxide and indium zinc oxide, and more preferably consists of indium tin oxide.

The current blocking unit preferably has an oxygen concentration higher than that of the conductive thin film.
A method of manufacturing a semiconductor light emitting device according to the present invention includes: forming a semiconductor layer including a light emitting layer made of a group III compound semiconductor on a substrate; and a current suppressing film on a surface of the semiconductor layer opposite to the substrate. Forming a first electrode on the current suppression film in an atmosphere containing oxygen, forming a first electrode on the current suppression film, and for the current suppression film, Performing a second annealing in an atmosphere not containing oxygen, setting the current suppression film immediately below the first electrode as a current blocking portion, and forming a current suppression film other than the current blocking portion as a conductive thin film; and a semiconductor layer of the substrate Forming a second electrode on the surface opposite to the side in contact with the surface or on the exposed surface of the semiconductor layer.

  The first annealing is preferably performed at a temperature of 600 to 700 ° C. The second annealing is preferably performed at a temperature lower than that of the first annealing.

  According to the present invention, it is possible to accurately form the current blocking portion only directly below the first electrode, and thus it is possible to increase the light extraction efficiency of the semiconductor light emitting device.

It is typical sectional drawing which shows an example of the semiconductor light-emitting device obtained by the manufacturing method of the semiconductor light-emitting device of this invention. It is a schematic diagram when the semiconductor light-emitting device obtained by the manufacturing method of the semiconductor light-emitting device of the present invention is viewed from above. It is typical sectional drawing which shows the state after forming a semiconductor layer on a board | substrate. It is typical sectional drawing which shows the state after forming the current suppression film | membrane on a semiconductor layer. It is typical sectional drawing which shows the state after forming a 1st electrode on a current suppression film | membrane. It is typical sectional drawing which shows the state after performing 2nd annealing with respect to a current suppression film | membrane. It is the graph which showed the sheet resistance of the electric current prevention part after performing a first annealing at 500 to 700 degreeC. It is the graph which showed the transmittance | permeability of the light of the wavelength of 450 nm of the current suppression film | membrane after performing 1st annealing at 500 to 700 degreeC. It is typical sectional drawing which shows an example of the conventional double heterojunction blue LED. FIG. 10 is a schematic cross-sectional view of a semiconductor light emitting element disclosed in Patent Document 2. It is a schematic diagram when the semiconductor light emitting element of patent document 2 is seen from the upper surface.

Hereinafter, a method for manufacturing the semiconductor light emitting device of the present invention will be described. In the drawings of the present invention, the same reference numerals represent the same or corresponding parts. In addition, dimensional relationships such as length, width, thickness, and depth are changed as appropriate for clarity and simplification of the drawings, and do not represent actual dimensional relationships.

<Semiconductor light emitting device>
FIG. 1 is a schematic cross-sectional view showing an example of a semiconductor light emitting device obtained by the method for manufacturing a semiconductor light emitting device of the present invention. As shown in FIG. 1, a semiconductor light-emitting device obtained by the method for manufacturing a semiconductor light-emitting device of the present invention includes a substrate 1 and a semiconductor layer including a light-emitting layer 3 made of a group III compound semiconductor formed on the substrate 1. 10, a conductive thin film 8 disposed on the surface of the semiconductor layer 10 opposite to the side in contact with the substrate 1, a current blocking portion 9 formed so as to penetrate in the thickness direction of the conductive thin film 8, The conductive thin film 8 has a first electrode 6 formed on the current blocking portion 9 and a second electrode 7 formed on the exposed surface of the semiconductor layer 10, and the light emitting layer 3 emits light. The current blocking portion 9 is made of the same material as that of the conductive thin film 8 and has a higher electric resistance than the conductive thin film 8. Note that the second electrode 7 may be formed on the surface of the substrate 1 opposite to the side in contact with the semiconductor layer 10.

  By providing the current blocking portion 9 that is a higher resistance region than the specific resistance of the conductive thin film 8 just below the first electrode 6 as in the present invention, the carriers introduced from the first electrode 6 have a high resistance. Carriers are less likely to flow into the current blocking portion 9 in the region, and are easily dispersed in the conductive thin film 8 in the low resistance region. This makes it difficult for the light emitting layer 3 immediately below the current blocking portion 9 to emit light, and makes the other portions of the light emitting layer 3 easier to emit light. In addition, the ratio of absorption and reflection of incident light on the surface of the lowermost layer of the first electrode 6 can be reduced, so that the light extraction efficiency of the semiconductor light emitting element can be increased.

Here, a double heterojunction is formed by the lower cladding layer 2, the light emitting layer 3, and the upper cladding layer 4. Further, the light emitting layer 3 is selected according to need, including undoped, n-type, p-type, and both n-type and p-type impurities. Arbitrary interfaces of these semiconductor layers 10 become pn junction surfaces. Below, each layer which comprises the semiconductor light-emitting device obtained by the manufacturing method of the semiconductor light-emitting device of this invention is demonstrated.

<Current blocking part>
The present invention is characterized in that a current blocking portion 9 is provided immediately below the first electrode 6. The current blocking portion 9 is made of the same material as the conductive thin film 8 and has a higher electric resistance than the conductive thin film 8. By providing such a current blocking unit 9, the light emitting layer 3 immediately below the current blocking unit 9 becomes difficult to emit light, and the other light emitting layer 3 easily emits light, thereby taking out light from the semiconductor light emitting device. Efficiency can be increased.

  As a material constituting such a current blocking portion 9, the same material as that of the conductive thin film 8 is used. Examples of the material constituting the current blocking unit 9 include indium tin oxide (ITO) and indium zinc oxide (IZO). Among these materials, it is preferable to contain either one or both of indium tin oxide and indium zinc oxide from the viewpoint that the conductivity can be changed by the concentration of oxygen.

  Among these, the current blocking portion 9 is more preferably made of ITO. This is because such an ITO tends to lower the conductivity as it contains oxygen, so that the conductivity can be easily lowered by performing annealing containing oxygen.

  The current blocking unit 9 preferably has an oxygen concentration higher than that of the conductive thin film 8. By increasing the oxygen concentration of the current blocking unit 9 in this way, the current blocking unit 9 becomes less conductive than the conductive thin film 8, thereby suppressing light emission of the light emitting layer 3 formed immediately below the current blocking unit 9. can do.

<Conductive thin film>
In the present invention, the conductive thin film 8 transmits light from the light emitting layer 3 to make contact with the upper clad layer 4 or the contact layer 5, and to the entire surface of the upper clad layer 4 or contact layer 5 in contact with the current. Is provided in order to expand the light emitting area of the light emitting layer 3 below it.

  As the conductive thin film 8, it is preferable to use a material having a lower resistance than the contact layer 5 and the same material as that used for the current blocking portion 9. As a result, the current injected into the first electrode 6 can be diffused in the surface direction of the conductive thin film 8. Examples of the material constituting the conductive thin film 8 include ITO and IZO. Among these, it is preferable to consist of ITO. This is because ITO is particularly excellent in terms of translucency and contact resistance.

  As will be described later, the single-layer current suppressing film 15 is annealed twice so that the conductive thin film 8 having high conductivity and the current blocking portion 9 having low conductivity are separately formed. For this reason, the conductive thin film 8 and the current blocking portion 9 are usually made of the same material.

<Lower cladding layer>
In the present invention, the lower cladding layer 2 has a band gap larger than that of the light emitting layer 3 and has a function of blocking electrons and holes by a potential barrier based on the gap difference from the light emitting layer 3. Such a lower clad layer 2 has a role as a buffer layer between the substrate 1 and the light emitting layer 3 and each layer serving as a contact layer with the second electrode 7 when the substrate 1 is an insulator. Shall be included.

  Such a lower cladding layer 2 may be not only a nitride semiconductor doped with an n-type impurity but also a plurality of layers including an undoped nitride semiconductor. As such a lower cladding layer 2, for example, a low-temperature buffer layer, an AlN buffer layer, an undoped layer, an n-type doped layer, an n-type contact layer, or the like can be used.

  The lower clad layer 2 may be a single layer or a multi-layer that functions as a clad layer. In the case of a single layer, GaN, AlGaN, InAlGaN, or InGaN can be used. In this case, Si may be included, or an undoped layer may be included. When the lower cladding layer 2 has a plurality of layers, it may have a laminated structure such as InGaN / GaN, InGaN / AlGaN, AlGaN / GaN, InGaN / InGaN, or a multilayer structure in which a plurality of layers are repeatedly laminated. You may do it. Furthermore, these multilayer structures may form a superlattice structure.

<Light emitting layer>
In the present invention, the light emitting layer 3 is preferably one in which barrier layers made of GaN and well layers made of a nitride semiconductor containing In are alternately stacked. The thickness of the well layer is preferably in the range of 2 to 20 nm, although the optimum layer thickness varies depending on the wavelength at which the well layer emits light. The structure of the light emitting layer 3 is not limited to the quantum structure, and may be any one of a single well structure, a multiple well structure, a multiple quantum well structure, and the like.

When the light emitting layer 3 includes a plurality of well layers, at least one well layer functions as the light emitting layer 3. Such a well layer is preferably made of In _p Ga _1-p N (0 <p <1). The light emitting layer 3 directly under the current blocking portion 9 does not easily emit light, whereas the light emitting layer 3 immediately below the conductive thin film 8 easily emits light. Such a difference in light emission is caused by carriers introduced into the light emitting layer 3.

<Upper clad layer>
In the present invention, the upper cladding layer 4 is a semiconductor layer having a band gap larger than that of the light emitting layer 3 and having a function of blocking electrons and holes by a potential barrier based on the gap difference. The upper cladding layer 4 also includes a p-type layer that functions as an evaporation preventing layer, a carrier block layer, or a current diffusion layer. Each of these layers may be either a single layer or a plurality of layers, and GaN, AlGaN, InAlGaN, or InGaN doped with a p-type impurity may be used, or an undoped layer may be used. . When the upper cladding layer 4 has a plurality of layers, it may have a laminated structure such as InGaN / GaN, InGaN / AlGaN, AlGaN / GaN, InGaN / InGaN, or a multilayer structure in which a plurality of layers are repeatedly laminated. It may be. Furthermore, these multilayer structures may form a superlattice structure.

  The thickness of the upper cladding layer 4 is preferably 500 nm or less. When the thickness of the upper cladding layer 4 exceeds 500 nm, the light emitting layer 3 is exposed to heat at a high temperature for a long time, and the non-light emitting region due to thermal degradation of the light emitting layer 3 increases. Note that an evaporation preventing layer is preferably formed on the light emitting layer 3 for the purpose of preventing evaporation of In contained in the light emitting layer 3.

<Contact layer>
In the present invention, the contact layer 5 is provided to reduce the contact resistance between the conductive thin film 8 and the upper cladding layer 4. The conductivity type of the contact layer 5 is the same as the conductivity type of the semiconductor layer constituting the upper cladding layer 4 in the layer immediately below it, for example, in the double heterostructure LED shown in FIG. From the viewpoint of reducing the resistance of the contact layer 5, a nitride semiconductor doped with a p-type impurity at a higher concentration than the upper cladding layer 4 is preferable.

  Such a contact layer 5 is preferably made of a semiconductor material having a band gap that is small enough not to absorb light emitted from the light emitting layer 3. Note that the conductive thin film 8 may be formed on the upper clad layer 4 without providing the contact layer 5. In this case, it is preferable to increase the concentration of the p-type impurity in the vicinity of the surface of the upper cladding layer 4 on the conductive thin film 8 side.

<First electrode and second electrode>
In the present invention, the first electrode 6 and the second electrode 7 serve as a wire bond base that is electrically connected to an external circuit. The first electrode 6 and the second electrode 7 can adopt a conventionally known structure, for example, Ti, Al, Au, or the like. In addition, the first electrode 6 and the second electrode 7 are not limited to a single layer structure, and may have a multilayer structure.

  And when the 1st electrode 6 and the 2nd electrode 7 consist of a multilayer structure, it is preferable to form the layer which consists of Au about 500 nm in thickness in the uppermost layer. Thereby, when the semiconductor light emitting element is mounted on the package, the wire bond stability with the external circuit can be ensured.

  By the way, a part of the light emitted by the light emitting layer 3 is emitted in the direction of the light emitting layer 3 on the upper clad layer 4 side. Therefore, the first electrode 6 is an electrode arranged in the light extraction direction from the light emitting layer 3 to the upper cladding layer 4 side.

  FIG. 1 illustrates the arrangement of the second electrodes 7 when the substrate 1 is made of an insulating material. That is, when the substrate 1 made of an insulating material is used, the second electrode 7 is provided on the exposed surface of the lower cladding layer 2 as shown in FIG. On the other hand, when the substrate 1 is made of a conductive material, the second electrode 7 is formed on the surface of the substrate 1 opposite to the lower cladding layer 2.

FIG. 2 is a schematic view of a semiconductor light emitting device obtained by the method for manufacturing a semiconductor light emitting device of the present invention when viewed from above. As shown in FIG. 2, an electrode 6 a having a thin line structure extended from the first electrode 6 is preferably formed on the conductive thin film 8. Thus, by providing the electrode 6 a having a thin wire structure, the current applied to the first electrode 6 can be diffused in the surface direction of the conductive thin film 8. As a result, a current can be applied to the light emitting layer 3 immediately below the conductive thin film 8, thereby increasing the light emission efficiency of the light emitting layer 3.

  Conventionally, from the viewpoint of manufacturing technology, the current blocking portion 9 cannot be provided immediately below the electrode 6a having a thin wire structure. According to the manufacturing method of the present invention, the current blocking portion 9 can be accurately provided directly below the electrode 6a having a thin wire structure by controlling the annealing timing without using a precise manufacturing technique. Thereby, the light extraction efficiency of the semiconductor light emitting device can be improved. Hereinafter, a method for manufacturing the semiconductor light emitting device of the present invention will be described.

<Method for Manufacturing Semiconductor Light Emitting Element>
The method for manufacturing a semiconductor light emitting device of the present invention includes a step of forming a semiconductor layer 10 including a light emitting layer 3 made of a group III compound semiconductor on a substrate 1 (FIG. 3), opposite to the substrate 1 on the semiconductor layer 10. Forming a current suppression film 15 on the side surface (FIG. 4), performing a first annealing on the current suppression film 15 in an atmosphere containing oxygen (not shown), the current suppression film Forming a first electrode 6 on the substrate 15 (FIG. 5), and performing second annealing on the current suppression film 15 in an atmosphere not containing oxygen, thereby providing a current immediately below the first electrode 6. The step of using the suppression film 15 as the current blocking portion 9 and the current suppression film 15 other than the current blocking portion 9 as the conductive thin film 8 (FIG. 6), on the surface of the substrate 1 opposite to the side in contact with the semiconductor layer 10 Or on the exposed surface of the semiconductor layer 10 Characterized in that it comprises a step of forming a second electrode 7 (FIG. 1).

  The method of manufacturing a semiconductor light emitting device according to the present invention is characterized in that after the first annealing is performed on the current suppressing film 15, the first electrode 6 is formed on the current suppressing film 15, and further the second annealing is performed. And Thus, by covering the current suppression film 15 with the first electrode 6 and performing second annealing, the sheet resistance of the current suppression film 15 positioned immediately below the first electrode 6 is maintained while maintaining the first resistance. It is possible to reduce the sheet resistance of the current suppressing film 15 other than the portion located immediately below the electrode 6.

  Then, after performing the second annealing, the current suppressing film 15 located immediately below the first electrode 6 becomes the current blocking portion 9, and the current suppressing film 15 other than the current blocking portion 9 becomes the conductive thin film 8. By performing the second annealing in this way, the current blocking portion 9 can be formed only directly below the first electrode 6 regardless of the minute shape of the first electrode 6. For example, in the case of the current suppressing film 15 made of ITO, the current blocking portion 9 is one digit higher in resistance than the sheet resistance of the conductive thin film 8. By providing the current blocking portion 9 so as to penetrate in the thickness direction of the conductive thin film 8 in this manner, carriers can be easily injected into the conductive thin film 8, and the light emission efficiency of the light emitting layer 3 can be increased. The extraction efficiency can be improved. Hereinafter, each step of the manufacturing method of the present invention will be described.

<Step of forming a semiconductor layer>
FIG. 3 is a schematic cross-sectional view showing a state after the semiconductor layer is formed on the substrate. First, a substrate 1 made of sapphire is prepared. Then, by adjusting the temperature of the substrate 1 to, for example, 1050 ° C. and introducing a group III source gas, a doping gas containing Si, and an ammonia gas into the MOCVD apparatus using a carrier gas containing nitrogen and hydrogen, As shown in FIG. 3, the lower cladding layer 2 is crystal-grown on the substrate 1.

Here, as the group III source gas introduced into the apparatus for forming the lower cladding layer 2, for example, TMG ((CH ₃ ) ₃ Ga: trimethyl gallium), TEG ((C ₂ H ₅ ) ₃ Ga: triethyl) Gallium), TMA ((CH ₃ ) ₃ Al: trimethylaluminum), TEA ((C ₂ H ₅ ) ₃ Al: triethylaluminum), TMI ((CH ₃ ) ₃ In: trimethylindium), or TEI ((C ₂ H ₅ ) ₃ In: triethylindium) or the like can be used. As the doping gas containing Si, may be used, for example SiH ₄ (silane) gas or the like.

  Next, the light emitting layer 3 is formed by alternately forming a well layer and a barrier layer containing In on the lower cladding layer 2 by the MOCVD apparatus used for forming the lower cladding layer 2.

  Then, after forming the light emitting layer 3, the upper cladding layer 4 is formed on the light emitting layer 3. The upper clad layer 4 is formed by setting the temperature of the substrate 1 to be suitable for crystal growth of the upper clad layer 4 and then carrying a carrier gas containing nitrogen and hydrogen, a group III source gas, a doping gas containing Mg, Then, by introducing ammonia gas into the MOCVD apparatus, the upper cladding layer 4 is crystal-grown on the light emitting layer 3. Further, a contact layer 5 is formed on the upper cladding layer 4.

  Here, the temperature of the substrate 1 suitable for crystal growth of the upper cladding layer 4 is preferably 950 ° C. or higher and 1300 ° C. or lower when the upper cladding layer 4 is made of GaN or AlGaN. Crystal growth of the upper cladding layer 4 at such a temperature can improve the crystallinity of the upper cladding layer 4.

Here, as the doping gas containing Mg, for example, Cp ₂ Mg (cyclopentadienyl magnesium) or (EtCp) ₂ Mg (bisethylcyclopentadienyl magnesium) can be used. Since (EtCp) ₂ Mg is a liquid at normal temperature and pressure, the response when the amount introduced into the MOCVD apparatus is changed is better than Cp ₂ Mg which is solid under the conditions, It is easy to keep the vapor pressure constant. As the group III source gas and ammonia gas used for forming the upper cladding layer 4, the same kind of gas as the lower cladding layer 2 and the light emitting layer 3 can be used.

  Next, the contact layer 5 is formed after the doping gas content is made higher than the doping gas used when forming the upper cladding layer 4. As described above, the semiconductor layer 10 including the lower cladding layer 2, the light emitting layer 3, the upper cladding layer 4, and the contact layer 5 is formed.

<Step of forming a current suppression film>
FIG. 4 is a schematic cross-sectional view showing a state after the current suppression film is formed on the semiconductor layer. As shown in FIG. 4, the current suppressing film 15 is formed on the semiconductor layer 10 by using an electron beam vapor deposition method or a sputter vapor deposition method for the semiconductor layer 10 formed above. Such a current suppression film 15 may be formed directly on the upper cladding layer 4. Such a current suppression film 15 may have a translucency of about 40% and does not necessarily have conductivity. In the case of forming the current suppression film 15 by the sputtering vapor deposition method, the film is formed by introducing a sputtering gas into a sputtering furnace and applying sputtering power.

<Step of first annealing>
First annealing is performed on the current suppressing film 15 formed as described above in an atmosphere containing oxygen. By performing annealing in an atmosphere containing oxygen in this way, the material constituting the current suppression film 15 can be crystallized, and the transmittance of the current suppression film 15 can be improved. When the physical properties of the current suppressing film 15 before and after the first annealing were examined, the current suppressing film 15 immediately after the film formation was in an amorphous state, whereas the current suppressing film 15 after the first annealing was a polycrystal. It becomes a state.

  Here, the first annealing is preferably performed at a temperature of 600 ° C. or higher and 700 ° C. or lower. This facilitates improving the transmittance of the current suppression film 15. The first annealing is preferably performed for 3 minutes or more and 30 minutes or less, more preferably 20 minutes or less.

  It is preferable to lower the temperature to 0 ° C. or more and 100 ° C. or less after the completion of the first annealing and to bring the current suppression film 15 into contact with an atmosphere containing moisture. It may be brought into contact with the atmosphere in the first step annealing furnace, or may be taken out of the annealing furnace and brought into contact with the atmosphere. It is more preferable to make it contact the substantially room temperature of about 20 degreeC-30 degreeC. Thereby, the sheet resistance of the current suppression film | membrane 15 can be reduced.

  The mechanism of reducing the sheet resistance of the current suppression film 15 when the current suppression film 15 is brought into contact with the moisture-containing atmosphere is not clear, but probably when the current suppression film 15 is brought into contact with the atmosphere, It is considered that moisture present in the atmosphere is adsorbed on the surface of the current suppression film 15 and the surface state of the current suppression film 15 is stabilized.

  The time for contact with such an atmosphere containing moisture is preferably 60 seconds or longer and 3600 seconds or shorter. If it is less than 60 seconds, the effect of reducing the sheet resistance of the current suppression film 15 is poor, and if it exceeds 3600 seconds, it takes a long time for the manufacturing process, which is not preferable.

  Thus, after making it contact with air | atmosphere, by performing photolithography and etching, the current suppression film | membrane 15, the contact layer 5, the upper cladding layer 4, the light emitting layer 3, and a part of lower cladding layer 2 are removed, An exposed surface is formed on the lower cladding layer 2.

<Step of forming first electrode>
FIG. 5 is a schematic cross-sectional view showing a state after the first electrode is formed on the current suppression film.
In the present invention, the first electrode 6 is formed on the current suppression film 15 as shown in FIG. The first electrode 6 is preferably formed by photolithography, electron beam evaporation, and lift-off. By forming the first electrode 6 before the second annealing in this manner, oxygen contained in the current suppression film 15 immediately below the first electrode 6 is less likely to be released in the subsequent second step, and thus the conductivity is improved. It is possible to form a current blocking portion that does not include It is extremely important to form the first electrode 6 at this timing, which can be said to be the greatest feature of the manufacturing method of the present invention.

<Step of performing second annealing>
Next, the substrate 1 is set in a furnace, and second annealing is performed in an atmosphere not containing oxygen. FIG. 6 is a schematic cross-sectional view showing a state after the second annealing is performed on the current suppressing film. As shown in FIG. 6, by performing the second annealing, the current suppression film 15 immediately below the portion where the first electrode 6 is formed is inhibited from releasing oxygen by the first electrode 6. It becomes the blocking unit 9. On the other hand, oxygen in the portion of the current suppression film 15 where the first electrode 6 is not formed is released to become the conductive thin film 8. The sheet resistance of the current blocking unit 9 is about 7 times or more the sheet resistance of the conductive thin film 8.

  Such second annealing is preferably performed in a vacuum atmosphere, a nitrogen atmosphere, an argon atmosphere, or a mixed atmosphere of nitrogen and argon, and more preferably in a nitrogen atmosphere. By performing the second annealing in a nitrogen atmosphere, oxygen defects are formed in the conductive thin film 8, and the sheet resistance of the conductive thin film can be reduced by increasing the carrier density.

  In the present invention, the second annealing is preferably performed at a temperature of 450 ° C. or higher and 600 ° C. or lower. Thereby, oxygen in the current suppression film 15 can be discharged to the outside, and the sheet resistance of the conductive thin film 8 can be further reduced. The second annealing is preferably performed in 1 minute or more and 10 minutes or less.

  The second annealing is preferably performed at a temperature lower than the annealing temperature of the first annealing. Thereby, the sheet resistance can be reduced without impairing the contact resistance and transmittance of the conductive thin film 8.

<Step of forming second electrode>
Next, the second electrode 7 is formed on the surface of the substrate 1 opposite to the side in contact with the semiconductor layer 10 or on the exposed surface of the semiconductor layer 10. A method similar to that for the first electrode 6 can be used for forming the second electrode 7. By forming the second electrode 7 in this manner, the semiconductor light emitting device shown in FIG. 1 can be manufactured.

  EXAMPLES Hereinafter, although an Example is given and this invention is demonstrated in detail, this invention is not limited to these. In this example, a semiconductor light emitting device is manufactured by the following steps.

Example 1
<Step of forming a semiconductor layer>
As the substrate 1, sapphire whose C plane {0001} is a plane orientation is used. First, a template substrate is used in which an AlN buffer layer is formed on a substrate 1 made of sapphire whose surface is roughened, and an undoped GaN layer and an n-type GaN layer doped with Si are formed thereon. The doping concentration of the n-type GaN layer is 6 × 10 ¹⁸ cm ⁻³ . An n-type GaN layer having a thickness of 1.5 μm is grown as an n-type contact layer on the n-type GaN layer of the template substrate. SiH ₄ gas is used as the dopant material for the n-type GaN layer, and the Si doping concentration is set to 6 × 10 ¹⁸ cm ⁻³ . The n-type contact layer corresponds to the lower cladding layer 2 shown in FIG. The lower cladding layer 2 is formed by crystal growth at 1000 ° C. or higher.

Next, the temperature in the furnace is lowered to 850 ° C., and 6 pairs of barrier layers made of Si-doped GaN layers and well layers made of undoped InGaN are stacked on the lower cladding layer 2 as the active layer, and the film thickness is 6.5 nm. A light emitting layer 3 having a multiple quantum well structure (MQW) is formed by laminating a last barrier layer made of a GaN layer. The carrier concentration of the light emitting layer 3 is 4 × 10 ¹⁷ cm ⁻³ .

Next, after raising the temperature to 1100 ° C., a p-type AlGaN layer is formed on the light emitting layer 3, and then a p-type GaN layer is formed. The p-type AlGaN layer and the p-type GaN layer correspond to the upper cladding layer 4 shown in FIG. The upper cladding layer 4 is doped with Mg at a doping concentration of 2 × 10 ¹⁹ cm ⁻³ or more and 5 × 10 ¹⁹ cm ⁻³ or less.

Then, a contact layer 5 made of a p ⁺ -type GaN layer having a thickness of 20 nm is formed on the upper cladding layer 4. The contact layer 5 has a doping concentration of 5 × 10 ¹⁹ cm ⁻³ or more and 5 × 10 ²⁰ cm ⁻³ or less using Mg as a dopant. In this way, as shown in FIG. 3, the four semiconductor layers 10 including the lower cladding layer 2, the light emitting layer 3, the upper cladding layer 4, and the contact layer 5 are formed on the substrate 1.

<Step of forming a current suppression film>
Thereafter, as shown in FIG. 4, a current suppression film 15 is formed on the semiconductor layer 10 using a sputtering method. First, the substrate 1 is set in a sputtering furnace, and the temperature in the furnace is kept at room temperature. Then, argon gas is introduced as a sputtering gas, and a current suppressing film 15 made of ITO having a film thickness of 150 nm is formed on the contact layer 5 with a sputtering power of 1.28 kWh.

<Step of first annealing>
Next, first annealing is performed at 600 ° C. for 10 minutes in a mixed gas atmosphere composed of 20% oxygen and 80% nitrogen. Thereby, the transmittance of the current suppression film 15 with respect to light having a wavelength of 450 nm is increased to 94% or more.

  Thereafter, photolithography and etching are performed to remove a part of the current suppressing film 15, the contact layer 5, the upper cladding layer 4, the light emitting layer 3, and the lower cladding layer 2, and to expose the exposed surface on the lower cladding layer 2. Form.

<Step of forming first electrode>
Then, as shown in FIG. 5, the current suppression film 15 is subjected to normal photolithography, electron beam evaporation, and lift-off method, whereby 100 nm of Ti, 50 nm of Pt, and film thickness. A first electrode 6 having a three-layer structure with 500 nm Au is formed.

<Step of performing second annealing>
Next, as shown in FIG. 6, by performing second annealing for 5 minutes at 550 ° C. in a 100% nitrogen atmosphere, the sheet resistance is 110 Ω / □ immediately below the first electrode 6. Current blocking portion 9 is formed. At the same time, the current suppressing film other than the current blocking unit 9 is made into a conductive thin film 8 having a sheet resistance of 9Ω / □. In this way, the current blocking portion 9 is provided only directly below the first electrode 6, and the other portion is the conductive thin film 8.

<Step of forming second electrode>
By performing normal photolithography, electron beam evaporation, and lift-off method on the exposed surface of the lower clad layer 2 formed as described above, 100 nm thick Ti, 50 nm thick Pt, and 500 nm thick film are formed. A second electrode 7 having a three-layer structure with Au is formed. In this manner, the semiconductor light emitting device of this example is manufactured.

(Examples 2 to 6)
The semiconductor light emitting devices of Examples 2 to 6 are fabricated by the same method as in Example 1 except that the first annealing atmosphere and temperature are different from the manufacturing method of the semiconductor light emitting device of Example 1. That is, in Examples 2 to 6, the current suppressing film is first annealed for 10 minutes in a mixed gas atmosphere composed of 10% oxygen and 90% nitrogen. In Examples 2 to 6, the first annealing temperature is set to 500 ° C., 550 ° C., 600 ° C., 650 ° C., and 700 ° C., respectively.

(Temperature dependence of first annealing)
In Examples 2 to 6, the sheet resistance of the current suppression film after performing the first annealing is measured by a four-terminal method. The result is shown in the graph of FIG. FIG. 7 is a graph showing the sheet resistance of the current suppressing film after first annealing at 500 ° C. to 700 ° C. FIG. The vertical axis in FIG. 7 indicates the sheet resistance of the current suppression film, and the horizontal axis in FIG. 7 indicates the temperature at which fast annealing is performed. From the results shown in FIG. 7, it can be seen that the higher the temperature at which the first annealing is performed, the lower the sheet resistance of the current suppression film.

  Next, in Examples 2 to 6, the transmittance of the current suppression film in light having a wavelength of 450 nm after the first annealing is measured with a spectrophotometer. The result is shown in the graph of FIG. FIG. 8 is a graph showing the transmittance of light having a wavelength of 450 nm of the current suppressing film after first annealing at 500 ° C. to 700 ° C. FIG. The vertical axis in FIG. 8 indicates the transmittance of light having a wavelength of 450 nm of the current suppressing film, and the horizontal axis in FIG. 8 indicates the temperature at which the first annealing is performed.

  As is apparent from the results of FIG. 8, by setting the first annealing temperature to 500 ° C. or higher, the transmittance of the current suppressing film can be improved from the 40% level to 90% or higher. In particular, by performing first annealing at 600 ° C. or more and 700 ° C. or less, the transmittance of the current suppression film can be remarkably improved.

  As described above, the transmittance of the current suppression film differs before and after the first annealing because the crystal state of ITO constituting the current suppression film proceeds from polycrystallization from the amorphous state and external oxygen is taken in. Is.

<Sheet resistance before and after second annealing>
In Example 4, after the second annealing is performed at 550 ° C. for 5 minutes, the first electrode is removed with phosphoric acid. And the sheet resistance of the electroconductive thin film which is parts other than the electric current blocking part formed immediately under the 1st electrode and the area directly under the 1st electrode is measured, respectively. As a result, the sheet resistance of the conductive thin film was reduced to 115Ω / □ → 9Ω / □ before and after the second annealing, and the sheet resistance of the current blocking portion almost changed from 115Ω / □ to 110Ω / □ before and after the second annealing. Absent. Note that the translucency does not change even before and after the second annealing and is in the 94% range.

  Also in Example 5, the sheet resistance of the current blocking portion is measured in the same manner as in Example 4 above. As a result, the sheet resistance of the conductive thin film was reduced to 110Ω / □ → 8Ω / □ before and after the second annealing, and the sheet resistance of the current blocking portion almost changed from 110Ω / □ to 95Ω / □ before and after the second annealing. Absent.

  Also in Example 6, the sheet resistance of the current blocking portion was measured in the same manner as in Example 4 above. As a result, the sheet resistance of the conductive thin film was reduced to 112Ω / □ → 11Ω / □ before and after the second annealing, and the sheet resistance of the current blocking portion almost changed from 112Ω / □ → 105Ω / □ before and after the second annealing. Absent.

  From these results, it is derived that the sheet resistance of the conductive thin film is reduced by releasing the oxygen in the current suppressing film to the outside after performing the second annealing. On the other hand, the portion of the current suppression film where the first electrode 6 was formed leads to the fact that the first electrode hinders oxygen from being discharged to the outside and the sheet resistance of the current blocking portion 9 does not decrease. .

The semiconductor light-emitting device obtained by the method for manufacturing a semiconductor light-emitting device described above in the present invention is not limited to the above, and may have a configuration other than the above.

  Although the embodiments and examples of the present invention have been described as described above, it is also planned from the beginning to appropriately combine the configurations of the above-described embodiments and examples.

  It should be understood that the embodiments and examples disclosed herein are illustrative and non-restrictive in every respect. The scope of the present invention is defined by the terms of the claims, rather than the description above, and is intended to include any modifications within the scope and meaning equivalent to the terms of the claims.

  DESCRIPTION OF SYMBOLS 1,101 Substrate, 2,102 Lower clad layer, 3,103 Light emitting layer, 4,104 Upper clad layer, 5,105 Contact layer, 6 First electrode, 6a, 106a Thin wire structure electrode, 7 Second electrode 8, 108 Conductive thin film, 9, 109 Current blocking part, 10 Semiconductor layer, 15 Current suppression film, 106 p-type electrode, 107 n-type electrode.

Claims (4)

Forming a semiconductor layer including a light emitting layer made of a group III compound semiconductor on a substrate;
Forming a current suppression film on a surface of the semiconductor layer opposite to the substrate;
First annealing the current suppression film in an atmosphere containing oxygen; and
Forming a first electrode on the current suppression film;
The current suppression film is subjected to second annealing in an atmosphere not containing oxygen, whereby the current suppression film immediately below the first electrode is used as a current blocking part, and the current suppressing film other than the current blocking part is A step of forming a conductive thin film;
Forming a second electrode on the surface of the substrate opposite to the side in contact with the semiconductor layer or on the exposed surface of the semiconductor layer. The method of manufacturing a semiconductor light emitting element according to claim 1 , wherein the first annealing is performed at a temperature of 600 to 700 ° C. The second annealing is the conducted in the following first annealing temperature, a method of manufacturing a semiconductor light emitting device according to claim 1 or 2. The conductive thin film is composed of indium tin oxide, a method of manufacturing a semiconductor device as claimed in any of claims 1 to 3.

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