JP5319404B2 - Power converter - Google Patents

Description

  The present invention relates to power conversion devices such as amplifiers, chargers, and dischargers.

  Conventionally, there is a digital amplifier as a power conversion device (see, for example, Non-Patent Document 1).

  FIG. 14 is a circuit diagram of a digital amplifier 100 according to a conventional example. The digital amplifier 100 includes a power conversion unit 120 and a voltage application unit 110 that applies a voltage to the power conversion unit 120.

  The voltage application unit 110 includes an inductor L1, a diode D1, a capacitor C1, a switch element Q1 including an N-channel MOSFET, and a first control unit 111.

  The terminal A is connected to one end of the inductor L1, and the anode of the diode D1 and the drain of the switch element Q1 are connected to the other end of the inductor L1. The first controller 111 and one electrode of the capacitor C1 are connected to the cathode of the diode D1. Hereinafter, a contact point between the cathode of the diode D1, the first control unit 111, and one electrode of the capacitor C1 is referred to as a contact point J1.

  The other electrode of the capacitor C1 and the source of the switch element Q1 are grounded. The first control unit 111 is connected to the gate of the switch element Q1. In addition to the contact J1 and the gate of the switch element Q1, a terminal D is connected to the first control unit 111.

  In the voltage application unit 110 having the above configuration, the first control unit 111 switches the control signal according to the reference signal Ref1 input from the terminal D and the feedback signal FB1 having the same voltage as the contact J1. Supply to the gate of Q1. The switch element Q1 performs switching according to the supplied control signal.

  When the input signal IN is input from the terminal A, the input signal IN is supplied to one electrode of the capacitor C1 through the inductor L1 and the diode D1 according to the switching of the switch element Q1. As a result, the capacitor C1 is charged.

  Note that the voltage of the reference signal Ref1 is constant regardless of time. Therefore, the first control unit 111 supplies a control signal to the gate of the switch element Q1 according to the voltage of the feedback signal FB1 with respect to the reference signal Ref1 that is a constant voltage. As a result, the contact J1 becomes a constant voltage.

  The power conversion unit 120 includes a switch element Q2 configured with a P-channel MOSFET, a switch element Q3 configured with an N-channel MOSFET, an inductor L2, a capacitor C2, and a second control unit 121.

  The contact J1 is connected to the source of the switch element Q2, and the drain of the switch element Q3 and one end of the inductor L2 are connected to the drain of the switch element Q2. One end of the capacitor C2, one terminal B, and the second control unit 121 are connected to the other end of the inductor L2. Hereinafter, a contact point between the other end of the inductor L2, one electrode of the capacitor C2, the terminal B, and the second control unit 121 is referred to as a contact point J2.

  The other electrode of the capacitor C2 and the source of the switch element Q3 are grounded. The second controller 121 is connected to the gates of the switch elements Q2 and Q3. In addition to the contact J2, the gate of the switch element Q2, and the gate of the switch element Q3, the terminal C is connected to the second controller 121.

  In the power conversion unit 120 having the above configuration, the second control unit 121 switches the control signal to the switch element in accordance with the control signal Sig input from the terminal C and the feedback signal FB2 having the same voltage as the contact J2. This is supplied to the gate of Q2 and the gate of the switch element Q3. The switch elements Q2 and Q3 switch according to the supplied control signal.

  When switch element Q2 is on and switch element Q3 is off, one end of inductor L2 is electrically connected to contact J1. On the other hand, when the switch element Q2 is off and the switch element Q3 is on, one end of the inductor L2 is grounded. For this reason, the voltage at one end of the inductor L2 changes according to the switching of the switch elements Q2 and Q3.

  The ripple at the one end of the inductor L2 is reduced by a filter including the inductor L2 and the capacitor C2, and is output from the terminal B as the output signal OUT.

http: // japan. maxim-ic. com / appnotes. cfm / an_pk / 3777

  In the above-described digital amplifier 100, the electric power charged in the capacitor C1 is used in order to cope with a sudden load fluctuation at the time of charging the capacitor C2.

  However, as described above, since the contact J1 is a constant voltage, the power charged in the capacitor C1 is substantially constant. For this reason, when the electric power charged in the capacitor C1 cannot cope with a rapid load fluctuation at the time of charging the capacitor C2, the electric power of the input signal IN is used, and the supply for supplying the input signal IN to the terminal A is used. The source is overloaded.

  Therefore, when the contact J1 is a constant voltage, in order to increase the amount of power that can be charged by the capacitor C1 having one electrode connected to the contact J1, it is necessary to increase the capacitance of the capacitor C1. However, when the capacitance of the capacitor C1 is increased, the capacitor C1 increases in size, and it is difficult to downsize the digital amplifier 100 including the capacitor C1.

  In view of the above-described problems, an object of the present invention is to reduce the size of a power converter.

The present invention proposes the following items in order to solve the above-described problems.
(1) The present invention is applied to a capacitor and a capacitive load, power transmission means for transmitting the power stored in the capacitor to the capacitive load, a voltage applied to the capacitor, and the capacitive load. Voltage control means for controlling the voltage applied to the capacitor based on the voltage, and the voltage control means includes a voltage applied to the capacitor and a voltage applied to the capacitive load. And controlling the voltage applied to the capacity based on the power to maintain the sum of the power stored in the capacity and the power stored in the capacity load at a predetermined value. A conversion device is proposed.

  According to this invention, the capacity is based on the capacity and the capacity load, the power transmission means for transmitting the power stored in the capacity to the capacity load, the voltage applied to the capacity and the voltage applied to the capacity load. Voltage control means for controlling the voltage applied to the. The voltage control means controls the voltage applied to the capacitor based on the voltage applied to the capacitor and the voltage applied to the capacitor load, and the power stored in the capacitor and the capacitor The sum of the electric power stored in the load and the predetermined value is maintained.

  For this reason, the predetermined value is set in consideration of sudden load fluctuations when charging the capacitive load, so that the capacity is increased even when the power stored in the capacitive load is “0”. Therefore, it is possible to cope with a sudden load fluctuation when charging a capacitive load with the electric power stored in the capacity. Therefore, the power converter can be reduced in size.

  (2) The present invention proposes a power conversion device according to (1), wherein the capacity is a capacitive load.

  According to the present invention, the capacity is constituted by the capacitive load. According to this, an effect similar to the effect mentioned above can be produced.

  (3) In the power converter of (1) or (2), the present invention sets the maximum value of the voltage applied to the capacitive load as the maximum voltage, and stores the maximum voltage in the capacitor when the maximum voltage is applied. The power conversion device is characterized in that the predetermined value is equal to the maximum total power, where the sum of the power to be stored and the power stored in the capacitive load when the maximum voltage is applied is the maximum total power. is suggesting.

  According to the present invention, the sum of the power stored in the capacity and the power stored in the capacity load is maintained at a value equal to the maximum total power. Here, the maximum total power is the sum of the power stored in the capacity when the maximum voltage is applied and the power stored in the capacitive load when the maximum voltage is applied, and the maximum voltage is It is the maximum voltage applied to the capacitive load.

  For this reason, even if the electric power stored in the capacitive load is “0”, the capacitive load is charged by the electric power stored in the capacity so that the maximum voltage is applied to the capacitive load. be able to. Therefore, it is possible to cope with a sudden load fluctuation when the electric power is stored in the capacity load with the electric power stored in the capacity without increasing the capacity. Therefore, the same effect as described above can be achieved.

  (4) The power converter according to any one of (1) to (3), wherein the power converter includes power regeneration means for transmitting the power stored in the capacitive load to the capacity. Has proposed.

  According to this invention, the power regeneration means for transmitting the power stored in the capacitive load to the capacity is provided. For this reason, when discharging the electric power stored in the capacitive load, the electric power can be transmitted to the capacity by the power regeneration means to charge the capacity. Therefore, since it is not necessary to supply new power to the power conversion device in order to charge the capacity, power saving can be realized.

  (5) The present invention proposes a power conversion device according to any one of (1) to (4), wherein the capacitive load is a piezo element.

  According to the present invention, the capacitive load is a piezo element. According to this, an effect similar to the effect mentioned above can be produced.

  (6) The present invention proposes a power converter according to (5), wherein the capacitor is a piezo element.

  According to the present invention, the capacitor is a piezo element. According to this, an effect similar to the effect mentioned above can be produced.

  According to the present invention, the power converter can be reduced in size.

1 is a circuit diagram showing an outline of a digital amplifier according to a first embodiment of the present invention. It is a figure for demonstrating operation | movement of the said digital amplifier. It is a figure for demonstrating operation | movement of the said digital amplifier. It is a figure for demonstrating operation | movement of the said digital amplifier. It is a circuit diagram of a digital amplifier according to a second embodiment of the present invention. It is a figure for demonstrating the current regeneration in the said digital amplifier. It is a figure for demonstrating the current regeneration in the said digital amplifier. It is a figure for demonstrating the current regeneration in the said digital amplifier. It is a timing chart of the digital amplifier. It is a circuit diagram of the digital amplifier which concerns on 3rd Embodiment of this invention. It is a figure for demonstrating operation | movement of the said digital amplifier. It is a figure for demonstrating operation | movement of the said digital amplifier. It is a figure for demonstrating operation | movement of the said digital amplifier. It is a circuit diagram of a digital amplifier according to a conventional example.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. Note that the constituent elements in the following embodiments can be appropriately replaced with existing constituent elements, and various variations including combinations with other existing constituent elements are possible. Accordingly, the description of the following embodiments does not limit the contents of the invention described in the claims.

<First Embodiment>
FIG. 1 is a circuit diagram showing an outline of a digital amplifier 1 according to the first embodiment of the present invention. The digital amplifier 1 includes an energy conversion device 50 and capacitors C1 and C2. The energy conversion device 50 includes a first energy conversion unit 51 and a second energy conversion unit 52.

  The terminal A and one electrode of the capacitor C1 are connected to the first energy conversion unit 51, and one electrode of the capacitor C1 and one electrode of the capacitor C2 are connected to the second energy conversion unit 52. And are connected. The other electrode of the capacitor C1 and the other electrode of the capacitor C2 are grounded. Hereinafter, a contact point between the first energy conversion unit 51, the second energy conversion unit 52, and one electrode of the capacitor C1 is referred to as a contact point J1. A contact point between the second energy conversion unit 52 and one electrode of the capacitor C2 is referred to as a contact point J2.

  First, the case where the capacitor C2 is charged with the electric power charged in the capacitor C1 in the digital amplifier 1 having the above configuration will be described below with reference to FIGS.

  First, as shown in FIG. 2, the first energy converter 51 is driven to supply the input signal IN input from the terminal A to one electrode of the capacitor C1. According to this, the capacitor C1 is charged by the input signal IN inputted from the terminal A.

  Next, as shown in FIG. 3, the second energy conversion unit 52 is driven to pass a current from one electrode of the already charged capacitor C1 to one electrode of the capacitor C2. According to this, the capacitor C2 is charged with the electric power charged in the capacitor C1.

Here, the capacitance of the capacitor C1 _{C 1, C 2} the capacitance of the capacitor C2, _{V 1} the voltage on the node J1, _{V 2} the voltage at the node J2, and the set voltage maximum value of the voltage _{V 2} of the contact J2 _{V max} To do. Setting the voltage maximum value, and that the maximum value of the voltage V ₂ of the node J2 is possible. The capacitance C ₁ of the capacitor C ₁ , the capacitance C ₂ of the capacitor C _2, and the set voltage maximum value V _max are known fixed values, and the voltage V ₂ at the contact J ₂ is measured by a voltage measurement unit (not shown). Use a known value. Then, by controlling the voltage V ₁ of the contact point J1 as shown in Equation (1) below is established, the abrupt load change at the time of charging the capacitor C2 the voltage V ₂ is applied, it is charged in the capacitor C1 It can cope with the power that is.

That is, by controlling the energy converter 50, by controlling the voltage V ₁ of the node J1 to equation (1) holds, the capacitor C1 of the power is insufficient to equation (1) holds the input signal IN be charged to until the voltage V ₂ of the node J2 is the set voltage maximum value V _max, you can charge a capacitor C2 with power being charged in the capacitor C1. According to this, the rapid load change at the time of charging the capacitor C2 the voltage V ₂ is applied, it can be dealt with power being charged in the capacitor C1.

Note that the right side of Equation (1) is equal to the power charged in the capacitor C2 when the set voltage maximum value V _max is applied, and the set voltage maximum value V _max is a known fixed value as described above. The predetermined value is set in advance. Thus, by controlling the voltage V ₁ of the node J1 to equation (1) holds, the power being charged in the capacitor C1, the power being charged to the capacitor C2, the sum of a predetermined value Will be kept.

  Next, in the digital amplifier 1 having the above configuration, when current regeneration is performed between the capacitor C1 and the capacitor C2, that is, when the capacitor C1 is charged with the power charged in the capacitor C2, FIG. 4 is used. Will be described below.

  As shown in FIG. 4, the second energy conversion unit 52 is driven, and a regenerative current is caused to flow from one electrode of the capacitor C2 that has already been charged to one electrode of the capacitor C1. According to this, the capacitor C1 is charged with the electric power charged in the capacitor C2.

  According to the digital amplifier 1 described above, the following effects can be obtained.

By controlling the energy converter 50, by controlling the voltage V ₁ of the node J1 to equation (1) holds, the power being charged in the capacitor C1, the power being charged to the capacitor C2, the the sum, can be kept on the power is charged in the capacitor C2 in the case of applying a set voltage maximum value V _max. Therefore, it charges the capacitor C2 in the power voltage V ₂ applied to the capacitor C2 until the set maximum voltage value V _max, is charged in the capacitor C1. According to this, it is possible to cope with a sudden load fluctuation when charging the capacitor C2 without increasing the capacitance of the capacitor C1, using the power charged in the capacitor C1, and thus the digital amplifier 1 can be downsized.

  Further, the energy conversion device 50 can be controlled to allow a regenerative current to flow from one electrode of the capacitor C2 to one electrode of the capacitor C1. For this reason, when discharging the capacitor C2, the capacitor C1 can be charged by the electric power discharged from the capacitor C2. Therefore, since it is not necessary to supply new power to the digital amplifier 1 in order to charge the capacitor C1, power saving can be realized.

Second Embodiment
FIG. 5 is a circuit diagram of a digital amplifier 1A according to the second embodiment of the present invention. The digital amplifier 1A is different from the digital amplifier 100 according to the conventional example shown in FIG. In the digital amplifier 1A, the same components as those of the digital amplifier 100 are denoted by the same reference numerals and description thereof is omitted.

  The specific control unit 10 includes a conversion unit 11 in addition to the first control unit 111 described above. The conversion unit 11 is connected to the contact J2 and the first control unit 111, converts the voltage of the feedback signal FB2 that is the same voltage as the contact J2, and supplies the converted voltage to the first control unit 111 as a reference signal Ref2.

  Below, the basic concept of the specific control part 10 is demonstrated first.

Here, _{C 1} and the capacitance of the capacitor C1 as a capacitive, setting the capacitance of the capacitor C2 _{C 2, V 1} the voltage on the node J1, _{V 2} the voltage at the node J2, the voltage _{V 2} of node J2 as a capacitive load The maximum voltage value is V _max . Setting a voltage maximum value is that of the maximum value that can take the voltage V ₂ of the contact J2, digital amplifier 1A is assumed to be equal to the maximum value of the voltage of the output signal OUT to be output from the terminal B. Further, the electric power is charged in the capacitor C1 in the case of applying the set voltage maximum value V _max, the electric power is charged in the capacitor C2 in the case of applying a set voltage maximum value V _max, the required total power is the sum of _Let P _max . Then, the required total power P _max can be expressed as the following formula (2).

Incidentally, the capacitance _{C 1} of capacitor C1, the capacitance _{C 2} of capacitor C2, and the set maximum voltage _{V max,} the known fixed value. According to this, in formula (2), the required total power P _max is constant.

Further, the power is voltages V ₁ is charged in the capacitor C1 when it is applied to the P _1, when the power is charged in the capacitor C2 and P ₂ when the voltage V ₂ is applied, the power P ₁ can be expressed as in the following formula (3), and power P ₂ can be expressed as in the following formula (4).

The sum of the power P ₁ charged in the capacitor C ₁ when the voltage V ₁ is applied and the power P ₂ charged in the capacitor C ₂ when the voltage V ₂ is applied is the total required if power P _max or more, that satisfies the following equation (5), a sudden load variation at the time of charging the capacitor C2 the power P ₂ is already charged, the power P, which is charged in the capacitor C1 ₁ can be used.

  Therefore, when the equations (2) to (4) are substituted into the equation (5), the following equation (6) is obtained.

According to the above, when satisfying the expression (6), in the capacitor C2 to the power P ₂ is already charged, the abrupt load change at the time of charging the capacitor C2, the power P, which is charged in the capacitor C1 ₁ can respond.

For example, when the capacitance C ₁ of the capacitor C ₁ is 10 μF, the capacitance C ₂ of the capacitor C ₂ is 10 μF, and the set voltage maximum value V _max of the voltage V ₂ of the contact J ₂ is 100 V, the voltage V ₂ of the contact J ₂ is 0 V. Shall. In this case, substituting these values into Equation (6) yields Equation (7) below.

Therefore, when the voltage _{V 1} of the node J1 than 141.42V, to sudden load variations when the voltage _{V 2} of the node J2 is to charge the capacitor C2 is 0V, power being charged in the capacitor C1 P ₁ can handle this.

  Next, the operation of the specific control unit 10 will be described.

Converter 11, the voltage of the feedback signal FB2 input, i.e. into equation (8) below the voltage _{V 2} of the contact J2. Then, a signal of the same voltage as the voltage _{V 11} obtained as a result of substituting the reference signal Ref2, supplied to the first control unit 111. Note that V ₁₁ in equation (8) is the minimum value of V ₁ that satisfies equation (6), in order to cope with sudden load fluctuations when charging the capacitor C 2 with the power charged in the capacitor C 1. This is the minimum voltage required at the contact J1.

The first control unit 111 compares the feedback signal FB1 is voltages _{V 1} and the voltage at the node J1, the minimum value _{V 11} of the voltage required by the above contact J1 reference signal Ref2 to be the same voltage. When V ₁ ≧ V ₁₁ is satisfied, a control signal for turning on the switch element Q1 is supplied to the gate of the switch element Q1, and when V ₁ <V ₁₁ is satisfied, the switch element Q1 is turned off. Is supplied to the gate of the switch element Q1.

  The digital amplifier 1 performs current regeneration between the capacitor C1 and the capacitor C2. This current regeneration will be described below with reference to FIGS.

  Although not shown in FIG. 5, each of the switch elements Q2 and Q3 includes body diodes D2 and D3, respectively, as shown in FIGS.

When the power charged in the capacitor C2 is discharged, if the switch element Q2 is turned off and the switch element Q3 is turned on, as shown in FIG. to ground via a switching element Q3 in the oN state, the regenerative current I ₁ flows.

On the other hand, when the power charged in the capacitor C2 is discharged, when the switch element Q2 is turned off and the switch element Q3 is turned off, as shown in FIG. A regenerative current I1 flows to _one electrode of the capacitor C1 via L2 and the body diode D2. A timing chart in this case is shown in FIG.

In FIG. 9, ST _Q2 indicates the state of the switch element Q2, and ST _Q3 indicates the state of the switch element Q3. Also, V ₃ denotes a drain of the switching element Q2, and the drain of the switching element Q3, one end of the inductor L2, the voltage at the node J3 is in contact.

Here, immediately before time t1, the switch elements Q2 and Q3 are assumed to be in the off state. The regenerative current I ₁ is “0”, and the voltage V _{2 at the} contact J2 and the voltage V _{3 at the} contact J3 are _VA .

At time t1, the switch element Q3 is turned on. Then, as described above, it flows into the ground through the regenerative current I ₁ inductor L2 and the switch element Q3 in the ON state. The regenerative current I ₁ increases as time passes, and becomes I _{A at} time t2. On the other hand, the voltage _{V 3} of the contact J3 becomes GND is ground and the voltage. Further, the voltage _{V 2} of the node J2 is reduced in accordance with the passage of time, the _{V B} at time t3.

At time t2, switching element Q3 is turned off. Then, as described above, it flows to one electrode of the capacitor C1 regenerative current I ₁ through the inductor L2 and the body diode D2. The regenerative current I ₁ decreases as time passes, and becomes “0” at time t3. On the other hand, the voltage _{V 3} of the node J1, the voltage of one electrode of the capacitor C1, i.e. after a voltages _{V 1} and the voltage at the node J1, at time t3 the regenerative current _{I 1} becomes "0", the node J2 It becomes a voltage _{V 2} and _{V B} is the same voltage.

According to the above, the discharge of the power being charged in the capacitor C2 is completed, the voltage of one electrode of the voltage V _2, i.e. the capacitor C2 of the node J2 becomes V _B. Here, V _B is a value set by the designer of the digital amplifier 1.

  According to the above digital amplifier 1A, the following effects can be obtained.

The specific control unit 10, converting unit 11, power based on the voltage V ₂ of the contact J2, which rapid load change at the time of charging the capacitor C2 the voltage V ₂ is applied, is charged in the capacitor C1 in calculating the minimum value V ₁₁ of the required voltage at the junction J1 to the corresponding. Then, the first control unit 111, when satisfying the voltage _{V 1} of the contact point J1, the minimum value _{V 11} of the voltage required by the above contact J1, compares, the _{V 1} ≧ _{V 11,} the switch elements A control signal for turning on Q1 is supplied to the gate of the switch element Q1. When V ₁ <V ₁₁ is satisfied, a control signal for turning off the switch element Q1 is supplied to the gate of the switch element Q1.

According to this, the voltage V ₁ of the node J1 is a be kept to a minimum value V ₁₁ and the voltage of the required voltage in the above-mentioned contact J1. The minimum value V ₁₁ of the voltage required by the above node J1, as shown in equation (8), becomes smaller as the voltage V ₂ of the node J2 is increased, the voltage V ₁ of the node J1, the contact J2 decreases with the voltage _{V 2} becomes large. From the above, the sum of the power charged in the capacitor C1 and the power charged in the capacitor C2 is maintained at the required total power P _max that is a predetermined value. Therefore, it charges the capacitor C2 in the power voltage V ₂ applied to the capacitor C2 until the set maximum voltage value V _max, is charged in the capacitor C1. According to this, since the power charged in the capacitor C1 can cope with a sudden load fluctuation when the capacitor C2 is charged without increasing the capacitance of the capacitor C1, the digital amplifier 1A can be downsized.

Further, the switching elements Q2, Q3 by turning OFF state, via the inductor L2 and the body diode D2, to one electrode of the capacitor C1 from one electrode of the capacitor C2, can flow regenerative current I _1. For this reason, when discharging the capacitor C2, the capacitor C1 can be charged by the electric power discharged from the capacitor C2. Therefore, since it is not necessary to supply new power to the digital amplifier 1 in order to charge the capacitor C1, power saving can be realized.

<Third Embodiment>
FIG. 10 is a circuit diagram of a digital amplifier 1B according to the third embodiment of the present invention. The digital amplifier 1B is different from the digital amplifier 1A according to the second embodiment of the present invention shown in FIG. 5 in that the power converter 120A is provided instead of the power converter 120, and the capacitors C1 and C2 are piezoelectric elements. And is different. In the digital amplifier 1B, the same components as those of the digital amplifier 1A are denoted by the same reference numerals, and description thereof is omitted.

  The power conversion unit 120A includes a capacitor C2 and a drive amplifier 21. The drive amplifier 21 includes switch elements Q4, Q5, Q6, and Q7 configured by N-channel MOSFETs, inductors L2 and L3, an inverter INV, and a second control unit 121.

  A contact J1 is connected to the drain of the switch element Q4 and the drain of the switch element Q6 via an inductor L3. The source of the switch element Q4 is connected to the source of the switch element Q4. The source of the switch element Q6 is grounded.

  A contact J2 is connected to the drain of the switch element Q5 and the drain of the switch element Q7 via an inductor L2. As described above, the source of the switch element Q5 is connected to the source of the switch element Q5. The source of the switch element Q7 is grounded.

  The second control unit 121 is connected to the gates of the switch elements Q4 to Q7. In particular, the second control unit 121 is connected to the gate of the switch element Q4 via the inverter INV, and the control signal supplied to the gate of the switch element Q4 and the control signal supplied to the gate of the switch element Q5. Is a signal whose polarities are reversed.

Incidentally, in the digital amplifier 1A according to the second embodiment of the present invention, when the setting voltage maximum value of the voltage V ₂ of the node J2 and V _max, is charged in the capacitor C1 in the case of applying the set voltage maximum value V _max The required total power P _max , which is the sum of the power and the power charged in the capacitor C2 when the set voltage maximum value V _max is applied, can be expressed as in the above equation (2). On the other hand, in the digital amplifier 1B according to the third embodiment of the present invention, the required total power P _max can be expressed as the following formula (9).

  Therefore, when the equations (3), (4), and (9) are substituted into the above equation (5), the following equation (10) is obtained.

According to the above, when satisfying the expression (10), in the capacitor C2 to the power P ₂ is already charged, the abrupt load change at the time of charging the capacitor C2, the power P, which is charged in the capacitor C1 ₁ can respond.

  The operation of the digital amplifier 1B will be described below with reference to FIGS. Although not shown in FIG. 10, each of the switch elements Q4 to Q7 includes body diodes D4 to D7 as shown in FIGS.

Figure 11 is a diagram showing the voltage _{V 1} of the contact point J1, the voltage _{V 2} of the contact J2, the relationship.

In the period from time t11 to t12 and in the period from time t14 to t15, the digital amplifier 1B performs a steady operation. In these periods, the capacitor C2 is charged by the power charged in the capacitor C1. Yes. Therefore, in accordance with the elapse of time, the voltage V ₁ applied to the capacitor C1 decreases, the voltage V ₂ applied to the capacitor C2 has risen.

On the other hand, in the period from time t12 to t14, the digital amplifier 1B performs a current regeneration operation. In this period, the power charged in the capacitor C2 is discharged, and the capacitor C1 is charged by the discharged power. ing. Therefore, in accordance with the elapse of time, the voltage V ₁ applied to the capacitor C1 rises, the voltage V ₂ applied to the capacitor C2 is decreased.

  FIG. 12 is a diagram illustrating the operation of the drive amplifier 21 during the steady operation. During the steady operation, the switch elements Q4 and Q7 are turned off, the switch element Q5 is turned on, and the switch element Q6 is turned on or turned off.

In the case where the switching element Q6 to the ON state, the one electrode of the capacitor C1, to ground via a switching element Q6 of the inductor L3 and the on-state, steady-state current I ₂ flows. On the other hand, when the switch element Q6 is turned off, one electrode of the capacitor C1 is connected to one electrode of the capacitor C2 via the inductor L3, the body diode D4, the switch element Q5 in the on state, and the inductor L2. steady-state current _{I 2} flows.

  FIG. 13 is a diagram illustrating the operation of the drive amplifier 21 during the current regeneration operation. During the current regeneration operation, the switch element Q4 is turned on, the switch elements Q5 and Q6 are turned off, and the switch element Q7 is turned on or turned off.

When the switching element Q7 to the ON state, the one electrode of the capacitor C2, to the ground via the inductor L2 and the ON-state switch elements Q7, regenerative current I ₁ flows. On the other hand, when the switch element Q7 is turned off, one electrode of the capacitor C2 is connected to one electrode of the capacitor C1 via the inductor L2, the body diode D5, the switch element Q4 in the on state, and the inductor L3. regenerative current _{I 1} flows.

  According to the digital amplifier 1B described above, the following effects can be obtained in addition to the effects of the digital amplifier 1A described above which can realize miniaturization and power saving.

  Since the capacitors C1 and C2 are piezoelectric elements, the digital amplifier 1B can be further reduced in size.

  Further, in the conventional digital amplifier, when the two capacitors corresponding to the above-described capacitors C1 and C2 are piezo elements, the one corresponding to the capacitor C2 is changed to the one corresponding to the capacitor C1, although it is in steady operation. There was a risk that current would flow. For this reason, it is necessary to provide two means each for inputting the input signal IN to the terminal corresponding to the terminal A and two corresponding to the driving amplifier 21 described above.

In contrast, in the digital amplifier 1B, in a steady state operation, since the minimum value of the voltage V ₁ is equal to the maximum value of the voltage V _2, will not be a capacitor C2 current flows into the capacitor C1. For this reason, it is only necessary to provide one means for inputting the input signal IN to the terminal A and one drive amplifier 21. Therefore, the digital amplifier 1B and peripheral circuits of the digital amplifier 1B can be reduced in size.

  The present invention is not limited to the above-described embodiment, and various modifications and applications can be made without departing from the gist of the present invention.

  For example, in the first embodiment and the second embodiment described above, the capacitor C2 may be configured by a piezo element.

  In the second embodiment and the third embodiment described above, the digital amplifier is configured by using the voltage application unit 110 and the power conversion unit 120. However, the present invention is not limited thereto, and for example, a charger or a discharger is configured. May be.

  The present invention can be applied to power conversion devices such as amplifiers, chargers, and dischargers.

1, 1A, 1B, 100; digital amplifier 10; specific control unit 11; conversion unit 21; drive amplifier 50; energy conversion device 51; first energy conversion unit 52; second energy conversion unit 110; First control unit 120, 120A; power conversion unit 121; second control unit C1, C2; capacitors D2, D3, D4, D5, D6, D7; body diodes L1, L2; inductors Q1, Q2, Q3, Q4, Q5, Q6, Q7; switch elements

Claims (6)

Capacity,
A first capacitive load;
Power transmission means for transmitting the power stored in the capacity to the first capacitive load;
Voltage control means for controlling the voltage applied to the capacitor based on the voltage applied to the capacitor and the voltage applied to the first capacitive load;
The voltage control means includes
Based on the voltage applied to the capacitor and the voltage applied to the first capacitive load, the voltage applied to the capacitor is controlled to store the power stored in the capacitor, A power converter that maintains a sum of power stored in the first capacitive load and a predetermined value. The said capacity | capacitance is comprised by the 2nd capacity | capacitance load, The power converter device of Claim 1 characterized by the above-mentioned. The maximum value of the voltage applied to the first capacitive load is set as the maximum voltage,
If the sum of the power stored in the capacity when the maximum voltage is applied and the power stored in the first capacitive load when the maximum voltage is applied is the maximum total power,
The power converter according to claim 1, wherein the predetermined value is equal to the maximum total power. The power converter according to any one of claims 1 to 3, further comprising power regeneration means for transmitting the power stored in the first capacitive load to the capacity. The power converter according to any one of claims 1 to 4, wherein the first capacitive load is a piezo element.   The power converter according to claim 5, wherein the capacitor is a piezo element.

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