JP5285303B2 - Electronics - Google Patents

Electronics Download PDF

Info

Publication number
JP5285303B2
JP5285303B2 JP2008049596A JP2008049596A JP5285303B2 JP 5285303 B2 JP5285303 B2 JP 5285303B2 JP 2008049596 A JP2008049596 A JP 2008049596A JP 2008049596 A JP2008049596 A JP 2008049596A JP 5285303 B2 JP5285303 B2 JP 5285303B2
Authority
JP
Japan
Prior art keywords
fpc board
connector
pattern
terminal group
mounting electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2008049596A
Other languages
Japanese (ja)
Other versions
JP2009206408A (en
Inventor
悠太 半田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Instruments Inc
Original Assignee
Seiko Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Instruments Inc filed Critical Seiko Instruments Inc
Priority to JP2008049596A priority Critical patent/JP5285303B2/en
Publication of JP2009206408A publication Critical patent/JP2009206408A/en
Application granted granted Critical
Publication of JP5285303B2 publication Critical patent/JP5285303B2/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Description

本発明は基板対基板型コネクタを使用した電子機器の構造に関する。   The present invention relates to a structure of an electronic device using a board-to-board type connector.

従来、基板間の接続は、一対のコネクタからなるコネクタユニットを使用して実現される。即ち、接続させる2枚の基板の夫々に、対となるコネクタ(例えば、雄型コネクタと雌型コネクタ)を実装し、実装されたコネクタ同士を嵌合させることにより、基板間の接続が実現されるものである。   Conventionally, the connection between the substrates is realized by using a connector unit including a pair of connectors. That is, a pair of connectors (for example, a male connector and a female connector) are mounted on each of the two substrates to be connected, and the mounted connectors are fitted to each other, thereby realizing connection between the substrates. Is.

近時、携帯電話端末やノート型パソコン等といった各種の電子機器の機能の向上等に伴い、これらの電子機器に内蔵される電子回路の構成が複雑化する傾向にあり、多様化する複数の基板間の接続を行う必要性が生じている。そこで、電子機器内部での設置面積の増加を防ぐことを目的として、複数の基板を平行に積み重ねて設置することが主流となっている。そして、このような平行に積み重ねる基板間の物理的及び電気的な接続を実現する手法として、いわゆる基板対基板型(Board−to−Board型)コネクタが使用されている。即ち、基板対基板型コネクタ(以下、BtoBコネクタと称す)は、一対の雄型コネクタと雌型コネクタからなり、これらを平行に積み重ねられる2枚の基板の夫々に対向するように実装し、夫々の凹部と凸部とを嵌合させることによって基板間の接続を実現している。   Recently, with the improvement of functions of various electronic devices such as mobile phone terminals and laptop computers, the configuration of electronic circuits built into these electronic devices tends to become complicated, and a plurality of substrates that are diversified. There is a need to make a connection between. Thus, for the purpose of preventing an increase in the installation area inside the electronic device, it is a mainstream to install a plurality of substrates stacked in parallel. A so-called board-to-board type connector is used as a technique for realizing such physical and electrical connection between the substrates stacked in parallel. That is, a board-to-board connector (hereinafter referred to as a BtoB connector) is composed of a pair of male connector and female connector, which are mounted so as to oppose each of two boards stacked in parallel. The connection between the substrates is realized by fitting the concave portion and the convex portion.

図1に従来の電子機器のBtoBコネクタの実装形態を示す。図示するように、FPC基板1にはBtoBコネクタが実装されている。詳しくは、FPC基板1に設けられた実装用電極4の上にコネクタ本体2の端子6が半田接続されている。このとき、BtoBコネクタを実装する為に、FPC基板1の外形をBtoBコネクタの実装ランドである実装用電極4から一定の寸法を確保して、領域3を設けることが一般的であった。FPC基板1には無駄な領域3が発生する為、FPC基板1のサイズが大きくなり、FPC基板1のコストUPの要因となっていた。この無駄な領域3を削除したときの断面構成を図2に模式的に示す。図1の構造のままFPC基板1の外形を小さくした場合は、図2に示すように実装用電極4と裏パターン5が基板端面で接近することとなり、実装用電極4と裏パターン5がショートする問題が発生する。更に、このショートを回避するための構成を図3に示す。図示するように、裏パターン5をFPC基板1の外形端部まで形成しない構成である。この場合は、裏パターン5がない部分でFPC基板1のダレ8が発生してしまい、半田付け不良7が発生するという問題があった。   FIG. 1 shows a mounting form of a BtoB connector of a conventional electronic device. As illustrated, a BtoB connector is mounted on the FPC board 1. Specifically, the terminals 6 of the connector body 2 are soldered on the mounting electrodes 4 provided on the FPC board 1. At this time, in order to mount the BtoB connector, it is common to provide a region 3 by securing a certain dimension of the outer shape of the FPC board 1 from the mounting electrode 4 which is a mounting land of the BtoB connector. Since the useless area 3 is generated in the FPC board 1, the size of the FPC board 1 is increased, which increases the cost of the FPC board 1. FIG. 2 schematically shows a cross-sectional configuration when this useless region 3 is deleted. When the outer shape of the FPC board 1 is reduced with the structure of FIG. 1, the mounting electrode 4 and the back pattern 5 come close to each other at the end face of the board as shown in FIG. 2, and the mounting electrode 4 and the back pattern 5 are short-circuited. Problems occur. Further, FIG. 3 shows a configuration for avoiding this short circuit. As shown in the drawing, the back pattern 5 is not formed up to the outer edge of the FPC board 1. In this case, there is a problem that the sagging 8 of the FPC board 1 occurs in the portion where the back pattern 5 is not present, and the soldering defect 7 occurs.

更に、端子6に対応する位置のFPC基板1の裏側にパターンを設けないと、FPC基板の平行度が出なくなるため、FPC基板のダレや半田接続不良が発生することになる。   Furthermore, if a pattern is not provided on the back side of the FPC board 1 at a position corresponding to the terminal 6, the parallelism of the FPC board will not be obtained, and sagging of the FPC board and poor solder connection will occur.

このように、従来のFPC基板へのコネクタの実装形態では、小さい基板サイズでコネクタを実装すると信頼性が低くなるという課題があった。そこで、本発明は、FPC基板1の外形を小さくして、外形際にコネクタを実装しても高い実装信頼性が得られる構成を実現することを目的とする。   As described above, in the conventional mounting form of the connector on the FPC board, there is a problem that reliability is lowered when the connector is mounted with a small board size. Accordingly, an object of the present invention is to realize a configuration in which a high mounting reliability can be obtained even when a connector is mounted on the outer shape of the FPC board 1 with a smaller outer shape.

上述した課題を解決するため、おもて側の実装用電極4と裏側のパターンがショートしても問題ないように、FPC基板の外形側に電気的に独立した浮きパターン9(ダミーパターン)を、コネクタの端子に対応する位置に設けることとした。このように、裏パターン5とは別に、実装用電極4とショートしても問題のない単独の浮きパターン9を設ける事でパターンのショートによる不具合を避ける事が可能となる。また、コネクタ端子間のショートが浮きパターン9を介して発生することがないように、コネクタの端子毎に対応するように浮きパターン9を分離させて設置してもよい。   In order to solve the above-described problem, a floating pattern 9 (dummy pattern) that is electrically independent is formed on the outer side of the FPC board so that there is no problem even if the front-side mounting electrode 4 and the back-side pattern are short-circuited. , And provided at a position corresponding to the terminal of the connector. In this way, by providing the single floating pattern 9 that does not cause a problem even if short-circuited with the mounting electrode 4 separately from the back pattern 5, it is possible to avoid problems due to short-circuiting of the pattern. Further, the floating pattern 9 may be installed separately so as to correspond to each terminal of the connector so that a short circuit between the connector terminals does not occur via the floating pattern 9.

コネクタ実装の信頼性を維持したまま、FPC基板の外形サイズを小さくすることが可能になる。更に、FPC基板が小さくなる事で、他部品の搭載スペースが確保でき、設計の自由度、電子機器の小型化が可能になった。   The external size of the FPC board can be reduced while maintaining the reliability of connector mounting. Furthermore, the FPC board is reduced, so that a space for mounting other components can be secured, the degree of freedom in design, and the miniaturization of the electronic device can be achieved.

本発明の電子機器は、BtoBコネクタにより互いに接続される基板とFPC基板を有する電子機器に関する。FPC基板のおもて側にはコネクタの端子が接続される実装用電極が形成され、FPC基板の裏側には、回路配線とは電気的に独立した浮きパターンが形成されている。そして、この浮きパターンはFPC基板の外形端部まで届くように形成されるとともに、コネクタのFPC基板の外形側の端子に対応する領域を含むように形成されている。これにより、FPC基板の外形ぎりぎりにコネクタを実装しても、FPC基板にダレが生じたり、実装用電極と浮きパターンがショートしても電気的な問題が発生したりすることはない。さらに、浮きパターンを、コネクタのFPC基板の外形側の端子のそれぞれに対応して分離して設けることとした。これにより、複数の実装用電極と浮きパターンがショートしても電気的な問題が発生することがない。   The electronic device of the present invention relates to an electronic device having a substrate and an FPC substrate connected to each other by a BtoB connector. Mounting electrodes to which connector terminals are connected are formed on the front side of the FPC board, and a floating pattern electrically independent of circuit wiring is formed on the back side of the FPC board. The floating pattern is formed so as to reach the outer end of the FPC board and includes a region corresponding to a terminal on the outer side of the FPC board of the connector. As a result, even if the connector is mounted just outside the outer shape of the FPC board, no sagging occurs in the FPC board, and no electrical problem occurs even if the mounting electrode and the floating pattern are short-circuited. Furthermore, the floating pattern is provided separately corresponding to each of the terminals on the outer side of the FPC board of the connector. Thereby, even if a plurality of mounting electrodes and the floating pattern are short-circuited, an electrical problem does not occur.

本発明の実施例を図4及び図5に基づいて説明する。図4に、本発明の断面構成を模式的に示す。BtoBコネクタはコネクタ本体2と端子6を備えており、FPC基板1の実装面(おもて面)には、実装用電極4が端子6に対応するように形成されている。図示するように、コネクタの端子6は実装用電極4にはんだ11により実装されている。FPC基板1の裏面には、コネクタの端子6に対応する位置に裏パターン5と浮きパターン9が形成されている。図5は、図4で示した構成を裏パターン面側からみた透視図である。裏パターン5は回路を構成する配線として機能しているが、浮きパターン9は裏パターン5とは電気的に独立している。浮きパターン9がFPC基板1の外形部まで形成されているため、FPC基板1の端部がダレることがない。さらに、裏パターン5は回路配線と電気的に接続していないため、おもて側の実装用電極4と接触しても電気的に問題はない。すなわち、裏パターン5と浮きパターン9との間にパターン無し領域A12を設けた。これにより、一つの実装用電極4と浮きパターン9がショートしても電気的に問題が発生することがない。   An embodiment of the present invention will be described with reference to FIGS. FIG. 4 schematically shows a cross-sectional configuration of the present invention. The BtoB connector includes a connector body 2 and terminals 6, and mounting electrodes 4 are formed on the mounting surface (front surface) of the FPC board 1 so as to correspond to the terminals 6. As illustrated, the terminal 6 of the connector is mounted on the mounting electrode 4 with solder 11. On the back surface of the FPC board 1, a back pattern 5 and a floating pattern 9 are formed at positions corresponding to the terminals 6 of the connector. FIG. 5 is a perspective view of the configuration shown in FIG. 4 as seen from the back pattern surface side. The back pattern 5 functions as a wiring constituting the circuit, but the floating pattern 9 is electrically independent from the back pattern 5. Since the floating pattern 9 is formed up to the outer shape of the FPC board 1, the end of the FPC board 1 does not sag. Furthermore, since the back pattern 5 is not electrically connected to the circuit wiring, there is no electrical problem even if it contacts the front mounting electrode 4. That is, the no-pattern area A <b> 12 is provided between the back pattern 5 and the floating pattern 9. Thereby, even if one mounting electrode 4 and the floating pattern 9 are short-circuited, an electrical problem does not occur.

更に隣同士の実装用電極が浮きパターンを介してショートしないように、浮きパターン9をコネクタ端子6に対応するように分離して設けることとした。そのため、図5に示すようにパターン無し領域B13を形成した。   Further, the floating pattern 9 is separated and provided so as to correspond to the connector terminal 6 so that adjacent mounting electrodes do not short-circuit through the floating pattern. Therefore, a non-pattern area B13 is formed as shown in FIG.

このような構成により、FPC基板の無駄な領域を削除し、尚且つ従来技術での問題となっていた実装用電極と裏パターンのショートと、FPC基板のダレによる半田付け不具合を回避する事が可能となる。   With such a configuration, it is possible to eliminate a wasteful area of the FPC board and avoid a short-circuit between the mounting electrode and the back pattern, which has been a problem in the prior art, and a soldering failure due to sagging of the FPC board. It becomes possible.

電子機器小型軽量化が進む中、本発明はFPC基板の小型化が可能になる為、本発明は小型化が進む電子機器産業への利用に適する。   As electronic devices become smaller and lighter, the present invention enables the FPC board to be miniaturized. Therefore, the present invention is suitable for use in the electronic device industry where miniaturization is progressing.

従来のFPC基板の断面構成を示す断面図である。It is sectional drawing which shows the cross-sectional structure of the conventional FPC board | substrate. 従来のFPC基板の断面構成を示す断面図である。It is sectional drawing which shows the cross-sectional structure of the conventional FPC board | substrate. 従来のFPC基板の断面構成を示す断面図である。It is sectional drawing which shows the cross-sectional structure of the conventional FPC board | substrate. 本発明によるFPC基板を模式的に示す断面図である。It is sectional drawing which shows typically the FPC board | substrate by this invention. 本発明によるFPC基板を裏パターン面側からみた透視図である。It is the perspective view which looked at the FPC board by this invention from the back pattern surface side.

符号の説明Explanation of symbols

1 FPC基板
2 コネクタ本体
3 無駄な領域
4 実装用電極
5 裏パターン
6 コネクタ端子
8 FPC基板のダレ
9 浮きパターン
10 絶縁膜
11 半田付け
12 パターン無し領域A
13 パターン無し領域B
1 FPC board 2 Connector body 3 Waste area 4 Mounting electrode 5 Back pattern 6 Connector terminal 8 FPC board sagging 9 Floating pattern 10 Insulating film 11 Soldering 12 No pattern area A
13 No pattern area B

Claims (1)

FPC基板を有する電子機器であって、
前記FPC基板は、BtoBコネクタを端部に実装し、
前記BtoBコネクタのコネクタ本体の第一辺に第一端子群が設けられるとともに、前記第一辺に向かい合う第二辺に第二端子群が設けられ、
前記第一端子群は、前記第二端子群よりも前記端部の端に近い側に位置しており、
前記FPC基板のおもて面には、前記第一端子群に対応するように第一実装用電極群が形成されるとともに、前記第二端子群に対応するように第二実装用電極群が形成され、
前記FPC基板の裏面には、回路配線と、前記回路配線と電気的に独立する複数の浮きパターンが形成され、
前記第一実装用電極群は、前記端部まで形成され、
前記回路配線は、前記第二端子群に対応する位置に形成されるとともに、前記複数の浮きパターンと離間して形成され、
前記複数の浮きパターンのそれぞれは、前記第一実装用電極群のそれぞれの電極に対応する位置に形成されるとともに、前記端部の端まで届くように形成され互いに電気的独立するように分離して設けられたことを特徴とする電子機器。
An electronic device having an FPC board,
The FPC board has a BtoB connector mounted on the end,
A first terminal group is provided on the first side of the connector body of the BtoB connector, and a second terminal group is provided on the second side facing the first side,
The first terminal group is located closer to the end of the end portion than the second terminal group,
A first mounting electrode group is formed on the front surface of the FPC board so as to correspond to the first terminal group, and a second mounting electrode group is formed so as to correspond to the second terminal group. Formed,
On the back surface of the FPC board, circuit wiring and a plurality of floating patterns electrically independent from the circuit wiring are formed,
The first mounting electrode group is formed up to the end,
The circuit wiring is formed at a position corresponding to the second terminal group, and is formed apart from the plurality of floating patterns.
Each of the plurality of floating pattern is formed in a position corresponding to each of the electrodes of the first mounting electrode group, they are formed to reach to the end of said end portion, so as to be electrically independent of each other Electronic equipment characterized by being provided separately.
JP2008049596A 2008-02-29 2008-02-29 Electronics Expired - Fee Related JP5285303B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2008049596A JP5285303B2 (en) 2008-02-29 2008-02-29 Electronics

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2008049596A JP5285303B2 (en) 2008-02-29 2008-02-29 Electronics

Publications (2)

Publication Number Publication Date
JP2009206408A JP2009206408A (en) 2009-09-10
JP5285303B2 true JP5285303B2 (en) 2013-09-11

Family

ID=41148365

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2008049596A Expired - Fee Related JP5285303B2 (en) 2008-02-29 2008-02-29 Electronics

Country Status (1)

Country Link
JP (1) JP5285303B2 (en)

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54179460U (en) * 1978-06-08 1979-12-19
JPH06232523A (en) * 1993-01-28 1994-08-19 Casio Comput Co Ltd Flexible printed board
JPH0831477A (en) * 1994-07-11 1996-02-02 Kiyousera Elco Kk Fpc base board and device for connection this fpc base board to base board

Also Published As

Publication number Publication date
JP2009206408A (en) 2009-09-10

Similar Documents

Publication Publication Date Title
JP5092243B2 (en) Narrow pitch flexible wiring
US7238044B2 (en) Connection structure of printed wiring board
US9590338B1 (en) Rigid-flex circuit connector
TWM477690U (en) Low-profile mezzanine connector
KR101036327B1 (en) Electrical connector with grounding pin
WO2020031584A1 (en) Circuit board having terminal, and circuit board assembly
JP4829514B2 (en) Card edge type board connector
JP2009200015A (en) Connector for flexible wiring board and electronic device
JP5285303B2 (en) Electronics
JP5092354B2 (en) Double-sided printed wiring board, electronic device, and method for manufacturing double-sided printed wiring board
US20120168221A1 (en) Relay board for transmission connector use
KR101294782B1 (en) Connector Assembly
WO2018168336A1 (en) Signal transmission module
TWI640131B (en) Board to board connector module
JP2005268544A (en) Substrate for connecting between substrates, and connecting structure between substrates
JP2007116039A (en) Circuit board
JP2008098294A (en) Portable communication device
JP2023136446A (en) Component module
JP2005302543A (en) Connector
JP2009105189A (en) Mounting method of electrostatic countermeasure component
JP2006040967A (en) Multilayer flexible printed board and pressure welding connection structure
JP4787718B2 (en) Tab terminal
JP2003017164A (en) Connector and its mounting method
JP2541149B2 (en) Printed wiring board
JP2008021893A (en) Substrate-to-substrate connection method, and electronic equipment using this

Legal Events

Date Code Title Description
RD01 Notification of change of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7421

Effective date: 20091108

RD01 Notification of change of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7421

Effective date: 20091113

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20101208

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20120221

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20120223

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20120420

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20121016

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20121206

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20130514

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20130531

R150 Certificate of patent or registration of utility model

Ref document number: 5285303

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

LAPS Cancellation because of no payment of annual fees