JP5282470B2 - Image processing apparatus, image forming apparatus, and image processing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an image processing apparatus, an image forming apparatus and an image processing method for providing a high definition image by controlling dot positions to form an image. <P>SOLUTION: A dividing means and a correcting means are provided. The dividing means divides image data constituted of a plurality of pixels including image dots into a main scanning direction and a sub scanning direction by pixel unit, and also divides a notice pixel to be the image of a correction target among the divided pixels into a plurality of image blocks including a plurality of image dots. The correcting means corrects the image dots of the image blocks by shifting to a density direction being a direction of an adjacent pixel having a higher density on the basis of tones of the density of the adjacent pixel of the notice pixel. <P>COPYRIGHT: (C)2009,JPO&amp;INPIT

Description

  The present invention relates to image formation, and more particularly to an image processing apparatus, an image forming apparatus, and an image processing method for controlling a dot position for forming an image to provide a high definition image.

  In recent years, image formation using electrophotography has been studied for high speed and high image quality, and with the miniaturization of photolithography, it is possible to irradiate a plurality of laser beams from a single semiconductor chip. Semiconductor lasers are also widespread. This means that the number of laser beams per unit area irradiated from the semiconductor laser increases, so that the dot diameter when irradiating the photosensitive drum can be reduced, and higher-definition and high-speed image formation can be achieved. It will be possible to do this.

  By the way, when forming an image including a halftone by electrophotography, an isolated dot having a low density has a relatively poor stability in holding an electrostatic charge, and is generally a halftone scale formed by area gradation. In some cases, the tone reproducibility is lowered, and as a result, the image quality is deteriorated.

  For this reason, in order to avoid isolated dots having low density, conventionally, the density of isolated dots is determined by referring to the density of two pixels before and after adjacent in the main scanning direction so as not to deteriorate gradation. A process for forming the film is performed.

  As the semiconductor laser can form an electrostatic latent image of minute image dots, an image dot at a position that has not conventionally become an isolated dot may be generated as an isolated dot. Further, depending on the position of the image dot, it is considered that it is possible to form a higher quality image by shifting the image dot not only in the main scanning direction but also in the sub scanning direction.

  For example, Japanese Patent Application Laid-Open No. 2004-336487 (Patent Document 1) discloses an image forming process for forming an image in consideration of surrounding pixels of a pixel that performs laser irradiation.

JP 2004-336487 A

  The above-described conventional technique controls the MTF of an image including a target pixel by using a filtering process, and does not use a process for generating an isolated dot and a process for shifting the generated isolated dot. Japanese Patent Laid-Open No. 2004-228561 discloses that image dots that should be handled as isolated dots in the past by a semiconductor laser that can irradiate multi-beams are effectively used to prevent image quality degradation by using the multi-beam irradiation capability of the semiconductor lasers. Is not disclosed at all.

  That is, an object of the present invention is to provide an image processing apparatus, an image forming apparatus, and an image processing method that improve image quality degradation due to isolated dots when a semiconductor laser irradiates a plurality of laser beams from a single semiconductor chip. And

  Still another object of the present invention is to provide an image processing apparatus capable of efficiently providing a high-quality and high-definition image by switching the processing of isolated dots in accordance with the characteristics of the image to be formed. An object of the present invention is to provide an image forming apparatus and an image processing method.

In order to solve the above-described problems and achieve the object, an image processing apparatus according to the present invention is configured to store image data including a plurality of pixels including image dots in the main scanning direction and the sub-scanning direction in units of pixels. A dividing unit that divides and divides a target pixel, which is a pixel to be corrected among the divided pixels, into a plurality of image sections including a plurality of image dots, and based on the density of the density of adjacent pixels of the target pixel Correction means for correcting the image dots of the image section so as to bring the image dots having an area ratio for reproducing the density value of the target pixel in a density direction that is a two-dimensional direction of the adjacent pixels having a high density. It is characterized by that. The present invention also provides an image processing method executed by the image processing apparatus and an image forming apparatus including the image processing apparatus.

  According to the present invention, it is possible to appropriately improve image degradation due to isolated dots, and it is possible to efficiently provide a high-quality and high-definition image. Further, according to the present invention, there is an effect that it is possible to appropriately improve image degradation due to isolated dots regardless of the orientation of the input image.

  Hereinafter, although this invention is demonstrated with embodiment, this invention is not limited to embodiment mentioned later. FIG. 1 shows an embodiment of an image forming apparatus. The image forming apparatus 100 acquires an image from a scanner including a CCD (Charge Coupled Device) or the like, and controls the semiconductor laser and the transport system in accordance with the acquired image data to perform image formation. .

  The image forming apparatus 100 includes an optical device 102 including optical elements such as a semiconductor laser and a polygon mirror, an image forming unit 112 including a photosensitive drum, a charging device, and a developing device, and a transfer unit 122 including an intermediate transfer belt. Consists of including. The optical device 102 deflects a light beam emitted from a light source such as a semiconductor laser such as a VCSEL, which will be described later, by a polygon mirror 102c or the like and makes it incident on an fθ lens 102b.

  In the illustrated embodiment, the light beams are generated in numbers corresponding to each color of cyan (C), magenta (M), yellow (Y), and black (K), and after passing through the fθ lens 102b, the reflection mirror 102a is reflected. As the semiconductor laser, a surface emitting laser (hereinafter referred to as VCSEL) capable of emitting a plurality of laser beams from a single semiconductor chip is used, and a plurality of semiconductor lasers are used in the main scanning direction and the sub scanning direction. The laser beam is irradiated.

  After shaping the light beam, the WTL lens 102d deflects the light beam toward the reflection mirror 102e, and the light beam is transmitted to the photosensitive drums 104a, 106a, 108a, 110a as the light beam L used for exposure. Imagewise irradiation. The irradiation of the light beam L onto the photosensitive drums 104a, 106a, 108a, and 110a is performed using a plurality of optical elements as described above, and therefore timing synchronization is performed in the main scanning direction and the sub-scanning direction. Yes. Hereinafter, the main scanning direction is defined as the light beam scanning direction, and the sub-scanning direction is a direction orthogonal to the main scanning direction. In many image forming apparatuses 100, the photosensitive drums 104a, 106a, 108a, It is defined as the rotating direction of 110a.

  The photosensitive drum 104a includes a photoconductive layer including at least a charge generation layer and a charge transport layer on a conductive drum such as aluminum. The photoconductive layer is disposed corresponding to each of the photosensitive drums 104a, 106a, 108a, and 110a, and is charged with a surface charge by the chargers 104b, 106b, 108b, and 110b including a corotron, a scorotron, or a charging roller. Is granted.

  The electrostatic charges imparted on the photosensitive drums 104a, 106a, 108a, 110a by the respective chargers 104b, 106b, 108b, 110b are imagewise exposed by the light beam L to form an electrostatic latent image. The electrostatic latent images formed on the photoconductive drums 104a, 106a, 108a, and 110a are developed by the developing devices 104c, 106c, 108c, and 110c including a developing sleeve, a developer supplying roller, a regulating blade, and the like. Is formed.

  The developer carried on the photosensitive drums 104a, 106a, 108a, and 110a is transferred onto the intermediate transfer belt 114 that moves in the direction of arrow A by the conveying rollers 114a, 114b, and 114c. The intermediate transfer belt 114 is conveyed to the secondary transfer unit while carrying C, M, Y, and K developers. The secondary transfer unit includes a secondary transfer belt 118 and conveying rollers 118a and 118b. The secondary transfer belt 118 is conveyed in the direction of arrow B by the conveyance rollers 118a and 118b. An image receiving material 124 such as high-quality paper or a plastic sheet is supplied to the secondary transfer portion from an image receiving material storage portion 128 such as a paper feed cassette by a conveying roller 126.

  The secondary transfer unit applies a secondary transfer bias to transfer the multicolor developer image carried on the intermediate transfer belt 114 onto the image receiving material 124 held by suction on the secondary transfer belt 118. The image receiving material 124 is supplied to the fixing device 120 along with the conveyance of the secondary transfer belt 118. The fixing device 120 includes a fixing member 130 such as a fixing roller including silicone rubber, fluorine rubber, and the like, pressurizes and heats the image receiving material 124 and the multicolor developer image, and forms the printed material 132 as the image forming apparatus 100. To the outside. The intermediate transfer belt 114 after transferring the multicolor developer image is supplied to the next image forming process after the transfer residual developer is removed by the cleaning unit 116 including a cleaning blade.

  Although the image forming apparatus shown in FIG. 1 has been described as a full-color copying machine, the image forming apparatus according to the present embodiment is configured as a so-called multifunction machine including a copy, a facsimile, a printer, a scanner, a network connection function, and the like. Can also be implemented as a monochrome high-speed machine.

  FIG. 2 is an embodiment of the laser control unit 200 mounted on the image forming apparatus 100. The laser control unit 200 receives image data from an image processing unit 202 that digitally processes an analog image acquired from a scanner or the like, and drives an LD array 218 including a VCSEL to generate an electrostatic latent image on a photosensitive drum. It is formed. The laser control unit 200 includes a controller 220 and an exposure control unit 204. The controller 220 is configured as a microcomputer such as a so-called ASIC. The laser control unit 200 described above functions as an image processing apparatus that performs overall image processing in the image forming apparatus 100.

  Various techniques are known as an image forming apparatus using the above-described VCSEL. For example, in a general image forming apparatus (writing optical system), as shown in FIG. 3, the light source unit is a semiconductor laser array in which a plurality of light sources (a plurality of semiconductor lasers) are arranged in a lattice pattern, or on the same chip. When a plurality of light sources (a plurality of surface emitting lasers (VCSEL, surface emitting semiconductor laser)) are composed of surface emitting lasers arranged in a grid, the arrangement direction of the plurality of light sources is a rotation of a deflector such as a polygon mirror. The arrangement and angle of the light source unit 1001 are adjusted so as to have an angle θ with respect to the axis.

  In FIG. 3, the vertical arrangement direction of the light sources is a to c, and the horizontal arrangement direction is 1 to 4. For example, the upper left light source in FIG. 3 is expressed as a1. When the light source unit 1001 is arranged at an angle θ, the light source a1 and the light source a2 are exposed at different scanning positions, and one pixel (one pixel) is formed by the two light sources, that is, in FIG. Consider a case where one pixel is realized with two light sources. For example, if one pixel is composed of two light sources a1 and a2, and one pixel is composed of two light sources a3 and a4, a pixel as shown at the right end of FIG. When the vertical direction in the figure is the sub-scanning direction, it is assumed that the distance between the centers of the pixels constituted by the two light sources is equivalent to 600 dpi. At this time, the center distance between the two light sources constituting one pixel is equivalent to 1200 dpi, and the light source density is twice the pixel density. Therefore, by changing the light quantity ratio of the light source constituting one pixel, the center of gravity of the pixel can be shifted in the sub-scanning direction, and high-precision image formation can be realized.

  Returning to FIG. 2, in this embodiment, the controller 220 functions as a control unit for setting image dots for an image section generated by the image dividing unit 208 dividing pixels, as will be described later. The controller 220 is equipped with storage means such as a register memory, a ROM, and an EPROM in order to store data and execute processing, and executes processing including image registration processing by executing a program described in an assembler language. Further, the controller 220 communicates with the exposure control unit 204 via serial communication, receives the processing result of the pixel dividing unit 208, and executes an image alignment process. The controller 220 registers the image dot data set as a result of the image alignment processing in a format that can be used by the pixel dividing unit 208, or sends the data to the image dividing unit 208 to send image dots for the pixel to be processed. A pattern is generated. In the laser control unit 200 shown in FIG. 2, the controller 220 and the exposure control unit 204 are described as separate units. However, in another embodiment of the present invention, the exposure control unit 204 and the controller 220 are described. Can be configured as a single unit.

  In addition, the controller 220 reserves a memory area of the register memory 222 for registering the image registration pattern. The controller 220 receives the image registration processing request from the pixel dividing unit 208 as, for example, IRQ (Interrupt ReQuest), and acquires the density value of the target pixel that is the pixel to which the image dot is to be allocated and the adjacent pixel adjacent to the target pixel. Then, the image alignment process is started.

  The exposure control unit 204 includes a FIFO (First in First Out) type buffer memory 206. The buffer memory 206 receives a 1200 × 1200 dpi 2-bit signal sent from the image processing unit 202, accumulates a plurality of main scanning lines, and stores the accumulated data in response to reading from the data processing unit on the downstream side. Are transferred to the downstream data processing unit in a first-in first-out manner. At this stage, the image data is described as a 1200 × 1200 dpi 2-bit signal.

  The output of the buffer memory 206 is input to the pixel dividing unit 208 and the smoothing processing unit 210. The pixel dividing unit 208 divides a 1200 × 1200 dpi 2-bit signal into four in the main scanning direction and the sub-scanning direction in the embodiment to be described, and converts the image data into 4800 × 4800 dpi image data. The 2 bits of the signal to be processed are values used for designating halftones, and for example, 00 is white, 11 is black, and 01 and 10 are density values corresponding to halftones.

  The pixel dividing unit 208 refers to an image presence flag that gives a predetermined pattern for reproducing the corresponding image density of 1200 × 1200 dpi with respect to the image dot of 4800 × 4800 dpi, and sets the image dot for the image partition of 4800 × 4800 dpi. An image pulse train is generated and input to the A input of the selector 212.

  The smoothing processing unit 210 acquires image data acquired from the buffer memory 206 for a predetermined area such as 9 lines in the main scanning direction and 9 lines in the sub-scanning direction, and inspects the density designation bit value of the acquired image data. To do. As a result of the inspection, when it is determined that the currently processed image data does not include halftones and is a character or a line drawing, the smoothing processing unit 210 performs smoothing processing such as edge processing for each acquired area. The 2-bit data is passed to the B input of the selector 212 at the processing result of 1200 × 1200 dpi.

  If the smoothing processing unit 210 determines that the region to be processed does not include a halftone, the smoothing processing unit 210 asserts the select signal (high level) and inputs it to the select input of the selector. During the period when the select signal is asserted, the signal from the B input is passed to the data processing unit on the downstream side. In addition, during the period when the select signal is not asserted, a 1800-bit signal of 4800 × 4800 dpi input to the A input is output, and a high-definition image is output.

  Even if the image is suddenly changed from a character or a line drawing to a halftone by performing parallel processing on the 1200 × 1200 dpi 2-bit signal input from the buffer memory 206 by the exposure control unit 204. Since the pixel dividing unit 208 performs the calculation of the high-definition dots to be output at that time in parallel, the resolution switching process can be performed smoothly.

  The output of the selector 212 is sent to the γ conversion unit 214. The γ conversion unit 214 generates an output level corresponding to the laser pulse characteristic of the LD array 218 corresponding to the image pulse train, and sends the output level to the driver array 216. The driver array 216 generates a drive pulse train for the LD array 218 using a PWM signal (Pulse Width Modulation) or the like. The drive pulse train from the driver array 216 drives the semiconductor laser chip of the LD array 218 mounted as a VCSEL, irradiates a laser beam on the photosensitive drum, and forms an electrostatic latent image on the photosensitive drum. Yes.

  FIG. 4 shows a detailed embodiment of the image region 300 to be processed by the pixel dividing unit 208. As illustrated in FIG. 4, the pixel dividing unit 208 divides the image region 300 into nine pixels 302 including the target pixel 304. Then, as will be described later, the controller 220 or the like executes various processes using the divided 1200 dpi nine pixels as a processing unit. Further, the pixel dividing unit 208 first divides the target pixel 304 that is the current processing target pixel into four in the main scanning direction and the sub-scanning direction, and an image section 306 of 4800 dots in the main scanning direction and 4800 dots in the sub-scanning direction. Assign.

  In each 4800 × 4800 dpi image section 306, an address for setting an image presence flag for instructing whether to set an image dot on the register memory 222 corresponding to the position of the image section 306 Is assigned. The controller 220 executes setting control of the image presence flag for the image section 306 constituting 4800 × 4800 dpi, and reproduces the image density given by 2 bits of the pixel of interest 304 for the 4800 × 4800 dpi image region. Yes.

  The setting control of the image presence flag is performed by not setting the image presence flag at all for the image section 306 when the 1200 × 1200 dpi 2-bit signal is 2′b00 (white). When the 2-bit signal is 2′b11 (black), the image presence flag is set for all image sections. For 2′b01 and 2′b10 corresponding to the halftone, the image presence flag is set to the image section 306 at an appropriate ratio so as to reproduce the image density and to the adjacent pixels. Is called.

  In the present embodiment, an image dot pattern is formed close to an adjacent pixel of 1200 × 1200 dpi so that a high-definition dot of 4800 × 4800 dpi does not form an isolated dot. This processing is referred to as image registration processing in the present embodiment. In the present embodiment, a plurality of laser beams such as VCSELs as semiconductor lasers can be generated within a single main scanning line corresponding to 1200 dpi, so that not only in the main scanning direction but also in the sub scanning direction as in the past. Also, image alignment processing is possible, and image alignment processing at an optimal position in the two-dimensional direction is possible.

  As described above, the image registration processing in this embodiment uses nine pixels including eight adjacent pixels adjacent to the target pixel 304 of 1200 × 1200 dpi as a processing target. The pixel dividing unit 208 sends 9-pixel image data including the target pixel 304 to the controller 220. The controller 220 adds up the density values of the pixels excluding the target pixel 304 for the upper column and the lower column in FIG. Further, the controller 220 adds up the density values for the left-hand side column and the right-hand side column in FIG. 4 to determine the total density of each of the four columns. Thereafter, the controller 220 compares the densities of the upper and lower columns and the left and right columns, selects the direction of the adjacent eight pixels, and sets it as the image alignment direction data.

  In this case, the controller 220 generates 8-bit image registration direction data corresponding to the eight adjacent pixels with the image registration direction given by the image density determination, and stores the data in the register memory 222. The image alignment direction data is set such that, for example, the most significant bit corresponds to front upper alignment and the least significant bit corresponds to rear lower alignment. In this embodiment, the format of image alignment data It is not particularly limited. Thereafter, the controller 220 sets an image presence flag at the address set for the image section so as to give an image alignment pattern according to the image alignment direction data in the target pixel 304. An example of setting the image presence flag will be described later.

  In the present embodiment, it is not necessary to generate the image alignment direction data in a specific format. However, in the preferred embodiment as described later, 16 types of image alignment patterns are represented by a minimum number of 16-bit binary data. Can be generated from the registered image pattern.

  The pixel dividing unit 208 generates an image pulse corresponding to the set image presence flag and the address where the image presence flag is set, and generates an A input of the selector as image data. FIG. 4 exemplarily shows a direction determination process for performing image alignment based on the density of each pixel. In addition to the upper alignment, the lower alignment, the front alignment, and the back alignment, the front upper alignment, the rear upper alignment, the front lower alignment, and the rear alignment on the diagonal line are set from the comparison of each column. For example, in the case of dealing with both top-up and front-up, it can be set as front-up.

  FIG. 5 shows an embodiment of an image registration pattern 400 when an image presence flag is set for the image dot of the pixel of interest 304 in the present embodiment. In the following description, it is assumed that 2'b00 is entirely white and 2'b11 is entirely black. Therefore, the density values expressed as halftones are 2'b01 and 2'b10. The image registration pattern 400 is configured as a pattern of image dots in which an image presence flag is set for the image section 306. The image dots are set so as to give an area ratio that substantially reproduces the density value of the target pixel 304.

  When the density value of the pixel of interest 304 is 2′b10, the image dot in which the image presence bit is set is about 2/3, and an image similar to the pixel of interest 2′b01 corresponding to each image shift direction A shifting pattern is given. The numbers given in the image section 306 indicate the MSB (Most Significant Bit) value in the case of 01 and 10.

  When the target pixel 304 is 2′b01, an image presence flag is set in the image section 306 corresponding to about ３ area. In addition, the image section 306 is assigned to the image registration pattern so as to correspond to front, top, back, front, back, top, bottom, front bottom, back and bottom, and no shift. Furthermore, an address in the register memory 222 is secured in the image section 306 in order to set an image presence flag for each image section.

  As shown in FIG. 5, in this embodiment, there are 9 patterns for each halftone level in total, including 18 patterns for 2′b01 and 2′b10, and a total of 18 patterns. In a preferred embodiment of the present embodiment, not all the 18 patterns shown in FIG. 5 are registered in the register memory, but a minimum image registration pattern is registered as a set, for example, as shown in FIG. Then, the image section position where the image presence flag needs to be set is calculated from the registered image registration pattern by the controller 220, and corresponds to the rotation or translation of the registered image registration pattern where the image presence flag needs to be set. The position of the image section is determined, and the image presence flag is registered. As will be described later, since the image registration direction is determined by rotating or translating the registered image registration pattern in this manner, the image of the isolated dot image is determined regardless of whether the input image data is in portrait orientation or landscape orientation. It becomes possible to improve deterioration appropriately.

  By registering the minimum registration pattern by the controller 220, the consumption of the register memory can be reduced, and the address of the corresponding image bit can be obtained by only the bit operation in the controller 220 without referring to the lookup table each time. Since it can be calculated, I / O access can be eliminated, and a processing speed of about the clock cycle of the controller 220 can be realized.

  FIG. 6 shows an embodiment of an address assignment 500 for identifying image dots defined within a pixel of interest. The address assignment can be calculated using the real address of the register memory 222. From the viewpoint of high-speed processing, a virtual address is assigned to the image section and the real address is mapped to the virtual address. It is preferable to do. The virtual address assignment process will be described below.

  In the present embodiment, when the 1200 dpi pixel 304 of interest is divided into 4800 dpi, the pixel dividing unit 208 divides into 16 × 4 × 4 image sections 306 as a specific embodiment. In the real address of the image section 306, the image presence flag is not set at the time of division. In the present embodiment, an image presence flag is set for the image section 306, or an image section where the image presence flag is to be set is referred to as an image dot and displayed by hatching in the drawing.

  As the virtual address, it is preferable to employ a decimal number display in which the division number of the image section is a radix in order to calculate the image section 306 corresponding to the rotation of the image alignment pattern at high speed. The pixel dividing unit 208 can store the virtual address in the register memory 222 as a fixed virtual address of 4 × 4. Further, the pixel dividing unit 208 registers the virtual address division number in the register memory 222 as a set value so as to cope with the increase / decrease in the division number and the increase / decrease in the number of laser beams by the minimum correction of the controller 220. A method of performing carry for each column of image sections and assigning as an N-ary number (N is a positive integer equal to or greater than 2) using a division number as a radix can be employed. In this embodiment, it is possible to easily cope with changes in the number of divisions and changes in the number of laser beams, and more flexible processing is possible without significantly modifying memory consumption and programming as the number of divisions increases. Become.

  For the virtual address, the real address on the register memory 222 for setting the image presence flag is mapped, and the image is corresponding to the address of the register memory 222 corresponding to the image section corresponding to the rotation of the image alignment pattern. Yes flag can be set. In the embodiment shown in FIG. 6, 16 addresses are expressed in quaternary numbers for convenience, and addresses 00, 01, 02, 03 are assigned from the uppermost left hand side toward the right hand side. A value of 33 (quaternary number) = 1111 (binary number) is given to the section.

  In the illustrated embodiment, a virtual address is generated using a quaternary number. However, the virtual address is expressed in a binary number, and the same result can be obtained by calculating the upper 2 bits and the lower 2 bits separately. As a result, in calculation processing, an N-ary number to be set in consideration of calculation efficiency and the number of divisions of the pixel of interest 304 can be set as appropriate. For example, the virtual address 03 described in the image dot 502 shown in FIG. 6 is a value in quaternary notation, and in the binary notation, the virtual address is 03 = 00 | 11. When binary notation is used, an N-ary base arithmetic operation is applied to the upper 2 bits 504 and the lower 2 bits 506 independently. In the display of the upper and lower bits, the upper 2 bits and the lower 2 bits are shown on the left and right of the character |.

  FIG. 7 shows an embodiment of an image registration pattern set 600 registered in the register memory 222. The image registration pattern set 600 shown in FIG. 7 is registered in a ROM or the like managed by the controller 220, and is registered at the assigned address of the register memory 222 at the same time when the controller 220 is activated. In the register memory 222, a memory area 604 for registering a virtual address of the image section 306 in which an image presence flag is to be set for the image alignment pattern corresponding to the memory area 602 for registering the minimum set of image alignment patterns. It is secured. Furthermore, in the memory area 606, for example, a value for specifying the inspection bit position of the image alignment direction data for determining the alignment direction when it is necessary to align the image with 8 bits is set. That is, the register memory 222 is provided with the above-described three areas, the memory area 602, the memory area 604, and the memory area 606.

  The image alignment direction data is generated by setting a value indicating the image alignment direction at the corresponding address position when the image alignment direction is determined by the image alignment direction determination process by the controller 220. Note that the image registration direction data generated by the controller 220 is not 8 bits, but can be set as appropriate according to the registered image registration pattern embodiment, the number of image registration patterns constituting an optimal minimum set, and the like. In the embodiment shown in FIG. 7, when all 8 bits are 0, all of the inspection results for the 8 directions return the value of Fault. In this case, in the present embodiment, processing for setting an image presence flag in the central region is performed without performing image alignment processing.

  In the present embodiment, as shown in FIG. 7, the 18 patterns of the image alignment patterns can be aggregated into a total of 6 patterns corresponding to each density level in the set of corner patterns, line patterns, and center patterns. The controller 220 sets the virtual address of the image section that gives an image shift pattern corresponding to the rotation of the registered image shift pattern from the virtual address assigned to the image block 306 that forms the image shift pattern shown in FIG. Calculate and set image flag.

  In the above description, 18 patterns of the image alignment pattern are collected into 6 patterns according to the density level. For example, the image section position where the image presence flag shown in FIG. There may be cases where the pixel is not symmetric, vertically symmetric, or 45 ° line symmetric. Specifically, when the image section position in which the image present flag is set is not symmetrical in the left-right direction, vertically symmetrical, or 45 ° line-symmetric (for example, the uppermost image section position in the image section position in the lowermost rightmost column is When the image presence flag is set, but the image presence flag is not set at the upper image division position in the lowermost leftmost column, the image alignment pattern is not rotated. By setting the image presence flag to the image section position by a mirror image, it is possible to aggregate the image alignment patterns into a total of 8 patterns, calculate the virtual address, and set the image presence flag.

  Specifically, when the image registration pattern of 18 patterns shown in FIG. 5 is taken as an example where the target pixel is 2′b01, (upper alignment, no front-rear alignment), (no vertical alignment, front alignment), Four image alignment patterns (upper alignment, front alignment), (no vertical alignment, no front alignment) are stored in advance, and as upper and lower mirror images of the image alignment pattern (upper alignment, no front alignment) (bottom alignment, front alignment) (None) image alignment pattern can be set, and (No vertical alignment, Front alignment) Image alignment pattern (No vertical alignment, Rear alignment) can be set as a left-right mirror image of the image alignment pattern. In addition, the (upper and front justified) image justification pattern is set as the left and right mirror image of the (upper and front justified) image justification pattern, and the same The image alignment pattern can be set as a 180 ° rotation of the image alignment pattern of (alignment, front alignment) and further (upper alignment, front alignment). Thus, the pixel of interest 304 stores four image registration patterns for 2′b01, and similarly the pixel of attention 304 stores four image registration patterns for 2′b10. Thus, the present invention is applicable even when the image presence flag is set asymmetrically as described above.

FIG. 8 is a diagram for explaining the radix calculation processing 700 used in the present embodiment. The decimal number calculation processing 700 is configured as a subroutine of a program implemented by the controller 220 and functions as an image alignment pattern rotation unit in the present embodiment. The radix calculation shown in FIG. 8 is performed by separating the processing into upper digits and lower digits of the virtual address value displayed in quaternary numbers.
The left-right shift of the image alignment pattern is performed by storing the upper digit of the virtual address and replacing the lower digit value with the complement value of the decimal number. In this embodiment, “complement” means a number that needs to be added in order for the predetermined number to be a predetermined reference (N−1). That is, in the described embodiment, 0's complement is 3, 1's complement is 2, and 3's complement is 0.

  For example, a virtual address obtained by shifting the image section of 00 in the leftmost column to the right is calculated as 03 by replacing the lower digit with a value of 3 which is 0's complement. The vertical address shift is calculated by storing the lower digit value and replacing the second digit value with the complement of the value. The replacement process used for this process can be performed by various methods. For example, it is possible to calculate the complement to be set, perform shift calculation to give the digit to be stored and the digit to be set, and add the complement value to the digit to be replaced with the result of the shift calculation. it can. In addition, the value of the virtual address to be generated can be directly calculated from the value of the upper digit and the lower digit. In the present embodiment, when the shift calculation is performed, a load on the controller 220 can be reduced by using a shift register or the like together.

  Also, the decimal calculation process that can be applied to other than left / right / up / down shift is the exchange of the value of the upper digit and the value of the lower digit. The upper digit is set to the lower digit value and the lower digit is changed to the upper digit value. By setting, 90 ° rotation is possible. Even in this case, shift calculation can be used efficiently. Specifically, when the virtual address given at 30 is rotated by −90 ° from the virtual address of the leftmost line in FIG. 8 by calculating virtual address = 03, the value of the virtual address of the highest line is generated. can do. In the present embodiment, by using the above-described radix calculation, it is possible to efficiently generate a virtual address equivalent to the rotation of the registered image registration pattern.

  FIG. 9 shows a flowchart of an embodiment of the image registration process executed by the controller 220 of the present embodiment. The processing in FIG. 9 starts from step S800, and calculates density values of adjacent pixels surrounding the target pixel 304 among the plurality of image data related to the main scanning direction line acquired in step S801. Calculate the concentration value in the column. In step S802, the calculated column and row density values are compared with the pixel column unit of adjacent pixels in the main scanning direction and the sub-scanning direction to determine the image alignment direction, and the corresponding 8-bit image alignment direction data corresponds. Set the bit address.

  In step S803, the value of the inspection bit is acquired by referring to the memory area 606 of the register memory 222, and the image alignment pattern specified by the image alignment direction data and the registered virtual address value are acquired from the memory area 604. . It should be noted that an image presence flag may be already set at the address of the register memory 222 of the image registration pattern 602, or the image presence flag may be set each time in the same manner as other image sections in response to the following processing. it can.

  In step S804, whether or not the registered image registration pattern matches the direction determined by the image alignment direction data is determined by comparing the 8-bit address of the image alignment direction data. For example, in the embodiment shown in FIG. 7, image registration patterns corresponding to the front, front, top, and front and bottom are registered, and the image registration direction data matches the inspection bit to be given to the registered image registration pattern. If it is, the direction is determined to match, and otherwise, it can be determined to be direction mismatch. If the registered image alignment pattern matches the determined image alignment pattern (yes), an image presence flag is set at the address of the register memory 222 mapped to the virtual address registered in the memory area 604. Thereafter, the process branches to step S807, an image presence flag is set, and the pixel dividing unit 208 can acquire the image. In this embodiment, if the image registration pattern has already been registered with the image presence flag set, the process branches to step S807, and the registered virtual address value is processed without performing the subsequent processes. Is used as it is, an image presence flag is set, and the pixel dividing unit 208 can acquire the flag.

  If the image alignment direction does not match the determined direction (no), the hex calculation routine for calculating the virtual address is selected using the 8-bit image alignment direction data determined in step S805, A corresponding radix calculation routine is executed to calculate a virtual address corresponding to the image alignment direction data. After that, in step S806, an image presence flag is set at the address of the register memory 222 mapped to the calculated virtual address so that the pixel dividing unit 208 can obtain the information, and the process ends in step S808.

  With the above processing, it is possible to generate an image alignment pattern necessary for the image alignment processing only by registering a minimum image alignment pattern. In addition, since the above processing can form an image registration pattern only by calculation processing in the controller 220 without configuring a lookup table or the like, a minimum memory area addition and a minimum time delay are performed for the pixel division processing. The image alignment process can be executed. In addition, the present embodiment can add image division processing and image alignment processing with only a minimal influence on the image forming efficiency. Furthermore, since the image shifting process can be performed not only before and after the main scanning direction but also in the sub-scanning direction, it is possible to prevent deterioration of a halftone image due to isolated dots. .

  Furthermore, in the present embodiment, even when the image registration pattern is corrected, it is only necessary to correct the minimum image registration pattern, so that maintenance costs and development costs can be reduced. In addition, additional corrections to the processing routine associated with a decrease or increase in resolution can be minimized.

  In the image registration processing shown in steps S800 to S808 described above, for easy understanding, after the division processing unit 208 divides the image data into a total of nine pixels including the target pixel 304, the controller 220 divides the image data. The image registration direction is determined for each pixel, and the image presence flag is set to the address value assigned as the virtual address by determining whether the direction matches the pre-registered image registration pattern. It was. However, physically, the above-described processes are not performed in time series. When the controller 200 determines an image alignment pattern and a virtual address in step S803, the image alignment direction indicated by the image alignment pattern is determined in advance. An image registration pattern that matches or approximates the image registration pattern stored in the register memory 222 is selected, and the selected image registration pattern and the virtual address corresponding to the rotation or mirror image of the image registration pattern are selected. An image presence flag is set for the image section, and image alignment processing is performed at a time.

  In another embodiment, an address allocation table of the register memory 222 corresponding to all 18 patterns can be created as a lookup table. When the image registration pattern is rotated, a set of addresses of the register memory 222 specified by the registered minimum image registration pattern and the image registration data is acquired from the address assignment table, and the acquired address is set. On the other hand, an image presence flag can be set. In the other embodiment, the memory consumption of the register memory 222 is increased, and it takes time and effort to correct the image alignment pattern. The lookup process is required twice, but the processing speed is acceptable, It can be used to generate an image registration pattern according to the specifications of a specific image forming apparatus.

  In still another embodiment, a minimum number of image registration patterns are registered, and a lookup table for registering all the real addresses of the image sections constituting the image registration pattern for the image alignment pattern is configured. It can also be registered in the memory 222. In this case, the rotation of the image alignment pattern uses the rotation angle specified by the image alignment direction data, rotates the image alignment pattern with a two-dimensional rotational movement matrix, and sets the coordinates assigned to each image section 306. This is done by comparing. In this embodiment, the image presence bit is set at the real address on the register memory 222 for the image section obtained by the coordinate comparison.

  In this embodiment, a look-up table is created for registering an image registration pattern, an image section constituting the image registration pattern, an inspection bit, and a real address on the register memory 222 assigned to the image section. In addition, a coordinate value is assigned to the image section 306, and each image section creates a look-up table for registering a value when the registered image registration pattern is rotated. An image presence flag can be set at the corresponding real address. In this embodiment, an additional look-up table is required, and further, a two-dimensional rotational movement calculation must be performed for each image section, and the amount of calculation processing is compared with that when using a radix calculation processing. However, it is possible to perform two-dimensional image alignment using the minimum number of image alignment patterns.

  FIG. 10 shows an embodiment of a correspondence relationship between rotation of an image alignment pattern and virtual address calculation when calculating an address for setting an image presence bit from a registered image alignment pattern in this embodiment. When the low-order digit of the virtual address assigned to the image section of the registered image alignment pattern 900 is complementarily replaced, as shown by the image alignment pattern 902, the image alignment pattern 902 is rotated by 90 ° to correspond to the image alignment pattern 902. The virtual address to be obtained is obtained. When the second digit of the virtual address of the image section of the image registration pattern 900 is replaced with the complement of the value to obtain a virtual address, the registered image registration pattern 900 is rotated by 180 °. A virtual address corresponding to is obtained.

  Further, by replacing the value of the first digit again with the complement of the value, a virtual address corresponding to the image registration pattern 906 obtained by rotating the image registration pattern 900 by 270 ° is obtained. Note that the virtual address indicated by the image alignment pattern 904 can be generated directly from the image alignment pattern 900 by replacing the values of the first digit and the second digit with complements.

  FIG. 11 shows another embodiment of the relationship between rotation and virtual address calculation when a virtual address is calculated to set an image presence bit from a registered image registration pattern. When a virtual address is generated by exchanging the first digit value and the second digit value for the registered image registration pattern 1000, the image registration pattern 1000 corresponds to the image registration pattern 1002 rotated by −90 °. A virtual address is generated. Further, the virtual address corresponding to the image alignment pattern 1004 rotated by 270 ° with respect to the image alignment pattern 1000 is obtained by replacing the image alignment pattern 1002 by replacing the second digit value of the virtual address with the complement of the value. Generated. Further, by exchanging the first digit value and the second digit value, a virtual address corresponding to the image registration pattern 1006 rotated by 180 ° with respect to the registered image registration pattern 1000 is generated.

  These decimal number calculation processes can be easily configured as a subroutine or the like, and the mounting sequence can be changed as appropriate in order to increase the calculation efficiency. In the embodiment shown in FIG. 10 and FIG. 11, the description is made using the quaternary number, but the same processing is performed on the upper 2 bits and the lower 2 bits using the binary representation virtual address. Thus, the same processing can be performed. Further, even when the pixel division number is an arbitrary positive integer, by assigning a virtual address to the divided image section in the same way, the pixel division number is simply corrected. The number of divisions, that is, the resolution or the number of laser beams can be easily accommodated.

  FIGS. 12A and 12B show an embodiment of the implementation format of the radix calculation routine shown in FIGS. 10 and 11. FIG. 12A is a sequence of a decimal number calculation routine for the process corresponding to FIG. 10, and FIG. 12B is a sequence of the routine for the process described in FIG. Hereinafter, the process of replacing any digit of the registered image registration pattern with the complement of the number of digits is referred to as mirror image calculation, and the exchange of the upper and lower digits is referred to as rotation calculation. In FIG. 12A, the mirror image calculation corresponding to the 90 ° rotation of the image shift pattern is performed by replacing the first digit, and the second digit mirror image calculation is performed on the generated image shift pattern of 90 ° rotation. Thus, an image registration pattern corresponding to the 180 ° rotation is provided. Further, by performing a mirror image calculation that replaces the value of the first digit with the complement of the value again for the generated image shift pattern of 180 ° rotation, an image shift pattern based on the mirror image calculation corresponding to the rotation of 270 ° is generated. The

  In FIG. 12-2, first, rotation calculation of −90 ° rotation is executed by exchanging digit values, and equivalent to 270 ° rotation by performing mirror image calculation on the result of −90 ° rotation. An image alignment pattern is generated. On the other hand, by performing a mirror image calculation directly on the registered image alignment pattern, an image alignment pattern rotated by 180 ° with respect to the registered image alignment pattern is generated.

  As described above, in the above-described embodiment, the increase in the number of laser beams that can be irradiated per unit area is not only in the main scanning direction but also in the two-dimensional direction in which the image dots are shifted in the sub-scanning direction. Margin at is provided.

  In the embodiment described above, in response to the image dots becoming finer, image formation is performed by shifting the image dots not only in the main scanning direction but also in the sub-scanning direction. The image dot shift is performed by examining the density of eight pixels surrounding the target pixel 304 with respect to the target pixel 304 to be image-formed, and setting a pattern of image dots constituting the target pixel 304 in a pixel direction with a higher density.

  Further, in the above-described embodiment, in order to perform image dot pattern setting at high speed and efficiently, the image registration patterns of the target pixel 304 are classified and registered in the same pattern. For this reason, the number of registered image registration patterns can be made smaller than the total number of image registration patterns necessary for arranging image dots within the target pixel. In the above-described embodiment, the image shift pattern that does not match the shift direction is generated as an image dot pattern composed of image dots corresponding to positions where the registered image shift pattern is rotated. For the image registration pattern that does not match the shift direction, the image presence bit is set in the image section corresponding to the position obtained by rotating the image registration pattern classified as the same image registration pattern at 0 °, 90 °, 180 °, and 270 °. Generated by setting.

  In the above-described embodiment, a surface emitting laser (Vertical Cavity Surface Emitting Laser) can be used as a semiconductor laser that irradiates a plurality of laser beams, and a plurality of laser beams are arranged in the main scanning direction and the sub-scanning direction. Can be generated. For this reason, it is possible to perform image dot image alignment processing not only in the main scanning direction but also in the sub-scanning direction, and optimal image alignment processing of image dots is possible. Furthermore, since the processing is switched corresponding to the binary image and the halftone image, the image registration processing for the fine dots can be performed without causing an excessive overhead for the control device and without reducing the image forming speed. Can be executed.

  As described above, in the present embodiment, not only the main scanning direction but also the sub-scanning image can be subjected to image dot alignment processing, and image dot optimal image alignment processing can be performed. Furthermore, since the processing is switched corresponding to the binary image and the halftone image, the image registration processing for the fine dots can be performed without causing an excessive overhead for the control device and without reducing the image forming speed. It is possible to provide an image processing apparatus, an image forming apparatus, and an image processing method that can be executed.

  The above functions of the present invention are described in an assembler language, and a ROM writer or the like is used for ROM, EPROM, EEPROM, etc. that can be connected to a microcomputer separately from a microcomputer ROM, EPROM, EEPROM, or microcomputer. Can be stored and distributed.

  Although the present invention has been described with the embodiments, the present invention is not limited to the above-described embodiments, and other embodiments, additions, changes, deletions, and the like can be conceived by those skilled in the art. As long as the effect | action and effect of this invention are show | played in any aspect, it is included in the range of this invention.

1 is a diagram illustrating an embodiment of an image forming apparatus of the present embodiment. It is the figure which showed embodiment of the laser control part which an image forming apparatus mounts. It is a figure which shows the example in case a light source unit is comprised from a semiconductor laser array or a surface emitting laser. It is the figure which showed embodiment of the image area | region used as a process target by a pixel division part. In this embodiment, it is the figure which showed embodiment of the image alignment pattern in the case of setting an image presence flag to the image dot of a focused pixel. It is the figure which showed embodiment of the address assignment for identifying the image dot prescribed | regulated in the attention pixel. It is the figure which showed embodiment of the image alignment pattern set registered into a register memory. It is a figure explaining the radix number calculation process used by this embodiment. It is a flowchart of embodiment of the image registration process which the controller 220 of this embodiment performs. FIG. 10 is a diagram illustrating an embodiment of a correspondence relationship between rotation of an image alignment pattern and virtual address calculation when an address for setting an image presence bit is calculated from a registered image alignment pattern. It is the figure which showed other embodiment of the relationship between rotation and a virtual address calculation in the case of calculating a virtual address in order to set a bit with an image from the registered image alignment pattern. It is the figure which showed embodiment of the mounting format of the radix calculation routine shown in FIG. It is the figure which showed embodiment of the mounting format of the radix calculation routine shown in FIG.

Explanation of symbols

DESCRIPTION OF SYMBOLS 100 ... Image forming apparatus, 102 ... Optical apparatus, 102a, 102e ... Reflection mirror, 102b ... f (theta) lens, 102c ... Polygon mirror, 104a, 106a, 108a, 110a ... Photoconductor drum, 104b, 106b, 108b, 110b ... Charger 104c, 106c, 108c, 110c ... developer, 112 ... image forming unit, 114 ... intermediate transfer belt, 114a, 114b, 114c ... conveying roller, 118 ... secondary transfer belt, 120 ... fixing device, 122 ... transfer unit, DESCRIPTION OF SYMBOLS 124 ... Image receiving material, 130 ... Fixing member, 132 ... Printed matter, 200 ... Laser control part, 202 ... Image processing part, 204 ... Exposure control part, 206 ... Buffer memory, 208 ... Pixel division part, 210 Smoothing processing part, 212 ... Selector, 214 ... γ converter, 216 ... Driver array, 218 ... LD array Ray, 220 ... Controller, 222 ... Register memory, 300 ... Image area, 400 ... Image registration pattern, 500 ... Address allocation, 600 ... Image registration pattern set, 700 ... Decimal number calculation processing

Claims (11)

Image data composed of a plurality of pixels including image dots is divided into the pixel units in the main scanning direction and the sub-scanning direction, and a target pixel that is a correction target pixel among the divided pixels is converted into a plurality of images. Dividing means for dividing into a plurality of image sections including dots;
Based on the density density of the adjacent pixel of the target pixel, the image dots having an area ratio that reproduces the density value of the target pixel in a density direction that is a two-dimensional direction of the adjacent pixel having a high density are arranged. Correction means for correcting the image dots of the sections;
An image processing apparatus comprising: Pattern storage means for storing pattern pixels in which the number of image dots in the image section is smaller than the number of adjacent pixels and in which the direction in which the image dots of the image section are gathered is determined in units of the image section;
The correction means corrects the image dot of the pixel of interest by approaching the density direction in units of the image section, based on the image dot defined by the pattern pixel.
The image processing apparatus according to claim 1. The correction unit adds the densities of the adjacent pixels in the main scanning direction and the sub-scanning direction, and determines the direction with the highest added density as the density direction.
The image processing apparatus according to claim 1, wherein the image processing apparatus is an image processing apparatus. When the determined density direction does not coincide with the direction in which the image dots of the image section defined in the pattern pixel are shifted, the correction unit includes a number of pattern pixels smaller than the number of adjacent pixels. By selecting the pattern pixels that satisfy the density direction, the image dots of the image section are corrected in the density direction.
The image processing apparatus according to claim 3. The correcting means further determines whether or not the density of the target pixel is a halftone, and when it is determined that the density of the target pixel is a halftone, the number of the pixels smaller than the number of adjacent pixels is determined. Selecting the pattern pixel that satisfies the density direction from among the pattern pixels;
The image processing apparatus according to claim 4. The pattern storage means further stores an address value indicating a position where the image dot is written in association with the image section,
The correction means further calculates a virtual address value corresponding to the address value based on a radix corresponding to the number of the image sections, and calculates the image dots written in the image sections of the calculated virtual address value. Correct it in the density direction,
The image processing apparatus according to claim 1, wherein the image processing apparatus is an image processing apparatus. The correction means calculates the virtual address value by replacing the virtual address value with the complement of the decimal number
The image processing apparatus according to claim 6. A semiconductor laser that emits laser light to form the image dots,
The image processing apparatus according to claim 1, further comprising: The semiconductor laser is a surface emitting laser.
The image processing apparatus according to claim 7. Reading means for reading an original and generating image data composed of a plurality of pixels including image dots;
The image data is divided into the pixel unit in the main scanning direction and the sub-scanning direction, and the target pixel that is a correction target pixel among the divided pixels is divided into a plurality of image sections including a plurality of image dots. Dividing means;
Based on the density density of the adjacent pixel of the target pixel, the image dots having an area ratio that reproduces the density value of the target pixel in a density direction that is a two-dimensional direction of the adjacent pixel having a high density are arranged. Correction means for correcting the image dots of the sections;
An image forming apparatus comprising: A dividing unit divides image data including a plurality of pixels including image dots into the pixel unit in the main scanning direction and the sub-scanning direction, and selects a target pixel that is a correction target pixel among the divided pixels. A dividing step of dividing into a plurality of image sections including a plurality of image dots;
Correcting means, on the basis of the shades of density of adjacent pixels of the pixel of interest, so that the concentration gather high the image dots of the area proportions to reproduce the density value of the pixel of interest in the concentration direction is two-dimensional directions of adjacent pixels in a correction step of correcting the image dots of the image zone,
An image processing method comprising:

Images