JP5271489B2 - Group III nitride semiconductor substrate and manufacturing method thereof - Google Patents

Group III nitride semiconductor substrate and manufacturing method thereof Download PDF

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JP5271489B2
JP5271489B2 JP2006270353A JP2006270353A JP5271489B2 JP 5271489 B2 JP5271489 B2 JP 5271489B2 JP 2006270353 A JP2006270353 A JP 2006270353A JP 2006270353 A JP2006270353 A JP 2006270353A JP 5271489 B2 JP5271489 B2 JP 5271489B2
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敏晴 松枝
智浩 小林
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Furukawa Co Ltd
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a group-III nitride semiconductor substrate which is formed by forming a surface consisting of a nonpolar or semipolar face by slicing or polishing a bulk crystal of group-III nitride semiconductor having a thickness of 1 mm or more in the c axis direction and processing the face into a flat surface. <P>SOLUTION: A substrate which is necessary for obtaining a thin film having a flat nonpolar face or semipolar face is provided. In this way, generation of a piezo electric field is prevented. <P>COPYRIGHT: (C)2008,JPO&amp;INPIT

Description

本発明は、発光や電子デバイスなどの基板として利用できるIII族窒化物半導体基板及びその製造方法に関する。     The present invention relates to a group III nitride semiconductor substrate that can be used as a substrate for light emitting and electronic devices, and a method for manufacturing the same.

窒化ガリウム(GaN)、窒化インジウム(InN)、窒化アルミニウム(AlN)及びこれらの混晶である窒化インジウムガリウム(InGaN)、窒化アルミニウムガリウム(AlGaN)等のIII族窒化物系半導体材料は、禁制帯幅が大きく、バンド間遷移も直接遷移型であるため、短波長発光素子への適用が盛んに検討されている。この中で特にInGaNはIII族混晶組成比によってバンドギャップが近紫外(GaN:3.4eV)から赤外(InN:0.7eV)まで変化でき、可視域全体をカバー可能であるためInGaNを発光層に用いたLEDやLDが実用化されている。   Group III nitride semiconductor materials such as gallium nitride (GaN), indium nitride (InN), aluminum nitride (AlN), and mixed crystals thereof such as indium gallium nitride (InGaN) and aluminum gallium nitride (AlGaN) are forbidden bands. Since the width is large and the transition between bands is a direct transition type, application to a short wavelength light emitting element is actively studied. Among them, InGaN can change the band gap from near ultraviolet (GaN: 3.4 eV) to infrared (InN: 0.7 eV) depending on the group III mixed crystal composition ratio, and can cover the entire visible region. LEDs and LDs used for the light emitting layer have been put into practical use.

現在主流の白色LEDはInGaNを発光層に用いた青色LEDチップに、黄色発光のYAG蛍光体が組み合わされた構造となっており、従来の白色光源になかった超小型、超軽量、長寿命、容易駆動などの特徴があり、現在では、ほとんどの携帯電話の小型カラー液晶ディスプレイでバックライトとして使われるなど急速に普及してきている。   The current mainstream white LED has a structure in which a yellow LED YAG phosphor is combined with a blue LED chip using InGaN as a light emitting layer. It has features such as easy drive, and is now spreading rapidly, as it is used as a backlight in the small color liquid crystal displays of most mobile phones.

InGaN系LEDはこれまでサファイア基板やSiC基板の(0001)極性面上に作製されており、その効率は年々向上している。例えば、青色LEDの外部量子効率は約50%に達し、それを用いた白色LEDの発光効率も100lm/Wを超えるレベルに到達している。   InGaN-based LEDs have been manufactured on the (0001) polar face of sapphire substrates and SiC substrates, and the efficiency is improving year by year. For example, the external quantum efficiency of a blue LED reaches about 50%, and the luminous efficiency of a white LED using it reaches a level exceeding 100 lm / W.

しかしながらこのような高い発光効率が得られるのは、360nm域の紫外から、400nm域の紫、および460nm域の青色までであり、500nmより長波長域では効率の低下が顕著となる。   However, such high luminous efficiency can be obtained from the ultraviolet of 360 nm to the purple of 400 nm and the blue of 460 nm, and the reduction in efficiency becomes remarkable in the wavelength longer than 500 nm.

特に深刻なのは、緑色(530nm域)で、青色の半分程度の効率となってしまい、現在、LEDの有望な用途として注目されている、青(InGaN系)、緑(InGaN系)、赤(AlGaInP系)の三原色LEDをバックライトとした液晶ディスプレイの実用化を進める上で緑色LEDの効率向上は重要な課題となっている(非特許文献2、3)。   Particularly serious is green (530 nm region), which is about half the efficiency of blue, and is currently attracting attention as a promising application for LEDs, blue (InGaN-based), green (InGaN-based), red (AlGaInP) The improvement of the efficiency of the green LED is an important issue in the practical application of the liquid crystal display using the three primary color LEDs as the backlight (Non-patent Documents 2 and 3).

上記の問題点は、活性層として用いているInGaNのIn混晶組成を高くすることによって生じる現象である。このことは、(0001)極性面上に作製されたInGaNでは大きなピエゾ電界が生じ、活性層に注入した電子と正孔が引き離されるために発光遷移確率が低くなることが一つの大きな要因であることが明らかになってきている。これを解決するためにピエゾ電界が発生しない無極性面や半極性面に素子構造を作製することが提案され、特許文献1、2及び非特許文献1に示されるように活発に研究がなされてきた。
特表2006−510227 特表2006−514780 Mitsuru Funato , Masaya Ueda, Yoichi Kawakami , Yukio Narukawa , Takao Kosugi , Masayoshi Takahashi and Takashi Mukai"Blue,Green,andAmber InGaN/GaN Light−Emitting Diodes on Semipolar {11−22} GaN Bulk Substrates." , Jpn.J.Appl.Phys.vol.45,No.26,2006,pp.L659−L662. 成川幸男、長濱慎一、玉置寛人、向井孝志、"GaN系発光素子を用いた高輝度白色光源の開発"、応用物理学会誌、Vol.74、No.11、pp1423−1432、(2005) 渡辺智、"InGaN系高出力LEDの現状と応用"、応用物理学会誌、Vol.74、No.11、pp.1437−1442、(2005) Troy J.BAKER , Benjamin A.HASKELL , Feng Wu , Paul T.FINI , James S.SPECK and Shuji NAKAMURA"Characterization of Planar Semipolar Gallium Nitride Films on Spinel Substrate." , Jpn.J.Appl.Phys.vol.44,No.29,2005,pp.L920−L922
The above problem is a phenomenon caused by increasing the In mixed crystal composition of InGaN used as the active layer. This is due to the fact that a large piezo electric field is generated in InGaN produced on the (0001) polar plane, and the emission transition probability is lowered because electrons and holes injected into the active layer are separated. It has become clear. In order to solve this problem, it has been proposed to fabricate an element structure on a nonpolar plane or a semipolar plane where no piezoelectric field is generated, and active research has been conducted as shown in Patent Documents 1 and 2 and Non-Patent Document 1. It was.
Special table 2006-510227 Special table 2006-514780 Mitsuru Funato, Masaya Ueda, Yoichi Kawakami, Yukio Narukawa, Takao Kosugi, Masayoshi Takahashi and Takashi Mukai "Blue, Green, andAmber InGaN / GaN Light-Emitting Diodes on Semipolar {11-22} GaN Bulk Substrates.", Jpn. J. et al. Appl. Phys. vol. 45, no. 26, 2006, pp. L659-L662. Yukio Narukawa, Shinichi Nagahama, Hiroto Tamaki, Takashi Mukai, "Development of a high-intensity white light source using GaN-based light-emitting elements", Journal of Applied Physics Society, Vol. 74, no. 11, pp1423-1432, (2005) Satoshi Watanabe, “Current Status and Applications of InGaN High Power LEDs”, Journal of Applied Physics Society, Vol. 74, no. 11, pp. 1437-1442, (2005) Troy J.H. BAKER, Benjamin A. HASKELL, Feng Wu, Paul T .; FINI, James S .; SPECK and Shuji NAKAMUURA "Characterization of Planar Semipolar Gallium Nitride Films on Spinel Substrate.", Jpn. J. et al. Appl. Phys. vol. 44, no. 29, 2005, pp. L920-L922

従来、無極性面や半極性面にInGaN等のIII族窒化物半導体を成長させる場合、下地基板に異種材料の基板を用いて、その上に所望の面方位を持ったIII族窒化物半導体を成長させる。     Conventionally, when a group III nitride semiconductor such as InGaN is grown on a nonpolar surface or a semipolar surface, a substrate of a different material is used as a base substrate, and a group III nitride semiconductor having a desired plane orientation is formed thereon. Grow.

例えば、特許文献1及び2にある様にr面(1−102)サファイア上に(11−20)GaNを成長させたり、非特許文献4にある様に、下地基板にスピネル(MgAl)を用いて(100)MgAl上に(10−1−1)GaN、(110)MgAl上に(10―1―3) GaNを成長させたりしているが、これらの膜は非特許文献1に記述されているように異種基板上に成長させるために、高い転位密度を有し、またその成長自体が難しいために、成長条件の最適化が困難であり、原子レベルで平坦な膜は得られていないという問題を残している。 For example, as described in Patent Documents 1 and 2, (11-20) GaN is grown on r-plane (1-102) sapphire, or as shown in Non-Patent Document 4, spinel (MgAl 2 O 4 ), (10-1-1) GaN is grown on (100) MgAl 2 O 4 and (10-1-3) GaN is grown on (110) MgAl 2 O 4 . As described in Non-Patent Document 1, since the film has a high dislocation density and is difficult to grow on the heterogeneous substrate, it is difficult to optimize the growth conditions. The problem remains that a flat film cannot be obtained.

本発明によれば、c軸方向に1mm以上の厚さを有するIII族窒化物半導体のバルク結晶を、スライスまたは研磨することにより、無極性面または半極性面からなる面を形成し、該面を平坦な表面となるように加工したIII族窒化物半導体基板が提供される。   According to the present invention, a bulk crystal of a group III nitride semiconductor having a thickness of 1 mm or more in the c-axis direction is sliced or polished to form a surface composed of a nonpolar surface or a semipolar surface, There is provided a group III nitride semiconductor substrate processed to have a flat surface.

無極性面は、(11−20)面または(10−10)面とし、半極性面は、(10−1−1)面、(10−1−3)面、(10−11)面、(10−13)面または(11−22)面とするさらに、無極性面又は半極性面の作製において、表面に対して垂直な結晶方位の傾きを±1°以内とすることもできる。これにより、エピタキシャル成長させた後のLED系の作製において期待する無極性あるいは半極性の特性をもつデバイスが得られる。 The nonpolar plane is the ( 11-20) plane or (10-10) plane, and the semipolar plane is the (10-1-1) plane, (10-1-3) plane, (10-11) plane, The (10-13) plane or the (11-22) plane is used . Furthermore, in the production of a nonpolar plane or a semipolar plane, the inclination of the crystal orientation perpendicular to the surface can be within ± 1 °. As a result, a device having nonpolar or semipolar characteristics expected in the production of an LED system after epitaxial growth can be obtained.

上記基板において、III族窒化物半導体バルク結晶のc軸成長面をas grown面のままとして作製しておいてもよい。また、上記基板は、III族窒化物半導体バルク結晶の(0001)面、(000−1)面、(11−20)面または(10―10)面に平坦面を加工した後、無極性あるいは半極性基板を作製することができる。さらに、上記基板は、III族窒化物半導体バルク結晶の成長面および裏面に対し、それぞれ、異なる外観を呈するように表面処理をしたものとしてもよい。   In the above-described substrate, the c-axis growth surface of the group III nitride semiconductor bulk crystal may be formed as the as-grown surface. In addition, the substrate may be nonpolar after processing a flat surface on a (0001) plane, a (000-1) plane, a (11-20) plane, or a (10-10) plane of a group III nitride semiconductor bulk crystal. A semipolar substrate can be manufactured. Further, the substrate may be surface-treated so as to exhibit different appearances on the growth surface and the back surface of the group III nitride semiconductor bulk crystal.

異なる外観を呈するとは、目視又は何らかの手段で識別できるものであれば、何でもよい。例えば、一方の面が平滑面、もう片方の面が粗面となるように表面処理したものは、異なる外観を呈するといえる。さらに例示すれば、一方の面が鏡面、もう片方の面が梨地面となるように処理したものであってもよい。これにより、基板の表と裏を判別するためのオリフラとして利用できる。   What has a different appearance may be anything as long as it can be identified visually or by some means. For example, it can be said that a surface treated so that one surface is a smooth surface and the other surface is a rough surface exhibits a different appearance. For example, it may be processed so that one surface is a mirror surface and the other surface is a satin surface. Thereby, it can utilize as an orientation flat for discriminating the front and back of a substrate.

表面処理として、具体的に例を挙げれば、バルク基板のGa面側を鏡面、N面側を梨地面になるようにラッピングを行なう方法がある。こうすることにより、上下の方位の区別をつけることが可能になる。このとき、(11−22)の表と裏はGa面に対して鋭角の面が裏面、鈍角の面が表面((11−22)面)となる。
As a specific example of the surface treatment, there is a method of lapping so that the Ga surface side of the bulk substrate becomes a mirror surface and the N surface side becomes a satin surface. By doing so, it becomes possible to distinguish the upper and lower directions. At this time, the front and back rear surface is an acute angle of the surface with respect to the Ga face of the (11-22), an obtuse angle of face surface ((11 22) plane).

上記基板において、無極性面または半極性面からなる面の表面粗さは、1μm×1μmの範囲でRMS≦1nmとすることができる。これにより、エピタキシャル成長させた後の平坦度を良好とすることができる。   In the substrate, the surface roughness of a nonpolar surface or a semipolar surface can be RMS ≦ 1 nm in the range of 1 μm × 1 μm. Thereby, the flatness after epitaxial growth can be made favorable.

上記基板は、サファイアまたはSiCからなる下地基板上にIII族窒化物半導体を成長させた後、下地基板を除去して得られる自立基板であってもよい。   The substrate may be a free-standing substrate obtained by growing a group III nitride semiconductor on a base substrate made of sapphire or SiC and then removing the base substrate.

III族窒化物半導体バルク結晶は、ウルツ鉱型結晶であるIII族窒化物半導体基板であってもよい。ウルツ鉱型結晶には、例えば、GaNがある。   The group III nitride semiconductor bulk crystal may be a group III nitride semiconductor substrate that is a wurtzite crystal. An example of the wurtzite crystal is GaN.

本発明によれば、下地に異種基板を用いずに所望の面方位を持つIII族窒化物半導体基板上にエピタキシャル薄膜を成長させることが可能になり、膜質が向上する。   According to the present invention, it is possible to grow an epitaxial thin film on a group III nitride semiconductor substrate having a desired plane orientation without using a different substrate as a base, and the film quality is improved.

また、本発明によれば、c軸方向に1mm以上の厚さに成長させたIII族窒化物半導体のバルク結晶をスライスまたは研磨し、無極性面または半極性面からなる面を形成させる工程と、該面を平坦な表面となるように加工する工程とを含むことを特徴とするIII族窒化物半導体基板の製造方法が提供される。   In addition, according to the present invention, a step of slicing or polishing a bulk crystal of a group III nitride semiconductor grown to a thickness of 1 mm or more in the c-axis direction to form a surface composed of a nonpolar surface or a semipolar surface; And a step of processing the surface to be a flat surface. A method of manufacturing a group III nitride semiconductor substrate is provided.

本発明によれば、平坦な無極性面あるいは半極性面薄膜を得るために必要な基板が提供される。また、本発明によれば、平坦な無極性面あるいは半極性面薄膜を得るために必要な基板の製造方法を提供される。この基板を用いることにより、ピエゾ電界の発生を抑制したIII族窒化物発光素子が実現される。   According to the present invention, a substrate necessary for obtaining a flat nonpolar plane or semipolar plane thin film is provided. Further, according to the present invention, there is provided a method for manufacturing a substrate necessary for obtaining a flat nonpolar surface or semipolar surface thin film. By using this substrate, a group III nitride light-emitting device in which generation of a piezoelectric field is suppressed is realized.

以下、本発明の実施例について、図面を用いて説明する。   Embodiments of the present invention will be described below with reference to the drawings.

<実施例1>
HVPE法によりサファイア基板上にGaNの成長を行ない、c軸方向に約3mm成長させたバルクGaN結晶の写真を図1に示す。これを図2及び図3で示した(11−22)面の基板が得られるように、c面からa面(11―20)方向に58.4°傾けてスライスした基板の写真を図6に示す。ここでGaNの各種面のミラー指数(hkil)に対する回折角(2θ)を示した表を図4に示す。この表から(11−22)面の2θは約69.1°となる。この表面の面指数を確認するためにXRD測定を行なったところ、図5に示す様に約69.1°にピークが現れておりこの面が(11−22)面であることを確認した。
<Example 1>
FIG. 1 shows a photograph of a bulk GaN crystal obtained by growing GaN on a sapphire substrate by the HVPE method and growing about 3 mm in the c-axis direction. A photograph of the substrate sliced by tilting 58.4 ° from the c-plane toward the a-plane (11-20) direction so that the (11-22) -plane substrate shown in FIGS. 2 and 3 can be obtained. Shown in Here, FIG. 4 shows a table showing diffraction angles (2θ) with respect to Miller indices (hkil) of various surfaces of GaN. From this table, 2θ of the (11-22) plane is about 69.1 °. When XRD measurement was performed in order to confirm the surface index of this surface, a peak appeared at about 69.1 ° as shown in FIG. 5, and it was confirmed that this surface was the (11-22) surface.

<実施例2>
次にこの(11−22)面の基板をダイヤ塗粒を用いてラッピング゛研磨を行ない、コロイダルシリカを用いてCMP研磨を行なった。表面の粗さは図7に示す様に1μm×1μmの範囲でRMS=0.19nmが得られた。
<Example 2>
Next, this (11-22) plane substrate was lapped using diamond coating grains, and CMP was performed using colloidal silica. As shown in FIG. 7, the surface roughness was RMS = 0.19 nm in the range of 1 μm × 1 μm.

<実施例3>
実施例1で得られた(11−22)面の裏面(−1−12−1)面を実施例1と同様に研磨した結果を図8に示す。1μm×1μmの範囲でRMS=0.19nmが得られた。
<Example 3>
FIG. 8 shows the result of polishing the back surface (−1-12-1) of the (11-22) surface obtained in Example 1 in the same manner as in Example 1. RMS = 0.19 nm was obtained in the range of 1 μm × 1 μm.

<実施例4>
c軸方向に6〜8mm成長させたバルクGaN自立基板を図9に示すように(11−22)基板として切出すときに、(0002)Ga面はas grown面で(0002)N面が剥離面だとすると、図10に示すような(11−22)基板として加工した場合、Ga面側とN面側の判断がつきにくい。そこでこのバルク基板のGa面側を鏡面、N面側を梨地面になるようにラッピングを行なうと上下の方位の区別をつけられる(−X方向をGa面側、+X方向をN面側)。(11−22)の表と裏はGa面に対して鋭角の面が裏面、鈍角の面が表面((11−22))面となる。バルク結晶において(11−22)面の±Xの方向が決まると、それに垂直な方向(±Y方向)は<10−10>と決められる。(11−22)面の表面に対して垂直な結晶方位の傾きをこの±X、Y方向で測定した結果を図11に示す。図11(a)はこの基板のサイズを示す写真、図11(b)は(11−22)面に対して±X、Y方向を示したスケッチである。ここで表面に対する結晶方位の傾きの絶対値は図11(d)に示すようにX、Y方向へのベクトルの和となるため計算式としては√((±X方向の傾き)+(±Y方向の傾き)) となる。測定結果を図11(c)に示すがいずれも±1°以内であった。
<Example 4>
When a bulk GaN free-standing substrate grown 6 to 8 mm in the c-axis direction is cut out as a (11-22) substrate as shown in FIG. 9, the (0002) Ga face is the as grown face and the (0002) N face is peeled off. If it is a plane, when it is processed as a (11-22) substrate as shown in FIG. 10, it is difficult to judge the Ga plane side and the N plane side. Therefore, when lapping is performed so that the Ga surface side of the bulk substrate is a mirror surface and the N surface side is a satin surface, it is possible to distinguish the upper and lower orientations (the −X direction is the Ga surface side and the + X direction is the N surface side). In the front and back of (11-22), an acute angle surface with respect to the Ga surface is the back surface, and an obtuse angle surface is the surface ((11-22)) surface. When the ± X direction of the (11-22) plane is determined in the bulk crystal, the direction (± Y direction) perpendicular thereto is determined as <10-10>. FIG. 11 shows the result of measuring the tilt of the crystal orientation perpendicular to the surface of the (11-22) plane in the ± X and Y directions. FIG. 11A is a photograph showing the size of the substrate, and FIG. 11B is a sketch showing ± X and Y directions with respect to the (11-22) plane. Here, the absolute value of the inclination of the crystal orientation with respect to the surface is the sum of the vectors in the X and Y directions as shown in FIG. 11 (d). Therefore, the calculation formula is √ ((± X direction inclination) 2 + (± Y direction inclination) 2 ). The measurement results are shown in FIG. 11 (c), but all were within ± 1 °.

以上、図面を参照して本発明の実施形態について述べたが、これらは本発明の例示であり、上記以外の様々な構成を採用することもできる。   As mentioned above, although embodiment of this invention was described with reference to drawings, these are the illustrations of this invention, Various structures other than the above are also employable.

実施例1に係るバルクGaN結晶の写真である。2 is a photograph of a bulk GaN crystal according to Example 1. 実施例1に係る(11−22)面の基板を模式的に示した図である。It is the figure which showed typically the board | substrate of the (11-22) plane which concerns on Example 1. FIG. 実施例1に係る(11−22)面の基板を模式的に示した図である。It is the figure which showed typically the board | substrate of the (11-22) plane which concerns on Example 1. FIG. 実施例1に係るGaNの各種面のミラー指数(hkil)に対する回折角(2θ)を示した表である。4 is a table showing diffraction angles (2θ) with respect to Miller index (hki) of various surfaces of GaN according to Example 1. 実施例1に係るXRD測定結果を示した図である。FIG. 6 is a diagram showing an XRD measurement result according to Example 1. 実施例1に係るスライスした基板を示した写真である。2 is a photograph showing a sliced substrate according to Example 1; 実施例2に係る基板の表面の粗さを示した図である。FIG. 6 is a diagram illustrating the roughness of the surface of a substrate according to Example 2. 実施例3に係る基板の表面の粗さを示した図である。FIG. 6 is a view showing the roughness of the surface of a substrate according to Example 3. 実施例4に係る基板の切出しを示した図である。It is the figure which showed cutting out of the board | substrate which concerns on Example 4. FIG. 実施例4に係る基板を示した図である。FIG. 6 is a view showing a substrate according to Example 4; (a)は実施例4に係る基板のサイズを示す写真である。(b)は実施例4に係る(11―22)面に対して±X、Y方向を示した図である。(c)は実施例4に係る測定結果を示した表である。(d)実施例4に係る結晶方位の傾きの絶対値を示した図である。(A) is a photograph showing the size of the substrate according to Example 4. FIG. (B) is a diagram showing ± X and Y directions with respect to the (11-22) plane according to Example 4. FIG. (C) is a table showing measurement results according to Example 4. (D) It is the figure which showed the absolute value of the inclination of the crystal orientation based on Example 4. FIG.

Claims (11)

c軸方向に1mm以上の厚さを有するIII族窒化物半導体のバルク結晶のc軸成長面をas grown面のままとして、前記バルク結晶を、スライスまたは研磨することにより、(11−20)面もしくは(10−10)面からなる無極性面、または、(10−1−1)面、(10−1−3)面、(10−11)面、(10−13)面もしくは(11−22)面からなる半極性面を形成し、該面を平坦な表面となるように加工したIII族窒化物半導体基板。 By slicing or polishing the bulk crystal while leaving the c-axis growth surface of the bulk crystal of the group III nitride semiconductor having a thickness of 1 mm or more in the c-axis direction as the grown surface, the (11-20) plane is obtained. Alternatively, a nonpolar plane consisting of (10-10) plane, or (10-1-1) plane, (10-1-3) plane, (10-11) plane, (10-13) plane or (11- 22) A group III nitride semiconductor substrate in which a semipolar plane composed of a plane is formed and the plane is processed to be a flat surface. c軸方向に1mm以上の厚さを有するIII族窒化物半導体のバルク結晶の(0001)面、(000−1)面、(11−20)面または(10―10)面に平坦面を加工した後、前記バルク結晶を、スライスまたは研磨することにより、(11−20)面もしくは(10−10)面からなる無極性面、または、(10−1−1)面、(10−1−3)面、(10−11)面、(10−13)面もしくは(11−22)面からなる半極性面を形成し、該面を平坦な表面となるように加工したIII族窒化物半導体基板。 Processing a flat surface on the (0001), (000-1), (11-20) or (10-10) plane of a bulk crystal of a group III nitride semiconductor having a thickness of 1 mm or more in the c-axis direction Then, by slicing or polishing the bulk crystal, a nonpolar plane consisting of (11-20) plane or (10-10) plane, or (10-1-1) plane, (10-1- 3) Group III nitride semiconductor formed by forming a semipolar plane consisting of a plane, a (10-11) plane, a (10-13) plane, or a (11-22) plane, and processing the plane to be a flat surface substrate. c軸方向に1mm以上の厚さを有するIII族窒化物半導体のバルク結晶の成長面および裏面に対し、それぞれ、異なる外観を呈するように表面処理を施した後、前記バルク結晶を、スライスまたは研磨することにより、(11−20)面もしくは(10−10)面からなる無極性面、または、(10−1−1)面、(10−1−3)面、(10−11)面、(10−13)面もしくは(11−22)面からなる半極性面を形成し、該面を平坦な表面となるように加工したIII族窒化物半導体基板。 After the surface treatment is performed so that the growth surface and the back surface of the bulk crystal of the group III nitride semiconductor having a thickness of 1 mm or more in the c-axis direction have different appearances, the bulk crystal is sliced or polished. By doing so, a nonpolar surface consisting of (11-20) plane or (10-10) plane, or (10-1-1) plane, (10-1-3) plane, (10-11) plane, A group III nitride semiconductor substrate in which a semipolar plane consisting of a (10-13) plane or a (11-22) plane is formed, and the plane is processed to be a flat surface. 無極性面または半極性面からなる前記面が、(11―22)面である、請求項1乃至3いずれか一項に記載のIII族窒化物半導体基板。   The group III nitride semiconductor substrate according to any one of claims 1 to 3, wherein the surface formed of a nonpolar surface or a semipolar surface is a (11-22) surface. 無極性面または半極性面からなる前記面の表面粗さが、1μm×1μmの範囲でRMS≦1nmである、請求項1乃至4いずれか一項に記載のIII族窒化物半導体基板。   The group III nitride semiconductor substrate according to any one of claims 1 to 4, wherein a surface roughness of the nonpolar or semipolar surface is RMS ≦ 1 nm in a range of 1 μm × 1 μm. 前記III族窒化物半導体のバルク結晶は、サファイアまたはSiCからなる下地基板上にIII族窒化物半導体を成長させた後、前記下地基板を除去して得られる自立基板である、請求項1乃至5いずれか一項に記載のIII族窒化物半導体基板。   The bulk crystal of the group III nitride semiconductor is a self-supporting substrate obtained by growing a group III nitride semiconductor on a base substrate made of sapphire or SiC and then removing the base substrate. The group III nitride semiconductor substrate as described in any one of Claims. 前記III族窒化物半導体のバルク結晶は、ウルツ鉱型結晶である、請求項1乃至6いずれか一項に記載のIII族窒化物半導体基板。   The group III nitride semiconductor substrate according to claim 1, wherein the group III nitride semiconductor bulk crystal is a wurtzite crystal. c軸方向に1mm以上の厚さに成長させたIII族窒化物半導体のバルク結晶のc軸成長面をas grown面のままとして、前記バルク結晶を、スライスまたは研磨することにより、(11−20)面もしくは(10−10)面からなる無極性面、または、(10−1−1)面、(10−1−3)面、(10−11)面、(10−13)面もしくは(11−22)面からなる半極性面を形成する工程と、
該面を平坦な表面となるように加工する工程と、
を含む、III族窒化物半導体基板の製造方法。
By slicing or polishing the bulk crystal while leaving the c-axis growth surface of the bulk crystal of the group III nitride semiconductor grown to a thickness of 1 mm or more in the c-axis direction as the grown plane, (11-20 ) plane or (10-10) plane nonpolar plane consisting of, or, (10-1-1) plane, (10-1-3) plane, (10-11) plane, (10-13) plane or ( 11-22) forming a semipolar plane comprising a plane ;
Processing the surface to be a flat surface;
A method for producing a group III nitride semiconductor substrate, comprising:
c軸方向に1mm以上の厚さに成長させたIII族窒化物半導体のバルク結晶の(0001)面、(000−1)面、(11−20)面または(10―10)面に平坦面を加工した後、前記バルク結晶を、スライスまたは研磨することにより、(11−20)面もしくは(10−10)面からなる無極性面、または、(10−1−1)面、(10−1−3)面、(10−11)面、(10−13)面もしくは(11−22)面からなる半極性面を形成する工程と、
該面を平坦な表面となるように加工する工程と、
を含む、III族窒化物半導体基板の製造方法。
A flat surface on a (0001) plane, a (000-1) plane, a (11-20) plane, or a (10-10) plane of a bulk crystal of a group III nitride semiconductor grown to a thickness of 1 mm or more in the c-axis direction After processing the bulk crystal, the bulk crystal is sliced or polished to obtain a nonpolar plane consisting of (11-20) plane or (10-10) plane, or (10-1-1) plane, (10- 1-3) forming a semipolar plane composed of a plane, a (10-11) plane, a (10-13) plane, or a (11-22) plane;
Processing the surface to be a flat surface;
A method for producing a group III nitride semiconductor substrate, comprising:
c軸方向に1mm以上の厚さに成長させたIII族窒化物半導体のバルク結晶の成長面および裏面に対し、それぞれ、異なる外観を呈するように表面処理を施した後、前記バルク結晶を、スライスまたは研磨することにより、(11−20)面もしくは(10−10)面からなる無極性面、または、(10−1−1)面、(10−1−3)面、(10−11)面、(10−13)面もしくは(11−22)面からなる半極性面を形成する工程と、
該面を平坦な表面となるように加工する工程と、
を含む、III族窒化物半導体基板の製造方法。
After the surface treatment is performed on the growth surface and the back surface of the bulk crystal of the group III nitride semiconductor grown to a thickness of 1 mm or more in the c-axis direction so as to exhibit different appearances, the bulk crystal is sliced. Or, by polishing, a nonpolar surface consisting of (11-20) plane or (10-10) plane, or (10-1-1) plane, (10-1-3) plane, (10-11) Forming a semipolar plane consisting of a plane, (10-13) plane or (11-22) plane;
Processing the surface to be a flat surface;
A method for producing a group III nitride semiconductor substrate, comprising:
サファイアまたはSiCからなる下地基板上に前記III族窒化物半導体を成長させる工程と、
前記下地基板を除去する工程と、
をさらに含む、請求項8乃至10いずれか一項に記載のIII族窒化物半導体基板の製造方法。
Growing the group III nitride semiconductor on a base substrate made of sapphire or SiC;
Removing the base substrate;
The manufacturing method of the group III nitride semiconductor substrate as described in any one of Claims 8 thru | or 10 further including these.
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